Electro-optical device and electronic apparatus

Abstract

An electro-optical device and an electronic apparatus. The present invention suppresses unevenness in a display area. An electro-optical device (10) is provided with: a substrate (102); a pixel electrode (131); a common electrode (133); a light-emitting functional layer (132) provided between the pixel electrode (131) and the common electrode (133); a partition wall (161) that is conductive, is in contact with the common electrode (133), and surrounds the pixel electrode (131), the light-emitting functional layer (132), and the common electrode (133) in plan view; a conductive layer (141) which is provided between the partition wall (161) and the substrate (102) and to which a constant potential is supplied; and an insulating layer (103) that is provided between the partition wall (161) and the conductive layer (141) in a cross-sectional view, and that has a contact hole (H1) for electrically connecting the partition wall (161) and the conductive layer (141).

Description

Technical Field

[0001] The present invention relates to electro-optical devices and electronic equipment. Background Art

[0002] Electro-optical devices using OLEDs are known as display elements. OLED stands for Organic Light Emitting Diode. Such light-emitting elements have a structure in which a light-emitting functional layer is sandwiched between a pixel electrode and a common electrode. The common electrode is required to be transparent, but transparent conductive materials generally tend to have a high resistance component. Therefore, a known technique utilizes a conductive partition wall that surrounds the pixel electrode, light-emitting functional layer, and common electrode when viewed from above, leveraging this conductivity to apply a voltage to the common electrode.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2023-100414

[0004] However, if the partition wall has a resistance component, not only will this resistance component waste power, but the voltage applied to the common electrode (first electrode) will also fluctuate depending on the position of the display area. If the voltage applied to the common electrode fluctuates, it will appear unevenly in the display area, resulting in a problem of reduced display quality. Summary of the Invention

[0005] In order to solve the above-mentioned problems, an electro-optical device involved in one embodiment of the present invention comprises: a substrate; a pixel electrode; a first electrode; a light-emitting functional layer, which is arranged between the pixel electrode and the first electrode; a partition wall, which is conductive and contacts the first electrode, and surrounds the pixel electrode, the light-emitting functional layer and the first electrode when viewed from above; a conductive layer, which is arranged between the partition wall and the substrate and is supplied with a constant potential; and a first insulating layer, which is arranged between the partition wall and the conductive layer when viewed in cross-section and has a contact hole for electrically connecting the partition wall and the conductive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 It is a perspective view showing the structure of the electro-optical device according to the first embodiment.

[0007] Figure 2 A diagram showing the electrical structure of an electro-optical device.

[0008] Figure 3 A diagram showing the structure of a pixel circuit in an electro-optical device.

[0009] Figure 4 A diagram for explaining the operation of the electro-optical device.

[0010] Figure 5It is a plan view showing a main portion of a pixel circuit in an electro-optical device.

[0011] Figure 6 is a cross-sectional view schematically showing an electro-optical device.

[0012] Figure 7 It is a cross-sectional view schematically showing the structure of a main part of the electro-optical device.

[0013] Figure 8 It is a cross-sectional view schematically showing the structure of a main part of the electro-optical device.

[0014] Figure 9 It is a cross-sectional view schematically showing an electro-optical device according to a second embodiment.

[0015] Figure 10 It is a cross-sectional view schematically showing an electro-optical device according to a third embodiment.

[0016] Figure 11 This is a perspective view showing a head-mounted display using an electro-optical device.

[0017] Figure 12 A diagram showing the optical structure of a head-mounted display.

[0018] Description of labels

[0019] 10: Electro-optical device; 102: Substrate; 103: Insulating layer; 104: Pixel separation layer; 131: Pixel electrode; 132, 132R, 132G, 132B: Light-emitting functional layer; 133: Common electrode; 141: Conductive layer; 143: Circuit layer; 145, 147: Connecting parts; 161: Partition wall; 163: Upper part; 300: Head-mounted display; H1, H2, H3: Contact holes. DETAILED DESCRIPTION

[0020] The electro-optical devices according to the embodiments are described below with reference to the accompanying drawings. In the drawings, the dimensions and scales of various components may differ from the actual dimensions and scales as appropriate. The embodiments described below are preferred specific examples and therefore include various technically preferred limitations. However, the scope of the present disclosure is not limited to these embodiments unless otherwise specified in the following description.

[0021] Figure 1 is a perspective view showing an electro-optical device 10 according to the first embodiment. Figure 2 2 is a block diagram showing the electrical structure of the electro-optical device 10 .

[0022] The electro-optical device 10 is, for example, a microdisplay panel used to display color images in a head-mounted display. The electro-optical device 10 includes a plurality of pixel units and a driver circuit that drives the pixel units. The pixel units and the driver circuit are integrated onto a semiconductor substrate. The semiconductor substrate is typically a silicon substrate, but other semiconductor substrates may also be used.

[0023] The electro-optical device 10 is housed in a frame-shaped housing 192 that opens into the display area 100. One end of an FPC board 194 is connected to the electro-optical device 10. FPC stands for Flexible Printed Circuits. The other end of the FPC board 194 is provided with multiple terminals 196 for connecting to a host device (not shown). When these terminals 196 are connected to the host device, image data, synchronization signals, and the like are supplied from the host device to the electro-optical device 10 via the FPC board 194.

[0024] like Figure 2 As shown, the electro-optical device 10 is roughly divided into a control circuit 30 , a data signal output circuit 50 , a display area 100 , and a scan line driving circuit 120 .

[0025] In the display area 100, m rows of scanning lines 12 are arranged along the X direction, and (3n) columns of data lines 14 are arranged along the Y direction and electrically insulated from the scanning lines 12. Note that m is an integer greater than 2, and n is an integer greater than 2.

[0026] An integer i of 1 to m is used to generally describe the scan line 12. To distinguish the rows of the scan line 12, they are sometimes referred to as the 1st, 2nd, 3rd, ..., i, ..., (m-1), and mth rows from the top in the figure.

[0027] Similarly, an integer j between 1 and n is used to generally describe the data lines 14. To distinguish the columns of the data lines 14, they are sometimes referred to as the 1st, 2nd, 3rd, ..., (3j-2), (3j-1), (3j), ..., (3n-2), (3n-1), and (3n) columns, starting from the left in the figures.

[0028] In the display area 100, the pixel portion 110R emitting light in the red band, the pixel portion 110G emitting light in the green band, and the pixel portion 110B emitting light in the blue band are arranged as follows corresponding to the intersection of the m-row scanning line 12 and the (3n)-column data line 14.

[0029] The pixel portion 110R is provided so as to correspond to the intersection of the scan line 12 in each row and the data line 14 in the (3j-2)th column. The pixel portion 110G is provided so as to correspond to the intersection of the scan line 12 in each row and the data line 14 in the (3j-1)th column. The pixel portion 110B is provided so as to correspond to the intersection of the scan line 12 in each row and the data line 14 in the (3j)th column.

[0030] Specifically, in the display area 100, pixel units 110R, 110G, and 110B are arranged along the X direction, and pixel units 110 of the same color are arranged along the Y direction. Therefore, if one focuses on any column of data lines 14, it corresponds to a pixel unit 110 of the same color. Furthermore, additive color mixing of the three pixel units 110R, 110G, and 110B adjacent in the X direction produces a single color. Thus, the electro-optical device 10 displays an image with color pixels arranged in m rows and n columns.

[0031] Pixel units 110R, 110G, and 110B are strictly speaking sub-pixel units, but are referred to as pixel units for ease of description. Pixel units 110R, 110G, and 110B are generally described with reference numeral 110 when not specifying a color.

[0032] The control circuit 30 controls each component based on video data Vid and a synchronization signal Sync supplied from an upper-level host device (not shown). Specifically, the control circuit 30 generates various control signals to control each component.

[0033] The video data Vid specifies the grayscale level of pixels in the image to be displayed using, for example, 8 bits. The synchronization signal Sync includes a vertical synchronization signal that instructs the start of vertical scanning of the video data Vid, a horizontal synchronization signal that instructs the start of horizontal scanning, and a dot clock signal that indicates the timing of one pixel of the video data.

[0034] The brightness characteristics of the grayscale levels represented by the image data Vid supplied from the host device do not necessarily match the brightness characteristics of the OLED included in the pixel unit 110. Therefore, to cause the OLED to emit light at a brightness corresponding to the grayscale levels represented by the image data Vid, the control circuit 30 up-converts the 8-bit image data Vid to, for example, 10 bits, and outputs the data as image data Vdata. Therefore, the 10-bit image data Vdata corresponds to the grayscale levels of R, G, and B specified by the image data Vid.

[0035] In addition, in the up-conversion, a lookup table in which the correspondence between 8 bits of the input video data Vid and 10 bits of the output video data Vdata is stored in advance is used.

[0036] The scan line driver circuit 120 is a circuit for driving the pixel units 110 arranged in m rows (3n) by one row, under the control of the control circuit 30. For example, the scan line driver circuit 120 sequentially supplies scan signals / Gwr(1), / Gwr(2), ..., / Gwr(m-1), and / Gwr(m) to the scan lines 12 in the 1st, 2nd, 3rd, ..., (m-1), and mth rows. Generally, the scan signal supplied to the scan line 12 in the i-th row is denoted by / Gwr(i).

[0037] The data signal output circuit 50 is a circuit that, under the control of the control circuit 30, outputs data signals via the data lines 14 to the pixel units 110 located in the row selected by the scan line driver circuit 120. The data signals are voltage signals obtained by converting 10-bit image data Vdata into analog signals. Specifically, the data signal output circuit 50 converts the image data Vdata corresponding to one row of pixel units 110 in columns 1 through (3n) in the selected row into analog signals and outputs them in that order to the data lines 14 in columns 1 through (3n).

[0038] Although not specifically shown, a power supply circuit is provided outside the display area 100 . This power supply circuit generates the power supply potentials Vel and Vct for the control circuit 30 , the scan line driving circuit 120 , the data signal output circuit 50 , and the OLED.

[0039] In the figure, the data signals output to the data lines 14 in the 1st, 2nd, 3rd, ..., (3n-2), (3n-1), and (3n) columns are denoted as Vd(1), Vd(2), Vd(3), ..., Vd(3n-2), Vd(3n-1), and Vd(3n) in that order. Generally speaking, for example, the potential of the data line 14 in the (3j-2) column is denoted as Vd(3j-2).

[0040] Figure 3 1 is a diagram showing the electrical structure of a pixel portion in the electro-optical device 10 .

[0041] The pixel units 110R, 110G, and 110B have the same structure from an electrical point of view. Therefore, the electrical structure of the pixel units 110R, 110G, and 110B will be described using the pixel unit 110R corresponding to the i-th row and the (3j-2)-th column as an example.

[0042] As shown in the figure, from an electrical point of view, the pixel portion 110R includes P-channel MOS transistors 121 and 122 , an OLED 130 , and a capacitor 140 .

[0043] In the description of the pixel portion, the term “from an electrical point of view” is used when referring to a plurality of elements constituting the pixel portion and the connection relationship between the plurality of elements.

[0044] The OLED 130 in the pixel unit 110R sandwiches a light-emitting functional layer 132R between a pixel electrode 131 and a common electrode 133. The light-emitting functional layer 132R emits light in the R band. The pixel electrode 131 functions as an anode, and the common electrode 133 functions as a cathode. In the OLED 130, when current flows from the anode to the cathode, holes injected from the anode and electrons injected from the cathode recombine in the light-emitting functional layer 132R to form excitons, generating light in the R band.

[0045] In the transistor 121 of the pixel portion 110R in the i-th row (3j-2)th column, the gate node g is connected to the drain node of the transistor 122, the source node is connected to the power supply line 116 of the potential Vel, and the drain node is connected to the pixel electrode 131 serving as the anode of the OLED 130.

[0046] In the transistor 122 of the pixel portion 110R in the i-th row and (3j-2)-th column, the gate node is connected to the scan line 12 in the i-th row, and the source node is connected to the data line 14 in the (3j-2)-th column. The common electrode 133 of the OLED 130, which functions as a cathode, is connected to the power supply line 118 having a potential Vct. Furthermore, since the electro-optical device 10 is formed on a silicon substrate, the substrate potential of the transistors 121 and 122 is set to a potential equivalent to, for example, the potential Vel.

[0047] From an electrical perspective, Figure 3 The pixel portion 110R shown is the same as the pixel portions 110G and 110B. However, the light-emitting functional layer 132R in the pixel portion 110G is replaced by a light-emitting functional layer 132G that emits light including the G band, and in the pixel portion 110B is replaced by a light-emitting functional layer 132B that emits light including the B band.

[0048] In addition, Figure 1 、 Figure 2 as well as Figure 3 In the diagram, the X direction is the direction in which the scanning lines 12 in the electro-optical device 10 extend, which is the horizontal direction in terms of the display screen. The Y direction is the direction in which the data lines 14 extend, which is the vertical direction in terms of the display screen. The two-dimensional plane defined by the X and Y directions is the substrate surface of the semiconductor substrate. Figure 1 The Z direction is perpendicular to the X and Y directions and is the emission direction of light from the OLED 130. In this description, a top view refers to observing the semiconductor substrate from the direction opposite to the Z direction, and a cross-sectional view refers to observing the semiconductor substrate along a direction perpendicular to the substrate surface.

[0049] Figure 4 This is a timing chart for explaining the operation of the electro-optical device 10 .

[0050] In the electro-optical device 10, the m rows of scanning lines 12 are scanned sequentially in the order of the 1st, 2nd, 3rd, ..., mth rows during a frame (V). Specifically, as shown in the figure, the scanning signals / Gwr(1), / Gwr(2), ..., / Gwr(m-1), and / Gwr(m) are sequentially and exclusively driven to the L level during each horizontal scanning period (H) by the scanning line driver circuit 120.

[0051] Furthermore, in this embodiment, the periods during which adjacent scanning signals, among scanning signals / Gwr(1) to / Gwr(m), are at L level are separated in time. Specifically, after scanning signal / Gwr(i-1) changes from L level to H level, the next scanning signal / Gwr(i) changes to L level after a period. This period corresponds to the horizontal retrace period.

[0052] In this description, the period of one frame (V) refers to the period required to display one frame of an image specified by the video data Vid. If the length of the period of one frame (V) is the same as the vertical synchronization period, for example, if the frequency of the vertical synchronization signal included in the synchronization signal Sync is 60 Hz, then the period is 16.7 milliseconds, which corresponds to one cycle of the vertical synchronization signal. Furthermore, the horizontal scanning period (H) is the interval during which the scanning signals / Gwr(1) to / Gwr(m) are sequentially at the L level. However, for convenience in the figures, the start timing of the horizontal scanning period (H) is set to be approximately in the center of the horizontal retrace period.

[0053] When one of the scanning signals / Gwr(1) to / Gwr(m), for example, the scanning signal / Gwr(i) supplied to the scanning line 12 in the i-th row, reaches an L level, the transistor 122 in the pixel portion 110R in the i-th row and the (3j-2)-th column is turned on. Consequently, the gate node g of the transistor 121 in the pixel portion 110R is electrically connected to the data line 14 in the (3j-2)-th column.

[0054] In this description, the "on state" of a transistor refers to a low-impedance state where the source and drain nodes are electrically closed. The "off state" of a transistor refers to a high-impedance state where the source and drain nodes are electrically open.

[0055] In this specification, "electrically connected" or simply "connected" refers to a state in which two or more elements are directly or indirectly connected or coupled. "Non-electrically connected" or simply "non-connected" refers to a state in which two or more elements are not directly or indirectly connected or coupled.

[0056] During the horizontal scanning period (H) when the scanning signal / Gwr(i) is at the L level, the data signal output circuit 50 converts the image data Vdata decomposed into R, G, and B into analog signal potentials Vd(1) to Vd(3n) and outputs them as data signals to the data lines 14 in the 1st to (3n)th columns. The image data Vdata decomposed into R, G, and B are the three primary color components of the grayscale levels of the pixels in row 1 and column 1 to row i and column n represented by the image data Vid.

[0057] Taking the (3j-2)th column as an example, the data signal output circuit 50 converts the grayscale level R(i, j) of R in the pixel of the i row and j column represented by the image data Vid into the potential Vd(3j-2) of the analog signal, and outputs it as a data signal to the data line 14 of the (3j-2)th column.

[0058] In addition, during the horizontal scanning period (H) when the scanning signal / Gwr(i-1) of the previous row of the scanning signal / Gwr(i) becomes the L level, the data signal output circuit 50 converts the grayscale level R(i-1, j) of the pixel in the (i-1) row and j column into the potential Vd(3j-2) of the analog signal, and outputs it as a data signal to the data line 14 of the (3j-2)th column.

[0059] The data signal of the potential Vd(3j-2) is applied to the gate node g of the transistor 121 in the pixel portion 110R of the i-th row and the (3j-2)-th column via the data line 14 of the (3j-2)-th column. The potential Vd(3j-2) is held by the capacitor 140. Therefore, the transistor 121 allows a current corresponding to the voltage between the gate node and the source node to flow through the OLED 130.

[0060] Even when the scanning signal Gwr(i) reaches an H level and the transistor 122 is turned off, the potential Vd(3j-2) is held by the capacitor 140, so that current continues to flow through the OLED 130. Therefore, in the pixel portion 110R of the i-th row (3j-2) column, the OLED 130 continues to emit light at a brightness corresponding to the voltage held by the capacitor 140, that is, the grayscale level, until one frame (V) elapses and the transistor 122 is turned on again, and the voltage of the data signal is applied again.

[0061] Furthermore, the pixel unit 110R in the i-th row and (3j-2)-th column is described here, but the OLEDs 130 in the pixel units 110R, 110G, and 110B in other than the i-th row and (3j-2)-th column also emit light at the luminance indicated by the image data Vdata.

[0062] Furthermore, the OLEDs 130 of the pixel units 110R, 110G, and 110B other than the i-th row also emit light at the luminance indicated by the video data Vdata due to the scanning signals / Gwr(1) to / Gwr(m) sequentially becoming L levels.

[0063] Therefore, in the electro-optical device 10 , during one frame (V), the OLEDs 130 in all pixel units 110R, 110G, and 110B from the 1st row and 1st column to the mth row (3nth column) emit light at the brightness indicated by the video data Vdata, displaying an image for one frame.

[0064] Figure 5 is a plan view showing the arrangement of the pixel portions 110R, 110G, and 110B in the electro-optical device 10. Figure 6 Therefore Figure 5 A cross-sectional view of the main parts taken along the line A-A'.

[0065] like Figure 5 As shown in FIG. 1 , the pixel portions 110R, 110G, and 110B are repeatedly arranged in parallel in the X direction in this order when viewed from above.

[0066] exist Figure 6 In the embodiment, the substrate 102 is a semiconductor substrate such as silicon. A conductive layer 141 and a circuit layer 143 are provided on the substrate 102.

[0067] Conductive layer 141 is a wiring layer for applying a potential Vct generated by a power supply circuit located outside display area 100 to common electrode 133, and constitutes a portion of power supply line 116. Circuit layer 143 is provided corresponding to pixel portion 110R, 110G, or 110B and includes elements such as transistors 121 and 122, and various wirings.

[0068] An insulating layer 103 is provided on the substrate 102. Contact holes H1 and H2 are provided in the insulating layer 103. The contact hole H1 is filled with a connection member 145 made of tungsten or the like, and the contact hole H2 is similarly filled with a connection member 147 made of tungsten or the like.

[0069] After a reflective metal layer and a transparent conductive layer are stacked on the insulating layer 103 filled with the connecting members 145 and 147, both layers are patterned. This patterning results in a stack of reflective electrode 171 and pixel electrode 131, as well as a stack of electrodes L1 and L2. The stack of reflective electrode 171 and pixel electrode 131 is provided for each pixel portion 110R, 110G, and 110B.

[0070] The reflective metal layer is a metal wiring layer having light reflectivity such as aluminum, and the transparent conductive layer is a wiring layer having light transparency and conductivity such as ITO (Indium Tin Oxide).

[0071] The reflective electrode 171 is in contact with the connection member 147 . Thus, the pixel electrode 131 is electrically connected to the drain node of the transistor 121 included in the circuit layer 143 via the reflective electrode 171 and the connection member 147 .

[0072] Similarly, the electrode L1 comes into contact with the connection member 145. Thus, the potential Vct is applied to the stack of the electrodes L1 and L2.

[0073] The insulating pixel isolation layer 104 is provided to cover the insulating layer 103, the reflective electrode 171, and the pixel electrode 131. Then, an opening Ap for exposing the pixel electrode 131 and a contact hole H3 for exposing the electrode L2 are provided in the pixel isolation layer 104. Specifically, the opening Ap is provided so as to be as shown in a plan view. Figure 5 The shape is rectangular, and when viewed in section Figure 6 As shown, the contact hole H3 overlaps with the periphery of the pixel electrode 131. The contact hole H3 is provided to provide electrical connection between the partition wall 161 described below and the stacked body of the electrodes L1 and L2.

[0074] Figure 7 This is a cross-sectional view showing a stage in the manufacturing process of the electro-optical device 10 where the partition wall 161 and the upper portion 163 are provided.

[0075] The partition wall 161 and the upper portion 163 are provided by, for example, a uniform pattern. Figure 5 As shown in the middle shaded area, the boundary between the adjacent pixel portions 110R, 110G, and 110B is formed as shown in the cross-sectional view. Figure 6 or Figure 7 As shown, it overlaps with electrodes L1 and L2.

[0076] In a plan view, the partition walls 161 and the upper portion 163 form a lattice pattern with portions extending in the X direction and portions extending in the Y direction.

[0077] The partition wall 161 is made of a conductive metal wiring layer such as aluminum, for example. The upper portion 163 is made of a conductive metal wiring layer such as titanium, for example, and is made of a material having a lower etching rate than the partition wall, that is, a material that is difficult to etch.

[0078] In the uniform etching, since the etching of the partition wall 161 proceeds faster than that of the upper portion 163 , the upper portion 163 is wider than the partition wall 161 in a plan view, and both ends of the upper portion 163 protrude relative to the side surfaces of the partition wall 161 in a cross-sectional view.

[0079] Furthermore, while the partition wall 161 and the upper portion 163 are provided to surround the pixel portions 110R, 110G, and 110B when viewed from above, the conductive layer 141, the contact holes H1 and H3, and the connecting member 145 do not need to surround the pixel portions 110R, 110G, and 110B; they may be provided between the light-emitting functional layers of adjacent pixel portions when viewed from above. For example, the contact holes H1 and H3 and the connecting member 145 may be provided at the intersection of the portion of the partition wall 161 extending in the X direction and the portion extending in the Y direction.

[0080] Figure 8 This is a cross-sectional view showing the state immediately after the light-emitting functional layer 132R is formed in the manufacturing process of the electro-optical device 10 .

[0081] As shown in the figure, the light-emitting functional layer 132R is evaporated from above in the figure. Therefore, the light-emitting functional layer 132R is formed in the pixel portion 110R in a manner covering the opening Ap of the pixel separation layer 104, but is not formed in the portion of the pixel separation layer 104 blocked by the upper portion 163. That is, the light-emitting functional layer 132R is formed in the pixel portion 110R, overlapping with the pixel electrode 131, using the already provided upper portion 163 as a mask. Therefore, the light-emitting functional layer 132R is formed by self-alignment rather than photolithography, and therefore does not require a resist coating process, an exposure process using a photomask, a development process for removing unnecessary resist, a process for etching the portion from which the resist has been removed, or a process for removing the resist.

[0082] In addition, although the light-emitting functional layer 132R is also provided in the pixel portions 110G and 110B of different colors at this stage, it is removed by etching later.

[0083] Return to Figure 6 After forming the light-emitting functional layer 132R, a transparent and conductive conductive layer such as ITO is formed to form the common electrode 133. The common electrode 133 contacts the sidewalls of the partition wall 161. Therefore, the potential Vct is applied to the common electrode 133 sequentially through the conductive layer 141, the connecting member 145, the electrodes L1 and L2, and the partition wall 161.

[0084] After the common electrode is formed, a cap layer 153 having insulating and transparent properties is formed so as to include the opening Ap in a plan view and cover the common electrode 133 in a cross-sectional view.

[0085] Furthermore, on the upper surface of the upper portion 163 surrounding the pixel portion 110R, the light emitting functional layer 132R, the same conductive layer as the common electrode 133 , and the cap layer 153 are stacked in this order.

[0086] After the cap layer 153 is formed, the sealing layer 155 having insulating properties is provided so as to cover the display region 100 .

[0087] Furthermore, at this stage, the common electrode 133, cap layer 153, and sealing layer 155 are provided in an overlapping manner on the upper layer of the light-emitting functional layer 132R in the pixel portions 110G and 110B. These are removed to form the light-emitting functional layer 132G of the correct color in the pixel portion 110G. The pixel portion 110R is first covered with a photoresist for protection. Subsequently, the light-emitting functional layer 132R, common electrode 133, cap layer 153, and sealing layer 155 in the pixel portions 110G and 110B are removed by etching, exposing the pixel electrode 131.

[0088] Similar to the pixel portion 110R, in the pixel portion 110G, the light emitting functional layer 132G of G is formed by self-alignment using the upper portion 163 as a mask, and the common electrode 133 , the cap layer 153 , and the sealing layer 155 are overlapped.

[0089] At this stage, in the pixel portion 110B, the common electrode 133 , the cap layer 153 , and the sealing layer 155 are provided in an overlapping manner on the light-emitting functional layer 132G.

[0090] After these are removed, the pixel portion 110G is covered with a photoresist to protect it in order to form a light-emitting functional layer 132B of the correct color in the pixel portion 110B. The light-emitting functional layer 132G, common electrode 133, cap layer 153, and sealing layer 155 in the pixel portion 110B are then removed by etching to expose the pixel electrode 131.

[0091] Similar to the pixel portions 110R and 110G, in the pixel portion 110B, the light emitting functional layer 132G of G is formed by self-alignment using the upper portion 163 as a mask, and the common electrode 133 , the cap layer 153 , and the sealing layer 155 are superposed.

[0092] Thus, it becomes Figure 6 The structure shown.

[0093] In the figure, although the light-emitting functional layer 132, the conductive layer similar to the common electrode 133, the insulating layer similar to the cap layer 153, and the sealing layer 155 overlap on the upper surface of the upper portion 163, they are separated near the boundary between the pixel portions 110R, 110G, and 110B. This separation is achieved by etching using the protection of the photoresist described above.

[0094] In the electro-optical device 10 , light generated by the light-emitting functional layers 132R, 132G, and 132B is reflected by the reflective electrode 171 and emitted in the Z direction even if it is directed in the direction opposite to the Z direction.

[0095] According to the electro-optical device 10 according to the embodiment, the potential Vct is applied to the common electrode 133 not only through the single path of the partition wall 161 but also through the paths of the conductive layer 141 , the connection member 145 , and the electrodes L1 and L2 .

[0096] Therefore, according to this embodiment, the potential Vct is applied to the common electrode 133 via multiple paths electrically connected in parallel, thereby reducing the resistance of the path from the power supply circuit to the common electrode 133. Therefore, in this embodiment, the power consumed by the resistance component can be reduced, and the distribution of the potential Vct of the common electrode 133 in the display area 100 is uniform, thereby achieving high-quality display with reduced display unevenness.

[0097] The common electrode 133 is an example of a "first electrode," the contact hole H1 is an example of a "contact hole," and the insulating layer 103 is an example of a "first insulating layer." Furthermore, among the light-emitting functional layers 132R, 132G, and 132B, the light-emitting functional layer 132 of an unspecified color is an example of a "light-emitting functional layer."

[0098] The electrode L2 is an electrode obtained by patterning the same conductive layer as the pixel electrode 131 and is composed of the same material as the pixel electrode 131. The electrode L2 is an example of a "first electrode" composed of the same material as the pixel electrode 131, the electrode L1 is an example of a "second electrode", and the pixel isolation layer 104 is an example of a "second insulating layer".

[0099] Figure 9 1 is a cross-sectional view of a main part showing the structure of the electro-optical device 10 according to the second embodiment. Figure 6 In the first embodiment shown, the connection member 145 filled in the contact hole H1 is in contact with the partition wall 161 via the electrodes L1 and L2. In contrast, in the second embodiment, the contact hole H1 is formed not only in the insulating layer 103 but also in the pixel isolation layer 104, and the connection member 145 is filled in the contact hole H1. In other words, in the second embodiment, the connection member 145 is in direct contact with the partition wall 161, not via the electrodes L1 and L2.

[0100] Therefore, in the second embodiment, since the electrodes L1 and L2 are not provided below the partition wall 161, the partition wall 161 is reduced in size in a plan view, and the area of the opening Ap is increased, that is, the aperture ratio of the pixel portions 110R, 110G, and 110B can be increased.

[0101] In the second embodiment, the contact hole H1 is formed in the insulating layer 103 and the pixel isolation layer 104. Although not specifically shown in the figure, it is also possible to have a different structure, such that, as in the first embodiment, the contact hole H1 is formed only in the insulating layer 103, the connection member 145 is filled in the contact hole H1, and a contact hole is formed in the pixel isolation layer 104, and the partition wall 161 is filled through the contact hole. That is, the structure is as follows: Figure 6 The electrodes L1 and L2 are removed, and a portion of the partition wall 161 is filled in the contact hole H3 opened in the pixel isolation layer 104 .

[0102] Figure 10 It is a cross-sectional view of main parts showing the structure of an electro-optical device 10 according to the third embodiment.

[0103] In the third embodiment, the contact hole H1 is formed in the insulating layer 103 and the pixel isolation layer 104, and the connection member 145 is filled in the contact hole H1. The structure up to this point is the same as that of the second embodiment. However, in the third embodiment, the partition wall 161 is formed of the same material as the connection member 145 filled in the contact hole H1, specifically, tungsten or the like.

[0104] According to the third embodiment, similar to the second embodiment, electrodes L1 and L2 are not provided below the partition wall 161. Furthermore, according to the third embodiment, the partition wall 161 is made of the same material as the connection member 145, compared to the second embodiment. Therefore, the partition wall 161 can be made smaller in plan view. Therefore, in the third embodiment, the area of the opening Ap can be increased, thereby improving the aperture ratio of the pixel portions 110R, 110G, and 110B.

[0105] The first to third embodiments described above (hereinafter referred to as "embodiments, etc.") can be variously modified or applied as follows.

[0106] In the embodiments and other embodiments, the openings Ap in the pixel portions 110R, 110G, and 110B are rectangular in shape, but are not limited thereto. For example, they may also be hexagonal. Furthermore, the opening area of the openings Ap may be uneven across the pixel portions 110R, 110G, and 110B, varying for each color. For example, the opening area of the openings Ap may be set such that G>R>B.

[0107] The pixel portions 110R, 110G, and 110B may be aligned in either the X direction or the Y direction. Alternatively, the pixel portions 110R and 110B may be arranged in the same column, while the pixel portion 110G may be arranged in a column adjacent to the column of pixel portions 110R and 110B.

[0108] In addition, in the embodiment and the like, the light-emitting functional layers 132R, 132G, and 132B are formed in sequence, but the order of film formation is not limited to this.

[0109] Next, an electronic device to which the electro-optical device 10 according to the embodiment is applied will be described. The electro-optical device 10 is suitable for applications requiring high-definition displays with small pixels. Therefore, a head-mounted display will be described as an example of an electronic device.

[0110] Figure 11 is a diagram showing the appearance of a head-mounted display, Figure 12 is a diagram showing its optical structure.

[0111] First, if Figure 11 As shown in FIG, similar to ordinary glasses, the head mounted display 300 has temples 310, a nose bridge 320, and lenses 301L and 301R. Figure 12 As shown, the head mounted display 300 is provided with an electro-optical device 10L for the left eye and an electro-optical device 10R for the right eye near the nose bridge 320 and on the back side (lower side in the figure) of the lenses 301L and 301R.

[0112] The image display surface of the electro-optical device 10L is Figure 12 The image display surface of the electro-optical device 10R is arranged on the right side opposite to the electro-optical device 10L. As a result, the image displayed by the electro-optical device 10R is emitted in the direction of 3 o'clock in the figure via the optical lens 302R. The half-mirror 303R reflects the image displayed by the electro-optical device 10R in the direction of 6 o'clock, while transmitting light incident from the direction of 12 o'clock.

[0113] In this configuration, the wearer of the head mounted display 300 can observe the display images of the electro-optical devices 10L and 10R in a see-through state superimposed on the external scene.

[0114] In the head mounted display 300 , if the electro-optical device 10L displays the left-eye image and the electro-optical device 10R displays the right-eye image in binocular images with parallax, the wearer can perceive the displayed images as if they have depth and three-dimensionality.

[0115] Furthermore, electronic devices including the electro-optical device 10 can be applied not only to the head-mounted display 300 but also to electronic viewfinders in video cameras, interchangeable-lens digital cameras, and the like, displays in smartwatches and wearable devices, and light valves in projection projectors. Furthermore, the electro-optical device 10 is not limited to display devices and can also be applied to surface-emitting elements having a matrix-shaped light source, specifically backlights and optical communication components.

[0116] According to the above-described exemplary embodiments, for example, the following embodiments can be understood. In order to facilitate understanding of each embodiment, the reference numerals of the drawings are collectively described in parentheses for convenience, but the present invention is not limited to the illustrated embodiments.

[0117] An electro-optical device (10) of mode 1 comprises: a substrate (102); a pixel electrode (131); a first electrode (133); a light-emitting functional layer (132) disposed between the pixel electrode (131) and the first electrode (133); a partition wall (161) having conductivity and in contact with the first electrode (133), surrounding the pixel electrode (131), the light-emitting functional layer (132) and the first electrode (133) when viewed from above; a conductive layer (141) disposed between the partition wall (161) and the substrate (102) and supplied with a constant potential; and a first insulating layer (103) disposed between the partition wall (161) and the conductive layer (141) when viewed in cross-section, having a contact hole (H1) for electrically connecting the partition wall (161) and the conductive layer (141).

[0118] According to the electro-optical device involved in method 1, the first electrode is in contact with the partition wall, and a contact hole for electrically connecting the partition wall and the conductive layer is provided in the first insulating layer between the partition wall and the conductive layer. Therefore, in addition to the partition wall, low resistance can also be achieved through double wiring with the conductive layer.

[0119] In the electro-optical device (10) according to a specific embodiment 2 of embodiment 1, the partition wall (161) is electrically connected to the conductive layer (141) via a first electrode (L1) made of the same material as the pixel electrode (131).

[0120] In the electro-optical device (10) according to another specific embodiment 3 of the embodiment 1, a second electrode (171) having reflectivity is provided between the pixel electrode (131) and the first insulating layer (103).

[0121] In the electro-optical device (10) involved in another specific embodiment 4 of embodiment 1, there is a second insulating layer (104) having insulating properties, overlapping with the pixel electrode (131), and having an opening at the pixel electrode (131).

[0122] In the electro-optical device (10) involved in the specific mode 5 of mode 4, the contact hole (H1) is opened in the first insulating layer (103) and the second insulating layer (104), and the partition wall (161) is electrically connected to the conductive layer (141) by means of a connecting component (145) provided in the contact hole (H1).

[0123] In the electro-optical device (10) according to a specific embodiment 6 of embodiment 5, the partition wall (161) is made of the same material as that of the connecting member (145).

[0124] In the electro-optical device (10) according to another specific aspect 7 of aspect 1, the conductive layer (141) is provided between adjacent light-emitting functional layers (132) in a plan view.

[0125] In the electro-optical device (10) according to another specific embodiment 8 of embodiment 1, the contact hole (H1) is provided between adjacent light-emitting functional layers (132) in a plan view.

[0126] An electronic device (300) according to a ninth aspect includes the electro-optical device (10) according to any one of the first to eighth aspects.

Claims

1. An electro-optical device comprising: substrate; pixel electrode; 1st electrode; a light-emitting functional layer, disposed between the pixel electrode and the first electrode; a partition wall having conductivity, being in contact with the first electrode, and surrounding the pixel electrode, the light-emitting functional layer, and the first electrode in a plan view; a conductive layer provided between the partition wall and the substrate and supplied with a constant potential; and The first insulating layer is provided between the partition wall and the conductive layer in a cross-sectional view and has a contact hole for electrically connecting the partition wall and the conductive layer.

2. The electro-optical device according to claim 1, wherein The partition wall is electrically connected to the conductive layer via a first electrode made of the same material as the pixel electrode.

3. The electro-optical device according to claim 1, wherein A reflective second electrode is provided between the pixel electrode and the first insulating layer.

4. The electro-optical device according to claim 1, wherein The electro-optical device includes a second insulating layer having insulating properties, overlapping with the pixel electrode, and having an opening at the pixel electrode.

5. The electro-optical device according to claim 4, wherein The contact hole is opened in the first insulating layer and the second insulating layer. The partition wall is electrically connected to the conductive layer via a connection member provided in the contact hole. The electro-optical device according to claim 5 , wherein: The partition wall is made of the same material as the connecting member.

7. The electro-optical device according to claim 1, wherein The conductive layer is provided between adjacent light-emitting functional layers in a plan view.

8. The electro-optical device according to claim 1, wherein The contact hole is provided between adjacent light-emitting functional layers in a plan view. 9 . An electronic device comprising the electro-optical device according to claim 1 .

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