PCB (Printed Circuit Board) defect detection method and system

Abstract

The invention relates to the technical field of PCB detection, and discloses a PCB defect detection method and system, and the method comprises the steps: collecting multispectral imaging data through an image collection module, and generating an original image data set; the defect analysis server receives the synchronous imaging data to construct a three-dimensional surface topology matrix; in combination with the original image data set and the real-time imaging data, performing multi-scale decomposition on the three-dimensional surface topological matrix, extracting texture features, positioning a defect region, outputting defect type space distribution features through a layered recognition model, and updating the original image data set; and dynamically calibrating the detection parameters according to the feature categories. The system comprises an image acquisition module group, a data transmission module, a three-dimensional modeling module, a defect identification module and a parameter calibration module. According to the scheme, the accuracy, comprehensiveness and efficiency of defect detection are improved, and the detection requirements of modern PCB production are met.

Description

Technical Field

[0001] The present invention relates to the technical field of PCB circuit board detection, and in particular to a PCB circuit board defect detection method and system. Background Art

[0002] Printed circuit boards (PCBs) are key components of electronic devices, and their quality directly impacts the performance and reliability of these products. With the rapid advancement of electronic technology, PCBs are trending towards higher density, higher precision, and multi-layered fabrication, placing higher demands on PCB defect detection. Traditional PCB defect detection methods primarily rely on manual visual inspection and automated optical inspection (AOI). Manual visual inspection is inefficient, significantly influenced by subjective factors of the inspector, and therefore struggles to meet the demands of large-scale production. While optical inspection has improved detection efficiency to a certain extent, the accuracy and reliability of complex PCB structures, particularly those with multi-layer boards, still need to be improved to detect internal defects, minor defects, and defects caused by differences in material properties.

[0003] Existing inspection technologies face numerous challenges. On the one hand, PCB defects vary widely, including open circuits, short circuits, line burrs, dielectric layer separation, and voids. The characteristics of these defects vary significantly, making it difficult for traditional single inspection methods to fully cover the detection needs of all types of defects. On the other hand, with the increasing complexity of PCB manufacturing processes, the amount of data that needs to be processed during the inspection process has increased dramatically. Efficiently integrating and analyzing multi-source heterogeneous data to accurately locate and classify defects is a pressing issue. Furthermore, in actual production, changes in the inspection environment (such as fluctuations in light source intensity and equipment vibration) and differences in the material properties of the PCB itself can also affect the accuracy of inspection results. Traditional inspection systems lack a dynamic calibration mechanism, making them difficult to adapt to complex and changing inspection scenarios.

[0004] Although some existing detection methods based on image processing and machine learning exist, most suffer from the following deficiencies: First, they underutilize the three-dimensional structural information of PCB circuit boards, relying solely on two-dimensional image analysis to accurately reflect the actual defects on the circuit boards. Second, they lack the ability to predict defect growth trends, making it difficult to detect and address defects in their early stages, leading to delayed quality control during the production process. Third, the detection parameters are relatively fixed and cannot be dynamically adjusted based on real-time detection results, impacting detection efficiency and accuracy. Therefore, there is an urgent need for a PCB defect detection method and system that can comprehensively utilize multi-dimensional data, accurately identify and locate defects, and possess dynamic calibration capabilities to meet the high-quality detection needs of modern PCB manufacturing. Summary of the Invention

[0005] The purpose of the present invention is to provide a PCB circuit board defect detection method and system to solve the problems raised in the above background technology.

[0006] To achieve the above object, the present invention provides the following technical solution: a PCB circuit board defect detection method, the method comprising:

[0007] The image acquisition module collects multispectral imaging data of the PCB circuit board surface to generate an original image data set;

[0008] The defect analysis server receives synchronous imaging data from multiple image acquisition modules to construct a three-dimensional surface topology matrix;

[0009] Identifying characteristic categories of circuit board defects based on the original image dataset and real-time imaging data from each image acquisition module, wherein identifying characteristic categories of circuit board defects includes: performing multi-scale decomposition on a three-dimensional surface topology matrix, extracting texture features in combination with the original image dataset, locating defect regions based on material reflectance gradients and dielectric layer distribution information, outputting spatial distribution features of defect types through a hierarchical recognition model, and updating the original image dataset based on the spatial distribution features;

[0010] According to the feature category, the detection parameters are dynamically calibrated.

[0011] Preferably, the feature categories for identifying circuit board defects include:

[0012] Performing frequency domain transformation on the three-dimensional surface topology matrix to extract structural deformation distribution, dielectric layer offset characteristics, and defect growth trends;

[0013] Performing material consistency modeling on the three-dimensional surface topology matrix based on the structural deformation distribution and the dielectric layer offset characteristics, dividing the circuit board surface into a plurality of detection units and marking the unit identifiers, performing correlation matching with the original image dataset based on the reflection coefficients of the detection units, and marking the unit identifiers in the original image dataset;

[0014] Calculating a thermal stress gradient according to the position of the image acquisition module, predicting the evolution of the defect morphology according to the thermal stress gradient and the defect growth trend, and calculating a defect probability map for each inspection unit;

[0015] Constructing a hierarchical recognition model, taking the defect probability map as an input parameter of the hierarchical recognition model, performing spatial correlation modeling on the defect probability map through the hierarchical recognition model, and outputting spatial distribution characteristics of defect types;

[0016] The original image data set is updated according to the spatial distribution characteristics to obtain feature categories of circuit board defects.

[0017] Preferably, performing frequency domain transformation on the three-dimensional surface topology matrix includes:

[0018] Normalizing the three-dimensional surface topology matrix, extracting abnormal response areas in the matrix using a multi-scale convolution kernel, suppressing outliers in the abnormal response areas, and calculating the defect growth trend using a wavelet packet decomposition algorithm;

[0019] Calculating frequency domain correlation features of the three-dimensional surface topology matrix, calculating deformation coupling coefficients between units, dielectric layer stability indexes, and void region markers based on the frequency domain correlation features, constructing a feature enhancement network, and calculating dielectric layer offset features using the feature enhancement network;

[0020] The time domain features and spatial domain features collected by each image acquisition module are extracted, and the imaging feature vector of the module is calculated based on the spectral difference between the time domain features and the spatial domain features. The image acquisition modules of different perspectives are feature-aligned based on the imaging feature vector, and the defect growth trend is calculated.

[0021] Preferably, the material consistency modeling of the three-dimensional surface topology matrix includes:

[0022] According to the structural deformation distribution, deformation sampling points are extracted from each frame of data, and the sampling points are correlated and mapped with the offset characteristics of the dielectric layer to generate a material consistency map. The material consistency maps generated by multiple image acquisition modules are spatially registered to calculate the material distribution consistency of the region.

[0023] A deformation threshold is set, and the anomaly source is located based on the structural deformation value of the multi-frame three-dimensional surface topology matrix. The deformation difference is calculated. If the deformation difference is greater than or equal to the deformation threshold, it indicates that there is dielectric layer separation in the detection unit. Physical model constraint compensation is performed on the current unit. According to the thermal expansion model corresponding to the current unit, the material distribution consistency of the current unit is iteratively corrected. The compensation coefficient of the separation area is calculated based on the correction result.

[0024] The material consistency modeling is performed on the three-dimensional surface topology matrix according to the material distribution consistency, and the offset amount is marked on the physical model of the detection unit through the medium layer offset feature.

[0025] Preferably, the calculating of the thermal stress gradient according to the position of the image acquisition module includes:

[0026] Based on multiple sets of surface topology data, the reflection coefficient change points are extracted and mapped to a unified coordinate system according to the installation position of the image acquisition module. The change points are interpolated using radial basis functions to generate a regional thermal stress field model.

[0027] Performing equally spaced sampling along the conduction path of the thermal stress field model, calculating the thermal conductivity, thermal deformation index, and stress change curvature of the path based on the sampling results, and calculating the thermal stress parameters based on the thermal conductivity, thermal deformation index, and stress change curvature;

[0028] Based on the imaging parameters and resolution of the image acquisition module, the morphological characteristics of the defect distribution in each frame of data are projected onto the thermal stress field model. The model is partitioned along the conduction direction according to the number of modules. The evolution law of the defect distribution within the partition is analyzed, and the defect distribution characteristics are calculated based on the evolution law.

[0029] A thermal stress gradient is calculated based on the thermal stress parameters and the defect distribution characteristics. The thermal stress gradient calculation process includes: based on the spatial position range of the head-end image acquisition module to the terminal image acquisition module, selecting spatial coordinate points in the module arrangement direction, cumulatively calculating the product of the heat conduction characteristic weight value and the defect distribution characteristic weight value within the spatial resolution range, and superimposing the influence factor of the image acquisition module sampling period on the thermal stress change rate.

[0030] Preferably, the calculation of the defect probability map of each detection unit includes:

[0031] Using the main conduction path of the thermal stress field model as a baseline, taking the extreme position of the defect distribution in each frame of data as a reference point, calculating the defect position offset, and drawing a defect distribution curve according to the spatial coordinates;

[0032] modifying the expansion rate and direction of the defect growth trend based on the thermal stress gradient;

[0033] Starting from the nearest defect distribution point, the distribution curve is continuously drawn according to the correction results of the expansion rate and direction to generate the next time series defect distribution point until the distribution points cover the entire detection area and a defect probability map is generated.

[0034] Preferably, the constructing of the hierarchical recognition model includes:

[0035] The input layer is used to organize the defect probability map into spatial tensor data and perform normalization processing;

[0036] The feature aggregation layer is used to extract regional correlation features of defects by processing spatial tensor data and construct topological relationships between detection units;

[0037] The decision output layer is used to integrate the correlation between defect features in spatial units and generate defect classification strategies.

[0038] Preferably, the step of obtaining characteristic categories of circuit board defects includes:

[0039] According to the spatial distribution characteristics of the defect type output by the hierarchical recognition model, the identification of the detection unit is matched with the spatial distribution characteristics;

[0040] The unit data in the original image dataset are reorganized according to spatial features to generate a unit distribution map sorted by defect severity;

[0041] According to the reorganized unit distribution map, the optimized defect feature category is output.

[0042] Preferably, the dynamic calibration of the detection parameters includes:

[0043] Mapping the unit identifications to the units of the characteristic categories of the circuit board defects one by one;

[0044] Control the inspection system's actions based on the spatial distribution characteristics of the defect type, including light source intensity adjustment, focus compensation, and scanning path planning operations;

[0045] According to the spatial distribution of defect characteristics and the preset calibration strategy, detection resources are dynamically allocated to the corresponding spatial units.

[0046] Preferably, the present invention further includes a PCB circuit board defect detection system, the system comprising:

[0047] The image acquisition module group consists of multiple image acquisition modules deployed in the detection area. The fields of view of two adjacent image acquisition modules overlap in a set ratio. These modules are used to collect multispectral imaging data from the PCB surface and generate raw image data sets.

[0048] The data transmission module is used to connect the image acquisition module group and the defect analysis server to realize the transmission of synchronous imaging data of multiple image acquisition modules to the defect analysis server;

[0049] The 3D modeling module is integrated into the defect analysis server, receives the synchronous imaging data and constructs the 3D surface topology matrix;

[0050] The defect recognition module, deployed on the defect analysis server, performs multi-scale decomposition of the three-dimensional surface topology matrix based on the original image dataset and the real-time imaging data of each image acquisition module. It extracts texture features based on the original image dataset and locates the defect area based on the material reflectance gradient and dielectric layer distribution information. It outputs the spatial distribution characteristics of the defect type through a hierarchical recognition model and updates the original image dataset based on the spatial distribution characteristics.

[0051] The parameter calibration module is set in the defect analysis server and dynamically calibrates the detection parameters according to the characteristic categories of the circuit board defects output by the defect recognition module.

[0052] Compared with the prior art, the present invention has the following beneficial effects:

[0053] In terms of defect detection accuracy, the acquisition of multispectral imaging data through multiple image acquisition modules can obtain richer information about the PCB circuit board surface. Combined with the construction of a three-dimensional surface topology matrix, full utilization of the circuit board's three-dimensional structural information is achieved. Multi-scale decomposition and frequency domain transformation of the three-dimensional surface topology matrix can extract key information such as structural deformation distribution and dielectric layer offset characteristics. Combining the material reflection coefficient gradient with dielectric layer distribution information to locate defect areas can accurately identify various defects, including tiny defects that are difficult to detect with traditional methods and internal defects in multi-layer boards. For example, by normalizing the three-dimensional surface topology matrix and performing multi-scale convolution kernel operations, abnormal response areas can be effectively extracted. Combined with the wavelet packet decomposition algorithm to calculate the defect growth trend, dynamic tracking of the defect growth process is achieved, improving the accuracy and reliability of defect detection.

[0054] In terms of comprehensive defect detection, the constructed hierarchical recognition model is able to perform spatial correlation modeling on the defect probability map and output the spatial distribution characteristics of defect types, achieving comprehensive coverage and multi-dimensional analysis of PCB surface defects. By dividing the circuit board surface into multiple detection units and performing material consistency modeling, the defects in each detection unit can be independently analyzed and marked, ensuring that no defects in any area are missed. At the same time, combined with thermal stress gradient calculation and defect growth trend prediction, it is possible to analyze the evolution of defect morphology, not only detecting existing defects but also predicting potential defect risks, further improving the comprehensiveness of detection.

[0055] In terms of detection efficiency, the data transmission module enables synchronized imaging data transmission between multiple image acquisition modules. Combined with the efficient processing capabilities of the 3D modeling module and the defect recognition module, it can quickly complete the inspection and analysis of PCB circuit boards. The introduction of a dynamic calibration mechanism adjusts detection parameters such as light source intensity, focal length, and scanning path in real time based on defect detection results. This avoids the repeated and invalid detection caused by fixed parameters in traditional inspection systems and improves detection efficiency. For example, based on the spatial distribution characteristics of defect types, detection resources are dynamically allocated to corresponding spatial units, achieving optimal allocation of detection resources and shortening detection time.

[0056] In terms of adaptability and flexibility, the system can detect PCBs of varying specifications and complexity by adjusting the layout of image acquisition modules, multi-scale decomposition parameters, and the structure of the hierarchical recognition model, based on different PCB types and inspection requirements. The establishment of a thermal stress field model and the calculation of thermal stress gradients take into account the influence of the inspection environment and the characteristics of the PCB material, enabling the system to adapt to different production environments and material differences, thereby improving its adaptability and stability. Furthermore, by dynamically updating the original image dataset, the system can continuously learn and accumulate new defect characteristics, further enhancing inspection performance.

[0057] In terms of production quality control, analysis of the spatial distribution characteristics of defect types and defect probability maps provides powerful data support for optimizing PCB production processes. Based on these test results, production personnel can promptly adjust production parameters and improve processes, reducing defects at the source and improving overall PCB quality. Furthermore, the ability to predict defect growth trends enables timely detection and action at an early stage, preventing defects from escalating and reducing production costs and quality risks. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 This is a working principle diagram of the PCB circuit board defect detection method according to the present invention;

[0059] Figure 2 Design drawings for defect feature category identification;

[0060] Figure 3 Design diagram for thermal stress gradient calculation;

[0061] Figure 4 Design graph generated for the defect probability map. DETAILED DESCRIPTION

[0062] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0063] See also Figures 1-4 The present invention relates to a PCB circuit board defect detection method, and the specific implementation steps are as follows:

[0064] Multiple image acquisition modules are deployed within the inspection area with a preset field of view overlap ratio. Each module simultaneously collects multispectral imaging data from the PCB surface. By adjusting the module's spectral acquisition parameters (such as visible light and infrared light bands), raw image data containing multidimensional information such as the PCB surface texture and material reflectance characteristics is acquired. The data collected by all modules is integrated into a raw image dataset, providing basic data support for subsequent defect analysis.

[0065] The defect analysis server receives synchronized imaging data from multiple image acquisition modules via a data transmission module. Based on the spatial coordinates and field-of-view overlap of each module, it uses stereo vision algorithms (such as binocular triangulation) to reconstruct the PCB surface's 3D geometry and construct a 3D surface topology matrix reflecting the PCB's surface topography. This matrix records the spatial coordinates and height information of each inspection point, as well as the topological connections between adjacent points, in a grid format, enabling a digital representation of the PCB's surface morphology.

[0066] The three-dimensional surface topology matrix is decomposed at multiple scales, and multiscale analysis methods such as wavelet transforms are used to extract texture features (such as surface roughness and crack orientation) from the matrix at different spatial resolution levels. Combined with the original image dataset, texture feature vectors are further extracted using algorithms such as gray-level co-occurrence matrices and local binary patterns. Furthermore, based on the material reflectance gradient and dielectric layer distribution information, methods such as threshold segmentation and edge detection are used to locate defect areas. Defect features are classified using a hierarchical recognition model, which outputs spatial distribution characteristics of defect types (such as the location and range of different defect types on the circuit board surface). Based on this information, the original image dataset is updated, enabling dynamic tracking and optimization of defect features.

[0067] Based on the identified defect feature categories, the system analyzes the detection sensitivity requirements for different defect types. For areas with densely distributed defects or less obvious features, it dynamically adjusts detection parameters, such as increasing light source intensity to improve image contrast, adjusting lens focal length to enhance imaging resolution in local areas, or optimizing scanning paths to ensure comprehensive coverage of defect areas. This allows for precise allocation of detection resources and improved detection efficiency.

[0068] The present invention will be further described below in conjunction with Examples 1 to 5:

[0069] Example 1:

[0070] During frequency-domain analysis and feature extraction of a 3D surface topology matrix, the matrix must be normalized. By unifying the numerical range of matrix elements, characteristic deviations caused by differences in physical scale or data acquisition across different inspection areas are eliminated, ensuring that the data in the matrix can be analyzed on a consistent basis. After normalization, the matrix is scanned using a multi-scale convolution kernel. This kernel, consisting of kernels of varying sizes, simulates the human eye's ability to perceive detail at varying viewing distances. Through point-by-point convolution operations, regions of abnormal response within the matrix are identified. These regions typically exhibit localized height changes or abnormal curvature, potentially corresponding to defects on the circuit board surface.

[0071] For identified abnormal response areas, outlier suppression is required. Outliers can be caused by noise, interference, or accidental factors during the data collection process. If not addressed, they can mislead subsequent analysis. Through statistical methods, such as calculating the degree of difference between each data point and its neighbors and setting appropriate thresholds, data points that deviate from the normal range can be identified as outliers and corrected or removed to improve data reliability.

[0072] After processing the abnormal response areas, the three-dimensional surface topology matrix is decomposed in the frequency domain using a wavelet packet decomposition algorithm. Wavelet packet decomposition breaks the matrix data into frequency subbands. By analyzing the energy distribution and characteristic parameters of each subband, the defect growth trend is calculated. High-frequency components correspond to detailed information and rapidly changing features in the matrix, and can be used to capture rapidly developing defects such as newly formed cracks and minor deformations on the circuit board surface. Low-frequency components reflect the overall trends and slowly changing characteristics of the matrix, and are suitable for analyzing long-term defect morphologies such as dielectric layer aging and overall deformation.

[0073] Calculate the frequency domain correlation characteristics of the three-dimensional surface topology matrix. Use the cross-correlation function to analyze the similarity of adjacent detection units in the frequency domain, thereby deriving the deformation coupling coefficient between units, the dielectric layer stability index, and the void region marker. The deformation coupling coefficient is used to measure the degree of mutual influence of deformation in adjacent regions. If a region deforms, the deformation coupling coefficient can be used to predict the scope and extent of its impact on the surrounding area. The dielectric layer stability index assesses the integrity of the dielectric layer structure based on frequency domain characteristics. The lower the index, the more likely the dielectric layer is to have defects such as separation and damage. The void region marker locates possible void defects within the circuit board by analyzing abnormal patterns of frequency domain characteristics, providing clues for subsequent defect location.

[0074] To further enhance feature distinguishability, a feature enhancement network is constructed. This network utilizes a convolutional neural network (CNN) architecture, combining multiple convolutional, activation, and pooling layers to perform nonlinear transformations and abstraction on frequency domain features. The convolution kernels in the convolutional layers automatically learn key patterns in frequency domain features. The activation layers introduce nonlinear factors, enabling the network to capture complex feature relationships. The pooling layers reduce data dimensionality through downsampling, improving computational efficiency. Through the processing of the feature enhancement network, key information such as dielectric layer offset characteristics is further highlighted, facilitating subsequent defect analysis and identification.

[0075] The temporal and spatial features of the data collected by each image acquisition module must also be extracted. Temporal features reflect how the image data changes over time, such as grayscale variations at different moments and the time-series evolution of defect morphology. Spatial features describe the spatial distribution of pixels within the image, such as texture structure and edge characteristics. Using Fourier transforms, these temporal and spatial features are converted to the frequency domain, and the difference in their spectra is calculated to generate an imaging feature vector for each image acquisition module. This imaging feature vector captures the module's response characteristics at different frequency bands, reflecting the module's imaging characteristics and viewing angle differences.

[0076] Based on imaging eigenvectors, feature registration is performed on image acquisition modules from different perspectives. The purpose of feature registration is to ensure the consistency of image data collected by multiple modules within the spatial coordinate system, facilitating cross-module joint analysis. Image registration techniques such as phase correlation are employed to calculate the phase difference between images from different modules, determine transformation parameters such as translation and rotation, and transform the image data from each module into a unified global coordinate system. After feature registration, images from different perspectives can be precisely aligned, and the positional correspondence of defects in images from different modules is clearly defined, providing a foundation for accurately calculating defect growth trends.

[0077] When calculating defect growth trends, the system combines frequency domain analysis results with registered multi-module image data to analyze how defects change at different time points and spatial locations. By comparing the differences in the three-dimensional surface topology matrices of adjacent time frames, the defect's expansion direction, speed, and range are determined, enabling dynamic tracking and prediction of defect growth trends. For example, by analyzing multiple consecutive frames of a crack defect, the growth rate of its length and width can be calculated, as well as whether the expansion direction is toward critical circuit areas. This provides a basis for assessing the defect's severity and formulating detection strategies.

[0078] Example 2:

[0079] During material consistency modeling, deformation sampling points are extracted from each frame of the 3D surface topology matrix data based on the distribution of structural deformation. These sampling points are selected based on an analysis of geometric features within the matrix, such as points of sudden changes in curvature, height anomalies, or locations where topological connectivity changes significantly. These points typically correspond to areas where material properties on the PCB surface may differ. By marking these sampling points within each frame of data, a discrete point set is formed that reflects the structural deformation characteristics of the current frame.

[0080] The deformation sampling points are mapped to the dielectric layer offset characteristics. The dielectric layer offset characteristics are obtained through the previous analysis of the three-dimensional surface topology matrix and reflect the offset of the dielectric layer inside the circuit board relative to the ideal position. By establishing a correspondence between the sampling point coordinates and the dielectric layer offset and offset direction, the geometric characteristics of the structural deformation are combined with the changes in the internal characteristics of the material to generate a material consistency map. This map visually displays the uniformity of the material distribution on the circuit board surface. For example, in the map, differences in color or grayscale values can represent the level of material consistency. Areas with uniform color indicate consistent material distribution, while areas with sudden color changes may indicate material defects or dielectric layer separation.

[0081] Since multiple image acquisition modules collect data from different perspectives, the generated material consistency maps may have perspective deviations. Therefore, it is necessary to spatially align the maps generated by each module. The spatial alignment process uses methods such as thin plate spline interpolation. By selecting feature points with the same name (such as deformation sampling points at the same physical position) in the maps of different modules, a coordinate transformation relationship between the maps is established, and the maps of each module are unified into the same spatial coordinate system. This eliminates errors caused by perspective differences and ensures that the regional material distribution consistency index calculated subsequently can truly reflect the actual situation of the circuit board. The material distribution consistency index is calculated using statistical methods, such as calculating the standard deviation and coefficient of variation of the pixel values in each region of the map. The smaller the index value, the more uniform the material distribution, and vice versa, it indicates that there is a material inconsistency problem.

[0082] To identify serious defects such as dielectric layer separation, a deformation threshold needs to be set. This is based on a statistical analysis of historical data from normal circuit boards. For example, the structural deformation values of a large number of normal samples are calculated, and the average value plus a multiple of the standard deviation is used as the threshold to ensure effective distinction between normal and abnormal deformations. In the analysis of multi-frame three-dimensional surface topology matrices, clustering algorithms (such as the DBSCAN algorithm) are used to process the structural deformation values and locate the source of anomalies. The DBSCAN algorithm identifies clusters of data points based on density, identifying densely packed areas with similar structural deformation values as a cluster, while isolated points far from other clusters are considered anomaly sources, which typically correspond to the starting locations of defects.

[0083] Calculate the deformation difference between adjacent frames, that is, compare the difference in structural deformation values of the same detection unit at different time points. If the deformation difference is greater than or equal to the deformation threshold, it indicates that the detection unit may have a dielectric layer separation. At this time, the current unit needs to be compensated for the physical model constraints. Call the thermal expansion model corresponding to the unit. The model is established based on the thermophysical property parameters of the circuit board material (such as thermal expansion coefficient, elastic modulus, etc.) and can simulate the deformation behavior of the material under different temperature conditions. By inputting the actual deformation data of the current detection unit into the thermal expansion model, iterative calculation and correction are performed to adjust the calculation results of the material distribution consistency to compensate for the impact of dielectric layer separation.

[0084] During the iterative correction process, compensation coefficients for the separation area are calculated using methods such as finite element simulation. Finite element simulation divides the inspection unit into multiple micro-units. By solving mechanical equilibrium equations and heat conduction equations, the impact of dielectric layer separation on the deformation of the surrounding material is analyzed, and compensation coefficients are calculated to correct the geometric parameters of the topological matrix. By applying the compensation coefficients, relevant parameters in the three-dimensional surface topological matrix are corrected, improving the accuracy of defect location and ensuring that the model more realistically reflects the actual physical state of the circuit board.

[0085] After completing the above processing, material consistency modeling is performed on the three-dimensional surface topology matrix based on the material distribution consistency results. During the modeling process, information such as the material consistency index and dielectric layer offset characteristics of each detection unit are integrated into the matrix, and attribute values reflecting the material characteristics are assigned to each grid point or detection unit in the matrix. At the same time, the physical model of the detection unit is annotated with offsets using the dielectric layer offset characteristics, clearly recording the offset direction and distance of the dielectric layer within each unit, providing accurate physical model parameter support for subsequent defect analysis.

[0086] The entire material consistency modeling process closely revolves around three-dimensional surface topology matrices and multi-module image data. Through multiple steps, including deformation sampling point extraction, association mapping, spatial registration, anomaly detection, physical model compensation, and parameter annotation, it achieves in-depth analysis and precise modeling of the distribution characteristics of circuit board materials. This process not only identifies areas of material inconsistency but also, through the introduction and correction of physical models, deeply analyzes the physical mechanisms of defect generation. This provides critical foundational data for subsequent thermal stress gradient calculations, defect probability map generation, and accurate classification of hierarchical recognition models, ensuring that the entire PCB defect detection system can comprehensively and accurately identify and analyze various defects, improving the reliability and effectiveness of detection.

[0087] Example 3:

[0088] In the process of calculating thermal stress gradients and generating defect probability maps, it is necessary to extract reflection coefficient change points based on multiple sets of surface topology data. Reflection coefficient change points are usually located at the interface of different materials on the circuit board, such as the junction of the conductive line and the insulating dielectric layer. Due to the difference in material properties, the reflection coefficient will suddenly change. The surface topology data is analyzed by image processing algorithms to identify the locations where these reflection coefficients change significantly, and the coordinate information of each point is recorded. Subsequently, based on the installation position parameters of the image acquisition module, including the spatial coordinates and orientation of the module in the detection area, all reflection coefficient change points are mapped to a unified global coordinate system, so that the data collected by different modules can be integrated and analyzed under the same spatial reference.

[0089] The radial basis function interpolation method is used to fit discrete reflection coefficient change points to generate a continuous thermal stress field model. This method interpolates the thermal stress values at any point in space by constructing basis functions centered at each change point. Basis functions can take the form of Gaussian functions, multi-quadratic functions, and other functions. By adjusting the parameters of the basis functions, the interpolation results accurately reflect the thermal stress distribution on the circuit board surface. The model visually displays areas of high and low thermal stress distribution in the form of three-dimensional or two-dimensional graphics. For example, darker areas indicate higher thermal stress and may present a risk of defects due to heat accumulation.

[0090] Samples are taken at equal intervals along the conduction path of the thermal stress field model. The spacing between the sampling points is set according to the detection accuracy requirements, usually in the millimeter or sub-millimeter level. For each sampling point, the thermal conductivity of the path is calculated using Fourier's law of heat conduction. Fourier's law of heat conduction describes the relationship between the heat conduction rate and the temperature gradient. The formula is:

[0091]

[0092] in, Indicates heat flux density (unit: W / m²), reflecting the rate of heat conduction; Indicates the thermal conductivity of the material (unit: W / (m·K)), which is determined by the properties of the circuit board material; Represents the temperature gradient (unit: K / m), reflecting the severity of temperature changes in space. This formula can be used to quantify the heat transfer efficiency during heat conduction and further evaluate the impact of a material's thermal conductivity on thermal stress distribution.

[0093] The thermal deformation index (TDI) is calculated using the strain-stress relationship formula. The TDI measures the degree of deformation of circuit board materials under thermal stress. Its calculation is based on parameters such as the material's coefficient of thermal expansion and elastic modulus, reflecting the physical relationship between thermal stress and deformation. By analyzing the TDI, the risk of structural deformation caused by thermal stress in different areas can be determined. For example, areas with a higher TDI are more susceptible to defects such as cracks and dielectric layer separation.

[0094] The stress variation curvature is calculated using curve fitting. This describes the degree of curvature in the spatial distribution of thermal stress. By performing polynomial or spline fitting on the stress values along the conduction path in the thermal stress field model and solving for the curvature of the fitted curve, stress concentration areas and sudden changes in stress distribution can be identified. These areas are often where defects are prone to occur and expand.

[0095] A thermal stress parameter assessment model is constructed by combining thermal conductivity, thermal deformation index, and stress variation curvature. This model integrates these parameters into a comprehensive index through weighted summation, quantifying the impact of thermal stress on the circuit board structure. Weights are assigned based on the importance of each parameter to defect formation. For example, thermal conductivity may be given a higher weight in high-temperature environments, while thermal deformation index may be given a higher weight in areas of greater material brittleness.

[0096] Based on the imaging parameters of the image acquisition module (such as resolution and frame rate) and the morphological characteristics of the defect distribution (such as defect size, shape, and location), defects are projected onto corresponding locations in the thermal stress field model. Imaging resolution determines the accuracy of defect location, while frame rate influences the ability to capture the dynamic evolution of defects. By converting the 2D image coordinates of the defect into the 3D spatial coordinates of the thermal stress field model, a spatial correlation between the defect distribution and the thermal stress distribution is achieved, facilitating analysis of the interaction between thermal stress and defects.

[0097] The thermal stress field model is partitioned along the direction of thermal stress conduction. For example, the model can be divided into multiple detection zones at equal intervals along the conduction path, with each zone corresponding to a specific physical area of the circuit board. Statistical analysis is performed on the defect distribution data within each zone, including the number, type, and size variation of defects. The evolution of the defect distribution is deduced, such as the rate of defect expansion over time and whether the expansion direction aligns with the direction of thermal stress conduction. By calculating characteristic defect distribution parameters such as defect density (the number of defects per unit area) and the directionality index (a measure of the concentration of defect expansion directions), the characteristics of the defect distribution are quantified, providing a basis for subsequent thermal stress gradient calculations.

[0098] The thermal stress gradient is calculated based on the spatial range from the head-end image acquisition module to the end-end image acquisition module. Multiple spatial coordinate points are uniformly selected along the module arrangement direction. For each coordinate point, the product of the thermal conductivity characteristic weight and the defect distribution characteristic weight within the spatial resolution range is calculated. The thermal conductivity characteristic weight reflects the strength of thermal stress conduction in the region and is determined by parameters such as the thermal conductivity and temperature gradient at that point in the thermal stress field model. The defect distribution characteristic weight is set based on parameters such as the defect density and severity of the region, with higher weights assigned to regions with higher defect risk.

[0099] Furthermore, the influence factor of the image acquisition module sampling period on the rate of change of thermal stress needs to be superimposed. The shorter the sampling period, the more thermal stress data points are acquired per unit time, and the more accurately the rate of change of thermal stress is captured. Therefore, the influence factor is inversely proportional to the sampling period. For example, the influence factor corresponding to a module with a sampling period of 1 second may be greater than that of a module with a sampling period of 5 seconds. By comprehensively considering the weight product of the spatial coordinate points and the influence factor of the sampling period, the thermal stress gradient value is cumulatively calculated. This value reflects the rate of change and trend of the thermal stress and its corresponding defect distribution characteristics along the arrangement direction of the image acquisition modules.

[0100] When generating a defect probability map, the primary conduction path of the thermal stress field model is first used as a baseline. This baseline is typically the direction of most significant thermal stress conduction, such as the axis of the primary heat conduction path in a circuit board. The extreme locations of the defect distribution in each frame of data (such as the endpoint of the longest crack or the edge of the largest void) are used as reference points. The offset of the reference point relative to the baseline is calculated, including both lateral and longitudinal offsets. Based on the offsets and spatial coordinates, a defect distribution curve is plotted within the thermal stress field model. This curve visually illustrates the spatial distribution of defects and their positional relationship relative to the thermal stress conduction path.

[0101] The thermal stress gradient is used to modify the expansion rate and direction of defect growth trends. Regions with large thermal stress gradients indicate dramatic thermal stress changes and more pronounced thermal-mechanical coupling effects on defects. Consequently, the defect growth rate may be faster and its direction may be more aligned with the thermal stress gradient. By establishing a mapping relationship between thermal stress gradients and defect growth parameters, for example, setting a proportional increase in the defect growth rate for each increase in the thermal stress gradient, the originally predicted expansion rate and direction are adjusted to better align the defect growth trend prediction with the actual physical process.

[0102] Starting from the most recent defect distribution point, the defect distribution curve is drawn according to the corrected expansion rate and direction to generate the next time series of defect distribution points. Through iterative calculations, the distribution points are gradually expanded to the entire inspection area, ultimately forming a complete defect probability map. This map represents the defect probability of each inspection unit in the form of a grid or pixel. Areas with higher probability values indicate a greater likelihood of defect existence or expansion. This provides the inspection system with intuitive defect risk prediction results, facilitating prioritized detailed inspection and analysis of high-risk areas.

[0103] Example 4:

[0104] During the construction of the hierarchical recognition model and the output of defect feature categories, let's take the inspection of a certain type of PCB as an example. Assume that its surface is distributed with two typical defects: cracks and dielectric layer separation. The input layer first receives three-dimensional spatial tensor data converted from the defect probability map. The dimensions of this tensor correspond to the physical dimensions of the PCB inspection area (e.g., width × height × time). For example, if the inspection area is a 100mm × 80mm rectangular area and the time dimension contains five consecutive frames of inspection data, the spatial tensor can be represented as a 100 × 80 × 5 matrix. The input layer normalizes this tensor data, mapping the values of each dimension to the range [-1, 1] to eliminate the influence of different physical dimensions (such as length and time) on model training. For example, coordinate values are divided by the maximum physical dimension of the inspection area, and the time frame number is divided by the total number of frames to ensure that all data are of the same order of magnitude.

[0105] The feature aggregation layer uses a graph neural network (GNN) architecture, abstracting inspection units into graph nodes. The number of nodes matches the number of inspection units (e.g., if the inspection area is divided into 1000 units, the number of nodes is 1000). Each node's initial feature vector contains parameters such as the unit's defect probability, thermal stress gradient, and material consistency index. Edges between nodes are established based on the spatial adjacency of the inspection units. For example, undirected edges are set between adjacent units (the four neighborhoods of top, bottom, left, and right). The edge weight is determined by the inverse of the distance between the unit centers, with closer distances giving a greater weight (e.g., between two units separated by a distance of d, the edge weight is 1 / d). Through multiple layers of graph convolution (e.g., the GCN layer), each node aggregates feature information from neighboring nodes to extract regional correlation features associated with defects. For example, if a node represents an inspection unit with a high defect probability, graph convolution can incorporate the thermal stress characteristics of its neighboring units to determine whether the high probability defect is caused by localized thermal stress concentration. This allows the topological relationship between inspection units to be established, such as forming a "high stress-high defect probability" correlation region.

[0106] Based on the output of the feature aggregation layer, the decision output layer uses a fully connected neural network to perform defect classification. The number of neurons in the fully connected layer matches the number of predefined defect types (e.g., crack, dielectric layer separation, and normal). The Softmax activation function outputs the probability distribution of each defect type. For example, for a particular inspection unit, the model outputs a crack probability of 0.7, a dielectric layer separation probability of 0.2, and a normal probability of 0.1, indicating that the unit has a crack defect. The decision output layer also generates spatial distribution features of the defect types, recording the defect type and confidence level (e.g., 0.7) for each inspection unit in matrix form. These are then mapped to the physical coordinates of the circuit board to form a defect type distribution map.

[0107] When obtaining characteristic categories for circuit board defects, take a defect type distribution map from a specific frame of the hierarchical recognition model as an example. Assume that the detection unit with coordinates (20mm, 35mm) is labeled U005, with a defect type of dielectric layer separation and a confidence level of 0.85. The system searches a mapping table between detection units and identifiers, matches the unit's physical coordinates with a preset grid (e.g., each grid is 1mm x 1mm), and determines that it belongs to the grid unit in row 20, column 35, corresponding to identifier U005. In the original image dataset, the data for this unit includes information such as the grayscale value and reflectance of the multispectral image. Based on the spatial distribution characteristics of the defect type, the system labels the data for unit U005 as "dielectric layer separation" and extracts its corresponding image features (e.g., the abnormal temperature distribution in this area in the infrared image).

[0108] When reorganizing the unit data in the original image dataset, all inspected units are sorted according to defect severity ranking rules (e.g., confidence from high to low). For example, units with a confidence level ≥0.8 are defined as "severely defective," 0.5-0.8 as "suspiciously defective," and <0.5 as "normal." The reorganized unit distribution map is displayed in pseudo-color format: red areas indicate severely defective units (e.g., U005, U018), yellow areas indicate suspiciously defective units, and blue areas indicate normal units. The color depth of each unit corresponds to the confidence level; for example, a U005 with a confidence level of 0.85 is displayed as dark red, while a U018 with a confidence level of 0.78 is displayed as light red. By clicking or zooming in on the distribution map, the original image data and characteristic parameters of each unit can be viewed, facilitating manual review or further analysis.

[0109] When outputting the optimized defect feature categories, the system will classify and summarize the reorganized unit distribution map by defect type. For example, for crack defects, a report is generated containing the location, size, and expansion trend of all crack units; for dielectric layer separation defects, information such as material consistency indicators and thermal stress parameters of the distribution area is generated. Taking dielectric layer separation defects as an example, the report lists the unit identification involved in this type of defect (U005, U032, U047, etc.), the average thermal stress gradient value of the area (such as 0.5W / (m²·mm)), the standard deviation of the material consistency indicator (such as 0.3), and a multispectral image comparison of the area (visible light images show no obvious abnormalities on the surface, and infrared images show that the temperature is higher than the surrounding area, indicating that there may be thermal conduction anomalies caused by internal dielectric layer separation).

[0110] In practical applications, the training process of the hierarchical recognition model is based on historical defect sample data. For example, PCB images containing different defect types are collected, and the defect type (e.g., crack, dielectric layer separation, normal) of each inspection unit is manually annotated. This serves as the training input for the model. The model parameters are adjusted using a backpropagation algorithm, gradually improving the model's classification accuracy. After training, the model can rapidly infer the defect probability map collected in real time and output the spatial distribution characteristics of the defect types.

[0111] Example 5:

[0112] During the dynamic calibration of inspection parameters, a specific PCB inspection scenario is used as an example. Assume that eight image acquisition modules are deployed in a linear arrangement within the inspection area, with a 20% overlap between adjacent modules' fields of view. A crack defect approximately 2 mm in length and a dielectric layer separation defect approximately 5 mm² in area are detected on the circuit board surface. First, a mapping relationship between unit identifiers and defect feature categories is established. The inspection area is divided into 1 mm x 1 mm grid cells, each assigned a unique identifier (e.g., A01, A02, ..., H10). When the hierarchical recognition model outputs the spatial distribution characteristics of the defect types, for example, unit C05 is identified as a crack defect (confidence level 0.9), and units D07-D09 are identified as dielectric layer separation defects (confidence level 0.85). The system then associates and stores these unit identifiers with the corresponding defect type, severity, and other information through database queries.

[0113] Based on the spatial distribution characteristics of the defect types, the system automatically generates execution control instructions for the inspection system. For unit C05, where the crack defect is located, as it is a high-risk defect area, the system controls the light source module to increase the corresponding illumination intensity in this area from the default 500 lux to 800 lux to enhance image contrast and make the texture features of the crack clearer. At the same time, the lens focal length of the image acquisition module above this area (such as module No. 3) is adjusted from the initial 50mm to 30mm, improving local imaging resolution and ensuring that the fine structure of the crack (such as the tip bifurcation) can be clearly captured. In addition, a spiral scanning path is planned, with unit C05 as the center, and multiple angles are repeatedly scanned within a radius of 5mm. The scanning angle interval is set to 15° to ensure that all directions in which the crack may extend are covered.

[0114] For the D07-D09 unit area, where the dielectric layer separation defect is located, the system prioritizes adjusting detection parameters to obtain more dimensional data, as this defect may involve internal structural changes. The light source in the corresponding area is switched to the infrared band to detect thermal conductivity anomalies in the defect area. Simultaneously, the exposure time of the adjacent image acquisition modules 4 and 5 is increased from 50ms to 100ms to increase the amount of infrared light collected. The scanning path adopts a round-trip linear scan, densely sampling along the main thermal stress conduction path (assuming it is horizontal). The sampling interval is reduced from the default 1mm to 0.5mm to improve the spatial resolution of the defect area.

[0115] Based on a preset calibration strategy, the dynamic inspection resource allocation model schedules resources based on the defect severity weights of each unit. For example, the weight of the crack defect unit (C05) is set to 0.9, the weight of the dielectric layer separation area (D07-D09) is set to 0.8, and the weight of the normal area is set to 0.2. The model calculates the required inspection resources for each area. For the C05 unit, it allocates two additional sampling cycles, increasing the total number of sampling cycles for this unit from the default three to five. For the D07-D09 area, the data transmission bandwidth priority is increased to the highest level to ensure that the multispectral image data of this area can be transmitted to the defect analysis server in real time, avoiding analysis delays caused by data queue backlogs.

[0116] The hardware implementation of the inspection system is as follows: Each industrial camera in the image acquisition module group is equipped with a multispectral sensor that can simultaneously collect data in the visible light (400-760nm) and near-infrared (760-1100nm) bands. Taking module #3 as an example, its lens supports automatic zoom, with a servo motor driving the lens adjustment ring to achieve rapid focal length switching. The light source module uses an LED array with adjustable brightness and wavelength. Each array covers a 10mm x 10mm inspection area. PWM signals control the light source intensity and wavelength switching (for example, the switching time between visible light and infrared light is less than 50ms).

[0117] The data transmission module is based on a Gigabit Ethernet architecture. Each image acquisition module is connected to a Gigabit switch via a network cable, and then transmitted to the defect analysis server. To achieve real-time transmission of synchronized imaging data, the IEEE1588 precision clock protocol is used to synchronize the modules, ensuring that the timestamp error of multi-module data is less than 10μs. For example, in a complete inspection process, eight modules synchronously collect data, with each frame containing approximately 200MB of data. Transmission to the server via the high-speed network takes approximately 80ms, meeting the requirements of real-time inspection.

[0118] The 3D modeling module, based on a parallel computing framework, utilizes GPU acceleration technology to perform 3D reconstruction on synchronized imaging data from multiple modules. For example, after receiving images from eight modules, the server first uses a feature point matching algorithm (such as SIFT) to identify points of similarity in adjacent module images, recognizing approximately 500 feature points per pair of modules. Triangulation is then used to calculate the 3D coordinates of these feature points, constructing a sparse point cloud. Finally, a Poisson surface reconstruction algorithm is used to generate a dense 3D surface topology matrix. The entire process takes approximately 200 milliseconds, meeting the real-time requirements of industrial inspection.

[0119] The defect recognition module runs within a deep learning framework, building on an improved YOLOv5 model with an optimized feature extraction network tailored to PCB defect characteristics. Given an input defect probability map (assuming a 100×80 pixel grayscale image), the model extracts multi-scale features through convolutional layers. This is then fused using a feature pyramid network (FPN) to ultimately output the defect type and confidence level for each inspection unit. In the example above, the model detects cracks and dielectric layer separation defects in approximately 150ms, matching the processing speed of the 3D modeling module and enabling a streamlined inspection process.

[0120] The parameter calibration module communicates with the image acquisition module's hardware control unit via an industrial control interface. For example, to adjust light intensity, the server sends an RS-485 command to the light module. The command format includes the target light source ID (e.g., light source array C05), the intensity value (800 lux), and the wavelength (visible light). Upon receiving the command, the light module completes the parameter adjustment within 10ms and returns a confirmation signal. For lens focal length compensation, the server sends a pulse signal to the lens servo motor via the GPIO interface, controlling the motor to rotate a specified number of steps (e.g., from 1000 steps for a 50mm focal length to 600 steps for a 30mm focal length). The entire adjustment process takes approximately 200ms, ensuring parameter calibration is complete before the next scan.

[0121] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0122] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A PCB defect detection method, applied to an industrial quality inspection system, comprising a plurality of image acquisition modules deployed in an inspection area and a defect analysis server connected to the image acquisition modules, wherein the fields of view of two adjacent image acquisition modules overlap by a set ratio, and the method is characterized in that: The method comprises: The image acquisition module collects multispectral imaging data of the PCB circuit board surface to generate an original image data set; The defect analysis server receives synchronous imaging data from multiple image acquisition modules to construct a three-dimensional surface topology matrix; Identifying characteristic categories of circuit board defects based on the original image dataset and real-time imaging data from each image acquisition module, wherein identifying characteristic categories of circuit board defects includes: performing multi-scale decomposition on a three-dimensional surface topology matrix, extracting texture features in combination with the original image dataset, locating defect regions based on material reflectance gradients and dielectric layer distribution information, outputting spatial distribution features of defect types through a hierarchical recognition model, and updating the original image dataset based on the spatial distribution features; According to the feature category, the detection parameters are dynamically calibrated.

2. A PCB circuit board defect detection method according to claim 1, characterized in that: The feature categories for identifying circuit board defects include: Performing frequency domain transformation on the three-dimensional surface topology matrix to extract structural deformation distribution, dielectric layer offset characteristics, and defect growth trends; Performing material consistency modeling on the three-dimensional surface topology matrix based on the structural deformation distribution and the dielectric layer offset characteristics, dividing the circuit board surface into a plurality of detection units and marking the unit identifiers, performing correlation matching with the original image dataset based on the reflection coefficients of the detection units, and marking the unit identifiers in the original image dataset; Calculating a thermal stress gradient according to the position of the image acquisition module, predicting the evolution of the defect morphology according to the thermal stress gradient and the defect growth trend, and calculating a defect probability map for each inspection unit; Constructing a hierarchical recognition model, taking the defect probability map as an input parameter of the hierarchical recognition model, performing spatial correlation modeling on the defect probability map through the hierarchical recognition model, and outputting spatial distribution characteristics of defect types; The original image data set is updated according to the spatial distribution characteristics to obtain feature categories of circuit board defects.

3. A PCB circuit board defect detection method according to claim 2, characterized in that: The performing frequency domain transformation on the three-dimensional surface topology matrix includes: Normalizing the three-dimensional surface topology matrix, extracting abnormal response areas in the matrix using a multi-scale convolution kernel, suppressing outliers in the abnormal response areas, and calculating the defect growth trend using a wavelet packet decomposition algorithm; Calculating frequency domain correlation features of the three-dimensional surface topology matrix, calculating deformation coupling coefficients between units, dielectric layer stability indexes, and void region markers based on the frequency domain correlation features, constructing a feature enhancement network, and calculating dielectric layer offset features using the feature enhancement network; The time domain features and spatial domain features collected by each image acquisition module are extracted, and the imaging feature vector of the module is calculated based on the spectral difference between the time domain features and the spatial domain features. The image acquisition modules of different perspectives are feature-aligned based on the imaging feature vector, and the defect growth trend is calculated.

4. A PCB circuit board defect detection method according to claim 3, characterized in that: The material consistency modeling of the three-dimensional surface topology matrix includes: According to the structural deformation distribution, deformation sampling points are extracted from each frame of data, and the sampling points are correlated and mapped with the offset characteristics of the dielectric layer to generate a material consistency map. The material consistency maps generated by multiple image acquisition modules are spatially registered to calculate the material distribution consistency of the region. A deformation threshold is set, and the anomaly source is located based on the structural deformation value of the multi-frame three-dimensional surface topology matrix. The deformation difference is calculated. If the deformation difference is greater than or equal to the deformation threshold, it indicates that there is dielectric layer separation in the detection unit. Physical model constraint compensation is performed on the current unit. According to the thermal expansion model corresponding to the current unit, the material distribution consistency of the current unit is iteratively corrected. The compensation coefficient of the separation area is calculated based on the correction result. The material consistency modeling is performed on the three-dimensional surface topology matrix according to the material distribution consistency, and the offset amount is marked on the physical model of the detection unit through the medium layer offset feature.

5. A PCB circuit board defect detection method according to claim 4, characterized in that: Calculating the thermal stress gradient according to the position of the image acquisition module includes: Based on multiple sets of surface topology data, the reflection coefficient change points are extracted and mapped to a unified coordinate system according to the installation position of the image acquisition module. The change points are interpolated using radial basis functions to generate a regional thermal stress field model. Performing equally spaced sampling along the conduction path of the thermal stress field model, calculating the thermal conductivity, thermal deformation index, and stress change curvature of the path based on the sampling results, and calculating the thermal stress parameters based on the thermal conductivity, thermal deformation index, and stress change curvature; Based on the imaging parameters and resolution of the image acquisition module, the morphological characteristics of the defect distribution in each frame of data are projected onto the thermal stress field model. The model is partitioned along the conduction direction according to the number of modules. The evolution law of the defect distribution within the partition is analyzed, and the defect distribution characteristics are calculated based on the evolution law. A thermal stress gradient is calculated based on the thermal stress parameters and the defect distribution characteristics. The thermal stress gradient calculation process includes: based on the spatial position range of the head-end image acquisition module to the terminal image acquisition module, selecting spatial coordinate points in the module arrangement direction, cumulatively calculating the product of the heat conduction characteristic weight value and the defect distribution characteristic weight value within the spatial resolution range, and superimposing the influence factor of the image acquisition module sampling period on the thermal stress change rate.

6. A PCB circuit board defect detection method according to claim 5, characterized in that: The calculation of the defect probability map of each detection unit includes: Using the main conduction path of the thermal stress field model as a baseline, taking the extreme position of the defect distribution in each frame of data as a reference point, calculating the defect position offset, and drawing a defect distribution curve according to the spatial coordinates; modifying the expansion rate and direction of the defect growth trend based on the thermal stress gradient; Starting from the nearest defect distribution point, the distribution curve is continuously drawn according to the correction results of the expansion rate and direction to generate the next time series defect distribution point until the distribution points cover the entire detection area and a defect probability map is generated.

7. A PCB circuit board defect detection method according to claim 2, characterized in that: The constructing of the hierarchical recognition model includes: The input layer is used to organize the defect probability map into spatial tensor data and perform normalization processing; The feature aggregation layer is used to extract regional correlation features of defects by processing spatial tensor data and construct topological relationships between detection units; The decision output layer is used to integrate the correlation between defect features in spatial units and generate defect classification strategies.

8. A PCB circuit board defect detection method according to claim 2, characterized in that: The feature categories of circuit board defects are obtained, including: According to the spatial distribution characteristics of the defect type output by the hierarchical recognition model, the identification of the detection unit is matched with the spatial distribution characteristics; The unit data in the original image dataset are reorganized according to spatial features to generate a unit distribution map sorted by defect severity; According to the reorganized unit distribution map, the optimized defect feature category is output.

9. A PCB circuit board defect detection method according to claim 1, characterized in that: The dynamic calibration of the detection parameters includes: Mapping the unit identifications to the units of the characteristic categories of the circuit board defects one by one; Control the inspection system's actions based on the spatial distribution characteristics of the defect type, including light source intensity adjustment, focus compensation, and scanning path planning operations; According to the spatial distribution of defect characteristics and the preset calibration strategy, detection resources are dynamically allocated to the corresponding spatial units.

10. A PCB circuit board defect detection system, characterized in that: include: The image acquisition module group consists of multiple image acquisition modules deployed in the detection area. The fields of view of two adjacent image acquisition modules overlap in a set ratio. These modules are used to collect multispectral imaging data from the PCB surface and generate raw image data sets. The data transmission module is used to connect the image acquisition module group and the defect analysis server to realize the transmission of synchronous imaging data of multiple image acquisition modules to the defect analysis server; The 3D modeling module is integrated into the defect analysis server, receives the synchronous imaging data and constructs the 3D surface topology matrix; The defect recognition module, deployed on the defect analysis server, performs multi-scale decomposition of the three-dimensional surface topology matrix based on the original image dataset and the real-time imaging data of each image acquisition module. It extracts texture features based on the original image dataset and locates the defect area based on the material reflectance gradient and dielectric layer distribution information. It outputs the spatial distribution characteristics of the defect type through a hierarchical recognition model and updates the original image dataset based on the spatial distribution characteristics. The parameter calibration module is set in the defect analysis server and dynamically calibrates the detection parameters according to the characteristic categories of the circuit board defects output by the defect recognition module.

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