Interface verification method, interface verification device, processor and electronic equipment
By generating and verifying the interface set of the application software layer, the problem of lack of interface verification in the existing technology is solved, and efficient and accurate interface mapping is achieved to ensure the normal operation of the software.
Patent Information
- Application Number
- CN202510587830.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-08
- Publication Date
- 2025-08-08
AI Technical Summary
The lack of verification of the interfaces of each software component in the prior art leads to incorrect interface mapping and causing software defects.
By obtaining the Input and Output signals of the software components, a collection of ASW input interfaces and ASW output interfaces of the application software layer are generated, and a BSW mapping table is used for verification to generate an ASW verification table to ensure the accurate interface mapping relationship.
Improve development efficiency and accuracy, ensure normal communication between the application software layer and the basic software layer and internal components, avoid software defects introduced due to incorrect interface mapping, and are low-cost and easy to implement.
Smart Images
Figure CN120447888A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to an interface verification method, an interface verification device, a processor, and an electronic device. Background Art
[0002] As electrical equipment becomes increasingly electronic, the proportion of software-influenced functions is also increasing, ushering in an era of software-defined functions. With the increase in software functionality, the amount of code is also rapidly increasing. To prevent code defects caused by increased code complexity, which can affect the normal operation of equipment, the industry has defined various embedded software development architectures. These frameworks standardize software development and modularize software functions through standardized frameworks, thereby reducing software complexity and increasing software reusability.
[0003] However, in the prior art, when generating a model architecture file of a software component, the interfaces of each software component are usually not verified, which may result in incorrect mapping of each interface, thereby causing software defects.
[0004] Therefore, it is necessary to invent an interface verification method, an interface verification device, a processor and an electronic device to solve the above problems. Summary of the Invention
[0005] In order to solve the problem in the prior art of lacking verification of interfaces of various software components, the present invention provides an interface verification method, an interface verification device, a processor and an electronic device.
[0006] The present invention is achieved by adopting the following technical solutions: An interface verification method, the method comprising the following steps: Step S1: obtaining multiple input signals and multiple output signals of each software component; Step S2: Generate an ASW input interface set and an ASW output interface set of the application software layer through the input signals and output signals in the data dictionary of each software component, wherein one software component corresponds to one data dictionary; Step S3: Use the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer, wherein the BSW mapping table is a table of the mapping relationship between the interface functions of the basic software layer and the interface signals of the application software layer.
[0007] Furthermore, the step S2 of generating an ASW input interface set and an ASW output interface set of the application software layer through the input signals and output signals in the data dictionary of each software component further includes: Step S2.1: Generate an initial ASW input interface set and an initial ASW output interface set of the application software layer based on the data dictionaries corresponding to each input signal and each output signal; Step S2.2: Update the initial ASW input interface set and the initial ASW output interface set according to the name of each software component, the file name of the corresponding data dictionary, and the signal type information of each SWC interface signal to obtain the ASW input interface set and the ASW output interface set of the application software layer; the SWC interface signal includes the Input signal and the Output signal.
[0008] Furthermore, the step S3: using the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer also includes: Step S3.1: Generate a BSW input interface set and a BSW output interface set based on the BSW mapping table; Step S3.2: Based at least on the BSW input interface set and the BSW output interface set, calibrate the ASW input interface set and the ASW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set; Step S3.3: Based on the calibrated ASW input interface set and the calibrated ASW output interface set, an ASW verification table of the application software layer is generated.
[0009] Furthermore, the step S3.1: verifying the ASW input interface set and the ASW output interface set based at least on the BSW input interface set and the BSW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set includes: Step S3.1.1: Use the BSW output interface set to verify the ASW output interface set to obtain the ASW candidate output interface set; Step S3.1.2: Using the ASW candidate output interface set, calibrate the ASW input interface set to obtain the ASW preset input interface set and the calibrated ASW output interface set; Step S3.1.3: Use the BSW input interface set to verify the ASW preset input interface set to obtain the ASW candidate input interface set; Step S3.1.4: Use the ASW candidate input interface set to perform self-verification to obtain a verified ASW input interface set.
[0010] Furthermore, the step S3.1.1: using the BSW output interface set to verify the ASW output interface set, and obtaining the ASW candidate output interface set includes: Wherein, the BSW output interface set includes multiple ASW output signals, and the ASW output signal has at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function; the ASW output interface set includes multiple Output signals, and the Output signal has at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and a BSW interface function; Step S3.1.1.1: If the variable name of the target ASW output signal is the same as the ASW variable name of the target Output signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Output signal using the data type, interface initial value, and interface dimension of the target ASW output signal, where the target ASW output signal is one of the multiple ASW output signals and the target Output signal is one of the multiple Output signals; Step S3.1.1.2: If the verification passes, write the interface function of the target ASW output signal into the BSW interface function of the target Output signal to obtain the ASW alternative output interface set.
[0011] Furthermore, the step S3.1.2: using the ASW candidate output interface set to verify the ASW input interface set to obtain the ASW preset input interface set and the calibrated ASW output interface set includes: The ASW candidate output interface set includes multiple output signals, and the ASW input interface set includes multiple input signals, wherein each output signal and input signal at least has an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, input and output information, and ASW usage information; Step S3.1.2.1: If the ASW variable name of the target Output signal is the same as the ASW variable name of the target Input signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Input signal using the ASW data type, ASW interface initial value, and ASW interface dimension of the target Output signal, where the target Output signal is one of the multiple Output signals and the target Input signal is one of the multiple Input signals; Step S3.1.2.2: If the verification passes, the target input signal is deleted from the ASW input interface set to obtain the ASW preset input interface set, and the input and output information of the target output signal in the ASW alternative output interface set and the ASW usage information are updated to obtain the calibrated ASW output interface set.
[0012] Furthermore, the step S3.1.3: using the BSW input interface set to verify the ASW preset input interface set, and obtaining the ASW candidate input interface set includes: A BSW input interface set includes multiple ASW input signals, each of which has at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function. An ASW preset input interface set includes multiple input signals, each of which has at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and an ASW interface function. Step S3.1.3.1: If the variable name of the target ASW input signal is the same as the ASW variable name of the target Input signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Input signal using the data type, interface initial value, and interface dimension of the target ASW input signal; Step S3.1.3.2: If the verification is passed, the interface function in the target ASW input signal is written into the ASW interface function of the target Input signal of the ASW preset input interface set to obtain the ASW alternative input interface set.
[0013] Furthermore, the step S3.1.4: using the ASW candidate input interface set to perform self-verification, the obtained verified ASW input interface set includes: Step S3.1.4.1: Use the first N input signals in the ASW candidate input interface set to verify the last MN input signals in the ASW candidate input interface set, where M>N, and M is the total number of input signals in the ASW candidate input interface set; Step S3.1.4.1: If the verification is passed, the ASW usage information of the first N input signals is updated to obtain a verified ASW input interface set.
[0014] Furthermore, before executing step S3.2: verifying the ASW input interface set and the ASW output interface set based at least on the BSW input interface set and the BSW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set, the following steps are further included: Step a: performing duplicate checking on multiple BSW input signals in the BSW input interface set to obtain a BSW input interface set after duplicate checking; Step b: performing duplicate checking on multiple BSW output signals in the BSW output interface set to obtain a BSW output interface set after duplicate checking; Step c: performing duplication checking on the plurality of output signals in the ASW output interface set to obtain a duplication-checked ASW output interface set.
[0015] An interface verification device, comprising: An acquisition unit, used to acquire multiple input signals and multiple output signals of each software component; A generating unit, configured to generate an ASW input interface set and an ASW output interface set of the application software layer based on a data dictionary, input signals, and output signals of each software component, wherein one software component corresponds to one data dictionary; The verification unit is used to verify the ASW input interface set and the ASW output interface set using at least a BSW mapping table to obtain an ASW verification table for the application software layer, wherein the BSW mapping table is a table of mapping relationships between interface functions of the basic software layer and interface signals of the application software layer.
[0016] A computer-readable storage medium includes a stored program, wherein the program executes an interface verification method.
[0017] A processor is used to run a program, wherein an interface verification method is executed when the program is running.
[0018] An electronic device includes one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are used to execute an interface verification method.
[0019] The structural design of the present invention is reasonable and reliable. It uses a BSW mapping table to verify the ASW input interface set and ASW output interface set of the application software layer. This ensures that the ASW verification table of the application software layer is relatively accurate, ensures that the development efficiency and accuracy of developers are high, and ensures that the application software layer and the basic software layer, as well as the various software components within the application software layer, can communicate normally, thereby avoiding software defects introduced by incorrect interface mapping relationships, and thus solving the problem of the lack of verification of the interfaces of various software components in the prior art. In addition, the interface verification method of the present invention does not require the addition of other additional tools, which ensures that the entire interface verification method is low in cost and easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a flow chart of an interface verification method in the present invention.
[0021] Figure 2 It is a structural diagram of an interface verification device in the present invention. DETAILED DESCRIPTION
[0022] For the convenience of description, some nouns or terms used in the present invention are explained below: Application Software Layer (ASW): Contains several software components; Software Component (SCW): contains one or more running entities; Interface Layer (IFL): responsible for the interaction between the application software layer and software components, and between the application software layer and the basic software layer; AUTOSAR: an open and standardized automotive embedded system software architecture (AUTomotive OpenSystem Architecture, referred to as AUTOSAR); As mentioned in the background art, the prior art lacks verification of interfaces of various software components. To solve the above problem, the present invention provides an interface verification method, an interface verification device, a processor, and an electronic device.
[0023] An interface verification method, as shown in the attached Figure 1 shown; including Step S1: obtaining multiple input signals and multiple output signals of each software component; Step S2: Generate an ASW input interface set and an ASW output interface set of the application software layer through the input signals and output signals in the data dictionary of each software component, wherein one software component corresponds to one data dictionary; Step S3: Use the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer, wherein the BSW mapping table is a table of the mapping relationship between the interface functions of the basic software layer and the interface signals of the application software layer.
[0024] In the present invention, a BSW mapping table is used to verify the ASW input interface set and ASW output interface set of the application software layer. This ensures that the resulting ASW verification table of the application software layer is relatively accurate, ensuring high development efficiency and accuracy for developers, and ensuring that the application software layer can communicate normally with the basic software layer and each software component within the application software layer. This can avoid software defects introduced by incorrect interface mapping relationships, thereby solving the problem of the lack of verification of the interfaces of each software component in the prior art. In addition, the present invention does not require the addition of other additional tools, thus ensuring that the entire interface verification method is low-cost and easy to implement.
[0025] Specifically, a software component can correspond to multiple input signals and multiple output signals. Of course, a software component can also correspond to one input signal and multiple output signals, or multiple input signals and one output signal. In the present invention, there is no limitation on the input signals and output signals corresponding to a software component.
[0026] In a specific embodiment of the present invention, the first script can also be used to capture the input signals and output signals of each software component, and generate the ASW input interface set and ASW output interface set of the application software layer based on the data dictionary, input signals and output signals of each software component.
[0027] Specifically, the data dictionary (SWC_DD) of each software component is compiled and filled in by the developer. It is used to define the attribute information of the input and output signals of the software component. For each type of signal (such as input signal or output signal), its attribute information must include: Group, Signal Name, Data Type, Initial Value, Dimension, Runnable, and Description. The attribute information of each is as follows: Group: signal category, such as InputSingal and OutputSingal; Signal Name: specific variable name of the interface, such as ambient temperature, which can be defined as: tEnvt_degC; Data Type: data type of the interface, such as int8; Initial Value: initial value when the interface is defined, such as 25; Dimension: dimension of the interface, such as 1; Runnable: information about the running entity where the interface is located. For Output Signal, only one Runnable is allowed, while for Input Signal, multiple Runnables are allowed. Fill in the corresponding Runnable in one cell, and each Runnable occupies one line; Inter-running entity variables (IRVs) need to fill in the transfer relationship between Runnables, such as (Runnable1, Runnable2). If the interface of an inter-running entity variable (IRV) is transferred between multiple Runnables, all of them are filled in one cell, and each transfer relationship occupies one line; Description: description of the interface, such as Theenvironmenttemperature.
[0028] Specifically, the BSW mapping table (IF_Mapping) is a table that lists the mapping relationships between the interface functions of the Basic Software Layer (BSW) and the interface signals of the Application Software Layer (ASW). This BSW mapping table can be subdivided into multiple sub-sheets based on the implementation of the interface functions. For example, it can be divided into sub-sheets for mapping the underlying sampling interface functions to the application layer interface signals, mapping the underlying CAN communication interface functions to the application layer interface signals, and mapping the underlying storage interface functions to the application layer interface signals. This BSW mapping table is completed and organized by the developer. The specific contents of the BSW mapping table are shown in Table 1.
[0029] Table 1 Group Singal Name BSW Interface DataType Input Singal tEnvt_degC Rte_Read_tEnvt_degC int8 Initial Value Dimension Description 25 1 The environment temperature Specifically, the ASW verification sheet (ASW sheet) is generated by verifying the ASW input interface set and the ASW output interface set using the BSW mapping table. For each signal in the ASW verification sheet, its attribute information must include: Group, Signal Name, BSW Interface, Data Type, Initial Value, Dimension, Description, SWC, IFType, and Used. The attribute information is as follows: Group: Signal category, such as InputSignal, OutputSignal; Signal Name: The specific variable name of the interface, such as ambient temperature, which can be defined as: tEnvt_degC; BSW Interface: The BSW interface signal that is mapped to the ASW interface signal. Data Type: data type of the interface, such as int8; Initial Value: initial value when the interface is defined, such as 25; Dimension: dimension of the interface, such as 1; Description: description of the interface, such as The environment temperature; SWC: which software component the interface signal comes from; IFType: type of the interface signal for each software component in the application software layer, such as In, Out, InOut; Used: in which software components the interface signal is used and description of the usage type, such as SWC1(In). If used in multiple software components, use English commas to separate them, as shown in Table 2.
[0030] Table 2 Group Name BSW Interface DataType Input Signal tEnvt_degC Rte_Read_tEnvt_degC int8 Initial Value Dimension Description SWC 25 1 The environment temperature SWC1 IFType Used In SWC1(In) It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0031] In order to obtain the ASW input interface set and the ASW output interface set more simply and accurately, in one embodiment of the present invention, the ASW input interface set and the ASW output interface set of the application software layer are generated based on the data dictionary of each of the above-mentioned software components, each of the above-mentioned Input signals and each of the above-mentioned Output signals, including: generating the initial ASW input interface set and the initial ASW output interface set of the above-mentioned application software layer according to the above-mentioned data dictionary corresponding to each of the above-mentioned Input signals and each of the above-mentioned Output signals; updating the above-mentioned initial ASW input interface set and the above-mentioned initial ASW output interface set according to the name of each of the above-mentioned software components and the corresponding file name of the above-mentioned data dictionary and the signal type information of each SWC interface signal to obtain the ASW input interface set and the ASW output interface set of the above-mentioned application software layer, wherein the above-mentioned SWC interface signal includes the above-mentioned Input signal and the above-mentioned Output signal.
[0032] In actual applications, the ASW input interface set and ASW output interface set must each contain the following attribute information: Group, Signal Name, Data Type, Initial Value, Dimension, Description, SWC, IFType, and Used. The attributes Group, Signal Name, Data Type, Initial Value, Dimension, and Description are defined in the data dictionary (SWC_DD) of each software component. Therefore, the initial ASW input interface set and initial ASW output interface set can be generated using the corresponding input and output signals (SWC_DD) of each software component. In other words, each signal in the initial ASW input interface set and initial ASW output interface set has these attributes. Furthermore, since the SWC is included in the SWC_DD file name, the SWC can be obtained from the corresponding software component's SWC_DD. However, the IFType and Used attributes must be continuously verified during duplicate checking and validation. Before duplication checking and verification, the IFType judgment logic is: if the signal Group type is Input, then it is In; if the signal Group type is Output, then it is Out. The Used judgment logic is composed of the software component name and the corresponding signal Group type, such as SWC1(In).
[0033] In another embodiment of the present invention, a BSW mapping table is used to verify the above-mentioned ASW input interface set and the above-mentioned ASW output interface set to obtain the ASW verification table of the above-mentioned application software layer, including: generating a BSW input interface set and a BSW output interface set based on the above-mentioned BSW mapping table; verifying the above-mentioned ASW input interface set and the above-mentioned ASW output interface set based on at least the above-mentioned BSW input interface set and the BSW output interface set to obtain the calibrated above-mentioned ASW input interface set and the calibrated above-mentioned ASW output interface set; generating the above-mentioned ASW verification table of the above-mentioned application software layer based on the calibrated above-mentioned ASW input interface set and the calibrated above-mentioned ASW output interface set. In this embodiment, the obtained BSW input interface set and BSW output interface set are used to verify the ASW input interface set and the ASW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set, and then the ASW verification table of the application software layer is generated from the calibrated ASW input interface set and the calibrated ASW output interface set. This further ensures that the obtained ASW verification table is relatively accurate, and the subsequent generation of interface files of each software component based on the ASW verification table (generating interface files of each software component based on the ASW verification table will not be described in detail in the present invention) is relatively accurate, further avoiding software defects introduced by incorrect interface mapping.
[0034] Specifically, the BSW mapping table (IF_Mapping) may be read through the second script to generate a BSW input interface set and a BSW output interface set.
[0035] In order to further ensure that the obtained calibrated ASW input interface set and the calibrated ASW output interface set are relatively accurate, in another embodiment of the present invention, the ASW input interface set and the ASW output interface set are verified at least based on the above-mentioned BSW input interface set and the BSW output interface set to obtain the above-mentioned calibrated ASW input interface set and the above-mentioned calibrated ASW output interface set, including: using the above-mentioned BSW output interface set to verify the above-mentioned ASW output interface set to obtain the ASW alternative output interface set; using the above-mentioned ASW alternative output interface set to verify the above-mentioned ASW input interface set to obtain the ASW preset input interface set and the above-mentioned calibrated ASW output interface set; using the above-mentioned BSW input interface set to verify the above-mentioned ASW preset input interface set to obtain the ASW alternative input interface set; using the above-mentioned ASW alternative input interface set to perform self-verification to obtain the above-mentioned verified ASW input interface set.
[0036] In another embodiment of the present invention, the BSW output interface set includes multiple ASW output signals, the ASW output signals have at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function, the ASW output interface set includes multiple Output signals, the Output signals have at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and an ASW interface function, and the BSW output interface set is used to verify the ASW output interface set to obtain an ASW candidate output interface set, including: comparing the variable name of the target ASW output signal with the target Output signal. When the ASW variable names are the same, the data type, interface initial value and interface dimension of the target ASW output signal are used to verify the ASW data type, ASW interface initial value and ASW interface dimension of the target Output signal, wherein the target ASW output signal is one of the multiple ASW output signals, and the target Output signal is one of the multiple Output signals; when the verification passes, the interface function of the target ASW output signal is written into the BSW interface function of the target Output signal to obtain the ASW alternative output interface set. In this embodiment, based on the BSW output interface set, the interfaces of the signals in the ASW output interface set that have a mapping relationship with the BSW output interface set are verified, and the mapping interfaces (i.e., BSW interface functions) of the signals in the BSW output interface set that have a mapping relationship with the ASW output interface set are written into the ASW output interface set to obtain the ASW alternative output interface set. Subsequently, based on the ASW alternative output interface set, the ASW input interface set is verified, thereby ensuring that the obtained ASW preset input interface set and the calibrated ASW output interface set are relatively accurate.
[0037] In a specific embodiment of the present invention, when the variable name (Signal Name) of the target ASW output signal is the same as the ASW variable name (Signal Name) of the target Output signal, the ASW data type (Data Type), interface initial value (Initial Value), and interface dimension (Dimension) of the target Output signal are verified using the data type (Data Type), interface initial value (Initial Value), and interface dimension (Dimension) of the target ASW output signal. If the verification passes, the interface function of the target ASW output signal is added to the BSW interface function (i.e., the BSW Interface attribute information column) of the target Output signal. If the verification fails, a first error message is generated (the first error message should include, but is not limited to, the name of the interface signal, the SWC in which it resides, and the name of the Excel sheet and IF_Mapping sheet)), and the first error message is stored in a log file. After the Output signals of the ASW output interface set are verified and the developer completes the modification based on the log file, the steps of obtaining multiple Input signals and multiple Output signals of each software component, generating the ASW input interface set and the ASW output interface set of the application software layer based on the data dictionary of each of the above software components, each of the above Input signals and each of the above Output signals, and using the BSW mapping table to verify the above ASW input interface set and the above ASW output interface set to obtain the ASW verification table of the above application software layer are re-executed.
[0038] In one embodiment of the present invention, the above-mentioned ASW alternative output interface set includes multiple above-mentioned Output signals, and the above-mentioned ASW input interface set includes multiple above-mentioned Input signals, wherein the above-mentioned Output signal and the above-mentioned Input signal both have at least ASW variable name, ASW data type, ASW interface initial value, ASW interface dimension, input and output information and ASW usage information, and the above-mentioned ASW alternative output interface set is used to verify the above-mentioned ASW input interface set to obtain the ASW preset input interface set and the calibrated ASW output interface set, including: when the above-mentioned ASW variable name of the target Output signal is the same as the above-mentioned ASW variable name of the target Input signal, the above-mentioned target Output signal is used. The ASW data type, the ASW interface initial value, and the ASW interface dimension of the target input signal are verified, wherein the target output signal is one of the multiple output signals, and the target input signal is one of the multiple input signals. If the verification passes, the target input signal is deleted from the ASW input interface set to obtain the ASW preset input interface set, and the input and output information and the ASW usage information of the target output signal in the ASW alternative output interface set are updated to obtain the calibrated ASW output interface set. In this embodiment, the ASW input interface set is verified based on the ASW alternative output interface set. In this way, based on the output signals in the ASW alternative output interface set, the signals in the ASW input interface set that are both input signals and output signals can be verified, thereby ensuring that the obtained ASW preset input interface set and the calibrated ASW output interface set are relatively accurate.
[0039] In a specific embodiment of the present invention, an ASW candidate output interface set includes multiple output signals, and an ASW input interface set includes multiple input signals. If the ASW variable name (Singal Name) of a target output signal is the same as the ASW variable name (Singal Name) of a target input signal, the ASW data type (Data Type), ASW interface initial value (Initial Value), and ASW interface dimension (Dimension) of the target input signal are verified using the ASW data type (Data Type), ASW interface initial value (Initial Value), and ASW interface dimension (Dimension) of the output signal. If the verification passes, the target input signal is deleted from the ASW input interface set, and the input / output information (IFType) and ASW usage information (Used) of the target output signal are updated to obtain a calibrated ASW output interface set. If the verification fails, a second error message (including, but not limited to, the name of the interface signal and the SWC in which it resides) is generated and stored in a log file. After all input signals in the ASW input interface set have been verified and the developer has completed the modification based on the log file, the steps of obtaining multiple input signals and multiple output signals of each software component, generating the ASW input interface set and ASW output interface set of the application software layer based on the data dictionary of each of the above software components, each of the above input signals and each of the above output signals, and using the BSW mapping table to verify the above ASW input interface set and the above ASW output interface set to obtain the ASW verification table of the above application software layer are re-executed.
[0040] In another embodiment of the present invention, the BSW input interface set includes multiple ASW input signals, each of which has at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function. The ASW preset input interface set includes multiple Input signals, each of which has at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and an ASW interface function. The BSW input interface set is used to verify the ASW preset input interface set to obtain an ASW candidate input interface set, including: when the variable name of the target ASW input signal is the same as the ASW variable name of the target Input signal, the data type, the interface initial value, and the interface dimension of the target ASW input signal are used to verify the ASW data type, the ASW interface initial value, and the ASW interface dimension of the target Input signal; if the verification passes, writing the interface function in the target ASW input signal into the ASW interface function of the target Input signal in the ASW preset input interface set to obtain the ASW candidate input interface set. In this embodiment, the ASW preset input interface set is verified based on the BSW input interface set, that is, based on the BSW input interface set, verification is completed for signals in the ASW preset input interface set that are only input signals and have a mapping relationship with the signals in the BSW input interface set, as well as verification of input signals without a signal source, and the BSW interface attributes (BSW interface attributes) of the signals in the BSW input interface set that have a mapping relationship with the ASW preset input interface set are written into the BSW interface attributes of the signals in the ASW preset input interface set to obtain the ASW alternative input interface set, thereby ensuring that the obtained ASW alternative input interface set is relatively accurate.
[0041] In a specific embodiment of the present invention, a BSW input interface set includes multiple ASW input signals, and an ASW preset input interface set includes multiple input signals. If the variable name (Signal Name) of a target ASW input signal is the same as the ASW variable name (Signal Name) of the target input signal, the ASW data type (Data Type), interface initial value (Initial Value), and interface dimension (Dimension) of the target input signal are verified using the data type (Data Type), interface initial value (Initial Value), and interface dimension (Dimension) of the target BSW input signal. If the verification passes, the interface function (BSWInterface) in the target ASW input signal is written to the ASW interface function (BSWInterface) of the target input signal in the ASW preset input interface set, thereby obtaining an ASW candidate input interface set. If the verification fails, a third error message is generated (the error message should include, but is not limited to, the name of the interface signal, the SWC in which it resides, the name of the Excel file for IF_Mapping, and the name of the sheet)), and the third error message is stored in a log file. After the verification of multiple input signals of the ASW preset input interface set is completed and the developer has completed the modification based on the log file, the steps of obtaining multiple input signals and multiple output signals of each software component, generating the ASW input interface set and ASW output interface set of the application software layer based on the data dictionary of each of the above software components, each of the above input signals and each of the above output signals, and using the BSW mapping table to verify the above ASW input interface set and the above ASW output interface set to obtain the ASW verification table of the above application software layer are re-executed.
[0042] In another embodiment of the present invention, the above-mentioned ASW alternative input interface set is used to perform self-verification to obtain the verified ASW input interface set, including: using the first N input signals in the above-mentioned ASW alternative input interface set to verify the last MN input signals in the above-mentioned ASW alternative input interface set, where M>N, and M is the total number of input signals in the above-mentioned ASW alternative input interface set; if the verification passes, the ASW usage information of the first N input signals is updated to obtain the verified ASW input interface set. In this embodiment, based on the self-verification of the ASW alternative input interface set, mutual verification and deduplication of only the input signals in the ASW alternative input interface set are completed, thereby ensuring that the obtained verified ASW input interface set is relatively accurate.
[0043] In a specific embodiment of the present invention, multiple input signals included in an ASW candidate input interface set are cross-verified and checked for duplication. During the verification, the Data Type and Initial Value of the first N input signals in the ASW candidate input interface set are used to verify the Data Type and Initial Value of the last MN input signals in the ASW candidate input interface set. If the verification passes, the ASW usage information (Used) of the first N input signals is updated to obtain the verified ASW input interface set. If the verification fails, a fourth error message is generated (the fourth error message should include but not be limited to the name of the interface signal and the SWC where it is located), and the fourth error message is stored in the log file. After the developer completes the modification based on the log file, the developer re-executes the steps of obtaining multiple input signals and multiple output signals of each software component, generating the ASW input interface set and the ASW output interface set of the application software layer based on the data dictionary of each of the above software components, each of the above input signals and each of the above output signals, and using the BSW mapping table to verify the above ASW input interface set and the above ASW output interface set to obtain the ASW verification table of the above application software layer.
[0044] In order to further ensure that the subsequently obtained calibrated ASW input interface set and the calibrated ASW output interface set are more accurate, in another embodiment of the present invention, before verifying the above-mentioned ASW input interface set and the above-mentioned ASW output interface set based at least on the above-mentioned BSW input interface set and the BSW output interface set to obtain the calibrated above-mentioned ASW input interface set and the calibrated above-mentioned ASW output interface set, the above-mentioned interface verification method includes: checking for duplicates of multiple BSW input signals in the above-mentioned BSW input interface set to obtain the above-mentioned BSW input interface set after duplication checking; checking for duplicates of multiple BSW output signals in the above-mentioned BSW output interface set to obtain the above-mentioned BSW output interface set after duplication checking; checking for duplicates of multiple above-mentioned Output signals in the above-mentioned ASW output interface set to obtain the above-mentioned ASW output interface set after duplication checking.
[0045] The embodiment of the present invention further provides an interface verification device. It should be noted that the interface verification device of the embodiment of the present invention can be used to execute the interface verification method provided by the embodiment of the present invention. The interface verification device provided by the embodiment of the present invention is introduced below.
[0046] An interface verification device, as shown in the attached Figure 2 Shown, including: An acquisition unit 10 is configured to acquire multiple input signals and multiple output signals of each software component; A generating unit 20 is configured to generate an ASW input interface set and an ASW output interface set of the application software layer based on the data dictionary, input signals, and output signals of each software component, wherein one software component corresponds to one data dictionary; The verification unit 30 is used to verify the ASW input interface set and the ASW output interface set using at least a BSW mapping table to obtain an ASW verification table for the application software layer, wherein the BSW mapping table is a table of mapping relationships between interface functions of the basic software layer and interface signals of the application software layer.
[0047] The acquisition unit is configured to acquire multiple input signals and multiple output signals from each software component; the generation unit is configured to generate an ASW input interface set and an ASW output interface set for the application software layer based on the data dictionary corresponding to each software component, the multiple input signals, and the multiple output signals; and the verification unit is configured to verify the obtained ASW input interface set and ASW output interface set of the application software layer using at least a BSW mapping table to obtain the ASW verification table for the application software layer. In the interface verification device of the present invention, the BSW mapping table is used to verify the ASW input interface set and ASW output interface set of the application software layer. This ensures that the obtained ASW verification table for the application software layer is relatively accurate, ensuring high development efficiency and accuracy for developers, and ensuring that the application software layer can communicate normally with the basic software layer and between the various software components within the application software layer. This avoids software defects introduced by incorrect interface mapping relationships, thereby resolving the problem of the prior art lacking verification of the interfaces of each software component. Furthermore, the interface verification device of the present invention does not require the addition of any additional tools, thus ensuring that the entire interface verification device is low in cost and easy to implement.
[0048] The above-mentioned interface verification device includes a processor and a memory. The acquisition unit, generation unit and verification unit are all stored in the memory as program units, and the processor executes the above-mentioned program units stored in the memory to realize corresponding functions.
[0049] The processor includes a kernel, which retrieves the corresponding program unit from the memory. There can be one or more kernels, and the problem of the lack of interface verification of each software component in the existing technology can be solved by adjusting the kernel parameters.
[0050] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.
[0051] An embodiment of the present invention provides a computer-readable storage medium having a program stored thereon. When the program is executed by a processor, the above-mentioned interface verification method is implemented.
[0052] An embodiment of the present invention provides a processor, which is used to run a program, wherein the interface verification method is executed when the program is running.
[0053] In a typical embodiment of the present invention, an electronic device is also provided, which includes one or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a method for executing any one of the interface verification methods.
[0054] An embodiment of the present invention provides an electronic device, the electronic device including a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, at least the following steps are performed: Step S1: Get multiple input signals and multiple output signals of each software component; Figure 1 Step S101 in Step S2: Generate the ASW input interface set and ASW output interface set of the application software layer through the input signal and output signal in the data dictionary of each software component, wherein one software component corresponds to one data dictionary; Figure 1 Step S102 in Step S3: Use the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer, wherein the BSW mapping table is a table of the mapping relationship between the interface function of the basic software layer and the interface signal of the application software layer, i.e., Figure 1 Step S103 in .
[0055] The electronic devices in this article can be servers, PCs, PADs, mobile phones, etc.
[0056] In order to enable those skilled in the art to more clearly understand the technical solution of the present invention, the technical solution and technical effects of the present invention will be described below with reference to specific embodiments. Example
[0057] In a typical embodiment of the present invention, an interface verification method is further provided, which specifically includes the following steps: Step 1: Use the first script to capture multiple input signals and output signals from each software component. Based on the data dictionary, input signals, and output signals of each software component, an ASW input interface set (ASW Input Interface Set) and an ASW output interface set (ASW Output Interface Set) are generated for the application software layer. For both the ASW Input Interface Set and the ASW Output Interface Set, the input and output signals must contain the following attributes: Group, Signal Name, Data Type, Initial Value, Dimension, Description, SWC, IFType, and Used. Group, Signal Name, Data Type, Initial Value, Dimension, and Description are defined in the corresponding software component's SWC_DD (data dictionary). The SWC attributes are included in the SWC_DD file name. The IFType and Used attributes require continuous refinement during duplication checking and verification. The IFType attribute's judgment logic in Step 1 is: if the interface signal's Group type is Input, then it is In; if the interface signal's Group type is Output, then it is Out. The judgment logic of the Used attribute is SWC name + Group type, such as SWC1(In).
[0058] Step 2: Use the second script to read the BSW mapping table (IF_Mapping) and generate the BSW input interface set (BSWInput Interface set) and the BSW output interface set (BSW Output Interface set). All interface signals in the BSW mapping table (including ASW output signals and ASW input signals) are checked for duplicates based on the SingalName attribute column. If duplicate signals exist, the fifth error message (the fifth error message should include but not be limited to the name of the interface signal, the name of the IF_Mapping Excel sheet, and the name of the sheet) is stored in the log file. After the duplicate check is completed, the function is stopped and a message is sent to the developer to make modifications based on the log file. After the developer completes the modifications based on the log file, the execution restarts from Step 1. If normal, execute Step 3.
[0059] Step 3: Check the ASW Output Interface set for duplicates. If duplicate interface signals are found, a sixth error message is generated (including, but not limited to, the name of the interface signal and the software component to which it resides). This error message is stored in a log file. After the duplicate check is complete, the function is stopped and a message prompts the developer to make modifications based on the log file. After the developer completes the modifications based on the log file, the program restarts from Step 1. If all is well, the program proceeds to Step 4.
[0060] Step 4: Use the DataType, Initial Value, and Dimension of each interface signal (ASW output signal) in the BSW Output Interface set to verify the DataType, Initial Value, and Dimension of the interface signal (Output signal) with the same name in the ASW Output Interface set. If the verification passes, the BSW Interface property column of the target ASW output signal in the BSW Output Interface set is filled in the BSW Interface property column of the target Output signal in the ASW Output Interface set to obtain the ASW candidate output interface set. If the verification fails, a first error message is generated (this first error message should include but is not limited to the name of the interface signal, the SWC in which it resides, and the name and sheet of the Excel file for the IF_Mapping). The first error message is stored in a log file. After the verification function in Step 4 completes, the function stops and prompts the developer to make modifications based on the log file. After the developer completes the modifications based on the log file, the process restarts from Step 1. During the verification, the interface signal names included in the BSW Output Interface set should be recorded. If normal, proceed to Step 5.
[0061] Step 5: Use the Data Type, Initial Value, and Dimension of the target Output signal in the ASW candidate output interface set to verify the Data Type, Initial Value, and Dimension of the target Input signal with the same name as the target Output signal in the ASW Input Interface set. If the verification passes, delete the target Input signal from the ASW InputInterface set to obtain the ASW preset input interface set. Then, modify the IFType and Used properties of the target Output signal in the ASW candidate output interface set to obtain the calibrated ASW output interface set. If the verification fails, a second error message is generated (including but not limited to the name of the interface signal and the SWC in which it resides). This second error message is stored in a log file. After the verification in Step 5 completes, the process stops and prompts the developer to make modifications based on the log file. After the developer completes the modifications based on the log file, execution restarts from Step 1. If all else fails, proceed to Step 6.
[0062] Step 6: Use the Data Type, Initial Value, and Dimension of the target ASW input signal in the BSW input interface set to verify the Data Type, Initial Value, and Dimension of the target input signal with the same name in the ASW preset input interface set. If the verification passes, the contents of the BSW Interface property column of the target ASW input signal in the BSW input interface set are added to the BSW Interface property column of the target input signal in the ASW preset input interface set, resulting in the ASW candidate input interface set. If the verification fails, a third error message is generated (this third error message should include, but is not limited to, the name of the interface signal, the SWC in which it resides, and the name of the Excel spreadsheet and sheet for the IF_Mapping). The third error message is stored in the log file. After the verification function in Step 6 completes, the function stops and prompts the developer to make modifications based on the log file. After the developer completes the modifications based on the log file, the function restarts from Step 1. During the verification, the names of any input-only interface signals not included in the BSW input interface set should be recorded, and these interface signals without a source should be stored as warnings in the log file. If the verification is successful, proceed to Step 7.
[0063] Step 7. For the interface signals that are only Input in the ASW alternative input interface set, mutual verification and duplication checking are performed. During the verification, the first N Input signals in the ASW alternative input interface set are used to verify the last MN Input signals in the ASW alternative input interface set. If the verification passes, the Used attributes of the first N Input signals are updated to obtain the verified ASW input interface set mentioned above. If the verification fails, a fourth error message is generated (the fourth error message should include but not be limited to the name of the interface signal and the SWC where it is located), and the fourth error message is stored in the log file. After the verification function of Step 7 is completed, the function is stopped, and the developer is prompted to make modifications based on the log file through information. After the developer completes the modification based on the log file, execution starts again from Step 1. If normal, execute Step 8.
[0064] Step 8. Based on the calibrated ASW input interface set and the calibrated ASW output interface set, generate the ASW verification sheet (ASW sheet) for the application software layer. Based on the interface signals recorded in Step 4, fill the corresponding interface signal cells in the ASW verification sheet (ASW sheet) with green, indicating that the ASW layer output is mapped to the BSW layer interface. Based on the interface signals recorded in Step 6, fill the corresponding interface signal cells in the ASW verification sheet (ASW sheet) with red, indicating that the ASW layer input interface signal has no source.
[0065] The Input Interface collection and Output Interface collection of all software components are obtained through Step 1.
[0066] Through Step 2, the BSW sheet interface signals of IF_Mapping are sorted and the BSW InputInterface and BSW Output Interface are obtained.
[0067] The ASW Output Interface collection is deduplicated through Step 3.
[0068] Through Step 4, based on the BSW Output Interface, the signal interface in the ASW Output Interface collection that has a mapping relationship with the BSW Output is verified, and the BSW mapping interface is filled in the relevant signals in the ASW OutputInterface collection.
[0069] Through Step 5, the interface signals that are both input and output in the ASW Input Interface set are verified based on the ASW alternative output interface set.
[0070] Through Step 6, based on the BSW input interface set, the verification of the interface signals in the ASW preset input interface set that are only input and have a mapping relationship with BSWInput is completed, and the BSW mapping interface is filled in the relevant signals of the ASW InputInterface set, and the input signals without signal source are verified.
[0071] Step 7 completes the mutual verification and deduplication of only the input interface signals in the ASW alternative input interface set.
[0072] The IF_Mapping ASW sheet is generated through Step 8.
[0073] In the description of the present invention, it should be understood that the indicated orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0074] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.
Claims
1. An interface verification method, characterized in that: The method comprises the following steps: Step S1: obtaining multiple input signals and multiple output signals of each software component; Step S2: Generate an ASW input interface set and an ASW output interface set of the application software layer through the input signals and output signals in the data dictionary of each software component, wherein one software component corresponds to one data dictionary; Step S3: Use the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer, wherein the BSW mapping table is a table of the mapping relationship between the interface functions of the basic software layer and the interface signals of the application software layer.
2. An interface verification method according to claim 1, characterized in that: The step S2 of generating an ASW input interface set and an ASW output interface set of the application software layer through the input signals and output signals in the data dictionary of each software component also includes: Step S2.1: Generate an initial ASW input interface set and an initial ASW output interface set of the application software layer based on the data dictionaries corresponding to each input signal and each output signal; Step S2.2: Update the initial ASW input interface set and the initial ASW output interface set according to the name of each software component, the file name of the corresponding data dictionary, and the signal type information of each SWC interface signal to obtain the ASW input interface set and the ASW output interface set of the application software layer; the SWC interface signal includes the Input signal and the Output signal.
3. An interface verification method according to claim 2, characterized in that: The step S3: using the BSW mapping table to verify the ASW input interface set and the ASW output interface set to obtain the ASW verification table of the application software layer also includes: Step S3.1: Generate a BSW input interface set and a BSW output interface set based on the BSW mapping table; Step S3.2: Based at least on the BSW input interface set and the BSW output interface set, calibrate the ASW input interface set and the ASW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set; Step S3.3: Based on the calibrated ASW input interface set and the calibrated ASW output interface set, an ASW verification table of the application software layer is generated.
4. An interface verification method according to claim 3, characterized in that: The step S3.1: verifying the ASW input interface set and the ASW output interface set based at least on the BSW input interface set and the BSW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set includes: Step S3.1.1: Use the BSW output interface set to verify the ASW output interface set to obtain the ASW candidate output interface set; Step S3.1.2: Using the ASW candidate output interface set, calibrate the ASW input interface set to obtain the ASW preset input interface set and the calibrated ASW output interface set; Step S3.1.3: Use the BSW input interface set to verify the ASW preset input interface set to obtain the ASW candidate input interface set; Step S3.1.4: Use the ASW candidate input interface set to perform self-verification to obtain a verified ASW input interface set.
5. An interface verification method according to claim 4, characterized in that: Step S3.1.1: Using the BSW output interface set, verify the ASW output interface set to obtain the ASW candidate output interface set include: Wherein, the BSW output interface set includes multiple ASW output signals, and the ASW output signal has at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function; the ASW output interface set includes multiple Output signals, and the Output signal has at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and a BSW interface function; Step S3.1.1.1: If the variable name of the target ASW output signal is the same as the ASW variable name of the target Output signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Output signal using the data type, interface initial value, and interface dimension of the target ASW output signal, where the target ASW output signal is one of the multiple ASW output signals and the target Output signal is one of the multiple Output signals; Step S3.1.1.2: If the verification passes, write the interface function of the target ASW output signal into the BSW interface function of the target Output signal to obtain the ASW alternative output interface set.
6. An interface verification method according to claim 5, characterized in that: The step S3.1.2: using the ASW candidate output interface set to verify the ASW input interface set to obtain the ASW preset input interface set and the calibrated ASW output interface set includes: The ASW candidate output interface set includes multiple output signals, and the ASW input interface set includes multiple input signals, wherein each output signal and input signal at least has an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, input and output information, and ASW usage information; Step S3.1.2.1: If the ASW variable name of the target Output signal is the same as the ASW variable name of the target Input signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Input signal using the ASW data type, ASW interface initial value, and ASW interface dimension of the target Output signal, where the target Output signal is one of the multiple Output signals and the target Input signal is one of the multiple Input signals; Step S3.1.2.2: If the verification passes, the target input signal is deleted from the ASW input interface set to obtain the ASW preset input interface set, and the input and output information of the target output signal in the ASW alternative output interface set and the ASW usage information are updated to obtain the calibrated ASW output interface set.
7. An interface verification method according to claim 6, characterized in that: Step S3.1.3: Using the BSW input interface set, verify the ASW preset input interface set to obtain the ASW candidate input interface set including: A BSW input interface set includes multiple ASW input signals, each of which has at least a variable name, a data type, an interface initial value, an interface dimension, and an interface function. An ASW preset input interface set includes multiple input signals, each of which has at least an ASW variable name, an ASW data type, an ASW interface initial value, an ASW interface dimension, and an ASW interface function. Step S3.1.3.1: If the variable name of the target ASW input signal is the same as the ASW variable name of the target Input signal, verify the ASW data type, ASW interface initial value, and ASW interface dimension of the target Input signal using the data type, interface initial value, and interface dimension of the target ASW input signal; Step S3.1.3.2: If the verification is passed, the interface function in the target ASW input signal is written into the ASW interface function of the target Input signal of the ASW preset input interface set to obtain the ASW alternative input interface set.
8. An interface verification method according to claim 7, characterized in that: The step S3.1.4: using the ASW candidate input interface set to perform self-verification, the obtained verified ASW input interface set includes: Step S3.1.4.1: Use the first N input signals in the ASW candidate input interface set to verify the last MN input signals in the ASW candidate input interface set, where M>N, and M is the total number of input signals in the ASW candidate input interface set; Step S3.1.4.1: If the verification is passed, the ASW usage information of the first N input signals is updated to obtain a verified ASW input interface set.
9. An interface verification method according to claim 8, characterized in that: Before executing step S3.2: verifying the ASW input interface set and the ASW output interface set based at least on the BSW input interface set and the BSW output interface set to obtain a calibrated ASW input interface set and a calibrated ASW output interface set, the following steps are further included: Step a: performing duplicate checking on multiple BSW input signals in the BSW input interface set to obtain a BSW input interface set after duplicate checking; Step b: performing duplicate checking on multiple BSW output signals in the BSW output interface set to obtain a BSW output interface set after duplicate checking; Step c: performing duplication checking on the plurality of output signals in the ASW output interface set to obtain a duplication-checked ASW output interface set.
10. An interface verification device, characterized in that: include: An acquisition unit, used to acquire multiple input signals and multiple output signals of each software component; A generating unit, configured to generate an ASW input interface set and an ASW output interface set of the application software layer based on a data dictionary, input signals, and output signals of each software component, wherein one software component corresponds to one data dictionary; The verification unit is used to verify the ASW input interface set and the ASW output interface set using at least a BSW mapping table to obtain an ASW verification table for the application software layer, wherein the BSW mapping table is a table of mapping relationships between interface functions of the basic software layer and interface signals of the application software layer.
11. A processor, characterized in that: The processor is used to run a program, wherein the program executes any one of the interface verification methods in claims 1 to 9 when the program is run.
12. An electronic device, characterized in that: It includes one or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors, and the one or more programs are used to execute any one of the interface verification methods in claims 1 to 9.