Remote processing method of an accelerator card, remote processing system and accelerator card

Abstract

The application provides a remote processing method and system of an acceleration card and the acceleration card, and relates to the technical field of communication; the acceleration card comprises a main logic processing chip and a control management chip; the method comprises the following steps: an operating system PS of the control management chip acquires a target data packet transmitted by a debugging device; the PS of the control management chip processes the target data packet, and realizes a first operation; the first operation comprises at least one of the following: remote upgrading of the main logic processing chip; remote online debugging of the main logic processing chip; remote upgrading of a programmable logic unit PL of the control management chip; remote online debugging of the PL of the control management chip; remote upgrading and remote online debugging functions of the acceleration card, which are convenient for program maintenance, problem analysis and fault elimination of the acceleration card between multiple stations, and improve the test verification efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, in particular to a remote processing method and system of an acceleration card and the acceleration card. BACKGROUND

[0002] The acceleration card is an important component of a building base band unit (BBU), and its main functions include accelerating data processing and providing high-performance real-time protocol data processing, thereby playing a role of bridging the past and the future. On the one hand, the acceleration card can play and utilize the advantages of parallel processing and multitasking of a field programmable gate array (FPGA) to reduce the burden of a central processing unit (CPU) and realize system acceleration function, and on the other hand, the acceleration card has a front transmission function to perform baseband data communication through an optical port and an active antenna unit (AAU).

[0003] At present, most of the acceleration cards are customized products, which need to be adapted to the schemes recommended by different chip manufacturers to realize the processing of part of the physical layer data of the baseband protocol, and the data processing capability is limited, so that the overall scheme implementation of the BBU has certain limitations. The current upgrade scheme of the acceleration card mainly upgrades through a PCIe (Peripheral Component Interconnect Express) link. The host main end transmits the acceleration card version image to be upgraded to the upgrade device of the acceleration card through the PCIe link, and the acceleration card performs firmware upgrade according to the existing upgrade scheme.

[0004] In summary, the existing upgrade scheme of the acceleration card mainly relies on the PCIe transmission link of the host main end, and does not support remote upgrade and remote online debugging of the acceleration card based on the Internet. SUMMARY

[0005] The embodiments of the present application aim to provide a remote processing method and system of an acceleration card and the acceleration card, so as to solve the problem that the existing scheme does not support remote upgrade and remote online debugging of the acceleration card based on the Internet.

[0006] In order to solve the above problems, the embodiments of the present application provide a remote processing method of an acceleration card, wherein the acceleration card comprises a main logic processing chip and a control management chip, and the method comprises the following steps:

[0007] An operating system PS of the control management chip acquires a target data packet transmitted by a debugging device;

[0008] The PS of the control management chip processes the target data packet to realize a first operation; the first operation comprises at least one of the following:

[0009] remote upgrade of the main logic processing chip;

[0010] remote online debugging of the main logic processing chip;

[0011] remote upgrade of the programmable logic unit (PL) of the control management chip;

[0012] remote online debugging of the PL of the control management chip.

[0013] In some embodiments of the present application, the target data packet comprises at least one of:

[0014] a bit package file of the main logic processing chip requiring remote upgrade;

[0015] a debugging data packet of the main logic processing chip;

[0016] a bit package file of the PL of the control management chip requiring remote upgrade;

[0017] a debugging data packet of the PL of the control management chip.

[0018] In some embodiments of the present application, the operating system (PS) of the control management chip acquires a target data packet transmitted by a debugging device, comprising:

[0019] The PS of the control management chip acquires the target data packet transmitted by the debugging device through the public Internet; wherein the debugging device and the public Internet are connected through Ethernet, and the public Internet is connected with the PS of the control management chip.

[0020] In some embodiments of the present application, the PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module, and a data bridge conversion module.

[0021] The PS of the control management chip processes the target data packet to realize a first operation, comprising:

[0022] The data protocol analysis module analyzes the target data packet and transmits the analyzed target data packet to the encryption and decryption module;

[0023] The encryption and decryption module decrypts the data packet transmitted by the data protocol analysis module;

[0024] The remote upgrade debugging module and the data bridge conversion module process the decrypted data packet to realize the first operation.

[0025] In some embodiments of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packets to realize remote upgrade of the main logic processing chip, including:

[0026] The remote upgrade debugging module stores the decrypted data in a cache, and converts the data in the cache into a serial peripheral interface (SPI) signal through the data bridge conversion module;

[0027] The SPI signal is transmitted to the main logic processing chip through a configuration interface of the main logic processing chip to upgrade and configure the main logic processing chip.

[0028] In some embodiments of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packets to realize remote online debugging of the main logic processing chip, including:

[0029] The remote upgrade debugging module connects the decrypted data to a joint test action group (JTAG) interface of the main logic processing chip through the data bridge conversion module, and the debugging device remotely and online debugs the main logic processing chip through the JTAG interface in a software interface.

[0030] In some embodiments of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packets to realize remote upgrade of the PL, including:

[0031] The remote upgrade debugging module stores the decrypted data in a flash memory, and upgrades and configures the PL according to the data in the flash memory.

[0032] In some embodiments of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packets to realize remote online debugging of the PL, including:

[0033] The remote upgrade debugging module connects the decrypted data to a monitoring interface of the PL through the data bridge conversion module, and the debugging device remotely and online debugs the PL through the monitoring interface in a software interface.

[0034] In some embodiments of the present application, the method further includes:

[0035] In the case of upgrade problems or errors, the remote upgrade debugging module acquires error information and transmits the error information to the encryption and decryption module;

[0036] The encryption and decryption module encrypts the error information and transmits the encrypted information to the data protocol analysis module;

[0037] The data protocol analysis module transmits the encrypted information to the debugging device through the public Internet.

[0038] In some embodiments of the present application, the method further comprises:

[0039] In the case of problems or errors in the upgrade, the remote upgrade debugging module restores the main logic processing chip and / or the PL to the version before the upgrade.

[0040] In some embodiments of the present application, the data bridge conversion module further comprises a PL local online debugging data bridge module, which is used to realize local online debugging of the PL.

[0041] Embodiments of the present application also provide a remote processing system, which comprises a debugging device and a baseband processing unit (BBU); the BBU comprises an acceleration card and a central processing unit (CPU) connected with the acceleration card through a PCIe interface;

[0042] The debugging device is connected with the acceleration card through the public Internet; the acceleration card comprises a main logic processing chip and a control management chip;

[0043] The operating system (PS) of the control management chip can obtain the target data packet transmitted by the debugging device to realize a first operation; the first operation comprises at least one of the following:

[0044] Remote upgrade of the main logic processing chip;

[0045] Remote online debugging of the main logic processing chip;

[0046] Remote upgrade of the programmable logic unit (PL) of the control management chip;

[0047] Remote online debugging of the PL of the control management chip.

[0048] In some embodiments of the present application, the debugging device is connected with the public Internet through an Ethernet, and the public Internet is connected with the PS of the control management chip.

[0049] In some embodiments of the present application, the PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module and a data bridge conversion module.

[0050] The data protocol analysis module is used to analyze the data packet transmitted by the public Internet, transmit the analyzed data to the encryption and decryption module, and / or receive the data processed by the encryption and decryption module and transmit the packaged data to the public Internet.

[0051] The encryption and decryption module is configured to perform encryption and decryption on the received data packet.

[0052] The remote upgrade debugging module and the data bridging conversion module are configured to process the data transmitted by the encryption and decryption module, and implement the first operation.

[0053] Embodiments of the present application also provide an acceleration card, which comprises a main logic processing chip and a control management chip, an operating system PS of the control management chip comprises a processor and a transceiver, the transceiver receives and transmits data under the control of the processor, and the processor is configured to perform the following operations:

[0054] obtain target data packets transmitted by a debugging device;

[0055] process the target data packets to implement a first operation; the first operation comprises at least one of the following:

[0056] remote upgrade of the main logic processing chip;

[0057] remote online debugging of the main logic processing chip;

[0058] remote upgrade of a programmable logic unit PL of the control management chip;

[0059] remote online debugging of the PL of the control management chip.

[0060] In some embodiments of the present application, the target data packets comprise at least one of the following:

[0061] a bit package file of the main logic processing chip that needs to be remotely upgraded;

[0062] a debugging data packet of the main logic processing chip;

[0063] a bit package file of the PL of the control management chip that needs to be remotely upgraded;

[0064] a debugging data packet of the PL of the control management chip.

[0065] In some embodiments of the present application, the processor is further configured to perform the following operations:

[0066] obtain the target data packets transmitted by the debugging device through a public Internet; wherein the debugging device and the public Internet are connected through an Ethernet, and the public Internet is connected with the PS of the control management chip.

[0067] In some embodiments of the present application, the PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module and a data bridging conversion module.

[0068] The data protocol analysis module is configured to analyze the target data packet and transmit the analyzed target data packet to the encryption and decryption module.

[0069] The encryption and decryption module is configured to decrypt the data packet transmitted by the data protocol analysis module.

[0070] The remote upgrade debugging module and the data bridge conversion module are configured to process the decrypted data packet to implement the first operation.

[0071] In some embodiments of the present application, the processor is further configured to perform the following operation:

[0072] In the case of problems or errors in the upgrade, error information is acquired.

[0073] The error information is encrypted, and the encrypted information is transmitted to the data protocol analysis module.

[0074] The encrypted information is transmitted to the debugging device through the public Internet.

[0075] In some embodiments of the present application, the processor is further configured to perform the following operation:

[0076] In the case of problems or errors in the upgrade, the main logic processing chip and / or the PL are restored to the version before the upgrade.

[0077] The embodiments of the present application also provide an acceleration card, including a memory, a processor, and a program stored in the memory and executable on the processor, and the processor implements the remote processing method of the acceleration card when executing the program.

[0078] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the steps in the remote processing method of the acceleration card.

[0079] The embodiments of the present application also provide a computer program product, which includes computer instructions, and the computer instructions are executed by a processor to implement the steps in the remote processing method of the acceleration card.

[0080] The above technical solutions of the present application have at least the following beneficial effects:

[0081] The remote processing method of the acceleration card, the remote processing system and the acceleration card provided in the embodiments of the present application, wherein the acceleration card comprises a main logic processing chip and a control management chip. According to the test verification requirements of the acceleration card, the PS of the control management chip runs the data module application required for the remote upgrade and the remote online debugging of the main logic processing chip and the PL, the data transmission and the protocol conversion are realized between the modules, and the special interface is connected to the chip to realize the following functions: the remote upgrade of the main logic processing chip; the remote online debugging of the main logic processing chip; the remote upgrade of the programmable logic unit PL of the control management chip; the remote online debugging of the PL of the control management chip. The remote upgrade and the remote online debugging functions of the acceleration card facilitate the program maintenance, the problem analysis and the fault troubleshooting of the acceleration card between multiple stations, and improve the test verification efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0082] Figure 1 Fig. 1 shows a structure schematic diagram of a remote processing system provided by the embodiments of the present application;

[0083] Figure 2 Fig. 2 shows a structure schematic diagram of a BBU provided by the embodiments of the present application;

[0084] Figure 3 Fig. 3 shows another structure schematic diagram of a remote processing system provided by the embodiments of the present application;

[0085] Figure 4 Fig. 4 shows a step flow chart of a remote processing method of an acceleration card provided by the embodiments of the present application;

[0086] Figure 5 Fig. 5 shows a remote processing flow example diagram of an acceleration card provided by the embodiments of the present application;

[0087] Figure 6 Fig. 6 shows an example diagram of the remote upgrade of the main logic processing chip provided by the embodiments of the present application;

[0088] Figure 7 Fig. 7 shows an example diagram of the remote online debugging of the main logic processing chip provided by the embodiments of the present application;

[0089] Figure 8 Fig. 8 shows an example diagram of the remote upgrade of the programmable logic unit PL of the control management chip provided by the embodiments of the present application;

[0090] Figure 9 Fig. 9 shows an example diagram of the remote online debugging of the PL of the control management chip provided by the embodiments of the present application;

[0091] Figure 10 Fig. 10 shows a structure schematic diagram of an acceleration card provided by the embodiments of the present application. DETAILED DESCRIPTION

[0092] To make the technical problems, technical solutions and advantages to be solved in the present application clearer, specific embodiments will be described in detail below with reference to the drawings.

[0093] As shown in Figure 1 The embodiment of the present application provides a remote processing system, which comprises: a debugging device 1 and one or more baseband processing units (BBU) (such as BBU1, BBUn); the BBU (such as BBU1) comprises: an acceleration card 7, and a central processing unit CPU 9 connected with the acceleration card 7 through a PCIe interface;

[0094] The debugging device 1 is connected with the acceleration card 7 through a public Internet 2; the acceleration card 7 comprises a main logic processing chip 6 (such as a Field Programmable Gate Array (FPGA)) and a control management chip 3 (such as a System on Chip (SOC));

[0095] The operating system PS of the control management chip can obtain the target data packet transmitted by the debugging device, and realize a first operation; the first operation comprises at least one of the following:

[0096] Remote upgrade of the main logic processing chip;

[0097] Remote online debugging of the main logic processing chip;

[0098] Remote upgrade of the programmable logic unit PL of the control management chip;

[0099] Remote online debugging of the PL of the control management chip.

[0100] Optionally, the debugging device and the public Internet are connected through an Ethernet, and the public Internet is connected with the PS of the control management chip.

[0101] Optionally, the debugging device (which can also be called a PC debugging machine) mainly completes the overall scheduling of the upgrade and debugging of the whole system. Through the connection of the gigabit Ethernet and the public Internet, the debugging device is responsible for the distribution and deployment of the upgrade programs of all acceleration cards, and the transmission and display of the debugging related data.

[0102] Optionally, the public Internet mainly connects the BBU base station units in different regions according to the destination ip, and bridges the data channel between the debugging device and the BBU base station unit.

[0103] Optionally, the BBU adopts a general server architecture, which is composed of a CPU (X86) and an acceleration card of PCIe architecture. The server CPU 9 processes part of the data of the High-PHY, and the acceleration card 7 processes the baseband part of the data of the Low-PHY. The CPU 9 and the acceleration card 7 interact with each other through a high-speed PCIe interface. The acceleration card provides high-performance real-time protocol data processing, and plays a role of connecting the front and the back. The acceleration card is composed of a SOC+FPGA heterogeneous architecture. In order to facilitate remote upgrading and remote online debugging of the acceleration card, the SOC implements the function of control management, receives control instructions for remote upgrading and remote online debugging from the public Internet, performs TCP / IP network protocol conversion, and after passing through the encryption and decryption module, the data corresponding to the remote upgrading and the remote online debugging are transmitted to the remote debugging module, the debugging bridge module and the FPGA configuration program, respectively, as shown in Figure 2 , so as to finally realize the functions of remote upgrading and remote online debugging of the acceleration card, including remote upgrading and remote online debugging of the FPGA 6 and remote upgrading and remote online debugging of the SOC PL 5.

[0104] In at least one embodiment of the present application, as shown in Figure 3 , the PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrading and debugging module (which can also be referred to as a remote upgrading and remote online debugging module), and a data bridge conversion module.

[0105] The data protocol analysis module is configured to analyze the data packets transmitted from the public Internet, and transmit the analyzed data to the encryption and decryption module; and / or receive the data processed by the encryption and decryption module, and transmit the packaged data to the public Internet.

[0106] The encryption and decryption module is configured to perform encryption and decryption processing on the received data packets.

[0107] The remote upgrading and debugging module and the data bridge conversion module are configured to process the data transmitted by the encryption and decryption module, and realize the first operation.

[0108] In some embodiments, as shown in Figure 3 , the debugging device runs a data packet packaging and unpacking module. After receiving the demand for remote upgrading or remote online debugging of the SOC PL and the FPGA, the data packet packaging and unpacking module processes the data in two directions: the data packet packaging and unpacking module packages the data packets to be transmitted according to the TCP / IP protocol, and transmits the packaged data to the public Internet; or the data packet packaging and unpacking module receives the data packets transmitted from the public Internet, and unpacks the data packets, and displays the corresponding data on the debugging device.

[0109] In some embodiments, as shown in Figure 3As shown, the data packet transmission module of the public internet transmits the data packets required by the data packet unpacking module according to the destination IP of the acceleration card for remote upgrading or remote online debugging, so as to realize the function of network interconnection between the debugging device and the acceleration card in different regions.

[0110] In some embodiments, as shown in Figure 3 The SOC PS of the acceleration card runs the data protocol analysis module, which realizes two functions: analyzing the transmitted data packets of the public internet and transmitting the analyzed data to the encryption and decryption module for subsequent processing; or receiving the processed data of the encryption and decryption module and transmitting the data to the public internet according to the TCP / IP protocol.

[0111] In some embodiments, as shown in Figure 3 The SOC PS of the acceleration card runs the encryption and decryption module, which realizes reliable transmission and secure transmission of the BBU base station unit data. The module performs encryption and decryption processing on the related data packets of remote upgrading and remote online debugging, so as to ensure the correctness of the remote upgrading version and the accuracy of the remote debugging data.

[0112] In some embodiments, as shown in Figure 3 The SOC PS of the acceleration card runs the remote upgrading and remote online debugging module, which contains four application programs: the SOC PL remote online debugging module (XVC Server2), the SOC PL remote upgrading module (FPGA manager), the FPGA remote online debugging module (XVC Server1), and the FPGA remote upgrading module (FPGA configuration program).

[0113] The SOC PL remote debugging module realizes protocol conversion of the debugging data packets and the debugging interface, can convert the real-time monitoring and control data stream into debugging data packets and transmit the data packets to the encryption and decryption module, and finally realizes the function of remote online debugging of the PC debugging machine.

[0114] The FPGA remote online debugging module realizes protocol conversion of the debugging data packets and the debugging interface, can convert the real-time monitoring and control data stream into debugging data packets and transmit the data packets to the encryption and decryption module, and finally realizes the function of remote online debugging of the PC debugging machine. Meanwhile, the module can also provide the function of online downloading of the FPGA program version.

[0115] The SOC PL remote upgrading module realizes receiving and storing of the upgrading data packets of the SOC PL and performs remote online upgrading. If there is a problem or error in the upgrading, the remote upgrading module transmits the related error information to the PC debugging machine and simultaneously restores the previous correct version, so as to ensure the normal operation of the acceleration card.

[0116] Among them, the FPGA remote upgrade module receives and stores the FPGA upgrade data packets and performs remote online upgrades. If any problems or errors occur during the upgrade, the remote upgrade module summarizes the relevant error information and transmits it to the PC debugger, while restoring the last correct version to ensure the normal operation of the accelerator card.

[0117] In some embodiments, as Figure 3 As shown in the figure, the SOC PL of the accelerator card runs a data bridge conversion module, which contains four applications: FPGA remote online debugging data bridge module (Debug Bridge1), SOC PL remote online debugging data bridge module (Debug Bridge2), SOC PL local online debugging data bridge module (Debug Bridge3), and FPGA remote upgrade data bridge module.

[0118] Among them, the FPGA remote online debugging data bridge module realizes the signal bridge between debugging data and JTAG signals. The JTAG signals are connected to the dedicated pins of the FPGA, realizing online debugging of the FPGA and online version loading; the SOC PL remote online debugging data bridge module realizes the signal bridge between debugging data and PL internal monitoring signals, realizing online debugging of PL monitoring signals; the SOC PL local online debugging data bridge module realizes the coexistence of remote debugging and local debugging signals, ensuring that the local JTAG debugging signal can be connected normally; the FPGA remote upgrade data bridge module realizes the signal bridge conversion between debugging data and SPI configuration signals, realizing the function of remote upgrade and solidification of debugging data through the dedicated SPI configuration interface of the FPGA.

[0119] In summary, the accelerator card hardware circuit in this embodiment uses an FPGA + SOC heterogeneous architecture solution. The SOC's PS is connected to the Internet via a Gigabit Ethernet interface and exchanges data with the debugging PC. The accelerator card's FPGA implements Low-PHY data processing and exchanges data with the x86 server's CPU via a PCIe interface, completing all data processing for the BBU base station.

[0120] like Figure 4 As shown, an embodiment of the present application provides a remote processing method for an accelerator card, wherein the accelerator card includes a main logic processing chip (such as a field programmable gate array (FPGA)) and a control management chip (such as a system on chip (SOC)). The method includes:

[0121] Step 101: The operating system (Processing System, PS) of the control management chip obtains a target data packet transmitted by a debugging device;

[0122] Step 102: The PS of the control management chip processes the target data packet to implement a first operation; the first operation includes at least one of the following:

[0123] Remote upgrade of the main logic processing chip;

[0124] Remote online debugging of the main logic processing chip;

[0125] Remote upgrade of the programmable logic unit (PL) of the control management chip;

[0126] The control manages remote online debugging of the PL of the chip.

[0127] For example, Figure 5 As shown, the accelerator card includes a main logic processing chip (FPGA) and a control management chip (SOC). Based on the accelerator card's test and verification requirements, the SOC (PS) runs the data module applications required for remote upgrades and online debugging of the FPGA and program logic (PL). Each module implements data transmission and protocol conversion between them and connects to the chip via a dedicated interface, enabling the following functions: remote upgrades of the main logic processing chip (FPGA); remote online debugging of the main logic processing chip (FPGA); remote upgrades of the control management chip (SOC) and online debugging of the control management chip (SOC). The accelerator card's remote upgrade and online debugging capabilities facilitate program maintenance, problem analysis, and troubleshooting of the accelerator card across multiple sites, improving test and verification efficiency.

[0128] In at least one embodiment of the present application, the target data packet includes at least one of the following:

[0129] The bit package file of the main logic processing chip that needs to be remotely upgraded;

[0130] The debugging data packet of the main logic processing chip;

[0131] The PL bit package file of the control management chip that needs to be remotely upgraded;

[0132] The debug data packet of the PL of the control management chip.

[0133] In at least one embodiment of the present application, the operating system PS of the control management chip obtains the target data packet transmitted by the debugging device, including:

[0134] The PS of the control management chip obtains the target data packet transmitted by the debugging device through the public Internet; wherein, the debugging device is connected to the public Internet through Ethernet, and the public Internet is connected to the PS of the control management chip.

[0135] In at least one embodiment of the present application, the PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module, and a data bridge conversion module.

[0136] The PS of the control management chip processes the target data packet to implement a first operation, comprising:

[0137] The data protocol analysis module analyzes the target data packet and transmits the analyzed target data packet to the encryption and decryption module.

[0138] The encryption and decryption module decrypts the data packet transmitted by the data protocol analysis module.

[0139] The remote upgrade debugging module and the data bridge conversion module process the decrypted data packet to implement the first operation.

[0140] In other words, after the upgrade data packet and the debugging data packet pass through multiple modules and protocol conversion, transmission between the PC debugging machine and the upgrade debugging module of the acceleration card is realized.

[0141] In one implementation of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet to implement remote upgrade of the main logic processing chip, comprising:

[0142] The remote upgrade debugging module stores the decrypted data in a cache and converts the data in the cache into a serial peripheral interface (SPI) signal through the data bridge conversion module.

[0143] The SPI signal is transmitted to the main logic processing chip through a configuration interface of the main logic processing chip to upgrade and configure the main logic processing chip.

[0144] Optionally, in the case of upgrade problems or errors, the remote upgrade debugging module obtains error information and transmits the error information to the encryption and decryption module.

[0145] The encryption and decryption module encrypts the error information and transmits the encrypted information to the data protocol analysis module.

[0146] The data protocol analysis module transmits the encrypted information to the debugging device through the public Internet.

[0147] Optionally, the method further comprises:

[0148] In the case of upgrade problems or errors, the remote upgrade debugging module restores the main logic processing chip to a version before the upgrade.

[0149] For example, the FPGA special interface includes two parts of JTAG interface and configuration interface, the JTAG interface is used for online debugging of the FPGA, and the configuration interface is used for bit program configuration of the FPGA after power-on. Figure 6 The remote upgrade flowchart of the FPGA is shown, the data packet packaging and unpacking module of the PC transmits the FPGA bit file needing remote upgrade to the BBU acceleration card unit through the public internet data packet transmission module, the PS data protocol analysis module of the SOC performs protocol analysis of the network message after receiving the corresponding bit packet file, the FPGA remote upgrade module temporarily stores the bit file in the cache after the encryption and decryption module, and the FPGA remote upgrade data bridging module is used to convert the temporarily stored bit file into SPI interface data, the FPGA is upgraded and configured through the SPI configuration signal, after the configuration is completed, whether the FPGA is configured successfully is detected, if the configuration is successful, the remote upgrade is ended, if the configuration fails, the error information is fed back to the PC, and the FPGA configuration process is performed again.

[0150] In another implementation manner of the application, the remote upgrade and debugging module and the data bridging and conversion module process the decrypted data packet, and realize remote online debugging of the main logic processing chip, including:

[0151] The remote upgrade and debugging module connects the decrypted data to the joint test action group (JTAG) interface of the main logic processing chip through the data bridging and conversion module, and the debugging device remotely and online debugs the main logic processing chip through the JTAG interface in the software interface.

[0152] For example, the FPGA special interface includes two parts of JTAG interface and configuration interface, the JTAG interface is used for online debugging of the FPGA, and the configuration interface is used for bit program configuration of the FPGA after power-on. The FPGA remote online debugging module and the FPGA remote online debugging data bridging module realize protocol conversion function between gigabit Ethernet and JTAG, the SOC PL is connected to the JTAG interface side of the FPGA through the EMIO, and the online debugging function of the FPGA is realized. Figure 7The FPGA online debugging flowchart is shown, the PC remote debugging software is opened, the data packet encapsulation and decapsulation module prepares the debugging data packet, the FPGA of the destination acceleration card is connected through the input ip and port number, the debugging data packet is transmitted to the acceleration card PS data protocol analysis module through the data packet transmission module, the analyzed data is transmitted to the FPGA remote online debugging module through the encryption and decryption module, the FPGA remote online debugging data bridge module is combined, and the special JTAG pin of the FPGA is connected. After the PC appears the debugging interface, the test program of the FPGA is downloaded and the debugging monitoring program is added, the FPGA is online debugged, analyzed data and problems are checked in the software interface. After the debugging is completed, the acceleration card is restarted, and the normal running program is restored.

[0153] In another implementation manner of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize remote upgrade of the PL, including:

[0154] The remote upgrade debugging module stores the decrypted data in the flash memory, and upgrades and configures the PL according to the data in the flash memory.

[0155] Optionally, the method further includes:

[0156] In the case of problems or errors in the upgrade, the remote upgrade debugging module acquires error information and transmits the error information to the encryption and decryption module;

[0157] The encryption and decryption module encrypts the error information and transmits the encrypted information to the data protocol analysis module;

[0158] The data protocol analysis module transmits the encrypted information to the debugging device through the public Internet.

[0159] Optionally, the method further includes:

[0160] In the case of problems or errors in the upgrade, the remote upgrade debugging module restores the PL to the version before the upgrade.

[0161] For example, Figure 8As shown in the flowchart of the SOC PL remote upgrade, the PC data packet packaging and unpacking module transmits the SOC PL bit file that needs to be remotely upgraded to the BBU acceleration card unit through the public Internet data packet transmission module. After the SOC PS receives the corresponding bit packet file, the data protocol analysis module performs protocol analysis on the network message. After the encryption and decryption module, the bit file is stored in the eMMC. The PS runs the SOC PL remote upgrade module, upgrades and configures the stored bit file to the PL, and after the configuration is completed, it is detected whether the SOC PL configuration is successful. If the configuration is successful, the remote upgrade ends. If the configuration fails, the error information is fed back to the PC, and the PL configuration process is performed again.

[0162] In another implementation manner of the present application, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize the remote online debugging of the PL, including:

[0163] The remote upgrade debugging module connects the decrypted data to the monitoring interface of the PL through the data bridge conversion module, and the debugging device remotely and online debugs the PL through the monitoring interface in the software interface.

[0164] For example, Figure 9 As shown in the flowchart of the SOC PL online debugging, the PC remote debugging software is opened, the data packet packaging and unpacking module prepares the debugging data packet, connects to the PL of the target acceleration card through the input ip and port number, the debugging data packet is transmitted to the acceleration card PS data protocol analysis module through the data packet transmission module, the analyzed data is transmitted to the PL remote online debugging module through the encryption and decryption module, and the data flow of the real-time monitoring and control of the PL is connected through the PL remote online debugging data bridge module. After the debugging interface appears on the PC, the PL is online debugged, analyzed data and problems are checked in the software interface. After the debugging is completed, the acceleration card is restarted, and the normal running program is restored.

[0165] In at least one embodiment of the present application, the data bridge conversion module further includes a PL local online debugging data bridge module, which is used to realize the local online debugging of the PL.

[0166] In summary, the embodiments of the present application propose to support the remote upgrade and remote online debugging based on the TCP / IP network and the hardware device and method, and simultaneously support the remote upgrade and remote online debugging of the SOC PL and FPGA two chips, solve the problem that the prior art scheme cannot realize the online debugging function, improve the acceleration card test and verification efficiency of the test network in the preliminary verification stage, and ensure the normal and stable operation of the test network after being put into operation.

[0167] AsFigure 10 As shown, an embodiment of the present application further provides an accelerator card, which includes a main logic processing chip and a control management chip. The operating system PS of the control management chip includes a processor 300 and a transceiver 310. The transceiver 310 receives and sends data under the control of the processor 300. The processor 300 is used to perform the following operations:

[0168] Get the target data packet transmitted by the debugging device;

[0169] Process the target data packet to implement a first operation, wherein the first operation includes at least one of the following:

[0170] Remote upgrade of the main logic processing chip;

[0171] Remote online debugging of the main logic processing chip;

[0172] Remote upgrade of the programmable logic unit PL of the control management chip;

[0173] The control manages remote online debugging of the PL of the chip.

[0174] In some embodiments of the present application, the target data packet includes at least one of the following:

[0175] The bit package file of the main logic processing chip that needs to be remotely upgraded;

[0176] The debugging data packet of the main logic processing chip;

[0177] The PL bit package file of the control management chip that needs to be remotely upgraded;

[0178] The debug data packet of the PL of the control management chip.

[0179] In some embodiments of the present application, the processor is further configured to perform the following operations:

[0180] Obtain the target data packet transmitted by the debugging device through the public Internet; wherein, the debugging device is connected to the public Internet through Ethernet, and the public Internet is connected to the PS of the control management chip.

[0181] In some embodiments of the present application, the PS of the control management chip includes: a data protocol parsing module, an encryption and decryption module, a remote upgrade and debugging module, and a data bridging conversion module;

[0182] The data protocol parsing module is used to parse the target data packet and transmit the parsed target data packet to the encryption and decryption module;

[0183] The decryption module is configured to decrypt the data packet transmitted by the data protocol analysis module.

[0184] The remote upgrade debugging module and the data bridge conversion module are configured to process the decrypted data packet to implement the first operation.

[0185] In some embodiments of the present application, the processor is further configured to perform the following operations:

[0186] In the case of problems or errors in the upgrade, error information is acquired.

[0187] The error information is encrypted, and the encrypted information is transmitted to the data protocol analysis module.

[0188] The encrypted information is transmitted to the debugging device through the public Internet.

[0189] In some embodiments of the present application, the processor is further configured to perform the following operations:

[0190] In the case of problems or errors in the upgrade, the main logic processing chip and / or the PL are restored to the version before the upgrade.

[0191] In the embodiments of the present application, the acceleration card includes a main logic processing chip and a control management chip. According to the test verification requirements of the acceleration card, the PS of the control management chip runs the data module application required for the remote upgrade and the remote online debugging of the main logic processing chip and the PL, data transmission and protocol conversion are implemented between the modules, and a special interface is connected to the chip to implement the following functions: remote upgrade of the main logic processing chip; remote online debugging of the main logic processing chip; remote upgrade of the programmable logic unit PL of the control management chip; remote online debugging of the PL of the control management chip. The remote upgrade and the remote online debugging function of the acceleration card facilitate program maintenance, problem analysis and fault troubleshooting of the acceleration card between multiple stations, and improve the test verification efficiency.

[0192] It should be noted that the acceleration card provided in the embodiments of the present application is an acceleration card capable of performing the remote processing method of the acceleration card described above, and all embodiments of the remote processing method of the acceleration card are applicable to the acceleration card and can achieve the same or similar beneficial effects, which will not be repeated here.

[0193] The embodiments of the present application further provide an acceleration card, which includes a memory, a processor and a computer program stored in the memory and executable on the processor, and the processor implements each process in the embodiments of the remote processing method of the acceleration card described above when executing the program, and can achieve the same technical effects. To avoid repetition, it will not be repeated here.

[0194] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement each process in the embodiment of the method for remotely processing an acceleration card and achieve the same technical effects. To avoid repetition, details are not described herein. The computer readable storage medium includes a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0195] The embodiment of the present application further provides a computer program product, which includes computer instructions. The computer instructions are executed by a processor to implement each process in the embodiment of the method for remotely processing an acceleration card and achieve the same technical effects. To avoid repetition, details are not described herein.

[0196] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system or a computer program product. Therefore, the present application can be in a form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware aspects. Moreover, the present application can be in a form of a computer program product implemented on one or more computer readable storage media (including but not limited to disk storage and optical storage, etc.) containing computer usable program code.

[0197] The present application is described with reference to flowcharts and / or block diagrams of the method, device (system) and computer program product according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, a special purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device that implements the flowcharts and / or block diagrams. Figure 1 The device that implements the functions specified in one flow or multiple flows and / or one block or multiple blocks.

[0198] These computer program instructions can also be stored in a computer readable storage medium that can direct the computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable storage medium produce a product of manufacture including an instruction device that implements the flowcharts and / or block diagrams. Figure 1 The device that implements the functions specified in one flow or multiple flows and / or one block or multiple blocks. Figure 1 The device that implements the functions specified in one flow or multiple flows and / or one block or multiple blocks.

[0199] These computer program instructions can also be loaded into a computer or other programmable data processing devices, so that a series of operational steps are performed on the computer or other programmable data processing devices to generate a computer-implemented process, so that the instructions executed by the computer or other programmable data processing devices provide operational steps for implementing the function specified in the flowchart Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0200] The above is the preferred embodiment of the present application, it should be pointed out that, for those skilled in the art, without departing from the principles described in the present application, can also make a number of improvements and refinements, these improvements and refinements should also be considered as the protection scope of the present application.

Claims

1. A method of remote processing of an accelerator card, the method comprising: The accelerator card includes a main logic processing chip and a control management chip, and the method includes: The operating system PS of the control management chip obtains the target data packet transmitted by the debugging device; The PS of the control management chip processes the target data packet to implement a first operation, wherein the first operation includes at least one of the following: Remote upgrade of the main logic processing chip; Remote online debugging of the main logic processing chip; Remote upgrade of the programmable logic unit PL of the control management chip; Remote online debugging of the PL of the control management chip; The target data packet includes at least one of the following: The bit package file of the main logic processing chip that needs to be remotely upgraded; The debugging data packet of the main logic processing chip; The PL bit package file of the control management chip that needs to be remotely upgraded; The debug data packet of the PL of the control management chip; The PS of the control management chip includes: a data protocol analysis module, an encryption and decryption module, a remote upgrade and debugging module, and a data bridge conversion module; The PS of the control management chip processes the target data packet to implement a first operation, including: The data protocol parsing module parses the target data packet and transmits the parsed target data packet to the encryption and decryption module; The encryption and decryption module decrypts the data packets transmitted by the data protocol analysis module; The remote upgrade debugging module and the data bridging conversion module process the decrypted data packet to implement the first operation; The remote upgrade debugging module and the data bridging conversion module process the decrypted data packets to implement the remote upgrade of the main logic processing chip, including: The remote upgrade debugging module stores the decrypted data in a cache, and converts the data in the cache into a serial peripheral interface SPI signal through the data bridge conversion module; Transmitting the SPI signal to the main logic processing chip through the configuration interface of the main logic processing chip to upgrade the configuration of the main logic processing chip; Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet to implement remote online debugging of the main logic processing chip, including: The remote upgrade debugging module connects the decrypted data to the Joint Test Working Group JTAG interface of the main logic processing chip through the data bridge conversion module, and the debugging device performs remote online debugging on the main logic processing chip through the JTAG interface in the software interface; Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet to implement the remote upgrade of the PL, including: The remote upgrade and debugging module stores the decrypted data in the flash memory and upgrades the PL configuration according to the data in the flash memory; Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet to implement remote online debugging of the PL, including: The remote upgrade debugging module connects the decrypted data to the monitoring interface of the PL through the data bridge conversion module, and the debugging device remotely and online debugs the PL through the monitoring interface in a software interface.

2. The method of claim 1, wherein, The operating system PS of the control management chip acquires the target data packet transmitted by the debugging device, including: The PS of the control management chip acquires the target data packet transmitted by the debugging device through the public Internet; wherein the debugging device and the public Internet are connected through an Ethernet, and the public Internet is connected with the PS of the control management chip.

3. The method of claim 1, wherein, The method further comprises: In the case of problems or errors in upgrading, the remote upgrade debugging module acquires error information and transmits the error information to the encryption and decryption module; The encryption and decryption module encrypts the error information and transmits the encrypted information to the data protocol analysis module; The data protocol analysis module transmits the encrypted information to the debugging device through the public Internet.

4. The method of claim 3, wherein, The method further comprises: In the case of problems or errors in upgrading, the remote upgrade debugging module restores the main logic processing chip and / or the PL to the version before upgrading.

5. The method of claim 1, wherein, The data bridge conversion module further comprises a PL local online debugging data bridge module, which is used to realize local online debugging of the PL.

6. A remote processing system characterized by, The remote processing system comprises a debugging device and a baseband processing unit (BBU); the BBU comprises an acceleration card and a central processing unit (CPU) connected with the acceleration card through a PCIe interface; The debugging device is connected with the acceleration card through the public Internet; the acceleration card comprises a main logic processing chip and a control management chip; The operating system PS of the control management chip can acquire the target data packet transmitted by the debugging device to realize a first operation; the first operation comprises at least one of the following: Remote upgrading of the main logic processing chip; Remote online debugging of the main logic processing chip; Remote upgrading of the programmable logic unit (PL) of the control management chip; Remote online debugging of the PL of the control management chip; The target data packet comprises at least one of the following: A bit package file of the main logic processing chip that needs to be remotely upgraded; A debugging data packet of the main logic processing chip; A bit package file of the PL of the control management chip that needs to be remotely upgraded; A debugging data packet of the PL of the control management chip; The PS of the control management chip comprises a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module and a data bridge conversion module; The data protocol analysis module is used to analyze the data packet transmitted by the public Internet, transmit the analyzed data to the encryption and decryption module, and / or receive the data processed by the encryption and decryption module and transmit the packaged data to the public Internet; The encryption and decryption module is used to encrypt and decrypt the received data packet; The remote upgrade debugging module and the data bridge conversion module are used to process the data transmitted by the encryption and decryption module to realize the first operation; The remote upgrade debugging module and the data bridging conversion module process the decrypted data packet, and remote upgrade of the main logic processing chip is realized. The remote upgrade debugging module stores the decrypted data in a cache, and converts the data in the cache into a serial peripheral interface (SPI) signal through the data bridging conversion module. The SPI signal is transmitted to the main logic processing chip through a configuration interface of the main logic processing chip, and the main logic processing chip is upgraded and configured. Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet, and remote online debugging of the main logic processing chip is realized. The remote upgrade debugging module connects the decrypted data to a joint test action group (JTAG) interface of the main logic processing chip through the data bridging conversion module, and the debugging device remotely and online debugs the main logic processing chip through the JTAG interface in a software interface. Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet, and remote upgrade of the PL is realized. The remote upgrade debugging module stores the decrypted data in a flash memory, and upgrades and configures the PL according to the data in the flash memory. Alternatively, the remote upgrade debugging module and the data bridging conversion module process the decrypted data packet, and remote online debugging of the PL is realized. The remote upgrade debugging module connects the decrypted data to a monitoring interface of the PL through the data bridging conversion module, and the debugging device remotely and online debugs the PL through the monitoring interface in a software interface.

7. The system of claim 6, wherein, The debugging device and the public Internet are connected through an Ethernet, and the public Internet is connected with a PS of the control management chip.

8. An acceleration card comprising a main logic processing chip and a control management chip, the operating system PS of the control management chip comprising a processor and a transceiver, the transceiver receiving and transmitting data under the control of the processor, characterized in that, The processor is configured to perform the following operations: Obtain a target data packet transmitted by a debugging device; Process the target data packet to realize a first operation; the first operation includes at least one of the following: Remote upgrade of the main logic processing chip; Remote online debugging of the main logic processing chip; Remote upgrade of a programmable logic unit (PL) of the control management chip; Remote online debugging of the PL of the control management chip; The target data packet includes at least one of the following: A bit package file of the main logic processing chip that needs to be remotely upgraded; A debugging data packet of the main logic processing chip; A bit package file of the PL of the control management chip that needs to be remotely upgraded; A debugging data packet of the PL of the control management chip; The PS of the control management chip includes a data protocol analysis module, an encryption and decryption module, a remote upgrade debugging module, and a data bridging conversion module. The data protocol analysis module is configured to analyze the target data packet and transmit the analyzed target data packet to the encryption and decryption module. The encryption and decryption module is configured to decrypt the data packet transmitted by the data protocol analysis module. The remote upgrade debugging module and the data bridge conversion module are used for processing the decrypted data packet, and realize the first operation. The remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize remote upgrade of the main logic processing chip, including: The remote upgrade debugging module stores the decrypted data in the cache, and converts the data in the cache into a serial peripheral interface (SPI) signal through the data bridge conversion module; The SPI signal is transmitted to the main logic processing chip through the configuration interface of the main logic processing chip, and the main logic processing chip is upgraded and configured; Alternatively, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize remote online debugging of the main logic processing chip, including: The remote upgrade debugging module connects the decrypted data to a joint test action group (JTAG) interface of the main logic processing chip through the data bridge conversion module, and the debugging device remotely and online debugs the main logic processing chip through the JTAG interface in a software interface; Alternatively, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize remote upgrade of the PL, including: The remote upgrade debugging module stores the decrypted data in a flash memory, and upgrades and configures the PL according to the data in the flash memory; Alternatively, the remote upgrade debugging module and the data bridge conversion module process the decrypted data packet, and realize remote online debugging of the PL, including: The remote upgrade debugging module connects the decrypted data to a monitoring interface of the PL through the data bridge conversion module, and the debugging device remotely and online debugs the PL through the monitoring interface in a software interface.

9. The accelerator card of claim 8, wherein, The processor is further configured to perform the following operations: Obtain the target data packet transmitted by the debugging device through the public Internet; wherein the debugging device and the public Internet are connected through an Ethernet, and the public Internet is connected to the PS of the control management chip.

10. The accelerator card of claim 8, wherein, The processor is further configured to perform the following operations: In the case of problems or errors in the upgrade, obtain error information; After encrypting the error information, transmit the encrypted information to the data protocol analysis module; Transmit the encrypted information to the debugging device through the public Internet.

11. The accelerator card of claim 10, wherein, The processor is further configured to perform the following operations: In the case of problems or errors in the upgrade, restore the main logic processing chip and / or the PL to the version before the upgrade.

12. An accelerator card comprising a memory, a processor, and a program stored on the memory and executable on the processor; wherein, The processor executes the program to realize the remote processing method of the acceleration card according to any one of claims 1-5.

13. A computer readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor to realize the steps in the remote processing method of the acceleration card according to any one of claims 1-5.

14. A computer program product, characterised in that, The program includes computer instructions, which are executed by the processor to realize the steps in the remote processing method of the acceleration card according to any one of claims 1-5.

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