Data processing method based on artificial intelligence chip

Abstract

The invention discloses a data processing method based on an artificial intelligence chip. The method comprises the following steps: S1, monitoring complexity parameters of an input data stream in real time; s2, dynamically adjusting the calculation power distribution proportion of each calculation unit in the chip by using a reinforcement learning algorithm; s3, performing space-time alignment on multi-modal data such as vision, voice and text by adopting an attention mechanism; s4, predicting task execution time based on the long and short term memory network; s5, automatically switching a precision calculation mode; and S6, embedding a federal learning framework in a data preprocessing stage. The computing power distribution proportion is dynamically adjusted through the reinforcement learning algorithm, the data flow complexity is adapted in real time, the chip resource utilization rate is improved, the task execution time is predicted in combination with the long and short-term memory network, the average waiting time is optimized through the scheduling strategy, compared with a traditional FCFS algorithm, delay is greatly reduced, and the efficiency is improved. And the environment is effectively filtered, and interference of redundant information is reduced.

Description

Technical Field

[0001] The present invention relates to the field of artificial intelligence technology, and in particular to a data processing method based on an artificial intelligence chip. Background Art

[0002] With the rapid development of artificial intelligence (AI) technology, AI chips are increasingly being used in scenarios such as smart terminals and edge computing. Traditional AI chip designs typically employ a fixed computing power allocation model, relying on manually pre-defined computing resource partitioning strategies.

[0003] However, the actual application of existing artificial intelligence chips faces the following technical bottlenecks: low efficiency in computing power allocation. Existing chips are unable to dynamically adjust computing power allocation according to the complexity of real-time data streams, resulting in high-complexity tasks being delayed due to insufficient resources, and low-complexity tasks wasting computing resources; multimodal data fusion accuracy is insufficient, and the spatiotemporal alignment of multimodal data such as vision, speech, and text relies on manually designed fusion rules and lacks adaptability; the task scheduling strategy is single, and existing task scheduling is based on static priority or first-come-first-served algorithms, which cannot predict task execution time and easily lead to queue congestion or idle resources; it is difficult to balance energy consumption and performance. To reduce energy consumption, existing chips often adopt fixed frequency reduction or precision reduction mode, but lack real-time perception of temperature and task type; data privacy risks are prominent, and traditional centralized training requires uploading raw data to the cloud, which poses a risk of privacy leakage. Summary of the Invention

[0004] The purpose of the present invention is to solve the shortcomings of the existing technology and propose a data processing method based on artificial intelligence chip.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A data processing method based on an artificial intelligence chip comprises the following steps:

[0007] S1, real-time monitoring of the complexity parameters of the input data stream, including data dimension D, feature sparsity S and computational intensity C;

[0008] S2. Use reinforcement learning algorithms to dynamically adjust the computing power distribution ratio of each computing unit in the chip;

[0009] S3. Use an attention mechanism to perform spatiotemporal alignment on multimodal data such as vision, speech, and text. The attention mechanism includes a multi-head self-attention layer and a cross-modal attention layer. The number of heads h in the multi-head self-attention layer can be dynamically adjusted, ranging from 4 to 16 heads.

[0010] S4. Predict task execution time based on LSTM network. The input of LSTM network unit is the historical execution time series T of the task.history =[t1,t2,…,t n ], the output is the predicted task execution time

[0011] S5, when the chip temperature T is detected chip When the temperature exceeds 75°C, the calculation precision mode is automatically switched from FP32 to FP16 to INT8. The on-chip neural network is used to predict the precision loss rate in different modes. The input of the on-chip neural network is the current operating parameters of the chip, and the output is the precision loss rate in different calculation precision modes. The training data of the on-chip neural network comes from the historical operation log of the chip, including 10 6 +Energy consumption-accuracy data pairs under different working conditions;

[0012] S6. In the data preprocessing stage, the federated learning framework is embedded and an asynchronous update strategy is adopted. The local device trains the model on the local dataset to obtain the local model parameters θ. local ,The local model parameter update cycle is 50-200 training batches, and the global server aggregates the local model parameters of multiple local devices.

[0013] Preferably, in step S1, the calculation formula of the feature sparsity S is: Among them, N zeros represents the number of zero elements in the eigenvector, N total Represents the total number of elements in the eigenvector; the calculation formula for the computational intensity C is: Among them, N ops Indicates the number of operations required to complete the calculation, N data Indicates the amount of data involved in the calculation.

[0014] Preferably, in step S2, the reinforcement learning algorithm adopts proximal strategy optimization, and the proximal strategy optimization includes the following steps: defining the state space S state ={D,S,C}, defining the action space A action is a set of computing power allocation ratios for each computing unit, ranging from 1:3 to 3:1. The reward function R is defined as R = α × E - β × T, where E is the computing power allocation efficiency. Calculation, N completed is the number of computing tasks completed within a certain period of time, N total is the total number of computing tasks; T is the task completion time; α and β are weighting coefficients, and α+β=1.

[0015] Preferably, in step S3, the calculation process of the multi-head self-attention layer is as follows:

[0016] a. For the input modal data X, calculate the query matrix Q, key matrix K and value matrix V respectively, which are: Q = XW Q , K=XW K , V=XW V , where W Q 、W K and W V is a learnable weight matrix;

[0017] b. Calculate attention score where d k is the dimension of the query matrix Q;

[0018] C. The output of the multi-head self-attention layer is:

[0019] MultiHead(Q,K,V)=Concat(head1,…,head h )W O ,

[0020] Among them head i =Attention(QW Qi ,KW Ki ,VW Vi ), W Qi 、W Ki 、W Vi and W O is a learnable weight matrix;

[0021] d. The cross-modal attention layer is used to fuse features from different modalities. It uses features from one modality as queries and features from another modality as keys and values to calculate attention scores and update feature representations.

[0022] e. Finally, a fused feature vector with a dimension of 2048 is generated.

[0023] Preferably, in step S4, the calculation formula of the long short-term memory network unit is as follows:

[0024] Input gate i t =σ(W ii x t +W hi h t-1 +b i )

[0025] Forget Gate f t =σ(W if x t +W hf h t-1 +b f )

[0026] Cell status update

[0027] Cell state

[0028] Output gate o t =σ(W io x t +W ho h t-1 +b o )

[0029] Hidden state h t =o t ⊙tanh(C t )

[0030] Predicted task execution time

[0031] Based on the predicted task execution time, the waiting time of the task queue is optimized to ≤15ms, while maintaining the chip utilization ≥85%. The task scheduling strategy adopts a priority scheduling algorithm, and the priority of the task is determined according to the predicted execution time and the urgency of the task.

[0032] Preferably, in step S6, the local model parameter aggregation formula is Where N is the number of local devices participating in federated learning, and local devices update local models based on the global model parameters.

[0033] Preferably, in step S3, the learnable weight matrices of the multi-head self-attention layer and the cross-modal attention layer are trained by a back-propagation algorithm, and the optimization goal is to minimize the loss function of multimodal data fusion, and the loss function adopts a cross-entropy loss function.

[0034] Preferably, in step S4, the training of the long short-term memory network adopts a stochastic gradient descent algorithm, a learning rate of 0.001-0.01, and the number of training rounds is 100-500 rounds.

[0035] Preferably, in step S5, the on-chip neural network adopts a convolutional neural network structure, and performs feature extraction and prediction on the input chip operating parameters through convolution layers, pooling layers and fully connected layers.

[0036] Preferably, in step S6, in the federated learning framework, the local device performs differential privacy protection processing on the parameters and adds Laplace noise before uploading the local model parameters.

[0037] The present invention has the following beneficial effects:

[0038] 1. This invention uses a reinforcement learning algorithm to dynamically adjust the computing power allocation ratio and adapt to the complexity of data flow in real time, thereby improving chip resource utilization. In addition, it combines the long short-term memory network to predict task execution time, and the scheduling strategy optimizes the average waiting time, reducing delays by 40% compared to the traditional FCFS algorithm.

[0039] 2. The multi-head self-attention layer of the present invention can achieve spatiotemporal alignment of multimodal data with the cross-modal attention mechanism, generating a 2048-dimensional fused feature vector, improving the classification accuracy in multimodal sentiment analysis tasks, and the attention mechanism automatically focuses on key features, effectively filtering the environment and reducing the interference of redundant information;

[0040] 3. When the temperature exceeds 75°C, the computing precision mode is automatically switched from FP32 to FP16 to INT8. Combined with the on-chip neural network to predict the accuracy loss rate, in ResNet50 model inference, energy consumption is reduced by 45% while the accuracy loss is controlled within 1.5%. In addition, through dynamic frequency reduction and precision adjustment, the long-term operating temperature of the chip is stabilized within 80°C, reducing the effects of thermal aging.

[0041] 4. The local device only uploads model parameters. Combined with differential privacy protection, the risk of privacy leakage is greatly reduced in MNIST dataset training. The step update strategy also speeds up the global model convergence by 30% compared to synchronous federated learning, making it suitable for edge computing scenarios with high real-time requirements.

[0042] 5. The on-chip neural network and reinforcement learning framework of the present invention realize local data processing and strategy optimization, reduce the need for cloud interaction, and at the same time, through 10 6 + historical working condition data training, the system can quickly adapt to new task types without redeploying the model. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 This is a flow chart of a data processing method based on an artificial intelligence chip proposed by the present invention. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0045] Reference Figure 1 , a data processing method based on an artificial intelligence chip, comprising the following steps:

[0046] S1, real-time monitoring of the complexity parameters of the input data stream, including data dimension D, feature sparsity S and computational density C. The calculation formula of feature sparsity S is Among them, N zerosIndicates the number of zero elements in the eigenvector, N total Represents the total number of elements in the eigenvector; the calculation formula for the computational intensity C is: Among them, N ops Indicates the number of operations required to complete the calculation, N data Indicates the amount of data involved in the calculation;

[0047] S2. Use the reinforcement learning algorithm to dynamically adjust the computing power distribution ratio of each computing unit in the chip. The training process of the reinforcement learning algorithm adopts the experience replay mechanism, randomly sampling a batch of data from the experience replay buffer for training. The reinforcement learning algorithm adopts proximal strategy optimization, which includes the following steps: define the state space S state ={D,S,C}, defining the action space A action is a set of computing power allocation ratios for each computing unit, ranging from 1:3 to 3:1. The reward function R is defined as R = α × E - β × T, where E is the computing power allocation efficiency. Calculation, N completed is the number of computing tasks completed within a certain period of time, N total is the total number of computing tasks; T is the task completion time; α and β are weighting coefficients, and α+β=1;

[0048] S3. Use the attention mechanism to perform spatiotemporal alignment on multimodal data such as vision, speech, and text. The attention mechanism includes a multi-head self-attention layer and a cross-modal attention layer. The learnable weight matrices of the multi-head self-attention layer and the cross-modal attention layer are trained by the back-propagation algorithm. The optimization goal is to minimize the loss function of multimodal data fusion. The loss function adopts the cross-entropy loss function. The number of heads h in the multi-head self-attention layer can be dynamically adjusted in the range of 4-16 heads. The calculation process of the multi-head self-attention layer is as follows:

[0049] a. For the input modal data X, calculate the query matrix Q, key matrix K and value matrix V respectively, which are: Q = XW Q , K=XW K , V=XW V , where W Q 、W K and W V is a learnable weight matrix;

[0050] b. Calculate attention score where d k is the dimension of the query matrix Q;

[0051] C. The output of the multi-head self-attention layer is:

[0052] MultiHead(Q,K,V)=Concat(head1,…,head h )W O ,

[0053] Among them head i =Attention(QW Qi ,KW Ki ,VW Vi ), W Qi 、W Ki 、W Vi and W O is a learnable weight matrix;

[0054] d. The cross-modal attention layer is used to fuse features from different modalities. It uses features from one modality as queries and features from another modality as keys and values to calculate attention scores and update feature representations.

[0055] e. Finally, a fused feature vector with a dimension of 2048 is generated;

[0056] S4. Predict task execution time based on LSTM network. The input of LSTM network unit is the historical execution time series T of the task. history =[t1,t2,…,t n ], the output is the predicted task execution time The calculation formula of the long short-term memory network unit is as follows:

[0057] Input gate i t =σ(W ii x t +W hi h t-1 +b i )

[0058] Forget Gate f t =σ(W if x t +W hf h t-1 +b f )

[0059] Cell status update

[0060] Cell state

[0061] Output gate o t =σ(W io x t +W ho h t-1 +b o )

[0062] Hidden state h t =o t ⊙tanh(C t )

[0063] Predicted task execution time

[0064] Based on the predicted task execution time, the waiting time of the task queue is optimized to ≤15ms, while maintaining chip utilization ≥85%. The task scheduling strategy uses a priority scheduling algorithm, with the task priority determined based on the predicted execution time and the urgency of the task. The long short-term memory network is trained using the stochastic gradient descent algorithm with a learning rate of 0.001-0.01 and 100-500 training rounds.

[0065] S5, when the chip temperature T is detected chip When the temperature exceeds 75°C, the calculation precision mode is automatically switched from FP32 to FP16 to INT8. The on-chip neural network is used to predict the precision loss rate in different modes. The input of the on-chip neural network is the current operating parameters of the chip, and the output is the precision loss rate in different calculation precision modes. The training data of the on-chip neural network comes from the historical operation log of the chip, including 10 6 + energy consumption-accuracy data pairs under different working conditions. The on-chip neural network adopts a convolutional neural network structure, which extracts and predicts the input chip operating parameters through convolutional layers, pooling layers, and fully connected layers;

[0066] S6. In the data preprocessing stage, the federated learning framework is embedded and an asynchronous update strategy is adopted. The local device trains the model on the local dataset to obtain the local model parameters θ. local Before uploading the local model parameters, the local device performs differential privacy protection on the parameters and adds Laplace noise. The local model parameter update cycle is 50-200 training batches. The global server aggregates the local model parameters of multiple local devices. The local model parameter aggregation formula is Where N is the number of local devices participating in federated learning, and local devices update local models based on the global model parameters.

[0067] Example 1

[0068] Image classification optimization based on minicomputer

[0069] Scenario description: Deploy an image classification task on an edge computing platform and compare the performance of the method of the present invention with that of a fixed computing power allocation method.

[0070] Implementation steps:

[0071] 1. Hardware configuration: The processor, GPU, memory, dataset, and framework are all commonly available in the market.

[0072] 2. Inventive method (experimental group): Dynamic resource allocation. The reinforcement learning algorithm dynamically adjusts the GPU and CPU computing power distribution (default 3:1) according to the image data dimension (32×32→224×224). When the precision switching temperature is ≥75°C, it automatically switches from FP32→FP16→INT8. The on-chip neural network predicts the accuracy loss (based on 100,000 historical data training).

[0073] 3. Comparison method: fixed allocation (control group 1), GPU accounted for 70%, CPU accounted for 30%; TensorRT optimization (control group 2), using only FP16 inference (existing technology).

[0074] 4. During the image classification task, the computing power utilization, single-image inference time, energy consumption, classification accuracy, and peak temperature data of the experimental group, control group 1, and control group 2 were recorded and organized into a table. The specific results are shown in the following table.

[0075] Table 1: Image classification optimization task data comparison record table

[0076] Indicators / Projects Experimental group Control group 1 Control group 2 Computing power utilization 86.2％ 62.5％ 78.3％ Single image inference time 12.3ms 18.7ms 15.1ms Energy consumption (average power) 4.2W 5.8W 5.1W Classification accuracy (INT8 mode) 92.1％ 91.5％ 91.8％ Temperature peak 79℃ 88℃ 85℃

[0077] As can be seen from the above table, when using the data processing method proposed in this invention to optimize image classification, the computing power utilization rate is increased by 38%, the inference time is shortened by 34%, the energy consumption is reduced by 27%, and the accuracy loss in INT8 mode is only 0.6%, which is better than TensorRT optimization.

[0078] Example 2

[0079] Real-time target detection for USB acceleration devices

[0080] Scenario Description

[0081] An external USB acceleration device (2TOPS computing power) is connected to an x86 architecture host to deploy the YOLOv5 target detection task, and the proposed method is compared with the traditional task scheduling algorithm.

[0082] Implementation steps:

[0083] 1. Hardware configuration: The host, USB accelerator, dataset, and framework are all commonly available on the market.

[0084] 2. The method of the present invention (experimental group): adaptive task scheduling, LSTM prediction of task execution time (based on 1000 training sessions of historical inference data), priority scheduling strategy optimization queue, multimodal fusion, fusion of camera RGB images and IMU sensor data (external IMU module required).

[0085] 3. Comparison methods: FCFS scheduling (control group 1), first come first served; static priority (control group 2), manually setting the target detection task with the highest priority.

[0086] 4. During the execution of the YOLOv5 target detection task, the average queue waiting time, number of detection frames per second, missed detection rate, and equipment utilization data of the experimental group, control group 1, and control group 2 were recorded and organized into a table. The specific results are shown in the following table.

[0087] Table 2: YOLOv5 target detection task data comparison record table

[0088] Indicators / Projects Experimental group Control group 1 Control group 2 Average queue waiting time 11.8ms 24.1ms 18.5ms Detection frames per second (FPS) 31.5 25.1 28.3 Missed detection rate (small target) 4.5％ 7.3％ 5.9％ Equipment utilization 88.9％ 70.8％ 78.1％

[0089] As can be seen from the above table, when the data processing method proposed in this invention is used to perform the OLOv5 target detection task, the queue waiting time is reduced by 51%, the detection frame rate is increased by 25%, the small target missed detection rate is reduced by 38%, and the equipment utilization rate is close to the theoretical upper limit.

[0090] Example 3

[0091] Low-power microcontroller speech recognition

[0092] Scenario Description

[0093] A lightweight speech recognition model was deployed on a dual-core microcontroller (168MHz), and the proposed method was compared with traditional energy consumption optimization strategies.

[0094] Implementation steps

[0095] 1. Hardware configuration: The microcontroller, memory, dataset, and framework are all commonly available in the market.

[0096] 2. Inventive method (experimental group): dynamic precision switching, automatic switching from FP32 to INT8 when temperature ≥ 65°C, on-chip neural network prediction accuracy loss (based on 5000 voice data training), federated learning, local device training model (50 batch update cycle), global server aggregation parameters.

[0097] 3. Comparison method: Fixed INT8 (control group 1), mandatory use of INT8 inference; no federated learning (control group 2), centralized training (requires uploading of original voice data).

[0098] 4. During the execution of the lightweight speech recognition model task, the recognition accuracy, single-instruction inference energy consumption, privacy leakage risk, and model convergence time data of the experimental group, control group 1, and control group 2 were recorded and organized into a table. The specific results are shown in the following table.

[0099] Table 3: Comparison record of lightweight speech recognition model task data

[0100] Indicators / Projects Experimental group Control group 1 Control group 2 Recognition accuracy 90.1％ 85.5％ 91.2％ Single instruction inference energy consumption 12.5μJ 10.3μJ 15.6μJ Privacy leakage risk (differential privacy) ≤0.1％ - 100％ Model convergence time 15 minutes - 25 minutes

[0101] As can be seen from the above table, when using the data processing method proposed in this invention to perform lightweight speech recognition model tasks, the energy consumption is only 21% higher than that of the fixed INT8 mode, but the accuracy is improved by 5.4%. Federated learning makes the risk of privacy leakage close to zero and reduces training time by 40%.

[0102] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. A data processing method based on an artificial intelligence chip, characterized in that: The following steps are involved: S1, real-time monitoring of the complexity parameters of the input data stream, including data dimension D, feature sparsity S and computational intensity C; S2. Use reinforcement learning algorithms to dynamically adjust the computing power distribution ratio of each computing unit in the chip; S3. Use an attention mechanism to perform spatiotemporal alignment on multimodal data such as vision, speech, and text. The attention mechanism includes a multi-head self-attention layer and a cross-modal attention layer. The number of heads h in the multi-head self-attention layer can be dynamically adjusted, ranging from 4 to 16 heads. S4. Predict task execution time based on LSTM network. The input of LSTM network unit is the historical execution time series T of the task. history =[t1,t2,…,t n ], the output is the predicted task execution time S5, when the chip temperature T is detected chip When the temperature exceeds 75°C, the calculation precision mode is automatically switched from FP32 to FP16 to INT8. The on-chip neural network is used to predict the precision loss rate in different modes. The input of the on-chip neural network is the current operating parameters of the chip, and the output is the precision loss rate in different calculation precision modes. The training data of the on-chip neural network comes from the historical operation log of the chip, including 10 6 +Energy consumption-accuracy data pairs under different working conditions; S6. In the data preprocessing stage, the federated learning framework is embedded and an asynchronous update strategy is adopted. The local device trains the model on the local dataset to obtain the local model parameters θ. local ,The local model parameter update cycle is 50-200 training batches, and the global server aggregates the local model parameters of multiple local devices.

2. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S1, the calculation formula of the feature sparsity S is: Among them, N zeros represents the number of zero elements in the eigenvector, N total Represents the total number of elements in the eigenvector; the calculation formula for the computational intensity C is: Among them, N ops Indicates the number of operations required to complete the calculation, N data Indicates the amount of data involved in the calculation.

3. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S2, the reinforcement learning algorithm adopts proximal strategy optimization, which includes the following steps: defining the state space S state ={D,S,C}, defining the action space A action is a set of computing power allocation ratios for each computing unit, ranging from 1:3 to 3:

1. The reward function R is defined as R = α × E - β × T, where E is the computing power allocation efficiency. Calculation, N completed is the number of computing tasks completed within a certain period of time, N total is the total number of computing tasks; T is the task completion time; α and β are weighting coefficients, and α+β=1.

4. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S3, the calculation process of the multi-head self-attention layer is as follows: a. For the input modal data X, calculate the query matrix Q, key matrix K and value matrix V respectively, which are: Q = XW Q , K=XW K , V=XW V , where W Q 、W K and W V is a learnable weight matrix; b. Calculate attention score where d k is the dimension of the query matrix Q; C. The output of the multi-head self-attention layer is: MultiHead(Q,K,V)=Concat(head1,…,head h )W O , Among them head i =Attention(QW Qi ,KW Ki ,VW Vi ), W Qi 、W Ki 、W Vi and W O is a learnable weight matrix; d. The cross-modal attention layer is used to fuse features from different modalities. It uses features from one modality as queries and features from another modality as keys and values to calculate attention scores and update feature representations. e. Finally, a fused feature vector with a dimension of 2048 is generated.

5. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S4, the calculation formula of the long short-term memory network unit is as follows: Input gate i t =σ(W ii x t +W hi h t-1 +b i ) Forget Gate f t =σ(W if x t +W hf h t-1 +b f ) Cell status update Cell state Output gate o t =σ(W io x t +W ho h t-1 +b o ) Hidden state h t =o t ⊙tanh(C t ) Predicted task execution time Based on the predicted task execution time, the waiting time of the task queue is optimized to ≤15ms, while maintaining the chip utilization ≥85%. The task scheduling strategy adopts a priority scheduling algorithm, and the priority of the task is determined according to the predicted execution time and the urgency of the task.

6. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S6, the local model parameter aggregation formula is: Where N is the number of local devices participating in federated learning, and local devices update local models based on the global model parameters.

7. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S3, the learnable weight matrices of the multi-head self-attention layer and the cross-modal attention layer are trained by a back-propagation algorithm, and the optimization goal is to minimize the loss function of multimodal data fusion, and the loss function adopts a cross-entropy loss function.

8. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S4, the long short-term memory network is trained using a stochastic gradient descent algorithm with a learning rate of 0.001-0.01 and a number of training rounds of 100-500 rounds.

9. The data processing method based on an artificial intelligence chip according to claim 1, characterized in that: In step S5, the on-chip neural network adopts a convolutional neural network structure, and performs feature extraction and prediction on the input chip operating parameters through convolution layers, pooling layers and fully connected layers.

10. The data processing method based on artificial intelligence chip according to claim 1, characterized in that: In step S6, in the federated learning framework, the local device performs differential privacy protection on the parameters and adds Laplace noise before uploading the local model parameters.

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