Circuit and method for preventing misconduction of thyristor in inverter

Abstract

The present invention relates to the field of power electronics technology and discloses a circuit and method for preventing thyristors in an inverter from being mis-turned on. The circuit includes: a voltage stabilizing circuit and a bleeder circuit, wherein the voltage stabilizing circuit has a first end connected to the gate of the thyristor and a second end connected to the first end of the bleeder circuit, and is used to raise the turn-on voltage of the thyristor; the bleeder circuit has a second end connected to the cathode of the thyristor, and is used to provide a low-impedance bypass to bleed high-frequency noise after the thyristor is turned off. Based on the original topology of the inverter, the present invention adds a voltage stabilizing circuit to increase the turn-on voltage threshold of the thyristor; and adds a bleeder circuit to provide a low-impedance high-frequency bypass circuit to attenuate high-frequency noise and prevent the thyristor from being mis-turned on due to a large voltage induced between the gate and cathode of the thyristor.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a circuit and a method for preventing mis-conduction of a thyristor in an inverter. Background Art

[0002] In traditional H-bridge topology, unidirectional thyristors (SCRs) are prone to mis-conduction due to high dv / dt stress, electromagnetic interference (EMI), thermal offset, and reverse recovery spikes in high-frequency operating environments. This can cause a short circuit between the upper and lower bridge arms and lead to overcurrent damage.

[0003] In related technologies, the main methods for suppressing misconduction of thyristors include: 1. RC snubber circuit: absorbing transient energy by connecting an RC network in parallel between the cathode and anode of the thyristor, but traditional designs rely on empirical parameters and it is difficult to balance high-frequency suppression and loss balance; 2. Gate filter circuit: using a π-type filter to suppress noise, but lacking a dynamic negative voltage shutdown mechanism and having limited anti-interference capabilities; 3. Topology improvement: For example, the three-phase half-controlled rectifier circuit requires an additional isolated power supply, which increases the complexity of the system.

[0004] The above solutions to the SCR misfiring are all relatively complicated. Therefore, a simple solution is urgently needed to solve the misfiring problem of SCR. Summary of the Invention

[0005] In view of this, the present invention provides a circuit and method for preventing mis-turning of thyristors in an inverter, so as to solve the problem of mis-turning of thyristors in the inverter.

[0006] In a first aspect, the present invention provides a circuit for preventing mis-conduction of thyristors in an inverter. The front stage of the inverter is connected to a flyback converter, and the back stage of the inverter is connected to the grid. The circuit further includes: a resonant capacitor, a control circuit, and a drive circuit, wherein the resonant capacitor is connected in parallel between the drain and source of the power switching device in the flyback converter; the control circuit is used to change the resonant time according to the real-time power to obtain a switch control signal, and the switch control signal is used to make the power switching device in the flyback converter turn on when its drain and source are at the bottom of the valley; the drive circuit has a first end connected to the output end of the control circuit and a second end connected to the control end of the power switching device, and is used to drive the power switching device to turn on or off based on the switch control signal.

[0007] In the present invention, a parallel resonant capacitor is connected between the drain and source of the power switching device in a flyback converter. Simultaneously, a control circuit changes the resonant time based on real-time power to generate a switching control signal. Specifically, the control circuit sets a resonant period based on a software algorithm that is equal to the resonant period of the resonant circuit formed by the resonant capacitor and the flyback converter. Consequently, the power switching device is turned on when the previous switching cycle is about to end and the drain voltage of the power switching device resonates to its valley. This turns on at the same moment that the software algorithm and hardware energy release are complete, significantly reducing the slope of the drain voltage change. This effectively reduces the content of higher-order series in the Fourier series of the drain voltage signal, thereby reducing the content of higher-order harmonics in the circuit. This contributes to improved system stability.

[0008] In an optional embodiment, the circuit includes: a voltage stabilizing circuit and a discharge circuit, wherein the voltage stabilizing circuit has a first end connected to the gate of the thyristor and a second end connected to the first end of the discharge circuit, and is used to raise the turn-on voltage of the thyristor; the discharge circuit has a second end connected to the cathode of the thyristor, and is used to provide a low-impedance bypass after the thyristor is turned off to discharge high-frequency noise.

[0009] The present invention adds a voltage stabilizing circuit to the original inverter topology to increase the turn-on voltage threshold of the thyristor; and adds a bleeder circuit to provide a low-impedance high-frequency bypass circuit to attenuate high-frequency noise and prevent the thyristor from being mistakenly turned on due to a large voltage induced between the gate and cathode of the thyristor.

[0010] In an optional embodiment, the voltage stabilizing circuit includes: a voltage stabilizing diode, wherein the anode of the voltage stabilizing diode is connected to the gate of the thyristor, and the cathode of the voltage stabilizing diode is connected to the first end of the discharge circuit.

[0011] In an optional implementation, the discharge circuit includes: a first capacitor, wherein a first end of the first capacitor is connected to the second end of the voltage stabilizing circuit, and a second end of the first capacitor is connected to the cathode of the thyristor.

[0012] In a second aspect, the present invention provides an inverter, comprising: a circuit for preventing mis-conduction of thyristors in the inverter according to the first aspect and any optional embodiment thereof, and an H-bridge inverter topology, wherein each bridge arm of the H-bridge inverter topology is composed of an upper and a lower bridge arm connected in series, and at least one thyristor is provided on each upper bridge arm; a circuit for preventing mis-conduction of thyristors in the inverter is provided between the gate and cathode of each thyristor.

[0013] In a third aspect, the present invention provides a power supply comprising: a flyback converter, a circuit for preventing mis-conduction of thyristors in an inverter according to the first aspect and any optional embodiment thereof, and an H-bridge inverter topology, wherein the flyback converter has a supply voltage inputted into its input end, an output end connected to the input end of the H-bridge inverter topology, and a control end of an internal power switching device connected to a second end of a drive circuit; the H-bridge inverter topology has an output end connected to the grid, and a circuit for preventing mis-conduction of thyristors in the inverter is arranged between the gate and cathode of the internal thyristor.

[0014] In a fourth aspect, the present invention provides a method for preventing mis-conduction of thyristors in an inverter, which is applied to the control circuit of the power supply of the first aspect and the third aspect, and comprises: constructing a flyback converter input and output power conservation formula based on the flyback converter input voltage, input current reference value, system efficiency, grid voltage peak value, and grid current peak value; constructing a volt-second balance formula based on the flyback converter input voltage, grid voltage peak value, on-time and off-time of the power switching device, grid phase-locked information, and flyback converter turns ratio; constructing a volt-second balance formula based on the switching period, on-time, and off-time of the power switching device , grid current peak, flyback converter input voltage, grid phase-locked information, flyback converter turns ratio, flyback primary peak current, and excitation inductance, to construct the relationship between the flyback secondary average current and the primary peak current; construct the time relationship between the on-time, off-time, resonant time, and switching period of the power switching device; based on the flyback converter input and output power conservation formula, volt-second balance formula, and time relationship, solve the on-time; based on the on-time, volt-second balance formula, and time relationship, solve the switching period; according to the on-time and switching period, obtain the duty cycle and period value of the switch control signal.

[0015] In a fifth aspect, the present invention provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to thereby execute the method of preventing mis-conduction of thyristors in an inverter according to the fourth aspect.

[0016] In a sixth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the method for preventing mis-conduction of thyristors in an inverter according to the fourth aspect.

[0017] In a seventh aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the method for preventing mis-conduction of thyristors in an inverter according to the fourth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 This is the H-bridge inverter topology diagram of the related art;

[0020] Figure 2 is a topology diagram of an H-bridge inverter according to an embodiment of the present invention;

[0021] Figure 3 1 is a circuit for preventing mis-conduction of thyristors in an inverter and a specific circuit structure diagram of an H-bridge inverter according to an embodiment of the present invention;

[0022] Figure 4 is a diagram showing the composition of another circuit for preventing mis-conduction of thyristors in an inverter according to an embodiment of the present invention;

[0023] Figure 5 is a schematic diagram of a control circuit according to an embodiment of the present invention;

[0024] Figure 6 is a specific circuit structure diagram of a driving circuit according to an embodiment of the present invention;

[0025] Figure 7 is a specific circuit structure diagram of a flyback converter according to an embodiment of the present invention;

[0026] Figure 8 is a flow chart of a method for preventing mis-conduction of thyristors in an inverter according to an embodiment of the present invention;

[0027] Figure 9 Schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0029] Specifically, Figure 1 This is an example diagram of the H-bridge inverter topology. The H-bridge inverter converts Vo+ into an AC signal and uses phase-locked loop technology to integrate it into the grid. Figure 1The H-bridge inverter in FIG is a single-phase inverter having two bridge arms, the first bridge arm being composed of SCR1 and S3, and the second bridge arm being composed of SCR2 and S4.

[0030] Figure 1 To turn on the unidirectional thyristors (SCR1 and SCR2), you only need to apply a voltage trigger signal V between their gate and cathode, and make V greater than the thyristor's turn-on voltage VGK_TH to turn the thyristor on. After that, even if the gate drive signal is removed, the thyristor will remain on. To turn off the thyristor, you can only make its anode voltage lower than the cathode voltage and maintain it for a period of time or directly cut off its current flow path to turn it off. This means that once the thyristor is triggered to turn on, it is difficult to turn it off.

[0031] Based on the above problems, a circuit is provided in this embodiment to prevent the thyristor in the inverter from mis-conducting. Figure 2 As shown, the circuit includes: a voltage stabilizing circuit 1 and a discharge circuit 2.

[0032] like Figure 2 As shown, the voltage stabilizing circuit 1 has a first end connected to the gate of the thyristor and a second end connected to the first end of the discharge circuit 2, which is used to raise the turn-on voltage of the thyristor; the discharge circuit 2 has a second end connected to the cathode of the thyristor, which is used to provide a low-impedance bypass after the thyristor is turned off to discharge high-frequency noise.

[0033] In the H-bridge inverter circuit, it is normal that the diagonal switches of the two bridge arms will be turned on at the same time. Figure 1 In this case, SCR1 and S3 are turned on simultaneously. This causes S3 to be turned on, pulling the cathode of SCR2 to GND. Since SCR2's anode is connected to the positive side of the bus X-line, Vo+, any high-frequency interference in the circuit, superimposed on SCR2's gate drive circuit, can easily cause SCR2 to turn on. Since S3 is also turned on at this point, the left arm of the H-bridge, SCR2 and S3, will conduct simultaneously, causing a short circuit. Vo+ will be shorted directly to HGND through SCR2 and S3. This will cause the current flowing through S3 to increase instantaneously, potentially triggering system overcurrent protection or, in severe cases, burning out SCR2 or S3.

[0034] Conventional high-voltage thyristors (SCRs) typically have a turn-on voltage (VGK) of 0.8V to 1.2V. This relatively low voltage makes it very easy for noise voltage in the circuit to couple to the SCR's gate drive circuit and cause the SCR to be mistakenly turned on. To ensure stable and reliable operation of SCRs and improve their anti-interference capabilities, it is necessary to address both the interference source and the interference path.

[0035] Based on this, in the interference path, high-frequency noise will be Figure 1 The gate drive circuit nodes DR1 and DR2 of the thyristor generate an induced electromotive force. As long as the induced electromotive force reaches 0.8~1.2V, the thyristor SCR1 or SCR2 can be turned on, causing mis-conduction. In order to avoid mis-conduction of the thyristor, Figure 2 A voltage stabilizing circuit 1 and a discharge circuit 2 are provided in the circuit to avoid mis-conduction of the thyristor.

[0036] In some optional embodiments, the voltage stabilizing circuit 1 includes: a voltage stabilizing diode, wherein the anode of the voltage stabilizing diode is connected to the gate of the thyristor, and the cathode of the voltage stabilizing diode is connected to the first end of the discharge circuit 2.

[0037] In some optional embodiments, the discharge circuit 2 includes: a first capacitor, wherein a first end of the first capacitor is connected to the second end of the voltage stabilizing circuit 1, and a second end of the first capacitor is connected to the cathode of the thyristor.

[0038] Specifically, in order to avoid the thyristor from being turned on by mistake, Figure 3 In this circuit, capacitors C14 and C15 are connected in parallel between the gate and cathode of SCR1 and SCR2 to provide a low-impedance bypass path to dissipate high-frequency noise. Simultaneously, 3.3V voltage regulators TVS1 and TVS2 are connected in series on the gate to increase the SCR's turn-on voltage from 1.2V to 4.5V, preventing the SCR from being accidentally turned on due to noise voltage.

[0039] In some optional implementations, the front stage of the inverter is connected to a flyback converter, and the back stage of the inverter is connected to the grid, such as Figure 3 、 4 As shown, the circuit for preventing the thyristor in the inverter from mis-conducting further includes: a resonant capacitor (ie, C12 and C13), a control circuit 3 and a drive circuit 4.

[0040] The resonant capacitor is connected in parallel between the drain and source of the power switching device in the flyback converter.

[0041] A control circuit 3, which is used to change the resonance time according to the real-time power to obtain a switch control signal, and the switch control signal is used to turn on the power switch device in the flyback converter when its drain-source terminal is at the valley bottom;

[0042] The driving circuit 4 has a first end connected to the output end of the control circuit 3 and a second end connected to the control end of the power switch device, and is used to drive the power switch device to turn on or off based on the switch control signal.

[0043] According to the Fourier transform principle, any periodic signal can be decomposed into a fundamental signal and countless higher-order harmonic sine waves superimposed on each other. The steeper the slope of the periodic signal's transformation, the richer the higher-order harmonic content in its Fourier transform series. Higher-order harmonics are high-frequency noise in circuits. At the very least, this noise can reduce circuit efficiency and degrade EMC performance. In severe cases, rapidly changing di / dt and dV / dt can induce electromotive force (EMF) in the PCB copper traces, causing excessive voltage stress on switching transistors, leading to overvoltage and breakdown. Alternatively, high-frequency harmonic noise can induce electromotive force (EMF) in the gate drive circuit of power switching devices, generating a relatively large induced voltage that can cause the switches to malfunction.

[0044] Therefore, regarding interference sources, since switching power supplies transmit energy through switching, reducing high-frequency noise sources requires optimizing the high-order harmonic content of the high-frequency switching frequency. In grid-connected inverter circuit architectures, high-frequency switching signals primarily originate from the flyback converter's power switching devices. Therefore, it's necessary to reduce the switching speed of these power switching devices, specifically the di / dt and dV / dt between their drain and source.

[0045] To reduce the dV / dt between the drain and source of the flyback converter's power switch, it's necessary to either reduce dV or increase dt. To increase the ΔV value at the moment the switch turns on, the flyback converter can be operated in quasi-resonant mode. This means that after each switch is turned off, the switch is turned on only when the voltage between the drain and source of the power switch resonates to the bottom of the voltage valley. At this point, dV is at its minimum, reducing dV / dt and, consequently, lowering the content of higher-order harmonics.

[0046] Optionally, the specific circuit structures of the control circuit 3 and the drive circuit 4 are as follows: Figure 5 、 Figure 6 shown. Figure 5 In the circuit, the 64th pin of U4 outputs a PWM signal to drive the power switch device of the flyback converter. By controlling the conduction or shutdown of the power switch device, the DC voltage Vin+ of the solar panel at the DC input end is boosted through a high-frequency transformer and output to the secondary side of the flyback transformer in the form of high-frequency chopping, that is, the voltage Vo+.

[0047] In this embodiment, an inverter is provided, such as Figure 2 As shown, it includes: the circuit for preventing the thyristor in the inverter from mis-turning on in the above embodiment, and the H-bridge inverter topology, wherein each bridge arm of the H-bridge inverter topology is composed of an upper bridge arm and a lower bridge arm connected in series, and at least one thyristor is provided on each upper bridge arm; a circuit for preventing the thyristor in the inverter from mis-turning on is provided between the gate and cathode of each thyristor. Optionally, the specific circuit structure of the flyback converter is as follows Figure 7 shown.

[0048] In this embodiment, a power supply includes: a flyback converter, a circuit for preventing misconduction of thyristors in the inverter according to the above embodiment, and an H-bridge inverter topology. The flyback converter has a supply voltage inputted into its input terminal, an output connected to the input terminal of the H-bridge inverter topology, and a control terminal of an internal power switch connected to the second terminal of the drive circuit 4. The H-bridge inverter topology has a grid-connected output terminal, and a circuit for preventing misconduction of thyristors in the inverter is provided between the gate and cathode of the internal thyristors.

[0049] In this embodiment, a method for preventing mis-conduction of thyristors in an inverter is provided. The method is applied to the control circuit 3 in the above embodiment. Figure 1 The frequency period of PWM0 output by U4 is Tsw = Ton + Toff + K * Tres, where K = 1, 3, 5, or 7. The value of K is determined by the load size. The greater the output power of the inverter, the smaller K, and the smaller the output power of the inverter, the larger K.

[0050] According to the LC resonance principle, after the energy in the flyback transformer's primary winding is demagnetized within the Toff time, the magnetizing inductance of the flyback transformer's primary winding and the parasitic capacitance between the drain and source of power switch S1 will generate an LC series resonance. The duration of the resonance period is inversely proportional to the product of the magnetizing inductance and the parasitic capacitance of the MOSFET. The longer the LC resonance period, Tres, the smaller the slope of the voltage oscillation between the drain and source of power switch S1 in the LC resonant device. A smaller slope of the VDS voltage waveform reduces the high-order harmonic content in its Fourier transform, which means less high-frequency noise in the circuit. This reduces the interference noise coupled into the thyristor drive circuit in the subsequent H-bridge inverter, making it less likely that the thyristor will be accidentally activated.

[0051] When the operating frequency of the power switch device S1 is high, it is necessary to reduce the switching frequency by increasing the resonance time to reduce switching losses. In order to avoid output waveform quality problems caused by operating mode switching, it is necessary to consider the impact of the resonance time on the gain of the flyback converter. Therefore, the flyback converter must change the resonance time according to the real-time power and meet the requirement of turning on when the drain-source voltage Vds of the power switch device S1 reaches the bottom.

[0052] Based on the above analysis, if Figure 8 As shown in the figure, the methods to prevent the thyristor in the inverter from mis-conducting include:

[0053] Step S1: constructing a flyback converter input and output power conservation formula based on the flyback converter's input voltage, input current reference value, system efficiency, grid voltage peak value, and grid current peak value.

[0054] The formula for conservation of input and output power is:

[0055] (1)

[0056] Where: Vin is the input voltage; Impptref is the input current reference value; η is the system efficiency; Vg is the peak grid voltage; Ig is the peak grid current.

[0057] Step S2: constructing a volt-second balance formula based on the flyback converter's input voltage, the grid voltage peak, the on-time and off-time of the power switch device, the grid phase-locked information, and the flyback converter's turns ratio.

[0058] The volt-second balance formula for the flyback converter is:

[0059] (2)

[0060] Where: Ton represents the on-time of the flyback MOS tube; N represents the turns ratio of the flyback transformer; Toff represents the off-time of the power switch device.

[0061] Step S3: Based on the switching period, on-time, off-time, grid current peak, input voltage of the flyback converter, grid phase-locked information, turns ratio of the flyback converter, flyback primary peak current, and magnetizing inductance of the power switching device, a relationship between the flyback secondary average current and the primary peak current is constructed.

[0062] The relationship between the average current of the flyback secondary side and the peak current of the primary side is:

[0063] (3)

[0064] Where: Tsw is the switching cycle time; IpPEAK is the flyback primary peak current; and cosθ is the phase information of the phase-locked loop.

[0065] Step S4: constructing a time relationship expression of the on-time, off-time, resonance time, and switching period of the power switch device.

[0066] The time relationship is:

[0067] (4)

[0068] Where: Tres represents the resonance time.

[0069] Step S5: Solve for the on-time based on the flyback converter input and output power conservation formula, volt-second balance formula, and time relationship formula.

[0070] Combining equations (1), (2) and (4), we can obtain:

[0071] (5)

[0072] in:

[0073] Step S6: Solve the switching period based on the on-time, the volt-second balance formula, and the time relationship formula.

[0074] Step S7: Obtaining the duty cycle and period value of the switch control signal according to the on-time and the switch period.

[0075] Ton can be obtained by solving the quadratic equation from equation (5), and Tsw can be obtained by combining equations (2) and (4). Finally, the control circuit 3 updates the duty cycle and period value of the EPWM register based on Ton and Tsw.

[0076] The embodiment of the present invention also provides a computer device having the above Figure 4 The control circuit 3 shown.

[0077] See also Figure 9 , Figure 9 is a structural diagram of a computer device provided by an optional embodiment of the present invention, such as Figure 9 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 9 A processor 10 is taken as an example.

[0078] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0079] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.

[0080] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0081] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0082] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 9 The bus connection is taken as an example.

[0083] The input device 30 can receive input digital or character information and generate key signal input related to user settings and function control of the computer device. Examples include a touch screen, keypad, mouse, trackpad, touchpad, pointing stick, one or more mouse buttons, trackball, joystick, etc. The output device 40 may include a display device, auxiliary lighting devices (e.g., LEDs), and tactile feedback devices (e.g., vibration motors). Such display devices include, but are not limited to, liquid crystal displays, light emitting diodes, monitors, and plasma displays. In some optional embodiments, the display device may be a touch screen.

[0084] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0085] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0086] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A circuit for preventing mis-conduction of thyristors in an inverter, characterized in that: The front stage of the inverter is connected to a flyback converter, and the back stage of the inverter is connected to the grid, and further includes: a resonant capacitor, a control circuit and a drive circuit, wherein: a resonant capacitor connected in parallel between the drain and source of the power switching device in the flyback converter; A control circuit configured to change the resonance time according to the real-time power to obtain a switch control signal, wherein the switch control signal is configured to turn on the power switch device in the flyback converter when the drain-source terminal thereof is at the valley bottom; a driving circuit, a first end of which is connected to the output end of the control circuit, and a second end of which is connected to the control end of the power switching device, and configured to drive the power switching device to be turned on or off based on the switch control signal; The circuit includes: a voltage stabilizing circuit and a discharge circuit, wherein the voltage stabilizing circuit has a first end connected to the gate of the thyristor and a second end connected to the first end of the discharge circuit, and is used to raise the turn-on voltage of the thyristor; the discharge circuit has a second end connected to the cathode of the thyristor, and is used to provide a low-impedance bypass after the thyristor is turned off to discharge high-frequency noise; A control circuit is used to construct a flyback converter input-output power conservation formula based on the flyback converter's input voltage, input current reference value, system efficiency, grid voltage peak, and grid current peak; construct a volt-second balance formula based on the flyback converter's input voltage, grid voltage peak, on-time and off-time of the power switching device, grid phase-locked information, and the flyback converter's turns ratio; construct a relationship between the flyback secondary side average current and the primary side peak current based on the power switching device's switching period, on-time, off-time, grid current peak, the flyback converter's input voltage, grid phase-locked information, the flyback converter's turns ratio, the flyback primary side peak current, and the magnetizing inductance; construct a time relationship between the power switching device's on-time, off-time, resonant time, and switching period; solve for the on-time based on the flyback converter input-output power conservation formula, volt-second balance formula, and time relationship; solve for the switching period based on the on-time, volt-second balance formula, and time relationship; and obtain a duty cycle and period value of a switch control signal based on the on-time and switching period.

2. The circuit for preventing mis-conduction of thyristors in an inverter according to claim 1, characterized in that: The voltage stabilizing circuit includes: a voltage stabilizing tube, wherein: A voltage regulator tube, an anode of which is connected to the gate of the thyristor, and a cathode of which is connected to the first end of the discharge circuit.

3. The circuit for preventing mis-conduction of thyristors in an inverter according to claim 1, characterized in that: The discharge circuit includes: a first capacitor, wherein: A first capacitor has a first end connected to the second end of the voltage stabilizing circuit, and a second end connected to the cathode of the thyristor.

4. An inverter, characterized in that: include: The circuit for preventing mis-conduction of thyristors in an inverter and the H-bridge inverter topology according to any one of claims 1 to 3, wherein: Each bridge arm of the H-bridge inverter topology is composed of an upper bridge arm and a lower bridge arm connected in series, and at least one thyristor is provided on each upper bridge arm; A circuit is provided between the gate and cathode of each thyristor to prevent the thyristor in the inverter from being mis-conducted.

5. A power supply, characterized in that: include: A flyback converter, a circuit for preventing mis-conduction of thyristors in an inverter according to any one of claims 1 to 3, and an H-bridge inverter topology, wherein: A flyback converter, wherein the input terminal thereof is input with a supply voltage, the output terminal thereof is connected to the input terminal of the H-bridge inverter topology, and the control terminal of the internal power switch device thereof is connected to the second terminal of the drive circuit; The H-bridge inverter topology has an output terminal connected to the grid, and a circuit is set between the gate and cathode of the internal thyristor to prevent the thyristor in the inverter from being mis-turned on.

6. A method for preventing mis-conduction of thyristors in an inverter, characterized in that: The method is applied to the control circuit of the circuit for preventing mis-conduction of thyristors in an inverter according to any one of claims 1 to 3 or the control circuit of the power supply according to claim 5, and the method comprises: Based on the input voltage, input current reference value, system efficiency, grid voltage peak value, and grid current peak value of the flyback converter, the input and output power conservation formula of the flyback converter is constructed; A volt-second balance formula is constructed based on the flyback converter's input voltage, grid voltage peak, on-time and off-time of the power switch, grid phase-locked information, and the flyback converter's turns ratio. Based on the switching period, on-time, off-time of the power switching device, grid current peak, flyback converter input voltage, grid phase-locked information, flyback converter turns ratio, flyback primary peak current, and magnetizing inductance, a relationship between the flyback secondary average current and the primary peak current is constructed. Construct the time relationship between the on-time, off-time, resonance time and switching period of the power switching device; Solving the on-time based on the flyback converter input and output power conservation formula, volt-second balance formula, and time relationship formula; Solve the switching period based on the on-time, volt-second balance formula, and time relationship; The duty cycle and period value of the switch control signal are obtained according to the on-time and the switch period.

7. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the method for preventing mis-conduction of thyristors in an inverter as described in claim 6 by executing the computer instructions.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, which are used to enable a computer to execute the method for preventing mis-conduction of thyristors in an inverter as claimed in claim 6.

9. A computer program product, characterized in that The method comprises computer instructions for causing a computer to execute the method for preventing mis-conduction of thyristors in an inverter as claimed in claim 6.

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