High-speed signal detection device

Abstract

The invention discloses a high-speed signal detection device. The detection device comprises a first power detector module, a preset module, a CPU controller module and a second power detector module, when the preset module is triggered, the CPU controller module respectively reads a signal state output by the first power detector module and a signal state output by the second power detector module, and stores the read signal states as a preset state; and when the preset module is disconnected, the CPU controller module reads the signal output by the first power detector module and the signal output by the second power detector module in real time, compares the received signal with the preset signal, and judges whether the input signal exists according to the comparison result. According to the invention, rapid and convenient detection of common high-speed signals is realized with extremely low cost, and whether the signals are detected and the types of the detected signals are displayed in real time.

Description

Technical Field

[0001] The present invention relates to the field of signal communication technology, and in particular to a cross-domain high-speed signal detection device based on power detector application. Background Art

[0002] The high-speed signal detection device is a device that applies detection devices in the field of radio frequency signals to high-speed digital signals. Through the design of signal preset library, it can determine and display the presence and type of detection signals in real time.

[0003] Electronic communication products are now ubiquitous in our lives, enabling the transmission, application, and storage of information through signal communication. During the design, development, and after-sales service of these products, fault detection often requires the use of large-scale testing equipment such as oscilloscopes and signal logic analyzers to determine signal continuity. These devices are not only bulky and difficult to move, but are also typically expensive, especially those used for high-speed signal testing. This creates significant inconvenience for R&D, design, and after-sales maintenance personnel. Summary of the Invention

[0004] The present invention provides a high-speed signal detection device. The present invention realizes rapid and convenient detection of common high-speed signals at extremely low cost, and displays in real time whether a signal is detected and the type of signal detected. See the following description for details:

[0005] A high-speed signal detection device, comprising: a first power detector module, a preset module, a CPU controller module, and a second power detector module;

[0006] When the preset module is triggered, the CPU controller module reads the signal state output by the first power detector module and the signal state output by the second power detector module respectively, and stores the read signal state as the preset state;

[0007] When the preset module is disconnected, the CPU controller module reads the output signal of the first power detector module and the output signal of the second power detector module in real time and compares the received signal with the preset signal, and determines whether there is an input signal according to the comparison result.

[0008] The device further includes: a first signal input module and a second signal input module, which simultaneously detect one high-speed signal, or simultaneously detect two high-speed signals, or meet the requirements of simultaneous detection of a group of differential signals.

[0009] The first signal input module and the second signal input module support input signal bandwidths of 0.001 GHz to 10 GHz.

[0010] The device further comprises: a first signal preset library and a second signal preset library, wherein the first signal preset library records and marks the signal amplitude of a high-speed signal with a fixed amplitude actually collected after passing through a power detector, and stores the collected signal amplitude in a CPU controller module;

[0011] The second signal preset library is a temporary preset library. After each signal detection is completed, the CPU controller module will clear the preset second preset signal library.

[0012] Among them, the CPU controller module compares the received signal amplitude with the second signal preset library to determine whether the signal to be detected exists. If so, the CPU controller module extracts the frequency of the received signal, and compares the signal amplitude and signal frequency with the first signal preset library to determine the type of the signal to be detected, and outputs the detection results to the first detection result indication module, the second detection result indication module and the third detection result indication module for indication.

[0013] Among them, the first detection result indication module, the second detection result indication module, and the third detection result indication module are all directly connected to the CPU controller module, and are used to indicate the presence of the detection signal, the absence of the detection signal, and the type of the detection signal respectively.

[0014] Among them, the first detection result indication module, the second detection result indication module and the third detection result indication module are respectively a green indicator light, a red indicator light and a liquid crystal display screen.

[0015] Wherein, a lithium battery module is integrated inside the device.

[0016] Furthermore, the signal input nodes of the first signal input module and the second signal input module adopt a function multiplexing signal design.

[0017] The CPU controller module adopts STM32F103X series chips with a built-in storage area, and stores the first signal preset library in the internal storage area; the internal signal receiver adopts a radio frequency detector AD8319 chip.

[0018] The beneficial effects of the technical solution provided by the present invention are:

[0019] 1. This device applies the power detector in the radio frequency field to the signal detection field, realizing the rapid detection of high-speed and low-speed signals. In particular, in the detection of high-speed signals and small-amplitude signals, it solves the problems of complex high-speed signal detection and difficult small signal detection, and also makes the detection of low-speed signals convenient and fast.

[0020] 2. The design principle of this device is simple. The device itself is small and simple, easy to carry and move, and the cost is extremely low. While being convenient and practical, it can realize the detection of high-speed signals at a very low cost.

[0021] 3. This device can help quickly determine the presence of the signal to be detected, support the display of the amplitude and signal type of the signal to be detected, and provide users with intuitive detection results;

[0022] 4. The peripheral signal input interface of this device is equipped with SMA connector terminals and pin header access points, which facilitates the rapid access of high-speed and low-speed signals. Users can flexibly select the signal access point method of the device according to the output end of the signal to be detected, thereby improving the practicality of the device.

[0023] 5. This device has a built-in lithium battery, which supports the device to work continuously for 10 hours without an external power supply, improving the convenience of product use. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic diagram of a high-speed signal detection device;

[0025] Figure 2 A flowchart generated for the first signal preset library;

[0026] Figure 3 It is a flow chart for determining the signal to be detected;

[0027] Figure 4 This is the design diagram of the input signal hardware circuit. DETAILED DESCRIPTION

[0028] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention are described in further detail below.

[0029] Example 1

[0030] A high-speed signal detection device, see Figure 1 The detection device includes: a first signal input module A, a first power detector module B, a preset module C, a power conversion module D, a CPU controller module E, a lithium battery module F, a second signal input module G, a second power detector module H, a switch control module I, a first detection result indication module J, a second detection result indication module K, and a third detection result indication module L;

[0031] When there is no signal input, press the button of the preset module C, and the CPU controller module E reads the signal status output by the first power detector module B and the signal status output by the second power detector module H respectively, and stores the read signal status as the preset status. After the button of the preset module C is released, the CPU controller module E reads the signal output by the first power detector module B and the output signal of the second power detector module H in real time and compares the received signal with the preset signal, and determines whether there is an input signal based on the comparison result.

[0032] The first signal input module A and the second signal input module G support input signal bandwidths of 0.001 GHz to 10 GHz.

[0033] Among them, the first power detector module B and the second power detector module H are devices used to detect the transmission power level of radio frequency signals in the radio frequency signal field. After actual hardware circuit design, software design and test verification, they can be used to detect high-speed signals, including single-ended signals and differential signals.

[0034] Among them, the preset module C is used to control the CPU controller module E to collect the signal status output by the first power detector module B and the second power detector module H corresponding to the device when the detected signal is disconnected, and store the collected signals as the second signal preset library as a basis for determining whether the signal to be detected exists.

[0035] Furthermore, for any application environment, the device itself collects and detects the judgment criteria through the preset module C, which not only improves the accuracy of signal detection, but also greatly improves the environmental applicability of the device.

[0036] In specific implementation, according to the actual high-speed signal measurement requirements, the device is configured with two signal input channels (i.e., the first signal input module A and the second signal input module G), which can support simultaneous detection of one high-speed signal or two high-speed signals, and can meet the simultaneous detection of a group of differential signals.

[0037] The device has a built-in first signal preset library. This library is created by actually collecting the signal amplitudes of common high-speed signals with fixed amplitudes after passing through a power detector. The collected signal amplitudes are recorded and marked, and stored in the CPU controller module as the built-in first signal preset library. The fixed amplitude means that the signal has only one voltage amplitude.

[0038] The above-mentioned built-in first signal preset library includes commonly used high-speed signals such as MIPI, DVP, SATA, PCIe, DDR, HDMI, DP, and USB.

[0039] Among them, after entering the normal working state, the CPU controller module E first compares the received signal with the second signal preset library, and determines whether the signal exists through comparison. If the signal exists, it continues to compare the received signal with the first signal preset library to further determine the specific type of the signal.

[0040] In specific implementation, the second signal preset library is a temporary signal preset library. After each signal detection is completed, the CPU controller module E will clear the preset second preset signal library to ensure that it will not have any impact on the next signal detection result.

[0041] Among them, the detection result indication module includes: a first detection result indication module J, a second detection result indication module K, and a third detection result indication module L, and the first detection result indication module J, the second detection result indication module K, and the third detection result indication module L are all directly connected to the CPU controller module E, and are used to indicate the presence of the detection signal, the absence of the detection signal, and the type of the detection signal, respectively.

[0042] Among them, the signal detection result is first determined by comparing the signal amplitude received by the CPU controller module E with the second signal preset library to determine whether the signal to be detected exists. If the signal to be detected exists, the CPU controller module E further extracts the frequency of the received signal, and compares the signal amplitude and signal frequency with the first signal preset library to determine the type of the signal to be detected, and outputs the detection result to the first detection result indication module J, the second detection result indication module K and the third detection result indication module L for indication.

[0043] In practical applications, the detection device can be used not only to detect high-speed signals, but also to detect common low-speed signals.

[0044] Among them, the first detection result indication module J, the second detection result indication module K and the third detection result indication module L are a green indicator light, a red indicator light and a liquid crystal display screen respectively.

[0045] The device has an integrated lithium battery module, which allows it to be used continuously for 10 hours without an external power supply.

[0046] Example 2

[0047] The solution in Example 1 is further introduced below with reference to specific examples and device models.

[0048] Whether powered by an external power source or not, the device can be powered on and off by long-pressing the power button. Once powered on and in normal operation, signal detection can begin. If the signal to be detected is low-speed, it can be connected to the device's external pin headers via a standard wire. If the signal to be detected is high-speed, it can be connected to the device's SMA terminals via a high-speed coaxial cable with SMP terminals.

[0049] For the signal to be detected, the user needs to manually disconnect the output of the signal to be detected during signal detection. The specific signal disconnection method is determined according to the specific situation of the signal to be detected. The so-called disconnection of the signal to be detected is to determine a state so that the signal to be detected is not output. The simplest method is:

[0050] Cut off the power supply to the path of the signal to be detected. At this time, press the button of the preset module C for 5 seconds, the device will collect signals, extract the amplitude of the collected signals and mark the signals. The marked signals will be temporarily stored in the second signal preset library. When the button of the preset module C is lifted, the user will power on the signal to be detected, so that the signal to be detected is in a normal output or input state. The device will continue to collect signals, extract the amplitude of the collected signals and mark the signals in real time. At the same time, the marked signals will be compared with the temporary preset signals in the second signal preset library. If the difference between the amplitude of the signal newly marked by the device and the amplitude of the signal in the temporary preset library exceeds 20mV, it is determined that the signal exists. If the difference between the amplitude of the signal newly marked by the device and the amplitude of the signal in the temporary preset library is less than 20mV, it is determined that the signal does not exist.

[0051] When the device determines that a signal exists, it extracts the frequency of the newly marked signal and compares the extracted frequency and amplitude with the data in the first signal preset library. If it is determined to be a type consistent with that in the first signal preset library, the detected signal type is output to the display screen for real-time display. When the device compares the collected signal with the second signal preset library and determines that the signal exists, the green light of the first detection result indication module J flashes; when the device compares the collected signal with the second signal preset library and determines that the signal does not exist, the red light of the second detection result indication module K flashes; when the device compares the collected signal with the second preset signal library and determines that the signal exists, the device extracts the collected signal features, continues to compare with the first signal preset library, and then determines the type of the currently collected signal. If the newly collected signal of the device has a matching signal type after comparison with the first signal preset library, the CPU controller module E outputs the determined signal type to the third detection result indication module L in real time to display the current type of the signal to be detected; if the newly collected signal of the device does not have a matching signal type with the signal to be detected after comparison with the first signal preset library, the CPU controller module E outputs "no signal type determined" to the third detection result indication module L to display the current type of the signal to be detected, and at the same time, the device outputs the amplitude of the extracted signal to be detected in voltage unit V (volt) through the third detection result indication module L for display.

[0052] Among them, the first signal preset library is determined by a large amount of measured data. The known signals are repeatedly collected in different application scenarios, and the signal amplitude and signal frequency are extracted for each collected signal, and the extracted data is marked as a sample. After collecting a large number of samples, the amplitude and frequency characteristic value ranges of the known signals corresponding to the samples are formulated through data analysis and comparison, that is, the signals are classified; after a large number of actual tests on common high-speed signals, the signal amplitude and frequency characteristic values are ranged according to the above method, and the signal classification is completed, which is stored inside the CPU controller module E as the first signal preset library of the device.

[0053] Among them, the power conversion module D is used to power the internal CPU controller module E, the first detection result indication module J, the second detection result indication module K, the third detection result indication module L, the first power detector module B, the second power detector module H, the switch control module I and the lithium battery module F when an external power supply is connected.

[0054] Among them, the signal input nodes of the first signal input module (i.e., signal input 1) and the second signal input module (i.e., signal input 2) adopt a Co-lay (function multiplexing) signal design, and the signal connector uses a high-speed signal connection terminal SAM (Subminiature Version A connector, i.e., miniature A version connector) and a low-speed signal connection terminal PinHeader (pin header) multiplexing design, so that the high-speed signal to be tested can be connected to the device through a coaxial connection cable, ensuring that the transmission link loss from the signal to be tested to the device is minimized. At the same time, the low-speed signal connection terminal Pin Header (pin header) is configured to facilitate the connection of the low-speed signal test line.

[0055] Among them, the hardware circuit design for signal detection is as follows Figure 4 As shown, the CPU controller module E adopts the STM32F103X series chip with a built-in storage area, and the first signal preset library can be stored in the storage area inside the CPU controller module E; the first power detector module and the second power detector module both use the RF detector AD8319 model chip, which can identify high-speed signals, low-speed signals and small-amplitude signals. As the core component of signal detection, it is especially used for high-speed signal detection, saving detection costs and simplifying the detection procedure.

[0056] In the hardware circuit design for high-speed signal detection, capacitors C1 and C3 are used as DC (Direct Current) coupling capacitors with a design value of 47nF to block DC signals and select AC signals. Capacitor C2 is a filter capacitor. By placing a capacitor between pin CLPF and ground, the low-pass corner frequency of the circuit driving the VOUT pin can be reduced. At the same time, increasing the capacitance of capacitor C2 will increase the overall rise / fall time of the AD8319 for pulse input signals. Through debugging and measurement of the actual circuit board, the optimal capacitance value of capacitor C2 was determined to be 8.2pF. Capacitors C4 and C5 are used to stabilize and filter the power supply of the AD8319 chip. After measurement on the actual motherboard, the optimal values are: C4 100pF, C5 Resistor R1 is connected in series between the AD8319's power supply pin and the power supply, primarily for current limiting. This circuit is designed with a 0Ω resistor for debugging purposes. Resistor R2 serves as the compensation resistor for the internal temperature network and is connected in series between the temperature compensation interface and ground. By adjusting the compensation resistor value of the internal temperature network, the circuit can be tuned to optimize the performance of input signals of different frequencies. Testing the performance of actual circuit boards has determined that 200Ω is the optimal value for resistor R2. Resistor R3 is the feedback resistor when the AD8319 is operating in measurement mode, that is, when the AD8319 is performing signal detection. Part of the output signal voltage is fed back to the VSET pin through resistor R3. In actual operation, the slope of the VOUT output voltage response can be increased by reducing the voltage of the VOUT portion fed back to VSET. Resistor R3 can also serve as a reverse termination resistor or as part of a single-pole low-pass filter. The ultimate goal is to improve the output voltage response efficiency of VOUT, that is, to increase detection accuracy. Testing the performance of actual circuit boards has determined that 1KΩ is the optimal value for resistor R3.

[0057] The design values of the resistors and capacitors in the circuit design of the G channel of the second signal input module are the same as the design values of the circuit design of the A channel of the first signal input module.

[0058] Unless otherwise specified, the embodiments of the present invention do not limit the models of the components. Any component that can perform the above functions may be used.

[0059] Those skilled in the art will understand that the accompanying drawings are only a schematic diagram of a preferred embodiment, and the serial numbers of the embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0060] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A high-speed signal detection device, characterized in that: The detection device includes: a first power detector module, a preset module, a CPU controller module, and a second power detector module; When the preset module is triggered, the CPU controller module reads the signal state output by the first power detector module and the signal state output by the second power detector module respectively, and stores the read signal state as the preset state; When the preset module is disconnected, the CPU controller module reads the output signal of the first power detector module and the output signal of the second power detector module in real time and compares the received signal with the preset signal, and determines whether there is an input signal according to the comparison result.

2. A high-speed signal detection device according to claim 1, characterized in that: The device further includes a first signal input module and a second signal input module, which simultaneously detect one high-speed signal, or simultaneously detect two high-speed signals, or simultaneously detect a group of differential signals.

3. The high-speed signal detection device according to claim 1, wherein: The first signal input module and the second signal input module support input signal bandwidths of 0.001 GHz to 10 GHz.

4. The high-speed signal detection device according to claim 1, wherein: The device further comprises: a first signal preset library, a second signal preset library, The first signal preset library obtains the signal amplitude of a high-speed signal with a fixed amplitude after passing through a power detector, and records and marks the collected signal amplitude and stores it in the CPU controller module; The second signal preset library is a temporary preset library. After each signal detection is completed, the CPU controller module will clear the preset second preset signal library.

5. A high-speed signal detection device according to claim 4, characterized in that: The CPU controller module compares the received signal amplitude with the second signal preset library to determine whether the signal to be detected exists. If so, the CPU controller module extracts the frequency of the received signal, and compares the signal amplitude and signal frequency with the first signal preset library to determine the type of the signal to be detected, and outputs the detection results to the first detection result indication module, the second detection result indication module and the third detection result indication module for indication.

6. The high-speed signal detection device according to claim 5, characterized in that: The first detection result indication module, the second detection result indication module, and the third detection result indication module are all directly connected to the CPU controller module, and are used to indicate the presence of a detection signal, the absence of a detection signal, and the type of the detection signal, respectively.

7. A high-speed signal detection device according to claim 5 or 6, characterized in that: The first detection result indication module, the second detection result indication module and the third detection result indication module are respectively a green indicator light, a red indicator light and a liquid crystal display screen.

8. The high-speed signal detection device according to claim 1, characterized in that: The device has an integrated lithium battery module.

9. The high-speed signal detection device according to claim 2, characterized in that: The signal input nodes of the first signal input module and the second signal input module adopt a function multiplexing signal design.

10. The high-speed signal detection device according to claim 1, characterized in that: The CPU controller module adopts STM32F103X series chips with a built-in storage area, and stores the first signal preset library in the internal storage area; the first power detector module and the second power detector module both adopt radio frequency detector AD8319 model chips.

Images