Multi-current threshold MBUS transceiver circuit and adaptive current threshold acquisition algorithm

Abstract

The invention discloses a multi-current threshold MBUS transceiver circuit and a self-adaptive current threshold acquisition algorithm. The circuit mainly comprises a signal sampling module, a signal amplification module, a comparison and judgment module, a voltage division control module, a control execution module and a protection and filtering module. After a code return current signal is converted into voltage through the sampling resistor, the voltage is primarily amplified through the operational amplifier and then input into the comparator for high and low level judgment, the reference voltage of the comparator is determined by the adjustable voltage dividing network, and the voltage dividing network controls the series-parallel connection mode of different resistors through the I / O expander to achieve dynamic adjustment of the reference voltage. The designed adaptive acquisition algorithm can preferentially select a proper threshold value according to a historical copy record, and automatically polls a plurality of threshold values until successful identification when no record exists, thereby effectively improving the accuracy of return code identification and the reliability of system communication. The technology has the advantages of being high in signal adaptability, good in anti-interference capability, suitable for various load environments and the like, and is suitable for being widely applied to intelligent meter reading M-Bus communication scenes.

Description

Technical Field

[0001] The present invention relates to a multi-current threshold MBUS transceiver circuit and an adaptive current threshold acquisition algorithm, belonging to the field of MBus receiving circuits. Background Art

[0002] M-Bus is a bus protocol for remote measurement and data transmission, widely used in meter reading systems, water, electricity, and gas meters, and other devices. In M-Bus communication, slave devices must detect the excitation current sent by the master and respond with a code current indicating their status. Therefore, the slave device requires a highly reliable and sensitive current detection and response control circuit.

[0003] Traditional M-Bus receiver circuits often use fixed comparison thresholds, making them difficult to adapt to bus current signals of varying amplitudes. This results in insufficient sensitivity and a high rate of false positives. Furthermore, the response switch circuit design lacks flexibility, impacting response speed and reliability. Therefore, an M-Bus receiver circuit with signal adaptability, flexible control, and high reliability is needed. Summary of the Invention

[0004] The object of the present invention is to provide a multi-current threshold MBUS transceiver circuit and an adaptive current threshold acquisition algorithm, which can effectively solve the above-mentioned problems.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions: The system comprises a current sampling module, whose input end is connected to the M-Bus bus and is used to convert the feedback current signal into a voltage signal; a signal amplification module, connected to the current sampling module and used to perform primary amplification of the voltage signal; a comparator module, whose first input end is connected to the output end of the signal amplification module and is used to receive the amplified signal, and whose second input end is connected to a reference voltage, compares the amplified signal with the reference voltage, and outputs a logic level signal; a voltage regulation module, comprising a resistor network composed of multiple resistor elements and at least one programmable I / O expansion chip controlled by an I²C interface, and is used to dynamically adjust the voltage to adapt to signal inputs of different amplitudes; and a control execution module, comprising a transistor circuit and a MOSFET switch whose conduction is controlled by the comparator output and is used to control the conduction of the bus response or feedback current according to the signal comparison result.

[0006] Furthermore: the current sampling module includes a sampling resistor connected in series in the M-Bus bus, and the voltage signal is a voltage drop signal generated when the return code current flows through the sampling resistor.

[0007] Furthermore: the signal amplification module is an amplification circuit composed of an operational amplifier, which is used to perform a first-stage amplification on the voltage signal.

[0008] Furthermore: the comparator module is an operational amplifier operating in an open-loop comparison mode, and the output is a high or low level.

[0009] Furthermore: the reference voltage adjustment module controls the series or parallel connection of multiple resistor elements through the programmable I / O expansion chip, thereby forming different resistor voltage division ratios to generate multiple voltage levels.

[0010] Further: the control execution module includes: An NPN transistor, whose base receives the output signal from the comparator; The gate of the N-channel power MOSFET is controlled by the transistor, and the drain is connected to the M-Bus feedback path to control the conduction or cutoff of the current.

[0011] Furthermore: a TVS tube and a Schottky diode are provided in the circuit to provide surge protection and reverse voltage protection for the MOSFET.

[0012] An adaptive current threshold acquisition algorithm includes the following steps: S1: Initialize the threshold library, form the priority, and start MBUS reading; S2: Check whether there is a historical threshold: S3: If the historical threshold is found, the historical threshold is used for reading. If the historical threshold is not found, the threshold is selected and read according to the priority. S4: In the copying stage, if the data has not been copied, inquiries are made according to the priority until the copying record result and threshold are obtained.

[0013] The beneficial effects are: 1. Strong adaptability: Through the cooperation of the controllable voltage divider network and the I / O expander (U82), the comparator reference voltage is dynamically adjusted. It can automatically adapt to the M-Bus return code signal of different amplitudes, improve the sensitivity and compatibility of communication, and is suitable for bus environments under different load and cable conditions.

[0014] 2. High signal recognition accuracy: It adopts a two-stage signal processing structure. The first stage uses the operational amplifier U80 to amplify the sampling signal, and the second stage uses the comparator U81 to accurately compare it with the reference voltage, which effectively enhances the weak signal recognition ability and reduces the bit error rate.

[0015] 3. Clear and reliable control logic: By controlling U82 through MCU to switch between different voltage division combinations, the system can self-adjust the threshold voltage in real time during operation, avoiding misjudgment due to signal fluctuations or aging, and improving the stability and accuracy of long-term operation.

[0016] 4. Fast response speed and strong driving capability: The output control module uses Q51 transistor as the driving stage and Q50 power MOSFET as the execution stage. It has high-speed switching response and low on-resistance characteristics, and can quickly and accurately complete the physical conduction operation of the return code signal.

[0017] 5. Strong anti-interference ability: Components such as filter capacitors, current-limiting resistors, Schottky diodes and TVS tubes are introduced into key circuits to build a complete filtering and protection mechanism, which effectively suppresses high-frequency interference, voltage surges and electromagnetic radiation, and improves the system's anti-interference ability and device safety in complex industrial environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] For ease of explanation, the present invention is described in detail with reference to the following specific implementations and accompanying drawings.

[0019] Figure 1 It is a circuit principle diagram of the present invention; Figure 2 This is a flowchart of the acquisition algorithm of the present invention. DETAILED DESCRIPTION

[0020] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and intended to be used to explain the present invention, but should not be understood as limiting the present invention.

[0021] Furthermore, in the description of the present invention, unless otherwise expressly specified or limited, the terms "connected" and "connection" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; and direct connections or indirect connections through an intermediary. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0022] See Figure 1 This is an embodiment of a multi-current threshold MBUS transceiver circuit and an adaptive current threshold acquisition algorithm of the present invention. To more clearly illustrate the technical solution of the present invention, the specific implementation of the present invention is described in detail below in combination with specific circuit structures and functional modules.

[0023] This embodiment provides a receiving circuit suitable for M-Bus communication, which mainly includes the following core modules: Current Sampling Module: The M-Bus feedback signal is transmitted from the slave device to the master device by pulling down the current. To detect the presence of a feedback signal, the circuit converts the current signal into a voltage signal through a sampling resistor, R88. The feedback current passes through R88, forming a voltage difference across it. This voltage signal, designated sig0, serves as the input signal for the subsequent amplifier. The resistance value of R88 is selected based on the M-Bus communication protocol and the feedback current amplitude, typically in the tens of ohms.

[0024] Signal amplification module: In order to improve detection sensitivity and enhance anti-interference ability, the sig0 signal is sent to the operational amplifier U80 to form a voltage amplification circuit: U80 can use a precision low bias current amplifier, such as LMV321; the amplification circuit can adopt either an inverting or non-inverting structure, which is determined according to the layout and input signal polarity; the amplification factor is determined by the feedback resistor configuration, for example, it is set to 10 to 50 times to ensure that the low-level input can still enter the comparator recognition range.

[0025] U80 is the signal amplification module in this circuit. It utilizes an operational amplifier structure and primarily amplifies the weak voltage signal sig0 generated by sampling resistor R88. This enhances the ability of the subsequent comparator U81 to recognize the return current signal. By properly setting U80's gain, the sensitivity and anti-interference performance of the entire receiving circuit can be effectively improved, ensuring stable recognition of bus return status even at low signal levels.

[0026] Signal Comparison Module: The amplified signal enters comparator module U81, where it is compared with the reference voltage and outputs a high or low level to determine signal validity. U81's first input (positive) is connected to the amplified signal; its second input (negative) is connected to the reference voltage node. If the input signal is greater than the reference voltage, U81 outputs a high level, indicating that a return current has been detected. If it is less than the reference voltage, U81 outputs a low level, indicating that no return current has been detected. U81 can use a dual op amp chip with both amplification and comparison functions, such as the LM393 or LM358, operating in open-loop comparison mode.

[0027] U81, the signal comparison module in this circuit, uses an operational amplifier operating in open-loop mode. Its function is to compare the amplified sampled signal with a set reference voltage to determine whether there is a valid feedback current on the M-Bus. When the signal voltage output by U80 exceeds the reference voltage, U81 outputs a high level; otherwise, it outputs a low level, thus converting the analog signal into a clear digital signal, providing a reliable basis for the subsequent control switch.

[0028] Voltage Regulation Module: U82 is the programmable I / O expansion chip in this circuit. It typically communicates with the master MCU via an I²C interface. Its primary function is to control the connection of the resistors in the reference voltage divider network. Based on the master's instructions, U82 switches the high and low levels of its output pins, adjusting the series or parallel configuration of the resistors and dynamically changing the reference voltage supplied to comparator U81. U82's involvement enables the circuit to intelligently select the optimal comparison threshold based on varying bus signal amplitudes, improving signal discrimination accuracy and system adaptability.

[0029] To adapt to the signal amplitude under different bus conditions, an adjustable voltage divider network + digital control logic is used to dynamically generate multiple voltage thresholds: 1. Voltage Divider Network Structure: The voltage divider network consists of multiple precision resistors. Its function is to proportionally divide a fixed high voltage (such as 3.3V) to generate a reference voltage threshold for comparator U81. By combining different resistors in series and parallel, multiple reference voltage values can be achieved. In conjunction with the control of U82, the voltage divider network can dynamically switch the voltage output to adapt to signal inputs of varying amplitudes, thereby improving the comparator's recognition accuracy of the return current signal and the system's adaptability.

[0030] The resistors involved are R82, R83, R84, R85, R86, and R87. The connection of each resistor is controlled by device U82 (such as an I²C interface I / O expansion chip like the TCA9555 or PCA9554). The output of U82 controls MOS switches or transistors, allowing some resistors to be connected in series or parallel to the circuit. 2. Functional Implementation: The MCU (microcontroller unit), the core controller of this circuit, is primarily responsible for communicating with U82 via the I²C bus, dynamically configuring the resistor connections in the voltage divider network, and thereby adjusting the reference voltage of comparator U81. Furthermore, the MCU flexibly adjusts the judgment threshold based on the system operating status or external commands, enabling adaptive processing of varying bus signal amplitudes, improving return code recognition accuracy and communication stability. The MCU can also perform other functions, such as fault detection, status reporting, and communication logic control, serving as the logical decision-making and control center for the entire circuit.

[0031] The MCU sends commands to U82 via the I²C interface; U82 switches the output level state and changes the resistor network structure; different series-parallel combinations correspond to different reference voltages B3 and 3; multiple threshold voltages, such as 2V, 1V, 5V, 1V, 0V, and 8V, are implemented to accommodate sig0 signals of different amplitudes.

[0032] The control execution module is the key component of the M-Bus receiving circuit responsible for actually opening or closing the return path. Its core task is to quickly and reliably turn on the power MOSFET through the cascaded amplification and drive circuits when a valid return current is required, thereby generating the response signal from the M-Bus slave device to the master. This module primarily consists of transistor Q51, power MOSFET Q50, and several auxiliary components.

[0033] Comparator driver stage (Q51): This stage consists of an NPN small-signal transistor Q51, which performs both amplification and level conversion. Q51's base is connected to the output of comparator U81 via a current-limiting resistor (such as R52). Q51's emitter is grounded. Q51's collector is connected to the gate control path of MOSFET Q50, typically connected in series with a pull-up resistor (such as R53). When U81's output is high, Q51's base becomes forward biased, turning it on. Once turned on, Q51 quickly pulls the MOSFET's gate down to GND, turning Q50 on. When U81's output is low, Q51 turns off, and the MOSFET's gate rises to a high level through the pull-up resistor, turning Q50 off. Q51's drive converts logic signals to the power switch, providing both isolation and buffering.

[0034] Power Switch Stage (Q50): The core device in this stage is the N-channel MOSFET Q50 (such as the NCE3020Q or IRL540N), which controls the conduction state of the M-Bus feedback current path. Its drain is connected to the M-Bus communication feedback path, typically connected to the bus receiving section; its source is connected to system ground (GND); and its gate is controlled by Q51. When the gate is pulled low (Q51 is on), the MOSFET conducts, closing the M-Bus feedback current path and signaling a "valid response" from the master. When the gate is high (Q51 is off), the MOSFET turns off, disconnecting the feedback path and signaling a "no response" from the master. MOSFETs offer low on-resistance and fast switching speed, meeting the electrical requirements of fast M-Bus communication.

[0035] To ensure stable operation of the control path in harsh electromagnetic environments, several protection and filtering components are also introduced into the module: R50: a series resistor on the MOSFET gate to prevent high-frequency oscillation during switching; C50 and C51: filter and stabilize the gate to suppress interference pulses; D50 (Schottky diode): used to absorb the reverse spikes generated during the turn-on / off process of Q50 to prevent device breakdown; D51 (TVS transient suppression diode): used to discharge to ground, absorb surge voltage, and protect the MOSFET from damage due to bus overvoltage.

[0036] In summary, the control execution module completes the following core functions: logic signal driving power switch: converting the comparison result of U81 into drive control of Q50 through Q51; controlling the on-off of the return code path: controlling whether the M-Bus bus loop is formed by whether Q50 is on or not; enhancing anti-interference capability: improving the electromagnetic compatibility and stability of the system through measures such as RC filtering and TVS protection; ensuring fast response: the overall design has a fast response speed and reliable operation, which is suitable for the fast return code requirements of the M-Bus protocol.

[0037] This module is the key control unit for the M-Bus communication slave device to successfully respond to the master device's request. It plays an important role in connecting the upper and lower levels and combining logic and power in the entire receiving circuit.

[0038] Power switch stage: MOSFET Q50 (such as NCE3020Q) serves as the main path controller for the M-Bus return code current. The drain of Q50 is connected to the return code loop, and the source is grounded. Controlling whether Q50 is on or off determines whether to respond to commands from the M-Bus host. When Q50 is on, the return code current forms a closed loop, and the master detects a voltage drop, which is considered a "valid response."

[0039] Protection and filtering circuits: These circuits are crucial components for ensuring stable operation of the M-Bus receiver circuitry in this invention. These circuits are primarily located in the input signal sampling circuit and the power switch control circuit. Their core functions include anti-interference, surge protection, level stabilization, and device protection, ensuring the reliability and longevity of the communication circuitry in the complex electromagnetic environments of industrial sites.

[0040] After the sampling resistor R88, the sig0 signal is relatively weak and is easily affected by electromagnetic interference and coupling noise, so filtering and stabilization measures are required: Before the sampling signal enters the amplifier U80, a small-capacity capacitor (such as C52) is connected in parallel to form a low-pass filter; it suppresses the influence of high-frequency interference, spike pulses and electromagnetic coupling signals on the amplifier input; it improves the signal purity, avoids mis-amplification, and enhances the anti-interference performance of the system.

[0041] The gate of the MOSFET (Q50) is a high-impedance input terminal and is extremely sensitive to voltage changes. If it is unstable, it may cause misconduction or high-frequency oscillation. Therefore, an RC filtering and level clamping circuit is designed: series resistor R50 + parallel capacitor C50 / C51. R50: limits the gate current to prevent oscillation caused by instantaneous charge and discharge; C50 / C51: form an RC delay network to form a low-pass filter. Its function is to suppress spike interference in the drive signal; stabilize the MOSFET on / off speed to avoid electromagnetic interference (EMI); prevent malfunction and improve the reliability of the control switch response.

[0042] During the switching process of MOSFET, surge and spike voltage may occur due to bus inductive load or unstable ground potential. To prevent breakdown and damage, the following protection measures are designed: a Schottky diode D50 is connected in reverse parallel to the drain to ground (reverse protection) Its function is to absorb the reverse voltage spike generated when MOSFET is turned off; to prevent the MOSFET drain-source from being broken down by high reverse voltage; it has fast response speed and low on-state voltage drop, effectively protecting the switching device.

[0043] The transient voltage suppressor D51 (TVS diode) is connected in parallel between the key circuit nodes and the ground. Its function is to absorb overvoltages caused by surges, electromagnetic interference, etc.; it quickly clamps the voltage within a safe range to prevent damage to sensitive components; and it ensures the voltage stability of the entire feedback current path and gate drive path.

[0044] The above protection and filtering design can significantly improve the stability of the receiving circuit in harsh industrial environments; extend the service life of key components such as MOSFETs and amplifiers; reduce the communication bit error rate, and improve the overall reliability of the M-Bus system. This is particularly critical for systems with long field wiring and heavy common-mode interference.

[0045] To enhance the system's anti-interference capability and electrical protection performance, the following components are set: R50, C50, and C51: used for MOSFET gate voltage stabilization and filtering to suppress malfunctions caused by rapid voltage changes; D50 (Schottky diode): used to prevent MOSFET reverse voltage breakdown; D51 (TVS tube): ground protection, absorbing surge voltages generated by inductive loads or bus mutations; C52: further decoupling and filtering the comparator input signal sig0 to eliminate high-frequency noise interference.

[0046] Brief description of the workflow: 1. The M-Bus master supplies power to the slave; 2. The slave return code current forms voltage sig0 through sampling resistor R88; 3. sig0 is amplified by U80 and sent to U81 for comparison with the reference voltage; 4. The comparison result controls the conduction of Q51; 5. Q51 is turned on → Q50 is turned on → a response loop is formed; 6. Q50 is cut off → the loop is disconnected → no return code.

[0047] This circuit is widely applicable in the following applications: feedback control of M-Bus slave devices such as heat, water, and gas meters; response-based communication interfaces based on bus current identification; and systems requiring precise detection and switch actuation of low-current signals. By optimizing the resistor network and MCU control algorithm, extended functions such as dynamic threshold adaptation and temperature drift compensation can be implemented.

[0048] Adaptive current threshold acquisition algorithm description: The adaptive current threshold acquisition algorithm, implemented in conjunction with the dynamically adjustable comparison reference voltage network in the M-Bus receiving circuit, enables intelligent adaptation to varying slave device signal strengths and feedback code recognition, improving communication reliability and system intelligence. At the circuit level, the algorithm dynamically switches the voltage divider resistor network controlled by the MCU (I / O expansion chip) (U82), thereby adjusting the reference voltage of comparator U81. At the software level, the algorithm determines threshold validity, performs historical memory, and performs priority polling. This constitutes a comprehensive adaptive acquisition mechanism combining both hardware and software.

[0049] See Figure 2 , the steps when the algorithm is running: S1: Initializes the threshold library, establishes priorities, and starts the meter reading process. After the system starts or receives an M-Bus meter reading task, the MCU initializes a set of preset reference voltage thresholds and stores them in the threshold library (for example, 0.2V, 0.4V, 0.6V, etc.). At the same time, it sets the priority of each threshold (for example, common voltage levels first). The system starts bus communication initialization and prepares to perform return code reading operations.

[0050] S2: Check whether there is a historical reading record threshold; the MCU detects whether the device is a historical communication object. If so, it attempts to call the reference voltage threshold used in the most recent successful return code; if there is no historical record (first communication or device change), it enters the default priority polling process.

[0051] S3: Start reading using the historical threshold or the priority default threshold; if there is a historical threshold, the MCU directly controls U82 to make the reference voltage match the threshold; if there is no historical threshold, the MCU selects the highest priority group of voltage-controlled states from the threshold library, drives U82 to access the corresponding resistor network, sets the comparator reference voltage, and enters the M-Bus slave device reading process.

[0052] S4: Polling attempts at each threshold until a signal is successfully identified. During the code return judgment phase, if the current reference voltage fails to trigger a valid code return signal, the MCU controls the switch to the next priority reference voltage. Continuously loop through multiple voltage levels until a valid code return signal is received, or all levels fail. If identification is successful, the current threshold is recorded in the device history library for priority next time. If the attempt fails, an error flag is returned, and the exception handling process is entered (for example, marking the device as unresponsive, reporting to the master station, etc.).

[0053] The algorithm's supporting hardware functions include: U82 I / O expander: Through the I²C control interface, the MCU dynamically sets different pin states. High / low levels control the series and parallel connection of multiple resistors to form different reference voltages. The resistor network (R82-R86, etc.) forms a multi-level voltage divider structure to adjust the voltage B3.3 in multiple levels. Comparator U81: Compares the sampled signal (amplified sig0) with the current reference voltage and outputs a return code signal. The MCU control logic determines whether the U81 output state meets the return code condition and dynamically adjusts the threshold based on software logic.

[0054] 1. Automatically adapt to bus characteristics: automatically switch to the most appropriate current judgment threshold according to changes in different devices, cable length, load impedance, etc.; 2. Learning and memory capabilities: Equipped with a historical record storage mechanism, it can improve the efficiency of subsequent communications and reduce unnecessary polling; 3. Save communication resources: High success rate, reducing problems such as retransmission, misjudgment, and disconnection caused by threshold mismatch; 4. Strong compatibility: supports slave devices with various signal amplitudes and adapts to environments with old or varying performance devices; 5. High reliability: Co-designed with hardware, it provides fast response and smooth dynamic switching, ensuring real-time performance and data accuracy.

[0055] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will readily appreciate that other variations or modifications based on the above descriptions are possible. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. A multi-current threshold MBUS transceiver circuit, characterized by: It includes a current sampling module, the input end of which is connected to the M-Bus bus and is used to convert the return code current signal into a voltage signal; A signal amplification module, connected to the current sampling module, for performing primary amplification on the voltage signal; a comparator module, having a first input terminal connected to the output terminal of the signal amplification module, for receiving the amplified signal, a second input terminal connected to a reference voltage, comparing the amplified signal with the reference voltage, and outputting a logic level signal; A voltage regulation module, comprising a resistor network consisting of multiple resistor elements and at least one programmable I / O expansion chip controlled by an I²C interface, for dynamically adjusting the voltage to accommodate input signals of varying amplitudes. The control execution module includes a transistor circuit and a MOSFET switch whose conduction is controlled by the comparator output, and is used to control the conduction of the bus response or return code current according to the signal comparison result.

2. The multi-current threshold MBUS transceiver circuit according to claim 1, characterized in that: The current sampling module includes a sampling resistor connected in series to the M-Bus bus, and the voltage signal is a voltage drop signal generated when the return code current flows through the sampling resistor.

3. The multi-current threshold MBUS transceiver circuit according to claim 2, characterized in that: The signal amplification module is an amplification circuit composed of an operational amplifier, which is used to perform a first-stage amplification on the voltage signal.

4. The multi-current threshold MBUS transceiver circuit according to claim 3, characterized in that: The comparator module is an operational amplifier operating in an open-loop comparison mode, and the output is a high or low level.

5. The multi-current threshold MBUS transceiver circuit according to claim 4, characterized in that: The reference voltage adjustment module controls the series or parallel connection of multiple resistor elements through the programmable I / O expansion chip to form different resistor voltage division ratios to generate multiple voltage levels.

6. The multi-current threshold MBUS transceiver circuit according to claim 1, characterized in that: The control execution module includes: an NPN transistor, whose base receives the output signal from the comparator; an N-channel power MOSFET, whose gate is controlled by the NPN transistor and whose drain is connected to the M-Bus return code path for controlling the conduction or cutoff of the current.

7. The multi-current threshold MBUS transceiver circuit according to claim 1, characterized in that: A TVS tube and a Schottky diode are provided in the circuit to provide surge protection and reverse voltage protection for the MOSFET.

8. An adaptive current threshold acquisition algorithm, characterized by: The following steps are involved: S1: Initialize the threshold library, form the priority, and start MBUS reading; S2: Check whether there is a historical threshold: S3: If the historical threshold is queried, the historical threshold is used for reading. If the historical threshold is not queried, the threshold is selected for reading according to the priority; S4: In the reading selection stage, if the reading is not done, inquiries are made according to the priority until the reading result and threshold are recorded.

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