Flow table entry synchronization method and device of virtual switch, equipment and storage medium

Abstract

The invention relates to a flow table entry synchronization method and device of a virtual switch, equipment and a storage medium. The method comprises the steps of obtaining a first memory area pointed by a pointer variable of a first process in the virtual switch and a second memory area pointed by a pointer variable of a second process in the virtual switch; when it is determined that the first process executes write operation on the first memory area, pointing a pointer variable of the first process to a second memory area, pointing a pointer variable of the second process to the first memory area, and enabling the first process to execute write operation on the second memory area and the second process to execute read operation on the first memory area; obtaining a modified target flow table item in the first process based on the read operation, synchronizing the target flow table item to a second process, and emptying a first memory area for executing the read operation; when the flow table synchronization process is finished, the memory areas pointed by the first process and the second process are obtained again, the second process synchronizes the flow table according to the read results of the memory areas, the last step of flow table updating operation is completed, and full-amount synchronization of the flow table is achieved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of cloud computing, and in particular to a flow table entry synchronization method, apparatus, device, and storage medium for a virtual switch. Background Art

[0002] With the rapid development of cloud computing technology, virtual switches are playing an increasingly important role in modern cloud network architectures. The efficient operation and continuous service capabilities of virtual switches are crucial to ensuring network stability and reliability. In practice, upgrades are necessary to continuously improve virtual switch performance, fix vulnerabilities, or add new features. However, traditional upgrade methods often require service interruption, significantly inconvenient for network service assurance. Hot upgrades ensure that upgrades can be performed without service interruption, minimizing the impact of upgrades on the network.

[0003] Existing hot upgrade solutions include dual-process and active / standby switchover. Dual-process solutions have attracted significant attention due to their reduced resource usage and flexibility. In this approach, the first process must synchronize configuration information, including flow tables, ports, and controllers, with the second process. To ensure uninterrupted traffic flow, the old virtual switch remains operational during the hot upgrade, and its flow tables are likely to be updated during the upgrade. However, there is currently a lack of methods for handling flow table updates during hot upgrades. Summary of the Invention

[0004] In view of this, the present disclosure provides a flow table entry synchronization method, apparatus, device, and storage medium for a virtual switch to solve the current problem of lack of a processing method for flow table updates during a hot upgrade process.

[0005] In a first aspect, the present disclosure provides a flow table entry synchronization method for a virtual switch, the method comprising:

[0006] Obtaining a first memory area pointed to by a pointer variable of a first process in the virtual switch and a second memory area pointed to by a pointer variable of a second process in the virtual switch;

[0007] When it is determined that the first process has performed a write operation on the first memory area, the pointer variable of the first process is pointed to the second memory area, the pointer variable of the second process is pointed to the first memory area, and the first process is caused to perform a write operation on the second memory area and the second process is caused to perform a read operation on the first memory area;

[0008] Acquire the target flow table entry modified in the first process based on the read operation, synchronize the target flow table entry to the second process, and clear the first memory area where the read operation is performed;

[0009] At the end of the flow table synchronization process, the memory area pointed to by the first process and the second process is obtained again. The second process synchronizes the flow table according to the reading result of the memory area, completing the last step of the flow table update operation, and obtaining the full synchronization result of the flow table items of the second process during the hot upgrade process.

[0010] In an embodiment of the present disclosure, a first memory area pointed to by a pointer variable of a first process in a virtual switch and a second memory area pointed to by a pointer variable of a second process in the virtual switch are obtained; when it is determined that the first process has performed a write operation on the first memory area, the pointer variable of the first process is pointed to the second memory area, and the pointer variable of the second process is pointed to the first memory area, and the first process is made to perform a write operation on the second memory area, and the second process is made to perform a read operation on the first memory area; based on the read operation, a target flow table entry that has been modified in the first process is obtained, and the target flow table entry is synchronized to the second process; then, at the end of the flow table synchronization process, the memory area pointed to by the first process and the second process is obtained again, and the second process synchronizes the flow table according to the memory area reading result, completing the last step of the flow table update operation, thereby accurately transmitting the flow table entry information to be synchronized, so as to achieve full synchronization of the flow table, and prevent the updated flow table from not being synchronized to the second process during the hot upgrade process.

[0011] In an optional implementation, determining whether the first process performs a write operation on the first memory area includes:

[0012] When receiving the target indication information, obtaining a modified target flow entry based on the target indication information, wherein the target indication information is used to indicate that the first process has been upgraded and an identification operation is inserted into an update action function of the target flow entry of the first process, the identification operation being used to indicate that the target flow entry has been modified;

[0013] Obtain a target bit corresponding to a target flow entry in the first memory area;

[0014] A write operation is performed on a target bit in the first memory region.

[0015] In an embodiment of the present disclosure, if the first process has a flow table update, the target bit in the first memory area is marked dirty, so that the second process reads the target bit of the first memory area, obtains the target flow table entry based on the target bit, and achieves the purpose of synchronizing the target flow table entry.

[0016] In an optional implementation, obtaining a target bit corresponding to a target flow entry in the first memory area includes:

[0017] Calculate the offset of the target flow table entry in the first memory area;

[0018] The target bit is determined based on the offset.

[0019] In the embodiment of the present disclosure, the target bit is determined by the offset of the target flow table entry in the first memory area, so as to quickly and accurately locate the target bit.

[0020] In an optional implementation, obtaining the target flow entry modified in the first process based on the read operation includes:

[0021] Reading all bit information in the first memory area based on a read operation;

[0022] When the target bit is read, index information is obtained based on the target bit, wherein the index information corresponds to the target flow table entry;

[0023] The flow table database is searched based on the index information to obtain the target flow table entry.

[0024] In the disclosed embodiment, by obtaining index information through the target bit and then finding the target flow table entry, the flow table dirty marking and processing during the hot upgrade of the virtual switch can be effectively implemented, thereby improving the stability and reliability of the system.

[0025] In an optional implementation, the execution action corresponding to the update action function includes at least one or more of deletion of a flow table entry, addition of a flow table entry, status update of a flow table entry, and creation of a flow table entry.

[0026] In an optional implementation, obtaining the target flow entry modified in the first process based on the read operation includes:

[0027] Reading all bit information in the first memory area in sequence based on a read operation;

[0028] After reading all the bit information, all the target flow table entries are obtained.

[0029] In the embodiment of the present disclosure, after reading all the bit information in the first memory area, all the target flow table entries can be obtained, thereby achieving full synchronization of the flow table.

[0030] In a second aspect, the present disclosure provides a flow table entry synchronization device for a virtual switch, the device comprising:

[0031] A first acquisition module is configured to acquire a first memory area pointed to by a pointer variable of a first process in the virtual switch, and a second memory area pointed to by a pointer variable of a second process in the virtual switch;

[0032] a switching module configured to, upon determining that the first process has performed a write operation on the first memory area, point a pointer variable of the first process to the second memory area, and point a pointer variable of the second process to the first memory area, and enable the first process to perform a write operation on the second memory area and the second process to perform a read operation on the first memory area;

[0033] A synchronization module, configured to obtain a target flow table entry modified in the first process based on a read operation, synchronize the target flow table entry to the second process, and clear the first memory area where the read operation is performed;

[0034] The second acquisition module is used to obtain the memory area pointed to by the first process and the second process again when the flow table synchronization process ends. The second process synchronizes the flow table according to the reading result of the memory area, completes the last step of the flow table update operation, and obtains the full synchronization result of the flow table items of the second process during the hot upgrade process.

[0035] In a third aspect, the present disclosure provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the flow table entry synchronization method of the virtual switch of the above-mentioned first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0036] In a fourth aspect, the present disclosure provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the flow table entry synchronization method of a virtual switch according to the first aspect or any corresponding embodiment thereof.

[0037] In a fifth aspect, the present disclosure provides a computer program product, including computer instructions, which are used to enable a computer to execute the flow table entry synchronization method of a virtual switch according to the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the specific embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0039] Figure 1 is a flow chart of a method for synchronizing flow entries of a virtual switch according to an embodiment of the present disclosure;

[0040] Figure 2 is a schematic diagram of flow entry synchronization of a virtual switch according to another embodiment of the present disclosure;

[0041] Figure 3 is a schematic diagram of interaction between two processes according to an embodiment of the present disclosure;

[0042] Figure 4 is a structural block diagram of a flow entry synchronization device for a virtual switch according to an embodiment of the present disclosure;

[0043] Figure 5 Schematic diagram of the hardware structure of the computer device according to the embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present disclosure.

[0045] During a current virtual switch hot upgrade, the old process remains active, and its flow table is likely to be updated during the hot upgrade. Full synchronization of hot upgrade flow tables is crucial for ensuring network performance. The lack of a mechanism to ensure complete synchronization of flow tables before and after a hot upgrade can lead to inconsistent flow tables, impacting network traffic forwarding performance. However, there is currently no method for handling flow table updates during a hot upgrade.

[0046] In order to solve the above problems, according to an embodiment of the present disclosure, an embodiment of a flow table entry synchronization method for a virtual switch is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0047] In this embodiment, a flow table synchronization method for a virtual switch is provided. Figure 1 Flowchart of a flow entry synchronization method for a virtual switch according to an embodiment of the present disclosure. Figure 1 As shown, the method can be applied to a virtual switch, and the method process includes the following steps:

[0048] Step S101: Acquire a first memory area pointed to by a pointer variable of a first process in a virtual switch, and a second memory area pointed to by a pointer variable of a second process in the virtual switch.

[0049] Optionally, the virtual switch of the embodiment of the present disclosure adopts a dual-process technology in the hot upgrade, such as Figure 2As shown, the virtual switch includes a first process (i.e., the old process) and a second process (i.e., the new process). When a flow table entry in the first process is updated, the updated flow table entry needs to be synchronized with the second process to implement a flow table synchronization mechanism. The flow table entry here refers to the switch flow table entry information. Furthermore, the switch flow table mechanism is a key mechanism for data forwarding decisions in the switch. It consists of a packet header field (matching field), a counter, and an action. The packet header field is used to match the content of the packet header, the counter stores statistical traffic information, and the action indicates how the switch handles the matching packet, such as forwarding, discarding, or modifying the packet content.

[0050] Specifically, a control channel and a data channel are established between the first process and the second process (i.e., dual process). The control channel is used to transmit configuration information such as ports and controllers, and the data channel is used for flow table synchronization. The data channel is implemented based on shared memory. In addition, two swap areas are established in the shared memory area of the dual process, namely the first memory area ( Figure 2 bitmap1 in) and the second memory area ( Figure 2 bitmap2 in ). Figure 2 As shown, in the initial stage, the pointer variable of the first process points to the first memory area, and the pointer variable of the second process in the virtual switch points to the second memory area.

[0051] It should be noted that the embodiment of the present disclosure reads the large page memory, opens two buffers (i.e., the first memory area and the second memory area) in the large page memory for marking the flow table dirty, initializes all bits of the memory area to 0, and then defines two volatile pointer variables of type long to point to the two buffers, wherein the first memory area is used to perform read operations, and the second memory area is used to perform write operations, and the read and write operations of the two memory areas are exchanged at appropriate times to achieve complete synchronization of the flow table entries.

[0052] In addition, during a virtual switch hot upgrade, dirty marking is a mechanism that marks the status of specific entries in the flow table. When a flow table update is detected during the upgrade process, the relevant flow table entries are marked as "dirty", indicating that these entries need to be synchronized.

[0053] Step S102, when it is determined that the first process has performed a write operation on the first memory area, the pointer variable of the first process is pointed to the second memory area, the pointer variable of the second process is pointed to the first memory area, and the first process is made to perform a write operation on the second memory area, and the second process is made to perform a read operation on the first memory area.

[0054] Optionally, if the first process performs a write operation on the first memory area, it means that the flow table entry of the virtual switch has been changed during the hot upgrade process, and the corresponding bit of the changed flow table entry in the first memory area is changed from the initialized 0 to 1.

[0055] Then, the positions of the first memory area and the second memory area need to be swapped. Specifically, the pointer variable of the second process is changed from initially pointing to the second memory area to pointing to the first memory area, and the pointer variable of the first process is changed from initially pointing to the first memory area to pointing to the second memory area.

[0056] Implementing position exchange (see Figure 2 After the "switch" in the first memory area, the virtual switch then allows the first process to perform write operations on the second memory area and the second process to perform read operations on the first memory area.

[0057] It should be noted that Figure 2 Whether the operation performed on bitmap1 and bitmap2 in the shared memory is a write operation or a read operation depends mainly on the access object. If the access object is the first process, a write operation is performed. If the access object is the second process, a write operation is performed.

[0058] Step S103: Based on the read operation, the target flow table entry modified in the first process is obtained, the target flow table entry is synchronized to the second process, and the first memory area where the read operation is performed is cleared.

[0059] Optionally, the second process can obtain the modified flow entry in the first process based on a read operation, and then use this flow entry as a target flow entry and synchronize the target flow entry to the second process. When the second process reads each flow entry in the first memory area, it can determine the modified flow entry by obtaining an identifier, including but not limited to a dirty identifier.

[0060] The bit record in the first memory area that was read is then cleared. This allows the first process to update and synchronize the flow table when writing to the first memory area after the flow table synchronization process ends and the position is swapped again.

[0061] In step S104, at the end of the flow table synchronization process, the memory area pointed to by the first process and the second process is obtained again. The second process synchronizes the flow table according to the reading result of the memory area, completes the last step of the flow table update operation, and obtains the full synchronization result of the flow table items of the second process during the hot upgrade process.

[0062] Optionally, in an embodiment of the present disclosure, a condition is set for exchanging the positions of the first memory area and the second memory area again. For example, when the flow table synchronization process ends (for example, all flow table items are transferred, a clear end instruction is received, etc.), the memory area pointed to by the first process and the second process is obtained again, and then the memory area pointed to by the current second process is obtained, and a read operation is performed on it. The read result is synchronized with the flow table to ensure that the target flow table item is not missed and is not synchronized to the second process.

[0063] It's important to note that the position swap here essentially swaps the access objects of the first and second memory areas. This can also be understood as exchanging the pointers of the first and second processes. Because the first process performs a write operation and the second process performs a read operation, real-time synchronization of flow entries is achieved. Therefore, after the position swap, the subordinate relationship between the first and second memory areas is changed. This subordinate relationship is actually the result of the access by the first process performing a write operation or the second process performing a read operation.

[0064] In an embodiment of the present disclosure, a first memory area pointed to by a pointer variable of a first process in a virtual switch and a second memory area pointed to by a pointer variable of a second process in the virtual switch are obtained; when it is determined that the first process has performed a write operation on the first memory area, the pointer variable of the first process is pointed to the second memory area, and the pointer variable of the second process is pointed to the first memory area, and the first process is made to perform a write operation on the second memory area, and the second process is made to perform a read operation on the first memory area; based on the read operation, a target flow table entry that has been modified in the first process is obtained, and the target flow table entry is synchronized to the second process; then, at the end of the flow table synchronization process, the memory area pointed to by the first process and the second process is obtained again, and the second process synchronizes the flow table according to the memory area reading result, completing the last step of the flow table update operation, thereby accurately transmitting the flow table entry information to be synchronized, so as to achieve full synchronization of the flow table, and prevent the updated flow table from not being synchronized to the second process during the hot upgrade process.

[0065] In some optional implementations, determining that the first process performs a write operation on the first memory area includes:

[0066] When receiving the target indication information, obtaining a modified target flow entry based on the target indication information, wherein the target indication information is used to indicate that the first process is upgraded and a dirty operation is inserted into an update action function of the target flow entry of the first process;

[0067] Obtain a target bit corresponding to a target flow entry in the first memory area;

[0068] A write operation is performed on a target bit in the first memory region.

[0069] Optionally, if the first process of the virtual switch is upgraded and the flow table is updated during the upgrade, a target indication message will be sent to the virtual switch. After receiving the target indication message, the virtual switch considers that the flow table of the first process has been added, deleted, or modified. By accessing the update action function of each flow table item in the flow table of the first process, the modified target flow table item can be obtained.

[0070] It should be noted that the sign of determining that a flow table update occurs in the first process during the virtual switch upgrade is that a dirty operation is inserted into the update action function of the target flow table entry of the first process, and the target flow table entry here refers to any modified flow table entry information in the flow table.

[0071] Since each bit in the first memory area represents whether a certain array item has been modified, including but not limited to various flow table items, and during the initialization phase, the value of each bit is 0, the target bit corresponding to the target flow table item in the first memory area can be calculated through the first calculation, and then the target bit can be modified from 0 to 1 and written to the first memory area, thereby marking the bits in the first memory area as dirty.

[0072] In an embodiment of the present disclosure, if the first process has a flow table update, the target bit in the first memory area is marked dirty, so that the second process reads the target bit of the first memory area, obtains the target flow table entry based on the target bit, and achieves the purpose of synchronizing the target flow table entry.

[0073] In some optional implementations, obtaining a target bit corresponding to a target flow entry in the first memory area includes:

[0074] Calculate the offset of the target flow table entry in the first memory area;

[0075] The target bit is determined based on the offset.

[0076] Optionally, when the flow table uses continuous memory allocation, the operating system of the virtual switch allocates a continuous memory space to the flow table. Then, the starting address of the flow table is determined, and the offset of the target flow table entry relative to the starting address is calculated.

[0077] Then, the corresponding target bit contained in the first memory area can be obtained based on the offset.

[0078] In the embodiment of the present disclosure, the target bit is determined by the offset of the target flow table entry in the first memory area, so as to quickly and accurately locate the target bit.

[0079] In some optional implementations, obtaining the target flow entry modified in the first process based on the read operation includes:

[0080] Reading all bit information in the first memory area based on a read operation;

[0081] When the target bit is read, index information is obtained based on the target bit, wherein the index information corresponds to the target flow table entry;

[0082] The flow table database is searched based on the index information to obtain the target flow table entry.

[0083] Optionally, in the flow table entry synchronization stage, based on the read operation performed by the second process on the first memory area, all bit information in the first memory area, that is, all bits, is read. After reading the bit set to 1, it is determined that the target bit is currently read, and then the corresponding index information is obtained based on the target bit, and then the flow table database is searched based on the index information to obtain the target flow table entry.

[0084] It should be noted that each flow table entry in the flow table database corresponds to an index, so after obtaining the index information corresponding to the target position, the target flow table entry can be obtained based on the index information.

[0085] In the disclosed embodiment, by obtaining index information through the target bit and then finding the target flow table entry, the flow table dirty marking and processing during the hot upgrade of the virtual switch can be effectively implemented, thereby improving the stability and reliability of the system.

[0086] In some optional implementations, the execution action corresponding to the update action function includes at least one or more of deletion of a flow table entry, addition of a flow table entry, status update of a flow table entry, and creation of a flow table entry.

[0087] Optionally, determining whether a flow table has been modified is based on checking whether a dirty operation is inserted into the update action function of the flow entry. If one or more of the following occurs: flow entry deletion, flow entry addition, flow entry status update, or flow entry creation, the current flow entry is considered modified, and a dirty operation is inserted into the update action function of the current flow entry.

[0088] In some optional implementations, obtaining the target flow entry modified in the first process based on the read operation includes:

[0089] Reading all bit information in the first memory area in sequence based on a read operation;

[0090] After reading all the bit information, all the target flow table entries are obtained.

[0091] Optionally, in the disclosed embodiment, the triggering condition for swapping the positions of the first and second memory areas is: the second process sequentially reads all bit information in the first memory area based on a read operation, obtains all target flow table entries after reading all bit information, synchronizes all target flow table entries to the second process, then clears the bit records in the first memory area, and swaps the positions of the first and second memory areas, thereby swapping the corresponding subordinate relationships.

[0092] Another triggering condition for position exchange is: performing a position exchange operation when the target flow entry is last updated after synchronization is completed (which has been described in the above embodiment and will not be repeated here).

[0093] In the embodiment of the present disclosure, after reading all the bit information in the first memory area, all the target flow table entries can be obtained, thereby achieving full synchronization of the flow table.

[0094] In some optional embodiments, such as Figure 3 As shown, Figure 3 FIG. 1 is a schematic diagram of the interaction between two processes according to an embodiment of the present disclosure. The specific process is as follows:

[0095] Synchronize state information between the first process and the second process;

[0096] A control channel and a data channel are established between the first process and the second process to achieve configuration synchronization;

[0097] Flow table synchronization is achieved between the first process and the second process;

[0098] The second process side implements configuration and flow table installation;

[0099] After the flow table update synchronization on the second process side is completed, an exit instruction is sent to the first process;

[0100] The first process exits and the second process upgrade ends.

[0101] This embodiment also provides a flow table entry synchronization device for a virtual switch, which is used to implement the above-mentioned embodiments and preferred implementations. Details that have already been described will not be repeated. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0102] This embodiment provides a flow table synchronization device for a virtual switch, such as Figure 4 Shown, including:

[0103] A first acquisition module 401 is configured to acquire a first memory region pointed to by a pointer variable of a first process in the virtual switch, and a second memory region pointed to by a pointer variable of a second process in the virtual switch;

[0104] The switching module 402 is configured to, upon determining that the first process has performed a write operation on the first memory area, point the pointer variable of the first process to the second memory area, and point the pointer variable of the second process to the first memory area, so that the first process performs a write operation on the second memory area and the second process performs a read operation on the first memory area;

[0105] A synchronization module 403 is configured to obtain a target flow table entry modified in the first process based on a read operation, synchronize the target flow table entry to the second process, and clear the first memory area where the read operation is performed;

[0106] The second acquisition module 404 is used to obtain the memory area pointed to by the first process and the second process again when the flow table synchronization process ends. The second process synchronizes the flow table according to the reading result of the memory area, completes the last step of the flow table update operation, and obtains the full synchronization result of the flow table items of the second process during the hot upgrade process.

[0107] In some optional embodiments, the switching module 402 is used to obtain a modified target flow table entry based on the target indication information when the target indication information is received, wherein the target indication information is used to indicate that an upgrade has occurred in the first process and a dirty operation has been inserted into the update action function of the target flow table entry of the first process; obtain a target bit corresponding to the target flow table entry in the first memory area; and perform a write operation on the target bit in the first memory area.

[0108] In some optional implementations, the switching module 402 is configured to calculate an offset of the target flow entry in the first memory area; and determine a target bit based on the offset.

[0109] In some optional embodiments, the synchronization module 403 is used to read all bit information in the first memory area based on a read operation; when the target bit is read, index information is obtained based on the target bit, wherein the index information corresponds to the target flow table entry; and the flow table database is searched based on the index information to obtain the target flow table entry.

[0110] In some optional implementations, the execution action corresponding to the update action function includes at least one or more of deletion of a flow table entry, addition of a flow table entry, status update of a flow table entry, and creation of a flow table entry.

[0111] In some optional embodiments, the synchronization module 403 is used to read all the bit information in the first memory area in sequence based on a read operation before pointing the pointer variable of the first process to the second memory area and pointing the pointer variable of the second process to the first memory area; after reading all the bit information, exchange the corresponding subordinate relationship between the first memory area and the second memory area.

[0112] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0113] The flow table entry synchronization device of the virtual switch in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0114] The present disclosure also provides a computer device having the above Figure 4 FIG. 1 is a flow entry synchronization device for a virtual switch shown in FIG.

[0115] See also Figure 5 , Figure 5 is a structural diagram of a computer device provided by an optional embodiment of the present disclosure, such as Figure 5 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 5 A processor 10 is taken as an example.

[0116] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0117] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.

[0118] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0119] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0120] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0121] The embodiments of the present disclosure also provide a computer-readable storage medium. The above-mentioned method according to the embodiments of the present disclosure can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0122] A portion of the present disclosure may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present disclosure through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes but is not limited to a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0123] Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A flow table synchronization method for a virtual switch, characterized in that: The method comprises: Obtaining a first memory area pointed to by a pointer variable of a first process in the virtual switch and a second memory area pointed to by a pointer variable of a second process in the virtual switch; If it is determined that the first process has performed a write operation on the first memory area, point a pointer variable of the first process to the second memory area, and point a pointer variable of the second process to the first memory area, and enable the first process to perform a write operation on the second memory area and the second process to perform a read operation on the first memory area; Acquire a target flow table entry modified in the first process based on the read operation, synchronize the target flow table entry to the second process, and clear the first memory area where the read operation is performed; At the end of the flow table synchronization process, the memory area pointed to by the first process and the second process is obtained again. The second process synchronizes the flow table according to the memory area reading result, completing the last step of the flow table update operation, and obtaining the full synchronization result of the flow table items of the second process during the hot upgrade process.

2. The method according to claim 1, characterized in that The determining that the first process performs a write operation on the first memory area includes: When receiving target indication information, obtaining the modified target flow entry based on the target indication information, wherein the target indication information is used to indicate that the first process is upgraded and a dirty operation is inserted into an update action function of the target flow entry of the first process; Obtaining a target bit corresponding to the target flow entry in the first memory area; A write operation is performed on the target bit in the first memory area.

3. The method according to claim 2, characterized in that The acquiring of the target bit corresponding to the target flow entry in the first memory area includes: Calculating an offset of the target flow table entry in the first memory area; The target bit is determined based on the offset.

4. The method according to claim 3, characterized in that The acquiring, based on the read operation, a target flow table entry modified in the first process, includes: Reading all bit information in the first memory area based on the read operation; When the target bit is read, index information is obtained based on the target bit, wherein the index information corresponds to the target flow table entry; A flow table database is searched based on the index information to obtain the target flow table entry.

5. The method according to claim 2, characterized in that The execution action corresponding to the update action function includes at least one or more of deletion of a flow table entry, addition of a flow table entry, status update of a flow table entry, and creation of a flow table entry.

6. The method according to claim 1, characterized in that The acquiring, based on the read operation, a target flow table entry modified in the first process, includes: Reading all bit information in the first memory area in sequence based on the read operation; After all bit information is read, all target flow table entries are obtained.

7. A flow table synchronization device for a virtual switch, characterized in that: The device comprises: A first acquisition module is configured to acquire a first memory area pointed to by a pointer variable of a first process in the virtual switch, and a second memory area pointed to by a pointer variable of a second process in the virtual switch; a switching module, configured to, upon determining that the first process has performed a write operation on the first memory area, point a pointer variable of the first process to the second memory area, and point a pointer variable of the second process to the first memory area, and enable the first process to perform a write operation on the second memory area and the second process to perform a read operation on the first memory area; a synchronization module, configured to obtain a target flow table entry modified in the first process based on the read operation, synchronize the target flow table entry to the second process, and clear the first memory area where the read operation is performed; The second acquisition module is used to obtain the memory area pointed to by the first process and the second process again when the flow table synchronization process ends. The second process synchronizes the flow table according to the reading result of the memory area, completes the last step of the flow table update operation, and obtains the full synchronization result of the flow table items of the second process during the hot upgrade process.

8. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the flow table entry synchronization method of the virtual switch according to any one of claims 1 to 6 by executing the computer instructions.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the flow table entry synchronization method for a virtual switch according to any one of claims 1 to 6.

10. A computer program product, characterized in that The method comprises computer instructions, wherein the computer instructions are used to enable a computer to execute the flow table entry synchronization method of the virtual switch according to any one of claims 1 to 6.

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