Data transmitting and receiving method and data transmitting and receiving device

By using the first and second request blocks to alternately transmit general and high-priority data in data transmission, the general priority data delay problem caused by the improvement of high-priority data transmission efficiency is solved, and efficient and delay-free data transmission is achieved.

CN120455393APending Publication Date: 2025-08-08REALTEK SEMICON CORP
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Patent Information

Application Number
CN202410830984.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-02-06
Filing Date
2024-06-25
Publication Date
2025-08-08

AI Technical Summary

Technical Problem

In the prior art, the increase in transmission efficiency of high priority data will lead to delays in general priority data, and existing methods cannot effectively solve this problem.

Method used

By alternately transmitting general priority data and high priority data using the first request block and the second request block, the order of high priority data remains unchanged, and the second request block is used to assist in the transmission of general priority data that cannot be transmitted by the first request block, reducing the delay of general priority data.

Benefits of technology

It realizes efficient transmission of high-priority data and general-priority data, reduces transmission delay, improves data transmission efficiency, and ensures that the priority order of high-priority data is not affected.

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Abstract

A data transceiving apparatus and a data transceiving method are provided. The data transceiving method includes the steps of: transceiving a plurality of general priority data through a first request block; receiving and transmitting the plurality of high-priority data through the second request block; if the first request block cannot transmit and receive the partial data of the general priority data, transmitting and receiving the partial data of the general priority data through the second request block; after the plurality of high priority data are received and transmitted through the second request block, if a plurality of general priority data of the first request block exist, the plurality of general priority data can be transmitted through the second request block.
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Description

Technical Field

[0001] The present disclosure relates to a data transceiving method and a data transceiving device, and more particularly to a data transceiving method and a data transceiving device that assist in transmitting general priority data through a high priority request block. Background Art

[0002] In terms of data transmission, it is usually hoped that the USB Request Block (URB) can carry the maximum amount of data. Therefore, data is aggregated to facilitate the request block to send data. However, this will result in high-priority data not being able to obtain low latency.

[0003] On the other hand, in order to improve the transmission efficiency of high-priority data and reduce transmission delay, if high-priority data is encountered, the request block will transmit the data immediately. However, the above operation will cause the general priority data following the high-priority data to wait, thereby causing a delay in the general priority data. Summary of the Invention

[0004] In view of the deficiencies in the prior art, one of the objectives of the present disclosure is (but not limited to) to provide a data transceiving method and a data transceiving device to improve the deficiencies in the prior art.

[0005] In some embodiments, the data sending and receiving method includes the following steps: sending and receiving multiple general priority data through a first request block; sending and receiving multiple high priority data through a second request block; and if the first request block cannot send and receive part of the multiple general priority data, sending and receiving part of the multiple general priority data through the second request block.

[0006] In some embodiments, the data transceiver device includes a memory and a processor. The memory is configured to store at least one instruction. The processor is configured to read the at least one instruction and execute the following steps: transmitting and receiving a plurality of general priority data using a first request block; transmitting and receiving a plurality of high priority data using a second request block; and transmitting and receiving a portion of the plurality of general priority data using the second request block if the first request block cannot transmit or receive a portion of the plurality of general priority data.

[0007] The technical means embodied in the embodiments of the present disclosure can improve at least one of the shortcomings of the prior art. The data transceiver method and data transceiver device disclosed herein assist in the transmission of general priority data through high-priority request blocks, thereby improving the transmission efficiency of high-priority and general priority data and reducing transmission delay.

[0008] The features, implementation and technical effects of the present disclosure are described in detail below with reference to the accompanying drawings for preferred embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1A schematic diagram of a data transceiver device according to some embodiments of the present disclosure;

[0010] Figure 2 A flowchart of a data sending and receiving method drawn according to some embodiments of the present disclosure;

[0011] Figure 3A This is a schematic diagram of the operation of a data transceiver device according to some embodiments of the present disclosure;

[0012] Figure 3B This is a schematic diagram of the operation of a data transceiver device according to some embodiments of the present disclosure;

[0013] Figure 4 This is a schematic diagram of the operation of a data transceiver device according to some embodiments of the present disclosure;

[0014] Figure 5 A flowchart of a data sending and receiving method drawn according to some embodiments of the present disclosure;

[0015] Figure 6 A schematic diagram of data transmission and reception and confirmation signals according to some embodiments of the present disclosure; and

[0016] Figure 7 A schematic diagram of data transmission and reception and confirmation signals drawn according to some embodiments of the present disclosure.

[0017] Explanation of symbols

[0018] 100: Data transmission device

[0019] 110: Processor

[0020] 120: Memory

[0021] 200: Method

[0022] 210-230: Steps

[0023] 311, 312, 313: General passengers (general priority data)

[0024] 321, 322: High priority passengers (high priority data)

[0025] 411, 412, 413: General passengers (general priority data)

[0026] 421: High priority passenger (high priority data)

[0027] 500: Method

[0028] 510-580: Steps

[0029] Q1: First Queue

[0030] Q2: Second Queue

[0031] URB1: First bus (first request block)

[0032] URB2: Second bus (second request block) DETAILED DESCRIPTION

[0033] All terms used herein have their ordinary meanings. The definitions of the aforementioned terms in commonly used dictionaries, including any usage examples of any term discussed herein, are provided for illustrative purposes only and should not limit the scope and meaning of the present disclosure. Similarly, the present disclosure is not limited to the various embodiments described herein.

[0034] As used herein, "coupled" or "connected" may refer to two or more components making direct physical or electrical contact with each other, or making indirect physical or electrical contact with each other, or may refer to two or more components operating or acting on each other. As used herein, the term "circuit" may refer to a device comprised of at least one transistor and / or at least one active or passive component connected in a specific manner to process signals.

[0035] As used herein, the term "and / or" includes any combination of one or more of the listed associated items. Terms such as first, second, and third are used herein to describe and identify individual elements. Thus, a first element herein could also be referred to as a second element without departing from the spirit of the present disclosure. For ease of understanding, similar elements in the drawings will be designated with the same reference numerals.

[0036] In order to improve the problem of delay in general priority data caused by prioritizing the transmission of high priority data, the present disclosure proposes a data transceiver method and a data transceiver device, which are described in detail below.

[0037] Figure 1 The following is a schematic diagram of a data transceiver device 100 according to some embodiments of the present disclosure. As shown in the figure, the data transceiver device 100 includes a processor 110 and a memory 120. The memory 120 is used to store at least one instruction. The processor 110 is used to read at least one instruction to perform data transmission. To make the operation of the data transceiver device 100 easier to understand, please refer to Figure 2 , Figure 2 FIG. 2 is a flow chart of a data transceiving method 200 according to some embodiments of the present disclosure.

[0038] In step 210, a plurality of normal priority data are sent and received via a first request block. In step 220, a plurality of high priority data are sent and received via a second request block. For example, the present disclosure can receive and send a plurality of normal priority data via a first request block (USB Request Block, URB). Alternatively, the present disclosure can receive and send a plurality of high priority data via a second request block (URB).

[0039] In step 230, if the first request block is unable to transmit or receive partial data of the plurality of normal priority data, the second request block is used to transmit or receive partial data of the plurality of normal priority data. For example, if the first request block (URB) is full and unable to receive or transmit partial data of the plurality of normal priority data, the second request block (URB) can be used to assist in receiving and transmitting partial data of the plurality of normal priority data, thereby reducing transmission delay of the normal priority data.

[0040] Figure 3A The following is a schematic diagram illustrating the operation of a data transceiver 100 according to some embodiments of the present disclosure. For ease of understanding, general priority data is represented by general passengers 311, 312, and 313, high priority data is represented by high priority passengers 321 and 322, the first request block is represented by the first bus URB1, and the second request block is represented by the second bus URB2.

[0041] First, general passengers 311, 312, and 313 and high-priority passengers 321 and 322 are arranged in the same queue. Then, general passengers 311 and 312 are assigned to the first bus URB1 according to their order of arrangement within the queue, and high-priority passengers 321 and 322 are assigned to the second bus URB2 according to their order of arrangement within the queue. However, since the first bus URB1 is full, general passenger 313 can no longer board the first bus URB1. In this case, general passenger 313 can be assigned to the second bus URB2 within the queue, which will carry general passenger 313. As described above, general priority data, the first request block, and the second request block are represented by general passenger 313, the first bus URB1, and the second bus URB2, respectively. As can be seen from the above embodiment, the present disclosure can utilize the second request block URB2 to assist in receiving and transmitting general priority data 313 when the first request block URB1 is unable to receive and transmit general priority data 313, thereby reducing the transmission delay of general priority data 313. On the other hand, the present disclosure uses the second request block URB2 to assist in sending and receiving the general priority data 313, and no additional delay is added to the high priority data 321, 322. It should be noted that the packet order of the high priority data packets of the present disclosure will maintain the original high priority order, that is, the high priority data will still be sent in advance and will not be delayed due to the need to wait for transmission (only the existing part can be processed), even if Figure 3A The first request block URB1 and the second request block URB2 can still be interchanged Figure 3A Implement in a corresponding manner.

[0042] Figure 3B The following is a schematic diagram illustrating the operation of a data transceiver 100 according to some embodiments of the present disclosure. For ease of understanding, general priority data is represented by general passengers 411 and 412, high priority data is represented by high priority passenger 421, the first request block is represented by first bus URB1, and the second request block is represented by second bus URB2.

[0043] First, general passengers 411 and 412 are arranged into a first queue Q1. Next, high-priority passenger 421 is arranged into a second queue Q2. After the second bus URB2 carries high-priority passenger 421, if general passengers 411 associated with the first bus URB1 still exist, the general passengers 411 can be assigned from the first queue Q1 to the second bus URB2, which will then carry the general passengers 411. Furthermore, general passenger 412 can be assigned to the first bus URB1. As described above, general priority data, high priority data, the first request block, and the second request block are represented by general passenger 411, high-priority passenger 421, the first bus URB1, and the second bus URB2, respectively. As can be seen from the above embodiment, the present disclosure allows the second request block URB2 to transmit and receive general priority data 411 after the second request block URB2 transmits and receives high-priority data 421, if general priority data 411 associated with the first request block URB1 still exists.

[0044] Figure 4 The following is a schematic diagram illustrating the operation of a data transceiver 100 according to some embodiments of the present disclosure. For ease of understanding, general priority data is represented by general passengers 411, 412, and 413, high priority data is represented by high priority passenger 421, the first request block is represented by first bus URB1, and the second request block is represented by second bus URB2.

[0045] First, regular passengers 411, 412, and 413 are arranged into a first queue Q1. Regular passengers 411 and 412 are then assigned to the first bus URB1 according to their order of arrangement within the first queue Q1. Next, high-priority passenger 421 is arranged into a second queue Q2. High-priority passenger 421 is assigned to the second bus URB2 according to their order of arrangement within the second queue Q2. However, since the first bus URB1 is full, regular passenger 413 cannot board the first bus URB1. In this case, regular passenger 413 is assigned to the second bus URB2 from the first queue Q1, which then carries regular passenger 413. As described above, the general priority data, the first request block, and the second request block are represented by the general passenger 413, the first bus URB1, and the second bus URB2, respectively. From the above embodiment, it can be seen that the present disclosure can assist in receiving and sending the general priority data 413 by the second request block URB2 when the first request block URB1 is unable to receive and send the general priority data 413, so as to reduce the transmission delay of the general priority data.

[0046] Figure 5The flowchart of a data transmission and reception method 500 according to some embodiments of the present disclosure is shown. As shown, in step 510, a data packet is received. Subsequently, in step 520, a determination is made as to whether the data packet is a high-priority data packet. If the data packet is a high-priority data packet, step 530 is executed to insert the high-priority data packet into a high-priority queue. Alternatively, if the data packet is not a high-priority data packet, step 525 is executed to insert a normal-priority data packet into a normal-priority queue.

[0047] Next, in step 540, it is determined whether the high priority queue is not empty. If the high priority queue is not empty, step 550 is executed to dequeue the high priority data packet and prepare the Bulk URB. Alternatively, if the high priority queue is not empty, step 545 is executed to dequeue the normal priority data packet and prepare the Bulk URB.

[0048] Next, in step 560, a determination is made as to whether the request block is full. If the request block is full, step 570 is executed, and the request block sends or receives data packets. If the request block is not full, step 565 is executed to determine whether the normal priority queue is empty. If the normal priority queue is empty, step 570 is executed, and the request block sends or receives data packets. If the normal priority queue is not empty, step 545 is executed to dequeue the normal priority data packet and prepare the Bulk URB. Next, in step 580, when the request block is full or there is no more data to be sent, the request block sends or receives data packets.

[0049] Figure 6 as well as Figure 7 A schematic diagram of data transmission and reception and confirmation signals drawn according to some embodiments of the present disclosure. Figure 6 The schematic diagram of the data transceiving method 200, 500 and the data transceiving device 100 without the present disclosure is shown. As can be seen from the figure, there is a large delay (latency) between data transmission and reception and the confirmation signal ACK, which will cause all data transmission and reception to be delayed. Figure 7 , Figure 7Schematic diagrams of the data transceiving methods 200 and 500 and the data transceiving device 100 according to the present disclosure are shown. As can be seen from the diagrams, there is basically almost no delay between data transmission and reception and the confirmation signal ACK, which will make all data transmission and reception almost delay-free.

[0050] In some embodiments, please refer to Table 1 below to illustrate the advantages of using the data transceiving methods 200 and 500 and the data transceiving device 100 of the present disclosure:

[0051] Table 1:

[0052] TX and RX 6 TX and 6 RX The present disclosure 4.544103Gbps 4.663229G Existing technology 3.957277G 3.089599G

[0053] As shown in Table 1, the data transceiver methods 200, 500 and the data transceiver device 100 of the present disclosure can achieve transmission (TX) and reception (RX) speeds of up to 4.544103 GHz, compared to only 3.957277 GHz for the prior art. Furthermore, when multiple transmission (TX) and reception (RX) speeds are employed, the data transceiver methods 200, 500 and the data transceiver device 100 of the present disclosure can achieve transmission (TX) and reception (RX) speeds of up to 4.663229 GHz, compared to only 3.089599 GHz for the prior art due to the mutual interference between transmission (TX) and reception (RX) speeds.

[0054] It should be noted that this disclosure does not Figures 1 to 7 The embodiments shown are limited to the examples shown and are merely illustrative of one embodiment of the present disclosure to facilitate understanding of the technology of the present disclosure. The claims of the present disclosure shall be subject to the invention claims. Those skilled in the art may make modifications and improvements to the embodiments of the present disclosure without departing from the scope of the present disclosure and still fall within the invention claims of the present disclosure.

[0055] In summary, the data transceiving method and data transceiving device disclosed herein assist in transmitting general priority data through high priority request blocks, thereby improving transmission efficiency of high priority data and general priority data and reducing transmission delay.

[0056] Although the embodiments of the present disclosure are described above, the embodiments are not intended to limit the present disclosure. Those skilled in the art may make changes to the technical features of the present disclosure based on the explicit or implicit content of the present disclosure. All such changes may fall within the scope of patent protection sought by the present disclosure. In other words, the scope of patent protection of the present disclosure shall be subject to the definition of the claims of this specification.

Claims

1. A data transceiver method, wherein a processor reads at least one instruction stored in a memory to execute the data transceiver method, comprising: Sending and receiving a plurality of general priority data via a first request block; Sending and receiving a plurality of high priority data via a second request block; and If the first request block cannot transmit or receive part of the plurality of general priority data, the second request block is used to transmit or receive the part of the plurality of general priority data.

2. The data transceiving method according to claim 1, further comprising: After the high priority data are sent and received in the second request block, if the portion of data related to the general priority data in the first request block still exists, the portion of data of the general priority data is sent and received through the second request block.

3. The data transceiving method according to claim 1, further comprising: Queuing the plurality of general priority data and the plurality of high priority data into a queue of data; and Allocating the plurality of normal priority data to the first request block according to the queue data, and allocating the plurality of high priority data to the second request block according to the queue data; If the first request block cannot transmit or receive the portion of the plurality of general priority data, the step of transmitting or receiving the portion of the plurality of general priority data through the second request block includes: If the first request block cannot transmit or receive the portion of the plurality of general priority data from the queue data, the second request block is used to transmit or receive the portion of the plurality of general priority data from the queue data.

4. The data transceiving method according to claim 1, further comprising: Queuing the plurality of general priority data into a first queue of data; Allocating the plurality of normal priority data to the first request block from the first queue data; Queuing the plurality of high priority data into a second queue of data; as well as Allocating the plurality of high priority data to the second request block from the second queue data; If the first request block cannot transmit or receive the portion of the plurality of general priority data, the step of transmitting or receiving the portion of the plurality of general priority data through the second request block includes: If the first request block cannot transmit or receive the portion of the plurality of general priority data using the first queue data, the second request block is used to transmit or receive the portion of the plurality of general priority data using the first queue data.

5. The data transceiving method according to claim 1, further comprising: Determining whether the second request block is fully loaded; and If the second request block is not fully loaded, the portion of the plurality of general priority data is sent and received via the second request block.

6. The data transceiving method according to claim 1, further comprising: inputting the plurality of high priority data into a queue; Determine whether the queue is not empty; and If the queue is not empty, the portion of the plurality of normal priority data is sent and received via the second request block.

7. A data transceiver device, comprising: a memory for storing at least one instruction; and A processor is configured to read the at least one instruction to execute the following steps: Sending and receiving a plurality of general priority data via a first request block; Sending and receiving a plurality of high priority data via a second request block; and If the first request block cannot transmit or receive part of the plurality of general priority data, the second request block is used to transmit or receive the part of the plurality of general priority data.

8. The data transceiver device as claimed in claim 7, wherein the processor is further configured to read the at least one instruction to execute the following steps: After the high priority data are sent and received in the second request block, if the portion of data related to the general priority data in the first request block still exists, the portion of data of the general priority data is sent and received through the second request block.

9. The data transceiver device as claimed in claim 7, wherein the processor is further configured to read the at least one instruction to execute the following steps: Queuing the plurality of general priority data and the plurality of high priority data into a queue of data; and Allocating the plurality of normal priority data to the first request block according to the queue data, and allocating the plurality of high priority data to the second request block according to the queue data; The processor reads the at least one instruction to execute, if the first request block cannot transmit or receive the portion of the plurality of general priority data, the step of transmitting or receiving the portion of the plurality of general priority data through the second request block comprises: If the first request block cannot transmit or receive the portion of the plurality of general priority data from the queue data, the second request block is used to transmit or receive the portion of the plurality of general priority data from the queue data.

10. The data transceiver device as claimed in claim 7, wherein the processor is further configured to read the at least one instruction to execute the following steps: Queuing the plurality of general priority data into a first queue of data; Allocating the plurality of normal priority data to the first request block from the first queue data; Queuing the plurality of high priority data into a second queue of data; as well as Allocating the plurality of high priority data to the second request block from the second queue data; The processor reads the at least one instruction to execute, if the first request block cannot transmit or receive the portion of the plurality of general priority data, the step of transmitting or receiving the portion of the plurality of general priority data through the second request block comprises: If the first request block cannot transmit or receive the portion of the plurality of general priority data using the first queue data, the second request block is used to transmit or receive the portion of the plurality of general priority data using the first queue data.