Program optimization method based on LLVM framework and SMT / ILP solution

Abstract

The invention discloses a program optimization method based on an LLVM framework and SMT / ILP solution, which realizes efficient program synthesis under hardware resource constraint through two stages of intermediate code generation and compilation optimization. The front end divides transaction statement blocks and optimizes dependence, and the rear end generates P4 codes adaptive to the target platform through mathematical modeling and solving, so that resource occupation and debugging cost are remarkably reduced, and the method is suitable for program development of programmable network equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of computer program optimization, and in particular to a program optimization method based on an LLVM framework and SMT / ILP solution. Background Art

[0002] Programmable network devices, such as programmable switches and programmable smart network cards (SmartNICs), are becoming mainstream in data center networks (DCNs). Among various network programming languages, P4 has become the most commonly used, driven by the widespread adoption of Intel's Tofino switch chips. P4 is a domain-specific language (DSL). Unlike programming languages like C and C++, P4 programming is strongly dependent on the hardware resources of the target platform. The program architecture and standard metadata used must correspond to the target platform's hardware architecture, and the program's statements and match-action tables must also comply with the target platform's hardware resource constraints. These characteristics of P4 mean that programmers programming for unfamiliar network devices often encounter errors due to failure to adhere to the target platform's architecture and hardware resource constraints. Debugging programs can also be time-consuming.

[0003] Researchers have proposed numerous alternatives, such as creating new network programming languages with accompanying compilers that generate P4 programs or directly generate compiled products; or developing new compilers with optimization capabilities to ensure that the generated compiled products do not violate the architecture and hardware resource constraints of the target platform. Because the P4 language and compiler, P4C, are already widely used and their position is difficult to challenge, these approaches have been difficult to standardize and promote, and network programmers have struggled to understand the various issues that arise in network programming and debugging.

[0004] Therefore, a program optimization method based on the LLVM framework and SMT / ILP solving is desired. Summary of the Invention

[0005] To address the above technical issues, this application proposes an embodiment of a program optimization method based on the LLVM framework and SMT / ILP solver, which generates efficient P4 programs adapted to the target hardware through program synthesis and constraint solving, thereby reducing development complexity.

[0006] According to one aspect of the present application, a program optimization method based on the LLVM framework and SMT / ILP solver is provided, which includes an intermediate code generation stage: S1, parsing the P4 source code to generate an abstract syntax tree, extracting the match-action table dependency and dividing it into transaction statement blocks, and generating optimized intermediate code; S2, mapping the transaction statement blocks to the target platform processing unit, and generating an optimized P4 program through hardware resource constraint encoding combined with the SMT / ILP solver.

[0007] Preferably, step S1 includes: building a lexical analyzer based on regular expressions to convert the P4 source code into a lexical unit stream; building an AST using bottom-up syntax analysis, and verifying types and variable references through semantic analysis.

[0008] Preferably, the transaction statement block division in step S1 includes: extracting matching-action table nodes from AST and constructing a dependency graph; decoupling action codes according to the dependency graph and generating independent transaction statement blocks.

[0009] Preferably, the step S2 includes: using a program synthesis engine to compile the transaction statement block into a P4 code block adapted to the target platform processing unit; encoding the dependency relationship between the transaction blocks into a constraint formula.

[0010] Preferably, the constraint formula includes: a dependency constraint formula: defining the execution order and data flow relationship of the transaction block; a resource constraint formula: encoding the hardware resource limitations of the target platform, including memory capacity, number of processing units and number of pipeline stages.

[0011] Preferably, the application of the SMT / ILP solver includes: combining dependency constraint formulas with resource constraint formulas to search for the optimal transaction block mapping solution that meets all constraints; narrowing the solution space and improving solution efficiency by pre-coding hardware resource constraints.

[0012] Preferably, the hardware resource constraint is encoded as an integer linear programming model or a satisfiability modulo theory formula, and the constraint parameters include TCAM capacity, pipeline parallelism and an upper limit of matching table entries.

[0013] Preferably, the P4 program and intermediate code before and after optimization are retained, providing bidirectional traceability to support debugging.

[0014] According to one aspect of the present application, a program optimization system based on the LLVM framework and SMT / ILP solver is also provided, including: an LLVM front-end module for P4 source code parsing, intermediate code generation and transaction block partitioning; an optimization engine module for integrating a program synthesizer, a constraint formula builder and an SMT / ILP solver to realize transaction block mapping and code generation.

[0015] According to one aspect of the present application, a computer-readable storage medium is also provided, storing a computer program, characterized in that when the program is executed by a processor, the program optimization method based on the LLVM framework and SMT / ILP solution as described above is implemented.

[0016] This paper designs a program optimization method based on the LLVM framework and SMT / ILP solvers, achieving optimization from P4 programs to P4 programs. The compiler front-end, based on the LLVM framework, accepts P4 code and outputs an intermediate code. During this process, it optimizes dependencies and divides the program into transaction statement blocks. The back-end accepts the intermediate code and first uses program synthesis technology to generate code blocks for each transaction statement block. Each transaction statement block is then mapped to the processing unit of the target platform through Satisfiability Modulo Theory (SMT) or Integer Linear Programming (ILP). By pre-coding hardware resources, the SMT or ILP search space is reduced, thereby efficiently generating a P4 program that occupies fewer hardware resources and is adapted to the target platform. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other purposes, features, and advantages of the present application will become more apparent through a more detailed description of the embodiments of the present application in conjunction with the accompanying drawings. The accompanying drawings are intended to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the drawings, the same reference numerals generally represent the same components or steps.

[0018] Figure 1 This is a front-end architecture diagram of a program optimization method based on the LLVM framework and SMT / ILP solution according to an embodiment of the present application.

[0019] Figure 2 This is a back-end architecture diagram of a program optimization method based on the LLVM framework and SMT / ILP solution according to an embodiment of the present application. DETAILED DESCRIPTION

[0020] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0021] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0022] In addition, numerous specific details are provided in the following detailed description to better illustrate the present application. Those skilled in the art will appreciate that the present application can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present application.

[0023] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0024] Programmable network devices (such as programmable switches and smart network cards) are widely used in data center networks. The P4 language has become a mainstream programming language due to its strong integration with hardware architecture. However, P4 programs must strictly adhere to the hardware resource constraints of the target platform (such as the capacity of the match-action table and the number of processing units). This leads to the following problems: Programmers need a deep understanding of the hardware architecture, which can easily lead to errors due to resource constraint violations; error troubleshooting is time-consuming, especially in cross-platform development; it is difficult to replace the widely used P4 language and P4C compiler; there is a lack of comparison between intermediate code and pre- and post-optimization code, and debugging support is insufficient.

[0025] Therefore, the present invention proposes an optimization algorithm based on the LLVM framework and SMT / ILP solution, which generates an efficient P4 program adapted to the target hardware through program synthesis and constraint solving, thereby reducing development complexity.

[0026] Specifically, the present invention designs a program optimization method based on LLVM framework and SMT / ILP solution. The present invention includes two core stages: intermediate code generation and compilation optimization, combined with Figure 1 (front-end architecture) and Figure 2 (Backend architecture) is described as follows:

[0027] The intermediate code generation phase includes: building a finite state automaton, defining lexical rules using regular expressions, performing lexical analysis on the P4 program, and converting the source code into lexical units. Based on the grammatical rules of the P4 language, a bottom-up analysis is used to construct the linear lexical units into an abstract syntax tree (AST). According to the specified symbol table, the AST is semantically analyzed, including type checking, variable and table reference checking. The AST is searched for nodes related to the match-action table, and a dependency graph is constructed for all match-action tables. Based on the match-action table dependency graph, the action code is decoupled and converted into transaction statement blocks. The transaction statement blocks are compiled into standardized intermediate code, and a series of optimizations are performed on the intermediate code to eliminate redundant dependencies.

[0028] The compilation and optimization phase involves extracting transaction blocks from the intermediate code. Using a program synthesis engine, each block is compiled into a P4 code block that can be packaged into a single processing unit. All blocks are abstracted into specific data structures, and dependency constraint formulas are established for these data structures based on the dependencies of the corresponding match-action tables. Resource constraint formulas are established for the hardware resource constraints of the target platform using a specified formula module. The dependency constraint formulas are solved using a specified SMT or ILP solver, and the search space is narrowed by combining them with the resource constraint formulas. Based on the solution results, an optimized P4 program is synthesized.

[0029] According to an embodiment of the present application, a program optimization method based on the LLVM framework and SMT / ILP solver includes: S1, parsing the P4 source code to generate an abstract syntax tree (AST), extracting the matching-action table dependency and dividing it into transaction statement blocks, and generating optimized intermediate code; S2, mapping the transaction statement blocks to the target platform processing unit, and generating an optimized P4 program through hardware resource constraint encoding combined with the SMT / ILP solver.

[0030] Specifically, in this embodiment of the present application, step S1 includes: constructing a lexical analyzer based on regular expressions to convert the P4 source code into a stream of lexical units; constructing an AST using bottom-up grammatical analysis; and verifying types and variable references through semantic analysis. Transaction statement block decomposition includes: extracting matching-action table nodes from the AST and constructing a dependency graph; and decoupling the action code based on the dependency graph to generate independent transaction statement blocks.

[0031] It should be understood that P4 programs are domain-specific languages (DSLs) whose syntax and semantics are closely related to the hardware architecture. By parsing the P4 source code to generate an AST, the code can be converted into a tree structure, clarifying the grammatical hierarchy (such as variable declarations, control flow, and match-action table definitions), providing a structured foundation for subsequent semantic analysis and dependency extraction. Structural analysis (AST generation and dependency extraction) ensures accurate modeling of program logic; modular division (transaction blocks) adapts to hardware resource constraints and supports parallel optimization; intermediate code optimization provides efficient input for back-end constraint solving, ultimately generating efficient code that conforms to the P4 language specification and adapts to the target platform hardware.

[0032] Regular expressions are a powerful tool for describing lexical rules. They can concisely and accurately express the patterns of various lexical units, such as keywords, identifiers, and operators. Using regular expressions to build a lexical analyzer efficiently breaks down P4 source code into individual lexical units, laying the foundation for subsequent grammatical analysis. Regular expressions have a simple and intuitive syntax, making it relatively easy to implement a lexical analyzer based on them. Regular expressions are also convenient for modifying when lexical rules need to be adjusted or extended, thereby improving the maintainability of the entire compiler system. Bottom-up grammatical analysis (such as LR parsing) can handle relatively complex grammars and construct an accurate abstract syntax tree (AST) during the analysis process. The AST is a structured representation of the source code that preserves the code's hierarchical relationships and grammatical rules, providing an excellent foundation for subsequent semantic analysis and optimization. Accurate semantic verification: Semantic analysis can verify the correctness of types and variable references in the program. For example, it can check whether variables are used after declaration and whether types match. This helps detect potential errors during the compilation phase, improving program correctness and reliability. Extracting the matching-action table nodes from the AST and constructing a dependency graph can clearly show the data dependency relationships between the various nodes. This helps to understand the relationship between different parts of the P4 program and provides a basis for subsequent optimization operations. Decoupling the action code according to the dependency graph and generating independent transaction statement blocks can separate code fragments that may have been intertwined. This can better identify the parts that can be executed in parallel, thereby creating conditions for parallel processing on the processing units of the target platform and improving the execution efficiency of the program. After dividing the code into independent transaction statement blocks, the code in each block is relatively simple and independent, which facilitates separate optimization operations for each block. At the same time, the dependencies between blocks are also clearer, which helps to make more reasonable resource allocation and execution order arrangements overall.

[0033] Furthermore, in an embodiment of the present application, step S2 includes: using a program synthesis engine to compile transaction statement blocks into P4 code blocks adapted to the target platform's processing units; and encoding the dependencies between transaction blocks into constraint formulas. The constraint formulas include: dependency constraint formulas that define the execution order and data flow relationships of transaction blocks; and resource constraint formulas that encode the hardware resource limitations of the target platform, including memory capacity, number of processing units, and number of pipeline stages.

[0034] As you can see, the program synthesis engine can automatically generate efficient and accurate P4 code based on the logic of transaction blocks and the characteristics of the target platform. It can select the optimal code generation strategy based on different hardware architectures and resource constraints, ensuring that the generated code runs efficiently on the target platform. Constraint formulas precisely describe the dependencies and resource constraints between transaction blocks in mathematical form. By encoding these dependencies and resource constraints as constraint formulas, subsequent optimization algorithms can be given clear goals and constraints, ensuring that the optimization process is carried out while all constraints are satisfied. The execution order and data flow relationships of transaction blocks are defined to ensure that the execution order of transaction blocks conforms to the program's logical requirements and that data flow and dependencies are correctly maintained during the optimization process. The target platform's hardware resource constraints, including memory capacity, number of processing units, and number of pipeline stages, are encoded. These constraint formulas ensure that the optimized program runs smoothly on the target platform without encountering problems due to insufficient resources.

[0035] Furthermore, the application of the SMT / ILP solver includes combining dependency constraint formulas with resource constraint formulas to search for the optimal transaction block mapping solution that satisfies all constraints; and pre-encoding hardware resource constraints to narrow the solution space and improve solution efficiency. It should be understood that the dependency constraint formula defines the execution order and data flow relationships of transaction blocks, ensuring the correctness of program logic; the resource constraint formula encodes the hardware resource limitations of the target platform, ensuring that the mapping solution is executable under the actual hardware environment. Only by satisfying both constraints can the mapping solution meet the program's logical requirements and run smoothly on the target platform. By comprehensively considering dependency relationships and resource limitations, the optimal transaction block mapping solution that satisfies all constraints can be found. This helps maximize the performance of the target platform while efficiently utilizing hardware resources, such as reducing memory usage and improving processing unit utilization. Pre-encoding hardware resource constraints clearly defines which mapping solutions are possible and which are not, thus limiting the solution space to a feasible range. This eliminates the need for the solver to search through all possible solutions; instead, it seeks the optimal solution within the range that satisfies the constraints, significantly reducing the search scope. The reduced solution space means the solver needs to process fewer state and variable combinations, thus reducing the complexity of the problem. This enables the solver to find the optimal solution that satisfies the conditions more quickly, improving the efficiency of the entire optimization process. Pre-encoded hardware resource constraints provide the solver with clearer guidance, enabling it to conduct more targeted search and optimization. The solver can perform some pre-processing and pruning operations based on these constraints, further improving solution efficiency.

[0036] Specifically, the hardware resource constraints are encoded as integer linear programming (ILP) models or satisfiability modulo theory (SMT) formulas. Constraint parameters include TCAM capacity, pipeline parallelism, and the upper limit of matching table entries. The P4 program and intermediate code before and after optimization are retained, providing bidirectional traceability to support debugging. ILP and SMT are both powerful formal modeling tools that can accurately describe and model complex hardware resource constraints. By encoding hardware resource constraints as ILP models or SMT formulas, these constraints can be converted into mathematical expressions, making them easier to solve and verify using mature solvers. The optimization process may introduce new errors or cause changes to the original functionality. Retaining the P4 program and intermediate code before and after optimization allows for convenient comparison and analysis of code differences when problems are discovered, quickly locating the source of the error and implementing targeted fixes. The optimization process involves complex transformations and mapping operations. Preserving the intermediate code helps developers better understand the specific steps and logic of the optimization, as well as how the optimization affects the original code. This is important for evaluating optimization results, further improving optimization algorithms, and communicating and collaborating with team members. By retaining the code before and after optimization, you can perform regression testing on the optimized program during subsequent testing and verification to ensure that its functionality remains consistent with the pre-optimization program and that performance and other aspects have achieved the expected improvements. If any problems are discovered during testing, you can promptly go back to the pre-optimization version for comparison and analysis.

[0037] Furthermore, according to an embodiment of the present application, the program optimization system based on the LLVM framework and SMT / ILP solver includes: an LLVM front-end module for P4 source code parsing, intermediate code generation, and transaction block division; an optimization engine module for integrating a program synthesizer, a constraint formula builder, and an SMT / ILP solver to realize transaction block mapping and code generation.

[0038] In summary, this paper discloses a program optimization method based on the LLVM framework and SMT / ILP solvers. Through a two-stage process of intermediate code generation and compilation optimization, it achieves efficient program synthesis under hardware resource constraints. The front-end divides transaction statement blocks and optimizes dependencies, while the back-end generates P4 code adapted to the target platform through mathematical modeling and solvers. This significantly reduces resource usage and debugging costs, making it suitable for program development for programmable network devices.

[0039] While various embodiments of the present disclosure have been described above, the above descriptions are illustrative, non-exhaustive, and not intended to be limiting of the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A program optimization method based on the LLVM framework and SMT / ILP solution, characterized in that: include: S1, parses the P4 source code to generate an abstract syntax tree, extracts the match-action table dependency and divides it into transaction statement blocks, and generates optimized intermediate code; S2 maps the transaction statement block to the target platform processing unit and generates the optimized P4 program by combining hardware resource constraint encoding with SMT / ILP solver.

2. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 1, characterized in that: The step S1 comprises: Build a lexical analyzer based on regular expressions to convert P4 source code into a stream of lexical units; AST is constructed using bottom-up syntax analysis, and types and variable references are verified through semantic analysis.

3. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 2, characterized in that: The transaction statement block division in step S1 includes: Extract the match-action table nodes from the AST and build a dependency graph; Decouple action codes according to the dependency graph and generate independent transaction statement blocks.

4. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 3, characterized in that: The step S2 includes: Use the program synthesis engine to compile the transaction statement block into a P4 code block that adapts to the target platform processing unit; Encode the dependencies between transaction blocks as constraint formulas.

5. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 4, characterized in that: The constraint formula includes: Dependency constraint formula: defines the execution order and data flow relationship of transaction blocks; Resource constraint formula: Encodes the hardware resource limitations of the target platform, including memory capacity, number of processing units, and number of pipeline stages.

6. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 5, characterized in that: Applications of the SMT / ILP solver include: Combine the dependency constraint formula with the resource constraint formula to search for the optimal transaction block mapping solution that satisfies all constraints; By pre-coding hardware resource constraints, the solution space is narrowed and the solution efficiency is improved.

7. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 6, characterized in that: The hardware resource constraint is encoded as an integer linear programming model or a satisfiability modulo theory formula, and the constraint parameters include TCAM capacity, pipeline parallelism and an upper limit of matching table entries.

8. The program optimization method based on the LLVM framework and SMT / ILP solution according to claim 7, characterized in that: Preserves P4 programs and intermediate codes before and after optimization, providing bidirectional traceability to support debugging.

9. A program optimization system based on the LLVM framework and SMT / ILP solver, characterized in that: include: LLVM front-end module, used for P4 source code parsing, intermediate code generation, and transaction block division; The optimization engine module is used to integrate the program synthesizer, constraint formula builder, and SMT / ILP solver to achieve transaction block mapping and code generation.

10. A computer-readable storage medium storing a computer program, characterized in that: When the program is executed by a processor, the program optimization method based on the LLVM framework and SMT / ILP solution according to any one of claims 1 to 8 is implemented.

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