Surface acoustic wave resonator, forming method thereof and surface acoustic wave resonance device

Abstract

The invention discloses a surface acoustic wave resonator, a forming method thereof and a surface acoustic wave resonance device, and the surface acoustic wave resonator comprises a substrate which comprises a piezoelectric layer; the interdigital transducer is located on the piezoelectric layer and comprises an interdigital electrode structure and a bus structure, the interdigital electrode structure comprises a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, and the first interdigital electrodes and the second interdigital electrodes are alternately arranged in parallel along the surface of the substrate; the bus structure comprises a first bus connected with the plurality of first interdigital electrodes and a second bus connected with the plurality of second interdigital electrodes, a first spacer region is arranged between the plurality of second interdigital electrodes and the first bus, and a second spacer region is arranged between the plurality of first interdigital electrodes and the second bus; and the blocking structure is positioned in the substrate, is parallel to the first direction and is at least positioned below the first spacer region. Before the transverse sound waves are not obviously scattered, the blocking structure reflects the transverse sound waves back to the resonance area, sound energy leakage is limited, and the Q value is increased.

Description

Technical Field

[0001] The present invention relates to the field of filters, and in particular to a surface acoustic wave resonator and a forming method thereof, and a surface acoustic wave resonator device. Background Art

[0002] The radio frequency (RF) front-end chips for wireless communication devices include power amplifiers, antenna switches, RF filters, multiplexers, and low-noise amplifiers. RF filters include piezoelectric surface acoustic wave (SAW) filters, piezoelectric bulk acoustic wave (BAW) filters, micro-electro-mechanical system (MEMS) filters, and integrated passive device (IPD) filters.

[0003] SAW resonators have a high quality factor (Q value). RF filters fabricated from SAW resonators offer low insertion loss and high out-of-band rejection. These filters are currently the mainstream RF filters used in wireless communication devices such as mobile phones and base stations. The Q value is the resonator's quality factor, defined as the center frequency divided by the resonator's 3dB bandwidth. SAW filters typically operate in frequencies between 0.4GHz and 2.7GHz.

[0004] Thin-film SAW (TFSAW or IHP SAW) resonators offer excellent performance across a wide frequency spectrum, from lower frequencies (800 MHz) to higher frequencies (2500 MHz). For example, at 1.9 GHz, the peak Q value (Qmax) exceeds 3000, while the Qmax of leaky SAW resonators is around 1000. Recent developments have also enabled TFSAW resonators to achieve excellent RF performance within the 3.5 GHz band, a feat previously unattainable with traditional SAW filters.

[0005] However, the performance of thin film SAW resonators needs to be continuously improved. Summary of the Invention

[0006] The technical problem solved by the present invention is to provide a surface acoustic wave resonator and a method for forming the same, and a surface acoustic wave resonator device, so as to improve the performance of the thin film SAW resonator.

[0007] To solve the above technical problems, the technical solution of the present invention provides a surface acoustic wave resonator, comprising: a substrate, the substrate comprising a piezoelectric layer; an interdigital transducer located on the piezoelectric layer, the interdigital transducer comprising: an interdigital electrode structure and a bus structure, the interdigital electrode structure comprising a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being alternately arranged in parallel along the surface of the substrate, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being arranged in a first direction, the first interdigital electrodes and the second interdigital electrodes being extended in a second direction, the first direction and the second direction being different, the bus structure comprising a first bus connected to the plurality of first interdigital electrodes and a second bus connected to the plurality of second interdigital electrodes, a first spacing region being provided between the plurality of second interdigital electrodes and the first bus, and a second spacing region being provided between the plurality of first interdigital electrodes and the second bus; and a blocking structure located within the substrate, the blocking structure and the interdigital transducer being located on both sides of the piezoelectric layer, the blocking structure being parallel to the first direction, and the blocking structure being located at least below the first spacing region.

[0008] Optionally, the blocking structure includes a first blocking portion, the first blocking portion is located below the first spacing area, the first blocking portion is parallel to the first bus, and the first bus is parallel to the first direction.

[0009] Optionally, a first distance is formed between the first blocking portion and the second interdigitated electrode in the second direction, and a second distance is formed between the first blocking portion and the first bus in the second direction, and the first distance is less than or equal to the second distance.

[0010] Optionally, the width of the first blocking portion in the second direction is taken from a first width set, wherein the first width set includes a first width and a second width, and the first width is smaller than the second width.

[0011] Optionally, the first spacing is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the interdigital transducer.

[0012] Optionally, the blocking structure further includes a second blocking portion, the second blocking portion is located below the second spacing area, the second blocking portion is parallel to the second bus, and the second bus is parallel to the first direction.

[0013] Optionally, the second blocking portion has a third distance from the first interdigitated electrode in the second direction, and the second blocking portion has a fourth distance from the second bus in the second direction, and the third distance is less than or equal to the fourth distance.

[0014] Optionally, the width of the second blocking portion in the second direction is taken from a second width set, wherein the second width set includes a third width and a fourth width, and the third width is smaller than the fourth width.

[0015] Optionally, the third spacing is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the interdigital transducer.

[0016] Optionally, the substrate further includes: a base and a dielectric structure located on the base, the piezoelectric layer is located on the dielectric structure, and the blocking structure is located within the dielectric structure.

[0017] Optionally, the direction perpendicular to the substrate surface is a third direction, and the third direction is orthogonal to the first direction and the second direction respectively; the blocking structure has a fifth spacing between the piezoelectric layer in the third direction, and the blocking structure has a sixth spacing between the substrate in the third direction, and the fifth spacing is less than or equal to the sixth spacing.

[0018] Optionally, the thickness of the blocking structure in the third direction is taken from a thickness set, where the thickness set includes a first thickness and a second thickness, and the first thickness is smaller than the second thickness.

[0019] Optionally, it also includes: a load structure located in the substrate, the load structure and the interdigital transducer are located on both sides of the piezoelectric layer, the load structure is located in the dielectric structure below the interdigital electrode structure, the load structure includes a first load part and a second load part, the projection of the first load part on the substrate is adjacent to the projection of the first spacer area on the substrate, and the projection of the second load part on the substrate is adjacent to the projection of the second spacer area on the substrate.

[0020] Optionally, the first load portion is parallel to the first direction, and the first load portion is located below the end of the second interdigitated electrode and below the first interdigitated electrode adjacent to the end of the second interdigitated electrode along the first direction; the second load portion is parallel to the first direction, and the second load portion is located below the end of the first interdigitated electrode and below the second interdigitated electrode adjacent to the end of the first interdigitated electrode along the first direction.

[0021] Optionally, along the third direction, a distance between the load structure and the piezoelectric layer is greater than a distance between the blocking structure and the piezoelectric layer.

[0022] Optionally, along the third direction, the distance between the load structure and the piezoelectric layer is equal to the distance between the blocking structure and the piezoelectric layer.

[0023] Optionally, the first load section includes a plurality of first load sub-sections arranged along the first direction, the first load sub-sections being located below the end of the second interdigitated electrode and below the first interdigitated electrode adjacent to the end of the second interdigitated electrode along the first direction; the second load section includes a plurality of second load sub-sections arranged along the first direction, the second load sub-sections being located below the end of the first interdigitated electrode and below the second interdigitated electrode adjacent to the end of the first interdigitated electrode along the first direction.

[0024] Optionally, the material of the blocking structure is the same as that of the load structure.

[0025] Optionally, the thickness of the piezoelectric layer ranges from 0.05λ to 1.5λ, where λ is the wavelength of the acoustic wave excited by the interdigital transducer.

[0026] Correspondingly, the technical solution of the present invention further provides a surface acoustic wave filtering device, comprising: a plurality of surface acoustic wave resonators.

[0027] Correspondingly, the technical solution of the present invention also provides a method for forming a surface acoustic wave resonator, comprising: forming a substrate, the substrate comprising a piezoelectric layer and a blocking structure, the blocking structure being parallel to a first direction; forming an interdigital transducer on the piezoelectric layer, the interdigital transducer comprising: an interdigital electrode structure and a bus structure, the interdigital electrode structure comprising a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being alternately arranged in parallel along the surface of the substrate, the arrangement direction of the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being a first direction, the extension direction of the first interdigital electrodes and the second interdigital electrodes being a second direction, the first direction and the second direction being different, the bus structure comprising a first bus connected to the plurality of first interdigital electrodes and a second bus connected to the plurality of second interdigital electrodes, a first spacing region being provided between the plurality of second interdigital electrodes and the first bus, a second spacing region being provided between the plurality of first interdigital electrodes and the second bus, the blocking structure and the interdigital transducer being located on both sides of the piezoelectric layer, and the blocking structure being located at least below the first spacing region.

[0028] Optionally, the substrate includes: a base and a dielectric structure located on the base; forming the substrate includes: providing a base; forming a dielectric structure and a blocking structure located within the dielectric structure on the base; providing a sacrificial substrate; forming a piezoelectric layer on the sacrificial substrate; bonding the piezoelectric layer to the dielectric structure; and removing the sacrificial substrate after bonding the piezoelectric layer to the dielectric structure.

[0029] Optionally, it also includes: forming a load structure located in the dielectric structure, the load structure and the interdigital transducer are located on both sides of the piezoelectric layer, the load structure is located in the dielectric structure below the interdigital electrode structure, the load structure includes a first load part and a second load part, the projection of the first load part on the substrate is adjacent to the projection of the first spacer area on the substrate, and the projection of the second load part on the substrate is adjacent to the projection of the second spacer area on the substrate.

[0030] Optionally, the distance between the load structure and the piezoelectric layer is equal to the distance between the blocking structure and the piezoelectric layer; and the blocking structure and the load structure are formed synchronously.

[0031] Optionally, the method for forming the dielectric structure, the blocking structure and the load structure includes: forming a first dielectric layer on a substrate; forming a load structure on the first dielectric layer; forming a second dielectric layer on the load structure and the first dielectric layer, the second dielectric layer covering the load structure; forming a blocking structure on the second dielectric layer; forming a third dielectric layer on the blocking structure, the third dielectric layer covering the blocking structure, and the dielectric structure includes the first dielectric layer, the second dielectric layer and the third dielectric layer.

[0032] Optionally, the distance between the load structure and the piezoelectric layer is greater than the distance between the blocking structure and the piezoelectric layer; and the blocking structure and the load structure are formed in different steps.

[0033] Optionally, the method for forming the dielectric structure, the blocking structure and the load structure includes: forming a first dielectric layer on a substrate; forming a load structure on the first dielectric layer; forming a second dielectric layer on the first dielectric layer, the second dielectric layer covering the load structure; forming a blocking structure on the second dielectric layer; forming a third dielectric layer on the second dielectric layer, the third dielectric layer covering the blocking structure, the dielectric structure including the first dielectric layer, the second dielectric layer and the third dielectric layer.

[0034] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0035] In the surface acoustic wave resonator of the present invention, the blocking structure is located at least below the first spacer area, and the area between the first spacer area and the second spacer area constitutes a resonance area. Therefore, before the transverse sound waves are significantly scattered, the blocking structure reflects the transverse sound waves back to the resonance area, thereby limiting the leakage of sound energy and improving the Q value.

[0036] Furthermore, the first barrier has a first spacing in the second direction from the second interdigitated electrode, and a second spacing in the second direction from the first bus, the first spacing being less than or equal to the second spacing, and the width of the first barrier in the second direction being selected from a first width set, the first width set including a first width and a second width, the first width being less than the second width. As a result, the first barrier is closer to the resonance region between the first spacer and the second spacer, more effectively reflecting transverse acoustic waves back to the resonance region, limiting acoustic energy leakage, and improving the Q value. Furthermore, by adjusting the width of the first barrier in the second direction, the acoustic velocity satisfies the conditions for exciting an effective piston mode, suppressing high-order transverse modes, and more effectively limiting acoustic energy leakage.

[0037] Furthermore, the blocking structure has a fifth spacing from the piezoelectric layer in the third direction and a sixth spacing from the substrate in the third direction, the fifth spacing being less than or equal to the sixth spacing. The thickness of the blocking structure in the third direction is selected from a set of thicknesses, the set including a first thickness and a second thickness, the first thickness being less than the second thickness. As a result, the blocking structure is closer to the resonant region between the first and second spacing regions, more effectively reflecting transverse acoustic waves back to the resonant region, limiting acoustic energy leakage and improving the Q value. Furthermore, by adjusting the thickness of the blocking structure so that the acoustic velocity meets the conditions for exciting an effective piston mode, higher-order transverse modes are suppressed, and acoustic energy leakage can be more effectively limited.

[0038] Furthermore, the surface acoustic wave resonator also includes a load structure located in the substrate, and the load structure is located in the dielectric structure below the interdigitated electrode structure. The load structure and the blocking structure can synergistically excite the piston mode and suppress high-order transverse modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 is a schematic structural diagram of a surface acoustic wave resonator in one embodiment;

[0040] Figures 2 to 10 1 is a schematic structural diagram of a surface acoustic wave resonator forming process according to an embodiment of the present invention;

[0041] Figures 11 to 17 is a structural schematic diagram of a surface acoustic wave resonator forming process in another embodiment of the present invention;

[0042] Figure 18 is a schematic structural diagram of a surface acoustic wave resonator in another embodiment of the present invention;

[0043] Figure 19 FIG. 1 is a schematic structural diagram of a surface acoustic wave resonator in another embodiment of the present invention. DETAILED DESCRIPTION

[0044] As described in the background art, the performance of thin film SAW resonators needs to be continuously improved.

[0045] Figure 1 1 is a schematic structural diagram of a surface acoustic wave resonator in one embodiment.

[0046] Please refer to Figure 1 The surface acoustic wave resonator includes: a piezoelectric substrate 10; an interdigital transducer located on the piezoelectric substrate 10, and the interdigital transducer includes: a plurality of first interdigital electrodes 13 and a plurality of second interdigital electrodes 14 arranged alternately and in parallel along the surface of the piezoelectric substrate 10; a first bus 11 connected to the plurality of first interdigital electrodes 13; and a second bus 12 connected to the plurality of second interdigital electrodes 14.

[0047] The surface acoustic wave resonator has a first spacing region between the end of the first interdigital electrode 13 and the second bus 12, and a second spacing region between the end of the second interdigital electrode 14 and the first bus 11. Transverse acoustic waves will be scattered in the first spacing region and the second spacing region, resulting in acoustic energy leakage and reducing the Q value.

[0048] In order to solve the above problems, the technical solution of the present invention provides a surface acoustic wave resonator and a method for forming the same, and a surface acoustic wave resonator device, wherein the blocking structure is located at least below the first spacer area, and the area between the first spacer area and the second spacer area constitutes a resonance area, so that before the transverse sound wave is significantly scattered, the blocking structure reflects the transverse sound wave back to the resonance area, thereby limiting the leakage of sound energy and improving the Q value.

[0049] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0050] Figures 2 to 10 1 is a structural diagram of the process of forming a surface acoustic wave resonator in an embodiment of the present invention.

[0051] The process of forming a surface acoustic wave resonator includes: forming a substrate, the substrate including a piezoelectric layer and a blocking structure, the blocking structure being parallel to a first direction; forming an interdigital transducer on the piezoelectric layer, the interdigital transducer including: an interdigital electrode structure and a bus structure, the interdigital electrode structure including a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being alternately arranged in parallel along the surface of the substrate, the arrangement direction of the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being a first direction, the extension direction of the first interdigital electrodes and the second interdigital electrodes being a second direction, the first direction and the second direction being different, the bus structure including a first bus connected to the plurality of first interdigital electrodes and a second bus connected to the plurality of second interdigital electrodes, a first spacing area being provided between the plurality of second interdigital electrodes and the first bus, a second spacing area being provided between the plurality of first interdigital electrodes and the second bus, the blocking structure and the interdigital transducer being located on both sides of the piezoelectric layer, and the blocking structure being located at least below the first spacing area.

[0052] In this embodiment, the first direction and the second direction are perpendicular.

[0053] In this embodiment, the substrate further includes: a base and a dielectric structure located on the base, the blocking structure is located in the dielectric structure, and the piezoelectric layer is located on the dielectric structure.

[0054] In this embodiment, the dielectric structure includes a first dielectric layer and a second dielectric layer located on the first dielectric layer, the blocking structure is located on the first dielectric layer, the top surface of the second dielectric layer is higher than the top surface of the blocking structure, and the piezoelectric layer is located on the second dielectric layer.

[0055] The formation process of the substrate can be found in Figures 2 to 6 .

[0056] Please refer to Figure 2 and Figure 3 , Figure 2 for Figure 3 A top view of Figure 3 for Figure 2 The schematic structural diagram along the section line AA1 in FIG. 1 shows that forming the substrate includes: providing a base 100 ; forming a first dielectric layer 101 on the base 100 ; and forming a barrier structure on the first dielectric layer 101 .

[0057] In this embodiment, the blocking structure includes a first blocking portion 103 and a second blocking portion 102 . The first blocking portion 103 and the second blocking portion 102 are separate from each other. The first blocking portion 103 is parallel to the first direction X, and the second blocking portion 102 is parallel to the first direction X.

[0058] In other embodiments, the blocking structure may include only the first blocking portion or the second blocking portion.

[0059] The material of the barrier structure includes metal, and the metal includes one or more combinations of molybdenum, platinum, copper, aluminum, tungsten, cobalt, nickel and tantalum.

[0060] In this embodiment, the material of the barrier structure includes heavy metal materials such as molybdenum, platinum or tungsten.

[0061] The method for forming the blocking structure includes: forming a blocking material layer (not shown) on the first dielectric layer 101 ; patterning the blocking material layer until the surface of the first dielectric layer 101 is exposed, and forming the blocking structure on the first dielectric layer 101 .

[0062] The material of the first dielectric layer 101 includes a dielectric material, and the dielectric material includes one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbide nitride, and silicon oxycarbide nitride.

[0063] In this embodiment, the material of the first dielectric layer 101 includes silicon oxide.

[0064] The substrate 100 may be made of silicon, silicon carbide, sapphire, spinel, etc.

[0065] In this embodiment, the substrate 100 is made of silicon.

[0066] Please refer to Figure 4 Forming the substrate further includes: forming a second dielectric layer 104 on the first dielectric layer 101 and the blocking structure, the second dielectric layer 104 covering the blocking structure, and the top surface of the second dielectric layer 104 is higher than the top surface of the blocking structure.

[0067] The material of the second dielectric layer 104 includes a dielectric material, and the dielectric material includes one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbide nitride, and silicon oxycarbide nitride.

[0068] In this embodiment, the material of the second dielectric layer 104 includes silicon oxide.

[0069] The substrate includes: a base 100 and a dielectric structure located on the base 100 . The blocking structure is located in the dielectric structure. The dielectric structure includes a first dielectric layer 101 and a second dielectric layer 104 on the first dielectric layer 101 .

[0070] Please refer to Figure 5 , forming the substrate further includes: providing a sacrificial substrate 120 ; and forming a piezoelectric layer 130 on the sacrificial substrate 120 .

[0071] The thickness of the piezoelectric layer 130 ranges from 0.05λ to 1.5λ, where λ is the wavelength of the acoustic wave excited by the IDT.

[0072] In this embodiment, the thickness of the piezoelectric layer 130 is less than 0.5λ.

[0073] The material of the piezoelectric layer 130 includes lithium niobate (LiNbO 3 ) or lithium tantalate (LiTaO 3 ).

[0074] The sacrificial substrate 120 may be made of silicon, glass, quartz, or the like.

[0075] Please refer to Figure 6 , forming the substrate further includes: bonding the piezoelectric layer 130 to the dielectric structure; after bonding the piezoelectric layer 130 to the dielectric structure, removing the sacrificial substrate 120.

[0076] The method for bonding the piezoelectric layer 130 to the dielectric structure includes: performing a planarization process on the surface of the dielectric structure; and bonding the dielectric structure to the piezoelectric layer 130 after the planarization process on the surface of the dielectric structure.

[0077] After the sacrificial substrate 120 is removed, the surface of the piezoelectric layer 130 is exposed.

[0078] The substrate further includes the piezoelectric layer 130 , and the piezoelectric layer 130 is located on the second dielectric layer 104 .

[0079] Please refer to Figures 7 to 10 , Figure 7 for Figure 8 、 Figure 9 and Figure 10 A top view of Figure 8 for Figure 7 The structural diagram along the section line AA1 is shown in the figure. Figure 9 for Figure 7 Schematic diagram of the structure along the section line CC1, Figure 10 for Figure 7 In the structural diagram along the section line BB1 , an interdigital transducer is formed on the exposed surface of the piezoelectric layer 130 .

[0080] The interdigital transducer includes: an interdigital electrode structure and a bus structure, wherein the interdigital electrode structure includes a plurality of first interdigital electrodes 107 and a plurality of second interdigital electrodes 108, wherein the plurality of first interdigital electrodes 107 and the plurality of second interdigital electrodes 108 are alternately arranged in parallel along the surface of the substrate, wherein the arrangement direction of the plurality of first interdigital electrodes 107 and the plurality of second interdigital electrodes 108 is a first direction X, and the extension direction of the first interdigital electrodes 107 and the second interdigital electrodes 108 is a second direction Y, wherein the first direction X and the second direction Y are perpendicular, and the bus structure includes a first bus 106 connected to the plurality of first interdigital electrodes 107 and a second bus 105 connected to the plurality of second interdigital electrodes 108, wherein a first spacing region I is provided between the plurality of second interdigital electrodes 108 and the first bus 106, and a second spacing region II is provided between the plurality of first interdigital electrodes 107 and the second bus 105, and the blocking structure and the interdigital transducer are located on both sides of the piezoelectric layer 130, and the blocking structure is located at least below the first spacing region I.

[0081] The region between the first spacing region I and the second spacing region II constitutes a resonance region. In the resonance region, a plurality of the first interdigital electrodes 107 and a plurality of the second interdigital electrodes 108 overlap with each other.

[0082] In this embodiment, the first blocking portion 103 is located below the first spacer I. The first blocking portion 103 is parallel to the first bus bar 106 . The first bus bar 106 is parallel to the first direction X.

[0083] Please continue to refer to Figure 8 In this embodiment, the first blocking portion 103 has a first spacing d1 with the second interdigitated electrode 108 in the second direction Y, and the first blocking portion 103 has a second spacing d2 with the first bus 106 in the second direction Y, and the first spacing d1 is less than or equal to the second spacing d2.

[0084] In this embodiment, the width of the first blocking portion 103 in the second direction Y is selected from a first width set, wherein the first width set includes a first width and a second width, and the first width is smaller than the second width.

[0085] The first spacing d1 is less than or equal to the second spacing d2, so that the first blocking portion 103 is closer to the resonance zone between the first spacer area I and the second spacer area II, which can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the width of the first blocking portion 103 in the second direction Y, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0086] The first distance d1 is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the IDT.

[0087] In this embodiment, the first distance d1 is less than or equal to 0.2λ.

[0088] In this embodiment, the width of the first blocking portion 103 in the second direction Y is smaller than the width of the first spacing region I in the second direction Y, so as to avoid the first blocking portion 103 introducing additional significant noise.

[0089] In this embodiment, the second blocking portion 102 is located below the second spacer II. The second blocking portion 102 is parallel to the second bus bar 105 . The second bus bar 105 is parallel to the first direction X.

[0090] Please continue to refer to Figure 9 In this embodiment, the second blocking portion 102 has a third distance d3 from the first interdigitated electrode 107 in the second direction Y, and the second blocking portion 102 has a fourth distance d4 from the second bus 105 in the second direction Y, and the third distance d3 is less than or equal to the fourth distance d4.

[0091] In this embodiment, the width of the second blocking portion 102 in the second direction Y is selected from a second width set, wherein the second width set includes a third width and a fourth width, and the third width is smaller than the fourth width.

[0092] The third spacing d3 is less than or equal to the fourth spacing d4, so that the second blocking portion 102 is closer to the resonance zone between the first spacer area I and the second spacer area II, which can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the width of the second blocking portion 102 in the second direction Y, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0093] The third distance d3 is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the IDT.

[0094] In this embodiment, the third distance d3 is less than or equal to 0.2λ.

[0095] In this embodiment, the width of the second blocking portion 102 in the second direction Y is smaller than the width of the second spacing region II in the second direction Y, so as to prevent the second blocking portion 102 from introducing additional significant noise.

[0096] In this embodiment, the direction perpendicular to the substrate surface is the third direction Z, and the third direction Z is orthogonal to the first direction X and the second direction Y respectively; the blocking structure has a fifth distance d5 from the piezoelectric layer 130 in the third direction Z, and the blocking structure has a sixth distance d6 from the substrate 100 in the third direction Z, and the fifth distance d5 is less than or equal to the sixth distance d6.

[0097] In this embodiment, the thickness of the blocking structure in the third direction Z is selected from a thickness set, where the thickness set includes a first thickness and a second thickness, and the first thickness is smaller than the second thickness.

[0098] The fifth spacing d5 is less than or equal to the sixth spacing d6, so that the blocking structure is closer to the resonance zone between the first spacing zone I and the second spacing zone II, and can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the thickness of the blocking structure, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0099] In this embodiment, the blocking structure has a sixth distance d6 between it and the substrate 100 in the third direction Z, and the sixth distance d6 is the thickness of the first dielectric layer 101; the blocking structure has a fifth distance d5 between it and the piezoelectric layer 130 in the third direction Z, and the fifth distance d5 is the thickness of the second dielectric layer 104 above the blocking structure.

[0100] In this embodiment, the interdigital electrode structure and the bus structure are made of the same material.

[0101] The interdigital electrode structure and the bus structure include one or more metal layers, and the materials of the multiple metal layers may be the same or different.

[0102] The material of the metal layer includes: one or more combinations of copper, aluminum, gold, titanium and chromium.

[0103] In other embodiments, the film layer structures and material types of the interdigitated electrode structure and the bus structure may be different.

[0104] In this embodiment, the interdigitated electrode structure and the bus structure are formed simultaneously, and the method for forming the interdigitated electrode structure and the bus structure includes: forming a metal material layer (not shown) on the piezoelectric layer 130; patterning the metal material layer until the surface of the piezoelectric layer 130 is exposed, and forming the interdigitated electrode structure and the bus structure on the piezoelectric layer 130.

[0105] At this point, a surface acoustic wave resonator is formed, in which the area between the first spacer region I and the second spacer region II constitutes a resonance region, and the blocking structure is located at least below the first spacer region I, so that before the transverse sound wave is significantly scattered, the blocking structure reflects the transverse sound wave back to the resonance region, thereby limiting the leakage of sound energy and improving the Q value.

[0106] Accordingly, the embodiment of the present invention further provides a surface acoustic wave resonator, please continue to refer to Figures 7 to 10 , the surface acoustic wave resonator comprises:

[0107] a substrate comprising a piezoelectric layer 130;

[0108] An interdigital transducer located on the piezoelectric layer 130, the interdigital transducer comprising: an interdigital electrode structure and a bus structure, the interdigital electrode structure comprising a plurality of first interdigital electrodes 107 and a plurality of second interdigital electrodes 108, the plurality of first interdigital electrodes 107 and the plurality of second interdigital electrodes 108 being alternately arranged in parallel along the surface of the substrate, the plurality of first interdigital electrodes 107 and the plurality of second interdigital electrodes 108 being arranged in a first direction X, the first interdigital electrodes 107 and the second interdigital electrodes 108 extending in a second direction Y, the first direction X and the second direction Y being different, the bus structure comprising a first bus 106 connected to the plurality of first interdigital electrodes 107 and a second bus 105 connected to the plurality of second interdigital electrodes 108, a first spacer I being defined between the plurality of second interdigital electrodes 108 and the first bus 106, and a second spacer II being defined between the plurality of first interdigital electrodes 107 and the second bus 105;

[0109] The blocking structure is located in the substrate. The blocking structure and the interdigital transducer are located on both sides of the piezoelectric layer 130. The blocking structure is parallel to the first direction X. The blocking structure is located at least below the first spacing region I.

[0110] In this embodiment, the blocking structure includes a first blocking portion 103 , the first blocking portion 103 is located below the first spacer I, the first blocking portion 103 is parallel to the first bus 106 , and the first bus 106 is parallel to the first direction X.

[0111] In this embodiment, a first distance d1 is formed between the first blocking portion 103 and the second interdigitated electrode 108 in the second direction Y, and a second distance d2 is formed between the first blocking portion 103 and the first bus 106 in the second direction Y. The first distance d1 is less than or equal to the second distance d2.

[0112] In this embodiment, the width of the first blocking portion 103 in the second direction Y is selected from a first width set, wherein the first width set includes a first width and a second width, and the first width is smaller than the second width.

[0113] In this embodiment, the first distance d1 is less than or equal to 0.5λ, where λ is the wavelength of the acoustic wave excited by the IDT.

[0114] In this embodiment, the blocking structure further includes a second blocking portion 102 . The second blocking portion 102 is located below the second spacer II. The second blocking portion 102 is parallel to the second bus bar 105 . The second bus bar 105 is parallel to the first direction X.

[0115] In this embodiment, the second blocking portion 102 has a third distance d3 from the first interdigitated electrode 107 in the second direction Y, and the second blocking portion 102 has a fourth distance d4 from the second bus 105 in the second direction Y, and the third distance d3 is less than or equal to the fourth distance d4.

[0116] In this embodiment, the width of the second blocking portion 102 in the second direction Y is selected from a second width set, wherein the second width set includes a third width and a fourth width, and the third width is smaller than the fourth width.

[0117] In this embodiment, the third distance d3 is less than or equal to 0.5λ, where λ is the wavelength of the acoustic wave excited by the IDT.

[0118] In this embodiment, the substrate further includes: a base 100 and a dielectric structure located on the base 100 , the piezoelectric layer 130 is located on the dielectric structure, and the blocking structure is located within the dielectric structure.

[0119] In this embodiment, the direction perpendicular to the substrate surface is the third direction Z, and the third direction Z is orthogonal to the first direction X and the second direction Y respectively; the blocking structure has a fifth distance d5 from the piezoelectric layer 130 in the third direction Z, and the blocking structure has a sixth distance d6 from the substrate 100 in the third direction Z, and the fifth distance d5 is less than or equal to the sixth distance d6.

[0120] In this embodiment, the thickness of the blocking structure in the third direction Z is selected from a thickness set, where the thickness set includes a first thickness and a second thickness, and the first thickness is smaller than the second thickness.

[0121] The blocking structure is located at least below the first spacer area I, and the area between the first spacer area I and the second spacer area II constitutes a resonance area, so that before the transverse sound waves are significantly scattered, the blocking structure reflects the transverse sound waves back to the resonance area, thereby limiting the leakage of sound energy and improving the Q value.

[0122] Accordingly, an embodiment of the present invention further provides a surface acoustic wave filter device, the surface acoustic wave filter device comprising several Figures 2 to 10 A surface acoustic wave resonator is formed by the method.

[0123] Figures 11 to 17 It is a structural schematic diagram of the process of forming a surface acoustic wave resonator in another embodiment of the present invention.

[0124] This embodiment is different from the above embodiment ( Figure 10 ) is that: the substrate also includes a load structure, the load structure and the interdigital transducer are located on both sides of the piezoelectric layer, the load structure is located in the dielectric structure below the interdigital electrode structure, the load structure includes a first load part and a second load part, the projection of the first load part on the substrate is adjacent to the projection of the first spacer area on the substrate, and the projection of the second load part on the substrate is adjacent to the projection of the second spacer area on the substrate.

[0125] The formation process of the substrate can be found in Figures 11 to 13 .

[0126] Please refer to Figure 11 and Figure 12 , Figure 11 for Figure 12 The top view of the dielectric structure is omitted. Figure 12 for Figure 11 The cross-sectional structural diagram along the section line AA1 in FIG. 2 shows that forming the substrate includes: providing a base 200 ; forming a dielectric structure 204 and a blocking structure and a load structure located in the dielectric structure 204 on the base 200 .

[0127] In this embodiment, the blocking structure includes a first blocking portion 203 and a second blocking portion 202 . The first blocking portion 203 and the second blocking portion 202 are separate from each other. The first blocking portion 203 is parallel to the first direction X, and the second blocking portion 202 is parallel to the first direction X.

[0128] In other embodiments, the blocking structure may include only the first blocking portion or the second blocking portion.

[0129] The material of the barrier structure includes metal, and the metal includes one or more combinations of molybdenum, platinum, copper, aluminum, tungsten, cobalt, nickel and tantalum.

[0130] In this embodiment, the material of the barrier structure includes heavy metal materials such as molybdenum, platinum or tungsten.

[0131] The material of the load structure includes metal, and the metal includes one or more combinations of copper, aluminum, tungsten, cobalt, nickel and tantalum.

[0132] In this embodiment, the material of the load structure includes heavy metal materials such as molybdenum, platinum or tungsten.

[0133] In this embodiment, the material of the blocking structure is the same as that of the supporting structure.

[0134] In other embodiments, the material of the blocking structure can be different from the material of the supporting structure.

[0135] In this embodiment, the load structure includes a first load portion 206 and a second load portion 205, the first load portion 206 is parallel to the first direction X, the second load portion 205 is parallel to the first direction X, the first load portion 206 is adjacent to the first blocking portion 203 and has a spacing therebetween, and the second load portion 205 is adjacent to the second blocking portion 202 and has a spacing therebetween.

[0136] In this embodiment, the substrate includes a base 200 and a dielectric structure 204 located on the base 200 .

[0137] The substrate 200 may be made of silicon, silicon carbide, sapphire, spinel, etc.

[0138] In this embodiment, the substrate 200 is made of silicon.

[0139] The material of the dielectric structure 204 includes a dielectric material, and the dielectric material includes one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbide nitride, and silicon oxycarbide nitride.

[0140] In this embodiment, the material of the dielectric structure 204 includes silicon oxide.

[0141] Please continue to refer to Figure 12 , a direction perpendicular to the substrate surface is a third direction Z, and the third direction Z is orthogonal to the first direction X and the second direction Y. In this embodiment, along the third direction Z, a distance D1 is defined between the blocking structure and the upper surface of the dielectric structure 204, and a distance D2 is defined between the blocking structure and the base 200, where the distance D1 is less than or equal to the distance D2.

[0142] In this embodiment, along the third direction Z, the distance D3 between the load structure and the upper surface of the dielectric structure 204 is equal to the distance D1 between the blocking structure and the upper surface of the dielectric structure 204 .

[0143] In this embodiment, along the third direction Z, the distance D4 between the load structure and the substrate 200 is equal to the distance D2 between the blocking structure and the substrate 200 .

[0144] In this embodiment, the blocking structure and the loading structure are formed synchronously.

[0145] The method for forming the dielectric structure 204, the blocking structure, and the load structure includes: forming a first dielectric layer on the substrate 200; forming a metal material layer on the first dielectric layer; patterning the metal material layer until the surface of the first dielectric layer is exposed, and forming the blocking structure and the load structure on the first dielectric layer; forming a second dielectric layer on the first dielectric layer, the second dielectric layer covering the blocking structure and the load structure, wherein the dielectric structure 204 includes the first dielectric layer and the second dielectric layer.

[0146] Please refer to Figure 13 , forming the substrate further includes: providing a sacrificial substrate; forming a piezoelectric layer 230 on the sacrificial substrate; bonding the piezoelectric layer 230 to the dielectric structure 204; after bonding the piezoelectric layer 230 to the dielectric structure 204, removing the sacrificial substrate.

[0147] The thickness of the piezoelectric layer 230 ranges from 0.05λ to 1.5λ, where λ is the wavelength of the acoustic wave excited by the IDT.

[0148] In this embodiment, the thickness of the piezoelectric layer 130 is less than 0.5λ.

[0149] The material of the piezoelectric layer 230 includes lithium niobate (LiNbO 3 ) or lithium tantalate (LiTaO 3 ).

[0150] The material of the sacrificial substrate includes silicon, glass or quartz.

[0151] The substrate further includes the piezoelectric layer 230 , and the piezoelectric layer 230 is located on the dielectric structure 204 .

[0152] Please refer to Figures 14 to 17 , Figure 14 for Figure 15 、 Figure 16 and Figure 17 A top view of Figure 15 for Figure 14 The structural diagram along the section line AA1 is shown in the figure. Figure 16 for Figure 14 Schematic diagram of the structure along the section line CC1, Figure 17 for Figure 14In the structural diagram along the section line BB1 , an interdigital transducer is formed on the exposed surface of the piezoelectric layer 230 .

[0153] The interdigital transducer includes: an interdigital electrode structure and a bus structure, wherein the interdigital electrode structure includes a plurality of first interdigital electrodes 207 and a plurality of second interdigital electrodes 208, wherein the plurality of first interdigital electrodes 207 and the plurality of second interdigital electrodes 208 are alternately arranged in parallel along the surface of the substrate, wherein the arrangement direction of the plurality of first interdigital electrodes 207 and the plurality of second interdigital electrodes 208 is a first direction X, and the extension direction of the first interdigital electrodes 207 and the second interdigital electrodes 208 is a second direction Y, wherein the first direction X and the second direction Y are perpendicular, and the bus structure includes a first bus 210 connected to the plurality of first interdigital electrodes 207 and a second bus 209 connected to the plurality of second interdigital electrodes 208, wherein a first spacing region I is provided between the plurality of second interdigital electrodes 208 and the first bus 210, and a second spacing region II is provided between the plurality of first interdigital electrodes 207 and the second bus 209, and the blocking structure and the interdigital transducer are located on both sides of the piezoelectric layer 230, and the blocking structure is located at least below the first spacing region I.

[0154] The region between the first spacing region I and the second spacing region II constitutes a resonance region. In the resonance region, a plurality of the first interdigital electrodes 207 and a plurality of the second interdigital electrodes 208 overlap with each other.

[0155] The blocking structure is at least located below the first spacing region I, so that before the transverse sound waves are significantly scattered, the blocking structure reflects the transverse sound waves back to the resonance region, thereby limiting the leakage of sound energy and improving the Q value.

[0156] In this embodiment, the first blocking portion 203 is located below the first spacer I. The first blocking portion 203 is parallel to the first bus bar 210 . The first bus bar 210 is parallel to the first direction X.

[0157] Please continue to refer to Figure 15 In this embodiment, the first blocking portion 203 has a first distance d1 from the second interdigitated electrode 208 in the second direction Y, and the first blocking portion 203 has a second distance d2 from the first bus 210 in the second direction Y, and the first distance d1 is less than or equal to the second distance d2.

[0158] In this embodiment, the width of the first blocking portion 203 in the second direction Y is selected from a first width set, wherein the first width set includes a first width and a second width, and the first width is smaller than the second width.

[0159] The first spacing d1 is less than or equal to the second spacing d2, so that the first blocking portion 203 is closer to the resonance zone between the first spacer area I and the second spacer area II, which can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the width of the first blocking portion 203 in the second direction Y, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0160] The first distance d1 is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the IDT.

[0161] In this embodiment, the first distance d1 is less than or equal to 0.2λ.

[0162] In this embodiment, the width of the first blocking portion 203 in the second direction Y is smaller than the width of the first spacing region I in the second direction Y.

[0163] In this embodiment, the second blocking portion 202 is located below the second spacer II. The second blocking portion 202 is parallel to the second bus bar 209 . The second bus bar 209 is parallel to the first direction X.

[0164] Please continue to refer to Figure 16 In this embodiment, the second blocking portion 202 has a third distance d3 from the first interdigitated electrode 207 in the second direction Y, and the second blocking portion 202 has a fourth distance d4 from the second bus 209 in the second direction Y, and the third distance d3 is less than or equal to the fourth distance d4.

[0165] In this embodiment, the width of the second blocking portion 202 in the second direction Y is selected from a second width set, wherein the second width set includes a third width and a fourth width, and the third width is smaller than the fourth width.

[0166] The third spacing d3 is less than or equal to the fourth spacing d4, so that the second blocking portion 202 is closer to the resonance zone between the first spacer area I and the second spacer area II, which can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the width of the second blocking portion 202 in the second direction Y, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0167] The third distance d3 is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the IDT.

[0168] In this embodiment, the third distance d3 is less than or equal to 0.2λ.

[0169] In this embodiment, the width of the second blocking portion 202 in the second direction Y is smaller than the width of the second spacing region II in the second direction Y.

[0170] In this embodiment, along the third direction Z, the distance between the load structure and the piezoelectric layer 230 (i.e., the distance D3 between the load structure and the upper surface of the dielectric structure 204) is equal to the distance between the blocking structure and the piezoelectric layer 230 (i.e., the distance D1 between the blocking structure and the upper surface of the dielectric structure 204) (refer to Figure 12 ).

[0171] In other embodiments, along the third direction, a distance between the load structure and the piezoelectric layer is greater than a distance between the blocking structure and the piezoelectric layer.

[0172] In this embodiment, along the third direction Z, the distance between the blocking structure and the piezoelectric layer 230 (ie, the distance D1 between the blocking structure and the upper surface of the dielectric structure 204 ) is less than or equal to the distance D2 between the blocking structure and the substrate 200 .

[0173] In this embodiment, the thickness of the blocking structure in the third direction Z is selected from a thickness set, where the thickness set includes a first thickness and a second thickness, and the first thickness is smaller than the second thickness.

[0174] The spacing D1 is less than or equal to the spacing D2, so that the blocking structure is closer to the resonance zone between the first spacer area I and the second spacer area II, which can more effectively reflect the transverse sound waves back to the resonance zone, limit the leakage of sound energy, and improve the Q value; further, by adjusting the thickness of the blocking structure, the sound speed meets the conditions for exciting the effective piston mode, suppressing high-order transverse modes, and more efficiently limiting the leakage of sound energy.

[0175] In this embodiment, the first load portion 206 is parallel to the first direction X, and is located below the end of the second interdigital electrode 208 and below the first interdigital electrode 207 adjacent to the end of the second interdigital electrode 208 along the first direction X; the second load portion 205 is parallel to the first direction X, and is located below the end of the first interdigital electrode 207 and below the second interdigital electrode 208 adjacent to the end of the first interdigital electrode 207 along the first direction X.

[0176] The load structure is located in the dielectric structure below the interdigital electrode structure. The load structure and the blocking structure can cooperate to excite the piston mode and suppress the high-order transverse mode.

[0177] In this embodiment, the interdigital electrode structure and the bus structure are made of the same material.

[0178] The interdigital electrode structure and the bus structure include one or more metal layers, and the materials of the multiple metal layers may be the same or different.

[0179] The material of the metal layer includes: one or more combinations of copper, aluminum, gold, titanium and chromium.

[0180] In other embodiments, the film layer structures and material types of the interdigitated electrode structure and the bus structure may be different.

[0181] Accordingly, the embodiment of the present invention further provides a surface acoustic wave resonator, please continue to refer to Figures 14 to 17 , the surface acoustic wave resonator comprises:

[0182] a substrate comprising a piezoelectric layer 230;

[0183] An interdigital transducer located on the piezoelectric layer 230, the interdigital transducer comprising: an interdigital electrode structure and a bus structure, the interdigital electrode structure comprising a plurality of first interdigital electrodes 207 and a plurality of second interdigital electrodes 208, the plurality of first interdigital electrodes 207 and the plurality of second interdigital electrodes 208 being alternately arranged in parallel along the surface of the substrate, the plurality of first interdigital electrodes 207 and the plurality of second interdigital electrodes 208 being arranged in a first direction X, the first interdigital electrodes 207 and the second interdigital electrodes 208 extending in a second direction Y, the first direction X and the second direction Y being perpendicular, the bus structure comprising a first bus 210 connected to the plurality of first interdigital electrodes 207 and a second bus 209 connected to the plurality of second interdigital electrodes 208, a first spacer I being defined between the plurality of second interdigital electrodes 208 and the first bus 210, and a second spacer II being defined between the plurality of first interdigital electrodes 207 and the second bus 209;

[0184] a blocking structure located in the substrate, the blocking structure being parallel to the first direction X, the blocking structure and the interdigital transducer being located on both sides of the piezoelectric layer 230, and the blocking structure being located at least below the first spacer region I;

[0185] The substrate further includes: a base 200 and a dielectric structure 204 located on the base 200, the piezoelectric layer 230 is located on the dielectric structure 204, and the blocking structure is located within the dielectric structure 204;

[0186] A load structure is located in the substrate, and the load structure is located in the dielectric structure 204 below the interdigital electrode structure. The load structure and the interdigital transducer are located on both sides of the piezoelectric layer 230. The load structure includes a first load part 206 and a second load part 205. The projection of the first load part 206 on the substrate 200 is adjacent to the projection of the first spacer area I on the substrate 200, and the projection of the second load part 205 on the substrate 200 is adjacent to the projection of the second spacer area II on the substrate 200.

[0187] In this embodiment, the first load portion 206 is parallel to the first direction X, and the first load portion 206 is located below the end of the second interdigital electrode 208 and below the first interdigital electrode 207 adjacent to the end of the second interdigital electrode 208 along the first direction X; the second load portion 205 is parallel to the first direction, and the second load portion 205 is located below the end of the first interdigital electrode 207 and below the second interdigital electrode 208 adjacent to the end of the first interdigital electrode 207 along the first direction X.

[0188] In this embodiment, along the third direction Z, the distance between the blocking structure and the piezoelectric layer 230 (ie, the distance D1 between the blocking structure and the upper surface of the dielectric structure 204 ) is less than or equal to the distance D2 between the blocking structure and the substrate 200 .

[0189] In this embodiment, along the third direction Z, the distance between the load structure and the piezoelectric layer 230 is equal to the distance between the blocking structure and the piezoelectric layer 230 .

[0190] In other embodiments, along the third direction, a distance between the load structure and the piezoelectric layer is greater than a distance between the blocking structure and the piezoelectric layer.

[0191] The blocking structure is located at least below the first spacer area I, and the area between the first spacer area I and the second spacer area II constitutes a resonance area, so that before the transverse sound wave is obviously scattered, the blocking structure reflects the transverse sound wave back to the resonance area, limits the leakage of sound energy, and improves the Q value; the load structure is located in the dielectric structure below the interdigitated electrode structure, and the load structure and the blocking structure can synergistically excite the piston mode and suppress high-order transverse modes.

[0192] Accordingly, an embodiment of the present invention further provides a surface acoustic wave filter device, the surface acoustic wave filter device comprising several Figures 11 to 17 A surface acoustic wave resonator is formed by the method.

[0193] Figure 18 FIG. 1 is a schematic structural diagram of a surface acoustic wave resonator in another embodiment of the present invention.

[0194] Please refer to Figure 18 , this embodiment is based on the above embodiment ( Figure 14 ), the surface acoustic wave resonator is further described based on the above embodiment, and the rest are the same as the above embodiment, except that, in this embodiment, the first load part includes a plurality of first load sub-parts 306 arranged along the first direction X, and the plurality of first load sub-parts 306 are separated from each other, and the second load part includes a plurality of second load sub-parts 305 arranged along the first direction X, and the plurality of second load sub-parts 305 are separated from each other.

[0195] The load structure and the blocking structure are located in the dielectric structure 204. The formation process of the dielectric structure 204, the load structure and the blocking structure can be found in Figure 11 and Figure 12 The text description content in will not be repeated here.

[0196] Next, a sacrificial substrate is provided; a piezoelectric layer is formed on the sacrificial substrate; the piezoelectric layer is bonded to the dielectric structure 204; after the piezoelectric layer is bonded to the dielectric structure 204, the sacrificial substrate is removed; after the sacrificial substrate is removed, an interdigital transducer is formed on the exposed surface of the piezoelectric layer.

[0197] For methods, processes and materials for forming piezoelectric layers and interdigital transducers, please refer to Figures 13 to 17 The corresponding text description content will not be repeated here.

[0198] Several first load sub-units 306 are respectively located under the end of the second interdigitated electrode and under the first interdigitated electrode adjacent to the end of the second interdigitated electrode along the first direction X; several second load sub-units 305 are respectively located under the end of the first interdigitated electrode and under the second interdigitated electrode adjacent to the end of the first interdigitated electrode along the first direction X.

[0199] That is, in this embodiment, the load structure is only located in the dielectric structure corresponding to the second interdigital electrodes and the first interdigital electrodes 207 .

[0200] Accordingly, an embodiment of the present invention further provides a surface acoustic wave filter device, the surface acoustic wave filter device comprising several Figure 18 A surface acoustic wave resonator is formed by the method.

[0201] Figure 19 FIG. 1 is a schematic structural diagram of a surface acoustic wave resonator in another embodiment of the present invention.

[0202] This embodiment is based on the above embodiment ( Figure 14), the surface acoustic wave resonator is further described based on the above embodiment, and the rest are the same as the above embodiment, except that: the distance between the load structure and the piezoelectric layer 430 is greater than the distance between the blocking structure and the piezoelectric layer 430.

[0203] Please refer to Figure 19 The blocking structure includes: a first blocking portion 403 located below the first spacing area and a second blocking portion 402 located below the second spacing area; the load structure is located in the dielectric structure 404 below the interdigitated electrode structure, and the load structure includes a first load portion 406 and a second load portion 405, the projection of the first load portion 406 on the substrate 200 is adjacent to the projection of the first spacing area on the substrate 200, and the projection of the second load portion 405 on the substrate 200 is adjacent to the projection of the second spacing area on the substrate 200.

[0204] In this embodiment, the blocking structure is close to the piezoelectric layer 430 , and the loading structure is close to the substrate 200 .

[0205] In this embodiment, along the third direction Z, the distance D3 between the load structure and the piezoelectric layer 430 is greater than the distance D1 between the blocking structure and the piezoelectric layer 430 .

[0206] In this embodiment, along the third direction Z, the distance D4 between the load structure and the substrate 200 is smaller than the distance D2 between the blocking structure and the substrate 200 .

[0207] In this embodiment, the load structure and the blocking structure are staggered in the second direction Y, that is, the projections of the first blocking portion 403 and the first load portion 406 in the second direction Y do not overlap, and the projections of the second blocking portion 402 and the second load portion 405 in the second direction Y do not overlap.

[0208] In this embodiment, the load structure and the blocking structure are formed based on different steps. The formation process of the load structure and the blocking structure includes: forming a first dielectric layer on the substrate 200; forming a load structure on the first dielectric layer; forming a second dielectric layer on the load structure and the first dielectric layer, the second dielectric layer covering the load structure; forming a blocking structure on the second dielectric layer; forming a third dielectric layer on the second dielectric layer, the third dielectric layer covering the blocking structure. The dielectric structure 404 includes the first dielectric layer, the second dielectric layer, and the third dielectric layer.

[0209] In this embodiment, the supporting structure and the blocking structure are made of the same material.

[0210] In other embodiments, the supporting structure and the barrier structure are made of different materials.

[0211] Next, a sacrificial substrate is provided; a piezoelectric layer 430 is formed on the sacrificial substrate; the piezoelectric layer 430 is bonded to the dielectric structure 404; after the piezoelectric layer 430 is bonded to the dielectric structure 404, the sacrificial substrate is removed; after the sacrificial substrate is removed, an interdigital transducer is formed on the exposed surface of the piezoelectric layer 430.

[0212] The method, process and materials for forming the piezoelectric layer 430 and the interdigital transducer are described in detail in Figures 13 to 17 The corresponding text description content will not be repeated here.

[0213] The blocking structure is located at least below the first spacer area, and the area between the first spacer area and the second spacer area constitutes a resonance area, so that before the transverse sound wave is significantly scattered, the blocking structure reflects the transverse sound wave back to the resonance area, limits the leakage of sound energy, and improves the Q value; the load structure is located in the dielectric structure below the interdigitated electrode structure, and the load structure and the blocking structure can cooperate to excite the piston mode and suppress high-order transverse modes.

[0214] Accordingly, an embodiment of the present invention further provides a surface acoustic wave filter device, the surface acoustic wave filter device comprising several Figure 19 A surface acoustic wave resonator is formed by the method.

[0215] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A surface acoustic wave resonator, characterized in that: include: a substrate comprising a piezoelectric layer; An interdigital transducer located on a piezoelectric layer, the interdigital transducer comprising: an interdigital electrode structure and a bus structure, the interdigital electrode structure comprising a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being alternately arranged in parallel along a substrate surface, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes being arranged in a first direction, the first interdigital electrodes and the second interdigital electrodes being extended in a second direction, the first direction and the second direction being different, the bus structure comprising a first bus connected to the plurality of first interdigital electrodes and a second bus connected to the plurality of second interdigital electrodes, a first spacing region being provided between the plurality of second interdigital electrodes and the first bus, and a second spacing region being provided between the plurality of first interdigital electrodes and the second bus; A blocking structure is located in the substrate, wherein the blocking structure and the interdigital transducer are located on both sides of the piezoelectric layer, the blocking structure is parallel to the first direction, and the blocking structure is located at least below the first spacing region.

2. The surface acoustic wave resonator according to claim 1, wherein The blocking structure includes a first blocking portion, the first blocking portion is located below the first spacing region, the first blocking portion is parallel to the first bus, and the first bus is parallel to the first direction.

3. The surface acoustic wave resonator according to claim 2, wherein There is a first distance between the first blocking portion and the second interdigital electrode in the second direction, and there is a second distance between the first blocking portion and the first bus in the second direction, and the first distance is less than or equal to the second distance.

4. The surface acoustic wave resonator according to claim 3, wherein The width of the first barrier portion in the second direction is selected from a first width set, wherein the first width set includes a first width and a second width, and the first width is smaller than the second width.

5. The surface acoustic wave resonator according to claim 3, wherein The first spacing is less than or equal to 0.5λ, where λ is the wavelength of the acoustic wave excited by the IDT.

6. The surface acoustic wave resonator according to claim 2, wherein The blocking structure further includes a second blocking portion, the second blocking portion is located below the second spacing area, the second blocking portion is parallel to the second bus bar, and the second bus bar is parallel to the first direction.

7. The surface acoustic wave resonator according to claim 6, wherein There is a third distance between the second blocking portion and the first interdigital electrode in the second direction, and a fourth distance between the second blocking portion and the second bus bar in the second direction. The third distance is less than or equal to the fourth distance.

8. The surface acoustic wave resonator according to claim 7, wherein The width of the second barrier portion in the second direction is selected from a second width set, wherein the second width set includes a third width and a fourth width, and the third width is smaller than the fourth width.

9. The surface acoustic wave resonator according to claim 7, wherein The third spacing is less than or equal to 0.5λ, where λ is the wavelength of the sound wave excited by the IDT.

10. The surface acoustic wave resonator according to claim 1, wherein The substrate further includes: a base and a dielectric structure located on the base, the piezoelectric layer is located on the dielectric structure, and the blocking structure is located within the dielectric structure.

11. The surface acoustic wave resonator according to claim 10, wherein The direction perpendicular to the substrate surface is the third direction, and the third direction is orthogonal to the first direction and the second direction respectively; the blocking structure has a fifth distance from the piezoelectric layer in the third direction, and the blocking structure has a sixth distance from the substrate in the third direction, and the fifth distance is less than or equal to the sixth distance.

12. The surface acoustic wave resonator according to claim 11, wherein The thickness of the blocking structure in the third direction is selected from a set of thicknesses, wherein the set of thicknesses includes a first thickness and a second thickness, and the first thickness is smaller than the second thickness.

13. The surface acoustic wave resonator according to claim 11, wherein Also includes: A load structure is located in the substrate, the load structure and the interdigital transducer are located on both sides of the piezoelectric layer, the load structure is located in the dielectric structure below the interdigital electrode structure, the load structure includes a first load part and a second load part, the projection of the first load part on the substrate is adjacent to the projection of the first spacer area on the substrate, and the projection of the second load part on the substrate is adjacent to the projection of the second spacer area on the substrate.

14. The surface acoustic wave resonator according to claim 13, wherein The first load portion is parallel to the first direction, and the first load portion is located below the end of the second interdigital electrode and below the first interdigital electrode adjacent to the end of the second interdigital electrode along the first direction; the second load portion is parallel to the first direction, and the second load portion is located below the end of the first interdigital electrode and below the second interdigital electrode adjacent to the end of the first interdigital electrode along the first direction.

15. The surface acoustic wave resonator according to claim 13, wherein Along the third direction, a distance between the load structure and the piezoelectric layer is greater than a distance between the blocking structure and the piezoelectric layer.

16. The surface acoustic wave resonator according to claim 13, wherein Along the third direction, a distance between the load structure and the piezoelectric layer is equal to a distance between the blocking structure and the piezoelectric layer.

17. The surface acoustic wave resonator according to claim 13, wherein The first load portion includes several first load sub-portions arranged along the first direction, and the first load sub-portions are located below the end of the second interdigitated electrode and below the first interdigitated electrode adjacent to the end of the second interdigitated electrode along the first direction; the second load portion includes several second load sub-portions arranged along the first direction, and the second load sub-portions are located below the end of the first interdigitated electrode and below the second interdigitated electrode adjacent to the end of the first interdigitated electrode along the first direction.

18. The surface acoustic wave resonator according to claim 13, wherein The material of the blocking structure is the same as that of the supporting structure.

19. The surface acoustic wave resonator according to claim 1, wherein The thickness of the piezoelectric layer ranges from 0.05λ to 1.5λ, where λ is the wavelength of the acoustic wave excited by the interdigital transducer.

20. A surface acoustic wave filter device, characterized in that: include: A plurality of surface acoustic wave resonators according to any one of claims 1 to 19.

21. A method for forming a surface acoustic wave resonator, characterized in that: include: forming a substrate, the substrate comprising a piezoelectric layer and a barrier structure, the barrier structure being parallel to a first direction; An interdigital transducer is formed on the piezoelectric layer, and the interdigital transducer includes: an interdigital electrode structure and a bus structure, the interdigital electrode structure includes a plurality of first interdigital electrodes and a plurality of second interdigital electrodes, the plurality of first interdigital electrodes and the plurality of second interdigital electrodes are alternately arranged in parallel along the surface of the substrate, the arrangement direction of the plurality of first interdigital electrodes and the plurality of second interdigital electrodes is a first direction, the extension direction of the first interdigital electrodes and the second interdigital electrodes is a second direction, the first direction and the second direction are different, the bus structure includes a first bus connected to the plurality of first interdigital electrodes and a second bus connected to the plurality of second interdigital electrodes, a first spacing area is provided between the plurality of second interdigital electrodes and the first bus, a second spacing area is provided between the plurality of first interdigital electrodes and the second bus, the blocking structure and the interdigital transducer are located on both sides of the piezoelectric layer, and the blocking structure is at least located below the first spacing area.

22. The method for forming a surface acoustic wave resonator according to claim 21, wherein: The substrate also includes: a base and a dielectric structure located on the base; forming the substrate includes: providing a base; forming a dielectric structure and a blocking structure located within the dielectric structure on the base; providing a sacrificial substrate; forming a piezoelectric layer on the sacrificial substrate; bonding the piezoelectric layer to the dielectric structure; and after bonding the piezoelectric layer to the dielectric structure, removing the sacrificial substrate.

23. The method for forming a surface acoustic wave resonator according to claim 22, wherein: Also includes: A load structure is formed within the dielectric structure, wherein the load structure and the interdigital transducer are located on both sides of the piezoelectric layer. The load structure is located within the dielectric structure below the interdigital electrode structure, and the load structure includes a first load portion and a second load portion. The projection of the first load portion on the substrate is adjacent to the projection of the first spacer on the substrate, and the projection of the second load portion on the substrate is adjacent to the projection of the second spacer on the substrate.

24. The method for forming a surface acoustic wave resonator according to claim 23, wherein: The distance between the load structure and the piezoelectric layer is equal to the distance between the blocking structure and the piezoelectric layer; and the blocking structure and the load structure are formed synchronously.

25. The method for forming a surface acoustic wave resonator according to claim 24, wherein: The method for forming the dielectric structure, the blocking structure, and the load structure includes: forming a first dielectric layer on the substrate; forming a metal material layer on the first dielectric layer; patterning the metal material layer until the surface of the first dielectric layer is exposed, and forming the blocking structure and the load structure on the first dielectric layer; forming a second dielectric layer on the first dielectric layer, the blocking structure, and the load structure, wherein the dielectric structure includes the first dielectric layer and the second dielectric layer.

26. The method for forming a surface acoustic wave resonator according to claim 23, wherein: The distance between the load structure and the piezoelectric layer is greater than the distance between the blocking structure and the piezoelectric layer; the blocking structure and the load structure are formed in different steps.

27. The method for forming a surface acoustic wave resonator according to claim 26, wherein: The method for forming the dielectric structure, the blocking structure, and the load structure includes: forming a first dielectric layer on a substrate; forming a load structure on the first dielectric layer; forming a second dielectric layer on the first dielectric layer, the second dielectric layer covering the load structure; forming a blocking structure on the second dielectric layer; forming a third dielectric layer on the second dielectric layer, the third dielectric layer covering the blocking structure, the dielectric structure including the first dielectric layer, the second dielectric layer, and the third dielectric layer.

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