Oscillator circuit using open loop frequency modulation

Abstract

An oscillator circuit (200) includes a ring oscillator (202) and a ramp generator (204). The ring oscillator (202) includes a first inverter (214) and a second inverter (218). The first inverter (214) has a first inverter input, a first inverter output, and a first power terminal. The second inverter (218) has a second inverter input, a second inverter output, and a second power terminal. The second inverter input is coupled to the first inverter output, and the second inverter output is coupled to the first inverter input. The ramp generator circuit (204) has a ramp output coupled to the first power terminal and the second power terminal.

Description

Background Art

[0001] Many electronic circuits apply multiple power supply voltages. When the power supply voltage is lightly loaded (for example, the load circuit draws a relatively low current), a charge pump circuit can be used to generate the power supply voltage. For example, in a circuit that applies a positive power supply voltage and a negative power supply voltage, when the negative power supply voltage is lightly loaded, a charge pump circuit can be used to generate a negative power supply voltage from the positive power supply voltage. The charge pump circuit uses a switched isolation capacitor to convert an input voltage into an output voltage that can be higher than the input voltage or negative relative to the input voltage. In the charge pump circuit, switches coupled to the capacitors are operated sequentially to first charge the capacitors from the input voltage and then transfer the charge to the output. The clock signal for opening and closing the charge pump switches can be provided by an oscillator circuit. Summary of the Invention

[0002] An oscillator using open-loop frequency modulation suitable for use with a charge pump circuit is described herein. In one example, an oscillator circuit includes a ring oscillator and a ramp generator. The ring oscillator includes a first inverter and a second inverter. The first inverter has a first inverter input, a first inverter output, and a first power terminal. The second inverter has a second inverter input, a second inverter output, and a second power terminal. The second inverter input is coupled to the first inverter output, and the second inverter output is coupled to the first inverter input. The ramp generator circuit has a ramp output coupled to the first power terminal and the second power terminal.

[0003] In another example, a circuit includes a charge pump and an oscillator circuit. The charge pump circuit has an oscillator input. The oscillator circuit has an oscillator output coupled to the oscillator input. The oscillator circuit includes a ring oscillator and a ramp generator circuit. The ring oscillator has a power terminal. The ramp generator circuit has a ramp output coupled to the power terminal. The ramp generator circuit is configured to modulate a current provided at the power terminal.

[0004] In another example, a battery system includes a battery cell and a cell monitor circuit. The cell monitor circuit is coupled to the battery cell. The cell monitor circuit is configured to monitor the voltage of the battery cell. The cell monitor circuit includes a charge pump and an oscillator circuit. The charge pump circuit has an oscillator input. The oscillator circuit has an oscillator output coupled to the oscillator input. The oscillator circuit includes a ring oscillator and a ramp generator circuit. The ring oscillator includes an odd number of inverters coupled in series. The ramp generator circuit is coupled to the ring oscillator. The ramp generator circuit is configured to provide a ramp signal for modulating a current provided to power the inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1is a block diagram of an example oscillator circuit utilizing open-loop frequency modulation.

[0006] Figure 2 is a schematic diagram of an example oscillator circuit utilizing open-loop frequency modulation.

[0007] Figure 3 yes Figure 1 Graphs of electromagnetic emissions from an oscillator circuit and examples of a fixed-frequency oscillator circuit.

[0008] Figure 4 Is included by Figure 1 Block diagram of a battery system with an example of an oscillator clocking a charge pump. DETAILED DESCRIPTION

[0009] The switching of the charge pump generates charging and discharging currents. These currents produce periodic current peaks on the power conductors and cause undesirable electromagnetic emissions (electromagnetic interference (EMI)) at the fundamental and harmonics of the switching frequency. Spread spectrum techniques can be used to reduce EMI, and some clock generation circuits use a closed-loop phase-locked loop (PLL) architecture to implement spread spectrum clocking. However, PLL clock generators require a reference clock (e.g., a crystal oscillator), which is not available in many applications.

[0010] Charge pumps used in some applications (e.g., automotive battery monitoring applications) do not have strict jitter or drift specifications for clocking the charge pump switches. Because the clock timing specifications in such applications may be relatively loose, complex clock generation circuits, such as PLLs, may not be required. The oscillator circuit described herein simplifies spread spectrum clock generation by using a ramp generator to control the frequency of a ring oscillator. The ring oscillator can be implemented as a voltage-controlled oscillator based on a current-starved inverter. The ramp generator modulates the clock provided by the ring oscillator. The oscillator circuit is open-loop and does not use a crystal oscillator or other reference clock. Using a charge pump with an oscillator circuit can reduce emissions on the charge pump power supply by up to 25dB.

[0011] Figure 1 FIG1 is a block diagram of an example oscillator circuit 100 utilizing open-loop frequency modulation. Oscillator circuit 100 includes a ring oscillator 102, a ramp generator circuit 104, a current control circuit 106, and a current control circuit 108. Ring oscillator 102 provides a clock signal (CLK). Ring oscillator 102 includes a plurality of inverters connected to form a "ring." The output of each inverter is connected to the input of the subsequent inverter, and the output of the last inverter in the chain is connected to the input of the first inverter in the chain. CLK has a frequency determined by the delay of the inverters.

[0012] Current control circuit 106 is coupled between power supply terminal 110 and the power terminal of ring oscillator 102. The power terminal of ring oscillator 102 is coupled to the current output of current control circuit 106. Current control circuit 106 controls the flow of current from the power supply terminal to ring oscillator 102. Current control circuit 108 is coupled between ground terminal 112 and the reference terminal of ring oscillator 102. The reference terminal of ring oscillator 102 is coupled to the current input of current control circuit 108. Current control circuit 108 controls the flow of current from ring oscillator 102 to ground. By controlling the current flowing through ring oscillator 102, current control circuit 106 and current control circuit 108 control the voltage supplying the inverter of ring oscillator 102 and the delay of the inverter. Increasing the current flowing through ring oscillator 102 reduces the delay of the inverter and increases the frequency of CLK. Reducing the current flowing through ring oscillator 102 increases the delay of the inverter and reduces the frequency of CLK. Current control circuit 106 and current control circuit 108 may include variable resistors (eg, resistors implemented by field effect transistors (FETs)) to set the current flowing through ring oscillator 102 .

[0013] Ramp generator circuit 104 is coupled to current control circuit 106 and current control circuit 108. Ramp generator circuit 104 generates a control signal (RAMP) that controls current control circuit 106, current control circuit 108, and the current flowing therethrough. RAMP can be a triangular, sinusoidal, or other shaped signal that varies to change the frequency of CLK. The amplitude of RAMP determines the range of current supplied to ring oscillator 102, and the range of current supplied to ring oscillator 102 determines the frequency range of CLK. Therefore, the frequency range of CLK is determined by the amplitude of RAMP. The period of RAMP determines the rate of change of CLK.

[0014] The CLK provided by the oscillator circuit 100 can be used to clock the charge pump circuit. The frequency variation of the CLK spreads the noise generated by the switches in the charge pump circuit over a relatively wide frequency band, thereby reducing the noise power at a given frequency.

[0015] Some implementations of oscillator circuit 100 may include only one of current control circuit 106 or current control circuit 108. For example, the power terminal of ring oscillator 102 may be connected to power supply terminal 110 rather than being coupled to power supply terminal 110 via current control circuit 106. Alternatively, the reference terminal of ring oscillator 102 may be connected to a ground terminal rather than being coupled to the ground terminal via current control circuit 108.

[0016] Figure 2is a schematic diagram of an example oscillator circuit 200 that utilizes open-loop frequency modulation. Oscillator circuit 200 is an implementation of oscillator circuit 100. Oscillator circuit 200 includes ring oscillator 202, ramp generation circuit 204, current mirror circuit 206, current mirror circuit 208, transistor 210, and resistor 212. Ring oscillator 202 is an implementation of ring oscillator 102. Ring oscillator 202 includes an odd number of inverters coupled in series to form a ring. Although Figure 2 Inverters 214, 216, and 218 are illustrated in FIG. 2 , but ring oscillator 202 may include more than three inverters. The input of inverter 214 (inverter input) is coupled to the output of inverter 218 (inverter output). CLK is provided at the output of inverter 218. The input of inverter 216 is coupled to the output of inverter 214. The input of inverter 218 is coupled to the output of inverter 216 through any even number of intermediate inverters coupled in series (e.g., 0, 2, 4, 6, etc.). Each inverter of ring oscillator 202 includes a power terminal (inverter power terminal) and a reference terminal. The power terminal is coupled to current mirror circuit 206, and the reference terminal is coupled to current mirror circuit 208.

[0017] Current mirror circuit 206 is an example of current control circuit 106, and current mirror circuit 208 is an example of current control circuit 108. Current mirror circuit 208 includes a control transistor 228 and mirror transistors 230, 232, 234, and 236. Control transistor 228 is diode-connected, and a control terminal (e.g., gate) of each of mirror transistors 230, 232, 234, and 236 is coupled to a control terminal (e.g., gate) of control transistor 228. In practice, current mirror circuit 208 may include a mirror transistor for sinking current flowing from each inverter of ring oscillator 202. The current flowing in control transistor 228 is mirrored in each of mirror transistors 230, 232, 234, and 236 (e.g., equal to or proportional to the current flowing in control transistor 228). Control transistor 228 and mirror transistors 230, 232, 234, and 236 may be n-channel field effect transistors (NFETs).

[0018] Current mirror circuit 206 includes a control transistor 220 and mirror transistors 222, 224, and 226. Control transistor 220 is diode-connected, and a control terminal (e.g., gate) of each of mirror transistors 222, 224, and 226 is coupled to a control terminal (e.g., gate) of control transistor 220. In practice, current mirror circuit 206 may include a mirror transistor for supplying current to each inverter of ring oscillator 202. The current flowing in control transistor 220 is mirrored (e.g., equal to or proportional to the current flowing in control transistor 220) in each of mirror transistors 222, 224, and 226. The current flowing through control transistor 220 is controlled by mirror transistor 230 of current mirror circuit 208. Control transistor 220 and mirror transistors 222, 224, and 226 may be p-channel field effect transistors (PFETs).

[0019] Ramp generation circuit 204 is an implementation of ramp generator circuit 104. Ramp generation circuit 204 includes comparator 238, capacitor 240, switch 244, switch 246, current source 248, and current source 250. The input of current source 248 is coupled to power supply terminal 110. A first terminal of switch 244 is coupled to the output of current source 248, and a second terminal of switch 244 is coupled to the top plate of capacitor 240. A control input of switch 244 is coupled to the output of comparator 238 (comparator output). The output of current source 250 is coupled to ground. A first terminal of switch 246 is coupled to the input of current source 250, and a second terminal of switch 246 is coupled to the top plate of capacitor 240. A control input of switch 246 is coupled to the output of comparator 238.

[0020] A first input (comparator input) of comparator 238 is coupled to the top plate of capacitor 240. A second input (comparator input) of comparator 238 is coupled to a reference voltage circuit (e.g., a bandgap circuit). Comparator 238 compares the voltage (RAMP) on the top plate of capacitor 240 to a reference voltage received from the reference voltage circuit. If the voltage on the top plate of capacitor 240 is greater than the reference voltage (e.g., greater than the reference voltage by a predetermined hysteresis voltage), comparator 238 provides an output voltage that opens switch 244 and closes switch 246. If the voltage on the top plate of capacitor 240 is less than the reference voltage (e.g., less than the reference voltage by a predetermined hysteresis voltage), comparator 238 provides an output voltage that closes switch 244 and opens switch 246.

[0021] When switch 244 is closed and switch 246 is open, current flows from current source 248 to charge capacitor 240, and the voltage on the top plate of capacitor 240 increases. When switch 246 is closed and switch 244 is open, capacitor 240 is discharged through current source 250, and the voltage on the top plate of capacitor 240 decreases. The current supplied by current source 248 may be the same as the current sunk by current source 250. Therefore, voltage RAMP may increase and decrease in the form of a triangular ramp signal.

[0022] Ramp generation circuit 204 controls the current flowing through ring oscillator 202 via transistor 210. The top plate of capacitor 240 is coupled to the control terminal (e.g., gate) of transistor 210. A first current terminal (e.g., source) of transistor 210 is coupled to power supply terminal 110 via resistor 212. A second current terminal (e.g., drain) of transistor 210 is coupled to current mirror circuit 208 (controlling transistor 228). Transistor 210 may be a PFET. As the voltage of RAMP decreases, the current flowing through transistor 210 increases. As the voltage of RAMP increases, the current flowing through transistor 210 decreases. The current flowing through transistor 210 is mirrored into the current flowing through mirror transistors 222, 224, 226, 232, 234, and 236 to change the current flowing through ring oscillator 202 and thus the frequency of ring oscillator 202. The range of RAMP voltage and the corresponding range of CLK frequency may vary across various implementations of oscillator circuit 200. For example, in one embodiment of the oscillator circuit 200 , the RAMP voltage can vary approximately + / - 6.5% (eg, 500 mV to 570 mV), and the CLK frequency can vary approximately + / - 12% (eg, 37 megahertz (MHz) to 47 MHz).

[0023] Figure 3 is a graph of example electromagnetic emissions for an embodiment of a charge pump circuit using oscillator circuit 100 and a charge pump circuit using a fixed frequency oscillator circuit. Figure 3 , the x-axis of the graph represents frequency (Hz), and the y-axis of the graph represents emission magnitude in decibels (dB). Emission 302 is generated by the charge pump circuit using an embodiment of oscillator circuit 100, and emission 304 is generated by the charge pump circuit using a 32-MHz fixed frequency oscillator. The graph shows that emission 302 is more than 25 dB lower than emission 304 (e.g., at Figure 3 mid-low 26.65dB).

[0024] Figure 4FIG4 is a block diagram of an example battery system 400 including a charge pump clocked by an embodiment of oscillator circuit 100. Battery system 400 includes a battery cell 402, a cell monitor circuit 404, and a battery management circuit 406. Battery cell 402 may be a lithium-ion battery cell, a lithium-polymer battery cell, or any other type of battery cell. Cell monitor circuit 404 is coupled to battery cell 402. Cell monitor circuit 404 may monitor the voltage of battery cell 402. For example, the circuitry of cell monitor circuit 404 may sample and digitize the voltage of battery cell 402. In some examples, cell monitor circuit 404 may be coupled to multiple battery cells and measure the voltages of the multiple battery cells. Cell monitor circuit 404 is coupled to battery management circuit 406. Cell monitor circuit 404 may provide battery voltage measurements to battery management circuit 406 for use in managing battery cell 402. For example, battery management circuit 406 may adjust the current drawn from battery cell 402 based on the voltage measurements provided by cell monitor circuit 404 .

[0025] The cell monitor circuit 404 includes a charge pump circuit 408 and an oscillator circuit 100 coupled to the charge pump circuit 408. The oscillator circuit 100 provides a clock signal for operating the charge pump circuit 408. The charge pump circuit 408 can provide a boosted voltage used in the cell monitor circuit 404, for example, to switch a switch (e.g., an NFET) that switches the voltage of the battery cell 402 in the cell monitor circuit 404. By using the oscillator circuit 100 to clock the charge pump circuit 408, the cell monitor circuit 404 can significantly reduce EMI generated by the charge pump circuit 408 without using a complex PLL and an associated crystal oscillator.

[0026] Battery system 400 may be used to reduce EMI in electric vehicles, power tools, or other battery-powered systems.

[0027] As used herein, the term "coupled" may encompass any connection, communication, or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B via a direct connection; or (b) in a second instance, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not alter the functional relationship between devices A and B such that device B is controlled by device A via the control signal generated by device A.

[0028] Also, throughout this specification, the statement “based on” means “based, at least in part, on.” Thus, if X is based on Y, then X may depend on Y and any number of other factors.

[0029] A device that is "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function when manufactured by a manufacturer, and / or may be configurable (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or through a combination thereof.

[0030] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to an interconnection between or terminations of a device element, circuit element, integrated circuit, device, or other electronic device or semiconductor component.

[0031] Circuits or devices described herein as including certain components may alternatively be adapted to be coupled to those components to form the described circuit systems or devices. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may alternatively include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure during or after manufacture, for example, by an end user and / or a third party.

[0032] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead with little or no change to the remaining circuitry. For example, field effect transistors ("FETs") (e.g., n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs—e.g., NPN transistors or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in combination with the devices described herein. The transistors may be depletion-mode devices, drain-extended devices, enhancement-mode devices, native transistors, or other types of device structure transistors. Furthermore, the devices may be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0033] In the claims, reference may be made to the control input of a transistor and its current terminals. In the context of a FET, the control input is the gate, and the current terminals are the drain and source. In the context of a BJT, the control input is the base, and the current terminals are the collector and emitter.

[0034] Reference herein to a FET being "on" means that there is a conductive channel for the FET and drain current can flow through the FET. Reference herein to a FET being "off" means that there is no conductive channel, and therefore drain current does not flow through the FET. However, an "off" FET can have current flowing through the body diode of the transistor.

[0035] The circuits described herein can be reconfigured to include additional or different components to provide functionality at least partially similar to that available before component replacement. Unless otherwise specified, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may alternatively be multiple resistors or capacitors coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may alternatively be multiple resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor.

[0036] Although some elements of the described examples are included in the integrated circuit and other elements are external to the integrated circuit, in other examples, additional or fewer features may be incorporated into the integrated circuit. In addition, some or all features described as being external to the integrated circuit may be included in the integrated circuit, and / or some features described as being internal to the integrated circuit may be incorporated externally. As used herein, the term "integrated circuit" means one or more circuits that: (i) are incorporated in / on a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated in the same module; and / or (iv) are incorporated in / on the same printed circuit board.

[0037] The use of the phrase "ground" in the foregoing description includes chassis ground, ground line ground, floating ground, virtual ground, digital ground, universal ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise specified, the word "about," "substantially," or "substantially" preceding a parameter means within + / - 10% of the parameter, or if the parameter is zero, within a reasonable range of values about zero.

[0038] Modifications may be made in the described examples, and other examples are possible, within the scope of the claims.

Claims

1. An oscillator circuit, comprising: A ring oscillator comprising: a first inverter having a first inverter input, a first inverter output, and a first power terminal; and a second inverter having a second inverter input, a second inverter output, and a second power terminal; in the second inverter input being coupled to the first inverter output, and the second inverter output being coupled to the first inverter input; as well as A ramp generator circuit has a ramp output coupled to the first power terminal and the second power terminal.

2. The oscillator circuit of claim 1 , wherein the ring oscillator comprises a third inverter having a third inverter input, a third inverter output, and a third power terminal; wherein: the third inverter input being coupled to the first inverter output; The third inverter output is coupled to the second inverter input; and The third power terminal is coupled to the ramp output.

3. The oscillator circuit according to claim 1 , further comprising: A current mirror circuit comprising: a first transistor including a first control terminal, the first transistor coupled between a power supply terminal and the first power terminal, wherein the first control terminal is coupled to the ramp output; as well as A second transistor includes a second control terminal, the second transistor coupled between the supply terminal and the second power terminal, wherein the second control terminal is coupled to the ramp output.

4. The oscillator circuit according to claim 1 , wherein: The first inverter includes a first reference terminal; The second inverter includes a second reference terminal; and The oscillator circuit comprises: A current mirror circuit comprising: a first transistor including a first control terminal, the first transistor coupled between a ground terminal and the first reference terminal, wherein the first control terminal is coupled to the ramp output; as well as A second transistor includes a second control terminal, the second transistor coupled between the ground terminal and the second reference terminal, wherein the second control terminal is coupled to the ramp output.

5. The oscillator circuit of claim 1 , wherein the ramp generator circuit comprises: A comparator having a first comparator input, a second comparator input, and a comparator output; wherein: the first comparator input being coupled to the ramp output; the second comparator input being coupled to a reference voltage circuit; a first switch coupled between a power supply terminal and the first comparator input and having a first control input coupled to the comparator output; as well as A second switch is coupled between a ground terminal and the first comparator input and has a second control input coupled to the comparator output.

6. The oscillator circuit of claim 5 , wherein the ramp generator circuit comprises: a first current source coupled between the power supply terminal and the first switch; and A second current source is coupled between the ground terminal and the second switch.

7. The oscillator circuit of claim 5, further comprising a capacitor coupled between the ground terminal and the first comparator input.

8. The oscillator circuit of claim 5, further comprising a transistor coupled between the power supply terminal and the ground terminal, the transistor having a control terminal coupled to the first comparator input.

9. A circuit comprising: a charge pump circuit having an oscillator input; an oscillator circuit having an oscillator output coupled to the oscillator input, the oscillator circuit comprising: a ring oscillator having a power terminal; and A ramp generator circuit has a ramp output coupled to the power terminal, the ramp generator circuit configured to modulate a current provided at the power terminal.

10. The circuit of claim 9, wherein the oscillator circuit comprises an odd number of inverters coupled in series, and the inverters comprise inverter power terminals coupled to the power terminal.

11. The circuit of claim 9, wherein the oscillator circuit comprises: a current mirror circuit coupled between a power supply terminal and the ring oscillator, the current mirror circuit comprising: a control terminal coupled to the ramp output; and current output, which is coupled to the power terminal, Wherein the current mirror circuit is configured to modulate the current provided at the current output based on a ramp signal received at the control terminal.

12. The circuit of claim 9, wherein: The ring oscillator includes a reference terminal; and The oscillator circuit comprises: a current mirror circuit coupled between a ground terminal and the ring oscillator, the current mirror circuit comprising: a control terminal coupled to the ramp output; as well as a current input coupled to the reference terminal; Wherein the current mirror circuit is configured to modulate the current received at the current input based on a ramp signal received at the control terminal.

13. The circuit of claim 9, wherein the ramp generator circuit is configured to provide a triangular ramp signal to modulate the current provided at the power terminal.

14. The circuit of claim 9, wherein: The ramp generator circuit comprises: a comparator having a comparator input and a comparator output; and a capacitor having a top plate coupled to the comparator input and the comparator output; and The comparator is configured to control charging and discharging of the capacitor to provide a ramp signal at the top plate.

15. The circuit of claim 14, wherein the ramp generator circuit comprises: a current source having a current input and a current output, wherein the current input is coupled to the power supply terminal; and A switch is coupled between the current output and the top plate, wherein the switch has a control input coupled to the comparator output, and the switch is configured to control charging of the capacitor.

16. The circuit of claim 14, wherein the ramp generator circuit comprises: a current source having a current input and a current output, wherein the current output is coupled to a ground terminal; and A switch is coupled between the current input and the top plate, wherein the switch has a control input coupled to the comparator output and is configured to control the discharge of the capacitor.

17. A battery system comprising: Battery cells; as well as a cell monitor circuit coupled to the battery cell, wherein: The cell monitor circuit is configured to monitor the voltage of the battery cell; and The cell monitor circuit comprises: a charge pump circuit having an oscillator input; and an oscillator circuit having an oscillator output coupled to the oscillator input, the oscillator circuit comprising: a ring oscillator comprising an odd number of inverters coupled in series; and A ramp generator circuit is coupled to the ring oscillator, the ramp generator circuit being configured to provide a ramp signal for modulating a current provided to power the inverter.

18. The battery system of claim 17, wherein the oscillator circuit comprises: a current mirror circuit coupled between a power supply terminal and the ring oscillator, the current mirror circuit including a control terminal coupled to the ramp generator circuit and a current output coupled to the ring oscillator, wherein the current mirror circuit is configured to modulate the current provided to the ring oscillator based on the ramp signal received at the control terminal.

19. The battery system according to claim 18, wherein: The current mirror circuit is a first current mirror circuit; and The oscillator circuit comprises: a second current mirror circuit coupled between a ground terminal and the ring oscillator, the second current mirror circuit comprising a control terminal coupled to the ramp generator circuit and a current input coupled to the ring oscillator, wherein the current mirror circuit is configured to modulate the current received at the current input based on the ramp signal received at the control terminal.

20. The battery system according to claim 19, wherein: The ramp generator circuit comprises: a comparator having a comparator input and a comparator output; and a capacitor having a top plate coupled to the comparator input and the comparator output; and The comparator is configured to control charging and discharging of the capacitor to provide the ramp signal at the top plate.

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