Half-wave reconstruction and polarity enhancement series arc fault detection method and system

Abstract

The invention relates to a half-wave reconstruction and polarity enhancement series arc fault detection method and system, and the method comprises the steps: carrying out the continuous sampling of a target line current signal in # imgabs0 # time, and obtaining N sampling point sequences; wherein N is a positive integer, and # imgabs 1 # is the duration of a single power frequency period; carrying out zero point identification on the current signal, and recording a zero-crossing moment corresponding to a current zero-crossing point; reconstructing the sampling signal into a 2N-segment half-wave sampling point sequence based on the zero-crossing time; performing half-wave continuation on the 2N sections of half-wave sampling point sequences to obtain 2N sections of full-wave sampling point sequences; performing feature calculation on the 2N-segment full-wave sampling point sequence to construct an asymmetric fault feature set; and inputting the asymmetric fault feature set into the trained classifier to obtain a detection result of the target line. According to the invention, through half-wave reconstruction and asymmetric current feature extraction, the effectiveness and generalization of series arc fault detection are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of distribution network fault detection, and in particular relates to a half-wave reconstruction and polarity enhancement series arc fault detection method and system. Background Art

[0002] Low-voltage distribution networks are the final link in the electrical energy exchange process of the new power system, directly related to the safety of people's lives and property. However, in recent years, as the power load of low-voltage distribution networks has become increasingly diverse, distributed, and operated for extended periods, the operating conditions of distribution lines have become increasingly complex, characterized by highly variable electrical parameters, complex branch lines, and susceptible to insulation aging, all of which are highly susceptible to line failures.

[0003] Series arc faults are a common type of line fault in low-voltage distribution networks, typically caused by a failed connection or insulation. Unlike parallel arc faults such as short-circuit arc faults and ground arc faults, series arc faults are equivalent to a series low-impedance element. The fault current exhibits small variations, is transient, and exhibits high latency. Traditional overcurrent protection systems are unable to detect and interrupt these faults. Because arc temperatures can reach over 3000°C, if the fault is not detected in a timely manner, the arc can easily cause electrical fires, threatening life and property. Therefore, effective methods for detecting series arc faults are urgently needed.

[0004] The foundation of series arc fault detection methods is the extraction of highly effective and generalizable fault signatures. In today's distribution network environment with complex loads, existing methods all extract high-frequency current signatures from full-cycle current signals. However, for widely used power electronic loads, the extracted high-frequency fault signatures are easily confused with normal load current signatures, resulting in low effectiveness and generalization of the overall method. Considering that the positive and negative half-wave waveforms of normal load current are generally symmetrical, series arc faults, due to the random nature of the breakdown process within the positive and negative half-cycles, result in asymmetric positive and negative half-waves of the fault current, which is significantly different from the normal current of any AC load in the distribution network. Therefore, research on detection methods for current asymmetry between the positive and negative half-waves is necessary. Summary of the Invention

[0005] In order to improve the effectiveness and generalization of series arc fault detection, a first aspect of the present invention provides a series arc fault detection method with half-wave reconstruction and polarity enhancement, comprising: The target line current signal is continuously sampled within a certain time period to obtain a sequence of N sampling points; where N is a positive integer. is the length of a single power frequency cycle; the zero point of the current signal is identified, and one or more zero-crossing moments corresponding to the current zero-crossing point are recorded; each zero-crossing moment is used as the demarcation moment between the positive half-wave and the negative half-wave, and the sampling signal is reconstructed into a 2N-segment half-wave sampling point sequence according to the demarcation moment; the 2N-segment half-wave sampling point sequence is extended by half-wave to obtain a 2N-segment full-wave sampling point sequence; an asymmetric fault feature set is constructed by performing feature calculation on the 2N-segment full-wave sampling point sequence; the asymmetric fault feature set is input into a trained classifier to obtain a detection result of the target line.

[0006] In some embodiments of the present invention, reconstructing the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation time includes: dividing the sampling signal into a 2N+1-segment sampling point sequence according to the demarcation time; performing circular splicing on the first segment sequence and the last segment sequence of the 2N+1-segment sampling point sequence to obtain a spliced sequence; and reconstructing the spliced sequence and the remaining 2N-1-segment sampling point sequence into a 2N-segment half-wave sampling point sequence.

[0007] Furthermore, the current polarities of two adjacent sampling point sequences in the 2N half-wave sampling point sequences are opposite.

[0008] In some embodiments of the present invention, constructing an asymmetric fault feature set by performing feature calculation on a 2N full-wave sampling point sequence includes: constructing a feature matrix by performing feature calculation on each segment of the full-wave sampling point sequence; asymmetric enhancement of the feature matrix; and constructing an asymmetric fault feature set based on the asymmetric enhanced feature matrix.

[0009] Furthermore, the feature calculation includes: time domain feature calculation, frequency domain feature calculation and time-frequency domain feature calculation.

[0010] Furthermore, the asymmetric enhancement of the feature matrix includes: calculating each element in the asymmetric fault feature set by using a difference maximization search function and the feature matrix.

[0011] The second aspect of the present invention provides a half-wave reconstruction and polarity enhancement series arc fault detection system, comprising: a sampling module for The target line current signal is continuously sampled within a certain time period to obtain a sequence of N sampling points; where N is a positive integer. The invention relates to a method for reconstructing a current signal into a 2N-segment half-wave sampling point sequence according to the embodiment of the present invention. The method comprises the following steps: a reconstruction module for identifying the zero point of the current signal and recording one or more zero-crossing moments corresponding to the current zero-crossing point; taking each zero-crossing moment as the demarcation moment between the positive half-wave and the negative half-wave, and reconstructing the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation moment; a construction module for performing half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; constructing an asymmetric fault feature set by performing feature calculation on the 2N-segment full-wave sampling point sequence; and a detection module for inputting the asymmetric fault feature set into a trained classifier to obtain a detection result of the target line.

[0012] The third aspect of the present invention provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the half-wave reconstruction and polarity enhanced series arc fault detection method provided in the first aspect of the present invention.

[0013] A fourth aspect of the present invention provides a computer-readable medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method for detecting series arc faults with half-wave reconstruction and polarity enhancement provided in the first aspect of the present invention is implemented.

[0014] The beneficial effects of the present invention are: The fault current is reconstructed by half-wave reconstruction to form positive and negative polarity full-wave current sampling sequence groups corresponding to the positive half-wave and negative half-wave, which can perform richer time domain, frequency domain, and time-frequency domain feature extraction operations on the corresponding positive and negative half-waves. For the positive and negative polarity full-wave current sampling sequence groups, an asymmetric fault feature set is constructed through the difference maximization function, which can maximize the utilization of the extremely asymmetric positive and negative half-waves within a single sampling window, thereby achieving asymmetry enhancement. The asymmetric current characteristics can reflect the arcing nature of series arc faults and are significantly different from the normal symmetrical current of most AC loads in the distribution network. This makes the series fault arc detection method highly effective and generalizable even in unknown scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Schematic diagram of the basic flow of a series arc fault detection method with half-wave reconstruction and polarity enhancement in some embodiments of the present invention; Figure 2 Schematic diagram of a specific process of a series arc fault detection method with half-wave reconstruction and polarity enhancement in some embodiments of the present invention; Figure 3 A waveform diagram of the process of zero-crossing point identification, half-wave demarcation, and half-wave extension in some embodiments of the present invention; Figure 4A spectrum diagram of a sampled current signal in some embodiments of the present invention; Figure 5 is a schematic structural diagram of a series arc fault detection system in some embodiments of the present invention; Figure 6 Schematic diagram of the structure of a series arc fault detection system with half-wave reconstruction and polarity enhancement in some embodiments of the present invention; Figure 7 Schematic diagram of the structure of an electronic device in some embodiments of the present invention. DETAILED DESCRIPTION

[0016] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0017] refer to Figures 1 to 3 In a first aspect of the present invention, a method for detecting series arc faults with half-wave reconstruction and polarity enhancement is provided, comprising: S100. The target line current signal is continuously sampled within a certain time period, and the N A sequence of sampling points; among them, N is a positive integer, is the length of a single power frequency cycle; S200. perform zero point identification on the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing point; use each zero-crossing moment as the demarcation moment between the positive half-wave and the negative half-wave, and reconstruct the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation moment; S300. perform half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; construct an asymmetric fault feature set by performing feature calculation on the 2N-segment full-wave sampling point sequence; S400. input the asymmetric fault feature set into the trained classifier to obtain the detection result of the target line.

[0018] In step S100 of some embodiments of the present invention, The target line current signal is continuously sampled within a certain time period, and the N A sequence of sampling points; among them, N is a positive integer, The duration of a single power frequency cycle; Specifically, the series arc fault detection device continuously samples the line current and processes it in real time. The sampling rate is , set the minimum window length of the device processing line current sampling signal to , the sampling current signal within the minimum processing window is recorded as , for A sampling point sequence consisting of discrete sampling points ,in, is a positive integer, is the duration of a single power frequency cycle, and the time value corresponding to the sampling point sequence , , is the power frequency, .

[0019] In step S200 of some embodiments of the present invention, the current signal is zero-point identified, and one or more zero-crossing moments corresponding to the current zero-crossing point are recorded; each zero-crossing moment is used as the boundary moment between the positive half-wave and the negative half-wave; Specifically, for the sampled current signal Perform fast Fourier transform processing to obtain spectrum information and construct power frequency current signal , for the power frequency current signal Perform zero point identification and record The current zero-crossing moments corresponding to the current zero-crossing point are The current zero-crossing moment corresponds to the sampling current signal Sampling points in ,in, is the amplitude corresponding to the power frequency, is the initial phase corresponding to the power frequency, , is the power frequency angular frequency, ; Sampling point sequence All included sampling points, sampling point sequence and the sampling point sequence before reconstruction The sum of the number of sampling points is equal to .

[0020] Without loss of generality, the power frequency current signal is a cosine wave, containing The zero-crossing point identification in step S200 is calculated. Corresponding The discrete time points include Zero-crossing time point, that is , where the difference between two adjacent time points is half the power frequency cycle .

[0021] refer to Figure 3 and Figure 4 In step S200 of some embodiments of the present invention, reconstructing the sampled signal into a 2N-segment half-wave sampling point sequence according to the demarcation time includes: S201. Divide the sampled signal into 2N+1 sampling point sequences according to the demarcation time; perform circular splicing of the first and last segments of the 2N+1 sampling point sequences to obtain a spliced sequence; S202. Reconstruct the spliced sequence and the remaining 2N-1 sampling point sequences into a 2N half-wave sampling point sequence.

[0022] Specifically, the The current zero-crossing moment is the The dividing moment between the positive half-wave and the negative half-wave, and then the sampling current signal is converted into the zero-crossing moment of the current. Divided into Segment sampling point sequence: 、 、 ,..., 、 , the sampling point sequence fragment and Merge the fragments end to end and reconstruct them , and then form A half-wave sampling point sequence: , wherein the fragment and is a half-wave sampling point sequence with opposite polarity, assuming is a positive half-wave sampling point sequence, then is the negative half-wave sampling point sequence, An odd number.

[0023] In step S300 of some embodiments of the present invention, half-wave extension is performed on the 2N segments of half-wave sampling point sequence to obtain a 2N segments of full-wave sampling point sequence; Specifically, for The half-wave sampling point sequence is extended by half-wave to form A full-wave sampling point sequence: , the The full-wave sampling point sequence is divided into positive polarity full-wave sampling point sequence groups and negative polarity full-wave sampling point sequence group ; Half-wave extension is a signal processing process that extends half-wave to full-wave, with positive half-wave sampling point sequence and negative half-wave sampling point sequence For example, After half-wave extension , After half-wave extension .

[0024] In step S300 of some embodiments of the present invention, constructing an asymmetric fault feature set by performing feature calculation on a 2N full-wave sampling point sequence includes: S301. By calculating the characteristics of each full-wave sampling point sequence, a characteristic matrix is constructed; S302. Perform asymmetric enhancement on the feature matrix; and construct an asymmetric fault feature set based on the asymmetric enhanced feature matrix.

[0025] Specifically, for the and The characteristic calculation of each full-wave sampling point sequence fragment is performed, totaling Class features, and then construct feature matrix and , enhance the asymmetry of each type of feature and build an asymmetric fault feature set ; It should be noted that feature calculation includes but is not limited to time domain feature calculation, frequency domain feature calculation, time-frequency domain feature calculation, and For example, is a full-wave sampling point sequence segment Calculated by features Class eigenvalue sequence, that is .

[0026] It is calculated by the difference maximization search function, that is, ,in, .

[0027] It can be understood that in addition to the difference maximization search function, the asymmetric enhancement of the feature matrix can also be achieved through wavelet transform and adversarial generative network.

[0028] In step S400 of some embodiments of the present invention, the asymmetric fault feature set is input into a trained classifier to obtain a detection result of the target line.

[0029] Specifically, the asymmetric fault feature set Input to the classifier, the classifier outputs the sampled current signal The state detection results include "a series arc fault occurs in the line" and "the line is normal". Optionally, the classifier is a machine learning model trained based on historical data.

[0030] In a specific embodiment of the present invention, a current sampling waveform including 4 power frequency cycles is used. Taking θ as an example, the process of zero-crossing point identification, half-wave demarcation, and half-wave extension is described in detail.

[0031] like Figure 4 As shown, for the sampled current signal Perform fast Fourier transform processing to obtain spectrum information (see Figure 4 ), the amplitude corresponding to the power frequency is 1.29 and the phase is 127.04°, thus constructing the power frequency current signal , for the power frequency current signal Perform zero point identification and record The current zero-crossing moments corresponding to the current zero-crossing point are The current zero-crossing moment corresponds to the sampling current signal Sampling points in ; The The current zero-crossing moment is the The dividing moment between the positive half-wave and the negative half-wave, and then the sampling current signal is converted into the zero-crossing moment of the current. Divided into Segment sampling point sequence: 、 、 ,..., 、 , the sampling point sequence fragment and Merge the fragments end to end and reconstruct them ,like Figure 3 As shown in part b, A half-wave sampling point sequence: , wherein the fragment and is a half-wave sampling point sequence with opposite polarity, where is the positive half-wave sampling point sequence, is the negative half-wave sampling point sequence, ; against The half-wave sampling point sequence is extended by half-wave, such as Figure 3 As shown in part c in the figure, the dotted part is the extension part, forming A full-wave sampling point sequence: , the The full-wave sampling point sequence is divided into positive polarity full-wave sampling point sequence groups and negative polarity full-wave sampling point sequence group .

[0032] Example 2 refer to Figure 6 The second aspect of the present invention provides a series arc fault detection system with half-wave reconstruction and polarity enhancement, comprising: a sampling module for The target line current signal is continuously sampled within a certain time period to obtain a sequence of N sampling points; where N is a positive integer. The invention relates to a method for reconstructing a current signal into a 2N-segment half-wave sampling point sequence according to the embodiment of the present invention. The method comprises the following steps: a reconstruction module for identifying the zero point of the current signal and recording one or more zero-crossing moments corresponding to the current zero-crossing point; taking each zero-crossing moment as the demarcation moment between the positive half-wave and the negative half-wave, and reconstructing the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation moment; a construction module for performing half-wave extension on the 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; constructing an asymmetric fault feature set by performing feature calculation on the 2N-segment full-wave sampling point sequence; and a detection module for inputting the asymmetric fault feature set into a trained classifier to obtain a detection result of the target line.

[0033] Furthermore, the reconstruction module includes: a division unit for dividing the sampling signal into 2N+1 sampling point sequences according to the demarcation time; a splicing unit for circularly splicing the first sequence and the last sequence of the 2N+1 sampling point sequences to obtain a spliced sequence; and a reconstruction unit for reconstructing the spliced sequence and the remaining 2N-1 sampling point sequences into a 2N half-wave sampling point sequence.

[0034] like Figure 2 and Figure 5 As shown, in a specific embodiment, the arc fault detection system with half-wave reconstruction and asymmetry enhancement includes a current acquisition module 1, an analog-to-digital conversion module 2, a signal processing module 3, a classifier module 4, and a line breaker module 5; the current acquisition module 1 samples the current signal of the line 6 in real time and inputs it to the analog-to-digital conversion module 2; the analog-to-digital conversion module 2 converts the analog signal into a digital signal and inputs it to the signal processing module 3; the signal processing module 3 includes a zero-crossing point recognition submodule 7, a half-wave demarcation submodule 8, a half-wave extension submodule 9, and a feature calculation submodule 10, which respectively perform Figure 2 The steps S2, S3, S4, and S5 are operated to output an asymmetric fault feature set; the classifier module 4 is deployed with a classifier model trained based on historical data, outputs a state detection result of the sampled current signal according to the input asymmetric fault feature set, and inputs it to the line breaker module 5; if the detection result is "line normal", the line breaker module 5 maintains the line closed state and continues to wait for the state detection result of the next sampling window; if the detection result is "series arc fault occurs in the line", the line breaker module 5 turns on the breaking function and disconnects the faulty line.

[0035] Example 3 refer to Figure 7According to a third aspect of the present invention, an electronic device is provided, comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the half-wave reconstruction and polarity enhanced series arc fault detection method according to the first aspect of the present invention.

[0036] The electronic device 500 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage device 508 into a random access memory (RAM) 503. Various programs and data required for the operation of the electronic device 500 are also stored in the RAM 503. The processing device 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0037] Typically, the following devices may be connected to the I / O interface 505: an input device 506 including, for example, a touch screen, a touchpad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 507 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 508 including, for example, a hard disk, etc.; and a communication device 509. The communication device 509 may allow the electronic device 500 to communicate with other devices wirelessly or by wire to exchange data. Figure 7 The electronic device 500 is shown with various devices, but it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed instead. Figure 7 Each block shown in the figure may represent one device, or may represent multiple devices as needed.

[0038] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication device 509, or installed from the storage device 508, or installed from the ROM 502. When the computer program is executed by the processing device 501, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed. It should be noted that the computer-readable medium described in the embodiment of the present disclosure can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection having one or more conductors, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In embodiments of the present disclosure, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In embodiments of the present disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take a variety of forms, including, but not limited to, an electromagnetic signal, an optical signal, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transfer a program for use by or in conjunction with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wire, optical cable, RF (radio frequency), etc., or any suitable combination thereof.

[0039] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device. The computer-readable medium carries one or more computer programs, which, when executed by the electronic device, cause the electronic device to: Computer program code for performing the operations of embodiments of the present disclosure may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, Python, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0040] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should be noted that each box in the block diagram and / or flowchart, and the combination of the boxes in the block diagram and / or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0041] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for detecting series arc faults with half-wave reconstruction and polarity enhancement, characterized in that: include: exist The target line current signal is continuously sampled within a certain time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle; Perform zero point identification on the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing point; use each zero-crossing moment as the demarcation moment between the positive half-wave and the negative half-wave, and reconstruct the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation moment; The 2N-segment half-wave sampling point sequence is extended by half-wave to obtain the 2N-segment full-wave sampling point sequence; the asymmetric fault feature set is constructed by calculating the features of the 2N-segment full-wave sampling point sequence; The asymmetric fault feature set is input into the trained classifier to obtain the detection result of the target line.

2. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 1, characterized in that: The reconstructing of the sampling signal into a 2N-segment half-wave sampling point sequence according to the demarcation time comprises: Divide the sampling signal into 2N+1 sampling point sequences according to the demarcation time; Circularly splicing the first segment sequence and the last segment sequence of the 2N+1 sampling point sequence to obtain a spliced sequence; The spliced sequence and the remaining 2N-1 sampling point sequences are reconstructed into a 2N half-wave sampling point sequence.

3. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 2, characterized in that: The current polarities of two adjacent sampling point sequences in the 2N half-wave sampling point sequences are opposite.

4. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 1, characterized in that: The construction of an asymmetric fault feature set by performing feature calculation on a 2N full-wave sampling point sequence includes: By calculating the characteristics of each full-wave sampling point sequence, a characteristic matrix is constructed; Asymmetric enhancement is performed on the feature matrix; and an asymmetric fault feature set is constructed based on the asymmetric enhanced feature matrix.

5. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 4, characterized in that: The feature calculation includes: time domain feature calculation, frequency domain feature calculation and time-frequency domain feature calculation.

6. The method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to claim 4, characterized in that: The asymmetric enhancement of the feature matrix comprises: Each element in the asymmetric fault feature set is calculated by maximizing the difference between the search function and the feature matrix.

7. A series arc fault detection system with half-wave reconstruction and polarity enhancement, characterized in that: include: Sampling module for The target line current signal is continuously sampled within a certain time period to obtain a sequence of N sampling points; where N is a positive integer. The duration of a single power frequency cycle; A reconstruction module is used to identify the zero point of the current signal and record one or more zero-crossing moments corresponding to the current zero-crossing point; each zero-crossing moment is used as the demarcation moment between the positive half-wave and the negative half-wave, and the sampling signal is reconstructed into a 2N-segment half-wave sampling point sequence according to the demarcation moment; A construction module is used to perform half-wave extension on a 2N-segment half-wave sampling point sequence to obtain a 2N-segment full-wave sampling point sequence; and to construct an asymmetric fault feature set by performing feature calculation on the 2N-segment full-wave sampling point sequence. The detection module is used to input the asymmetric fault feature set into the trained classifier to obtain the detection result of the target line.

8. The half-wave reconstruction and polarity enhancement series arc fault detection system according to claim 7, characterized in that: The reconstruction module includes: A division unit, used for dividing the sampled signal into 2N+1 sampling point sequences according to the demarcation time; a splicing unit, configured to perform circular splicing on the first segment and the last segment of the 2N+1 sampling point sequences to obtain a spliced sequence; The reconstruction unit is used to reconstruct the spliced sequence and the remaining 2N-1 sampling point sequences into 2N half-wave sampling point sequences.

9. An electronic device comprising: one or more processors; A storage device for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the half-wave reconstruction and polarity enhanced series arc fault detection method as described in any one of claims 1 to 6.

10. A computer-readable medium having a computer program stored thereon, wherein: When the computer program is executed by a processor, the method for detecting series arc faults with half-wave reconstruction and polarity enhancement according to any one of claims 1 to 6 is implemented.

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