Time-of-flight process monitoring

Abstract

The invention relates to time-of-flight process monitoring. A time of flight (TOF) system includes a driver that drives a VCSEL array to emit light, a reference array that receives a reference light signal, and a return array that receives emitted light reflected from a target. The reference readout circuit device reads out the reference array. The return readout circuitry reads out the return array. The first buffer driver buffers a basic timing reference to generate a first timing reference. The second buffer driver buffers the first timing reference to generate a second timing reference. The calibration circuitry performs a first TOF measurement using the return readout circuitry when clocked by the first timing reference and a second time-of-flight measurement using the return readout circuitry when clocked by the second timing reference, and compensate for an offset between TOF made by the return readout circuitry and the reference readout circuitry during normal operation based on the first and second TOF measurements.

Description

Technical Field

[0001] The present disclosure relates to the field of optical sensing, and more particularly to monitoring the response times of reference and return single photon avalanche diode (SPAD) arrays in time-of-flight (TOF) sensors. Background Art

[0002] Time-of-flight (TOF) sensors are components used in various advanced technologies to accurately measure the distance to an object. Applications for such TOF sensors span multiple technology areas, including autonomous navigation for vehicles and drones, 3D mapping and imaging, virtual and augmented reality systems, gesture recognition in consumer electronics, and facial recognition in consumer electronics.

[0003] Direct time-of-flight (dTOF) sensors and indirect time-of-flight (iTOF) sensors are two variations of TOF technology. dTOF sensors work by emitting short pulses of light at a target and measuring the time it takes for the light to reflect from the target and return to the sensor. This method generates an accurate measurement of the distance to the target. On the other hand, iTOF sensors operate by emitting a continuous modulated light wave and measuring the phase shift between the emitted and reflected light waves. While iTOF sensors can also calculate distance, they are generally not as accurate as dTOF sensors for precise measurements, especially over longer distances or in brightly lit environments. However, iTOF sensors tend to be more power-efficient and cheaper to produce, making them more suitable for certain applications, such as arrays with high resolution, such as VGAs.

[0004] Now refer to Figure 1 A dTOF sensor 10 is described. The dTOF sensor 10 is implemented within a housing 11 which is divided into two chambers: an output signal chamber 12 and an input signal chamber 13 , separated by an optical barrier 14 .

[0005] Within the output signal chamber 12, a vertical cavity surface emitting laser (VCSEL) substrate 15 houses a VCSEL 16. Most of the infrared laser beam generated by the VCSEL 16 forms an output beam 17 directed toward a target object, while a portion of the infrared laser beam generated by the VCSEL 16 reflects from the interior of the housing 11 to form a reference beam 18. The reference laser beam 18 reflects from the interior of the housing 11 within the output signal chamber 12 to strike a reference array of single photon avalanche diodes (SPADs) 20 embedded within a substrate 19. These reference SPADs 20 detect the arrival of the reference beam 18, establishing a reference time-of-flight value. An optical barrier 14 prevents the output beam 17 and the reference beam 18 from reaching the input signal chamber 13.

[0006] The input signal chamber 13 houses an infrared (IR) notch filter 22, which reduces the amount of ambient light reaching the return array 21. Once through the IR notch filter 22, the return beam 23 strikes the return array 21 of the SPADs, which is also embedded within the substrate 19.

[0007] The operation of the dTOF sensor 10 involves comparing the time between the reference beam 18 striking the reference array of SPADs 20 and the outgoing beam 17 reaching the target, reflecting back, passing through the IR notch filter 22, and striking the return array of SPADs 21. This duration is then converted to a constant distance based on the speed of light.

[0008] Inherent in the operation of time-of-flight calculations lies the underlying challenge of variability in the response times of both the reference array 20 and the return array 21 of the SPAD. Once an incoming photon strikes the SPAD, it triggers the onset of avalanche breakdown, the generation of an electrical pulse, the detection of that pulse, and finally the propagation of that signal through a readout circuitry, the output of which provides information about the phase difference between the timing reference and the detection from the SPAD. These steps contribute to the SPAD's response time, though it should be noted that the delay caused by the generation and propagation of the timing reference also contributes to the response time.

[0009] However, this response time is affected by potential variations that may be caused by process, voltage, and / or temperature variations within the SPAD. These fluctuations can inadvertently introduce differences in the time of flight measured to the object (and the response time of the reference array). Note that this potential measurement error can exist even when the distance to the target object remains constant, as this measurement error adds a fixed error to the TOF measurement, regardless of the distance to the target. This measurement error or offset may change with process, voltage, or temperature.

[0010] Consider a scenario where the response time of the reference array 20 increases while the response time of the return array 21 remains the same. In this case, even though the actual time of flight (from the VCSELs 16 to the object and back to the return array 21) has not changed, the difference in flight time measured by the sensor 10 (between the return and reference arrays) will decrease due to the increase in the response time of the reference array 20. This is an offset that indicates variability in the response time and risks compromising the accuracy of the distance measurement, a challenge that needs to be addressed to ensure consistent and reliable performance of the dTOF sensor 10.

[0011] A common approach to addressing variability in the response time of dTOF sensors is through digital calibration. When delays or delay mismatches are identified, they can be digitally compensated. This process involves adjusting the measurement range by subtracting a known offset, expressed as: Range_calibrated = Range_measured - Offset. However, this solution is not without its limitations.

[0012] One drawback of digital calibration is the non-static nature of offset. Offset can vary due to a variety of factors. For example, offset can change due to variations in the manufacturing process. While these variations can be identified by testing on a per-die or per-wafer basis, this increases the complexity and cost of the sensor manufacturing process.

[0013] On-chip temperature sensors can measure temperature fluctuations that affect sensor performance. However, the gradient of these variations is affected by process corners, making compensation for these variations challenging. This complexity arises because different manufacturing processes result in sensors with different temperature sensitivities.

[0014] Voltage fluctuations are particularly troublesome because they are not only difficult to compensate for, but can also occur suddenly and briefly during operation, especially when performing distance measurements. This transient nature of voltage changes makes it difficult to apply consistent and accurate compensation for offsets.

[0015] To further improve the accuracy of dTOF sensors, some existing efforts have utilized a process monitoring block. This block monitors specific parameters related to the manufacturing process, such as threshold voltage (Vt) and drive current (Ion). When combined with a temperature sensor and an analog-to-digital converter (ADC) to determine the supply voltage, the PMB provides additional data that can help adjust the compensation applied to the sensor measurement. However, this approach also encounters practical difficulties. Determining the required offset relative to discrete and limited information about the process, voltage, and temperature is complex and can be resource intensive. In addition, the PMB itself adds complexity and cost, potentially affecting its feasibility for certain applications.

[0016] Therefore, further development is needed. Summary of the Invention

[0017] A time-of-flight (TOF) system is disclosed herein, comprising: a vertical cavity surface emitting laser (VCSEL) array; a VCSEL driver configured to drive the VCSEL array to emit light toward a target during operation; a reference single photon avalanche diode (SPAD) array positioned to receive a reference light signal; a return SPAD array positioned to receive a portion of light emitted by the VCSEL array that is reflected from the target; a reference readout circuit device configured to read out a signal from the reference SPAD array; a return readout circuit device configured to read out a signal from the return array; a timing generator configured to generate a base timing reference; a first buffer driver circuit device configured to buffer the base timing reference to generate a first timing reference; and a second buffer driver circuit device configured to buffer the base timing reference to generate a first timing reference. a buffer driver circuit device configured to buffer the first timing reference to generate a second timing reference; a third buffer driver circuit device configured to buffer the basic timing reference to generate a third timing reference for clocking the return readout circuit device; and a calibration circuit device configured to use the return readout circuit device to perform a first time-of-flight measurement when the return readout circuit device is clocked by the first timing reference, to use the return readout circuit device to perform a second time-of-flight measurement when the return readout circuit device is clocked by the second timing reference, and to compensate for an offset between the time-of-flight measurements performed by the return readout circuit device and the reference readout circuit device during normal operation based at least on the first time-of-flight measurement and the second time-of-flight measurement.

[0018] The calibration circuit device can compensate for the offset between the flight time measurements performed by the return read circuit device and the reference read circuit device during normal operation based on the first flight time measurement, the second flight time measurement, the number of delay-causing elements within the second buffer driver circuit device, and the difference between the number of delay-causing elements within the first buffer driver circuit device and the number of delay-causing elements within the third buffer driver circuit device.

[0019] The offset in the time-of-flight measurement performed by the reference readout circuitry can be compensated by:

[0020]

[0021] Wherein TOF is a time of flight measurement obtained by a reference readout circuit device during normal operation, TOF1 is a first time of flight measurement, TOF2 is a second time of flight measurement, N is the difference between the number of delay causing elements within the first buffer driver circuit device and the number of delay causing elements within the third buffer driver circuit device, and M is the number of delay causing elements within the second buffer driver circuit device.

[0022] The calibration circuitry may be configured to calculate an offset based on a difference between the second and first time-of-flight measurements.

[0023] The calibration circuitry may calculate an offset based on a difference between the second and first time of flight measurements and apply a scaling factor based on a difference in the number of delay causing elements within the second buffer driver circuitry relative to the number of delay causing elements within the first and third buffer driver circuitry.

[0024] The first buffer driver circuit arrangement may comprise a different number of buffer elements than the second buffer driver circuit arrangement, such that the second timing reference is delayed relative to the first timing reference.

[0025] The delay introduced by the buffer elements in the second buffer driver circuitry may be used by the calibration circuitry to determine the offset.

[0026] The calibration circuitry may be configured to calculate an offset based on a difference between the second and first time-of-flight measurements. The timing generator may also be configured to generate a trigger signal. The fourth buffer driver circuitry may be configured to buffer the trigger signal to generate a drive signal for the VCSEL driver. The calibration circuitry may use a delay introduced by a buffer element in the second buffer driver circuitry to determine a delay between generating the trigger signal and generating the drive signal for the VCSEL driver.

[0027] The calibration circuitry may be configured to calculate an offset based on a difference between the second and first time-of-flight measurements. The timing generator may also be configured to generate a trigger signal; and further include a fourth buffer driver circuitry configured to buffer the trigger signal to generate a drive signal for the VCSEL driver. The calibration circuitry may also be configured to determine a delay between generating the trigger signal and generating the drive signal for the VCSEL driver based on the first and second time-of-flight measurements.

[0028] The third buffer driver circuit arrangement may have fewer delay-inducing elements than the first buffer driver circuit arrangement.

[0029] The delay causing element of the first driver circuit arrangement, the delay causing element in the third buffer driver circuit arrangement and the delay causing element in the second buffer circuit arrangement may be matched.

[0030] The calibration circuitry may include a multiplexer configured to selectively pass the first timing reference or the second timing reference to the return readout circuitry based on a control signal from the calibration circuitry.

[0031] The calibration circuitry may further be configured to perform the first and second time-of-flight measurements during a calibration phase prior to normal operation of the TOF system.

[0032] The return readout circuit device may include a first return readout circuit device and a second return circuit device, wherein the first return readout circuit device is used by the calibration circuit device to obtain the first flight time measurement and is used by the control circuit device to obtain the flight time measurement of the reference readout circuit device during normal operation, and the second return circuit device is used by the calibration circuit device to obtain the second flight time measurement.

[0033] The reference light signal may be formed by a portion of the light reflected off the interior of the housing of the TOF system.

[0034] Method aspects are also included. For example, a method for calibrating a time-of-flight (TOF) system in a calibration phase is disclosed herein, the method comprising: emitting light toward a target; receiving a reference light signal at a reference array; receiving light reflected from the target at a return array; reading out the reference light signal using a reference readout circuit device; reading out a signal from the return array using a return readout circuit device; generating a base timing reference using a timing generator; applying a first time delay to the base timing reference to generate a first timing reference; applying a second time delay to the first timing reference to generate a second timing reference; applying a third time delay to the base timing reference to generate a third timing reference, thereby clocking the return readout circuit device; when the first timing reference performing a first time-of-flight measurement using the return readout circuitry when clocked; performing a second time-of-flight measurement using the return readout circuitry when clocked by the second timing reference; and performing a first time-of-flight measurement using the return readout circuitry when the return readout circuitry is clocked by the first timing reference; performing a second time-of-flight measurement using the return readout circuitry when the return readout circuitry is clocked by the second timing reference; and compensating for an offset between time-of-flight measurements performed by the return readout circuitry and the reference readout circuitry during normal operation based at least on the first time-of-flight measurement and the second time-of-flight measurement.

[0035] The offset between the flight time measurements performed by the return readout circuit device and the reference readout circuit device can be determined during normal operation based on the first flight time measurement, the second flight time measurement, the number of delay-inducing elements within the second buffer driver circuit device that applies the second time delay, and the difference between the number of delay-inducing elements within the first buffer driver circuit device that applies the first time delay and the number of delay-inducing elements within the third buffer driver circuit device that applies the third time delay.

[0036] The method may further comprise compensating for offsets in time-of-flight measurements acquired by the reference readout circuitry during normal operation by:

[0037]

[0038] Wherein TOF represents a time of flight measurement obtained by the reference readout circuit device during normal operation, TOF1 is a first time of flight measurement, TOF2 is a second time of flight measurement, N is the difference between the number of delay causing elements within the first buffer driver circuit device and the third buffer driver circuit device, and M is the number of delay causing elements within the second buffer driver circuit device.

[0039] Calculating the offset may include applying a scaling factor based on a number of delay causing elements within the second buffer driver circuitry relative to a number of delay causing elements within the first and third buffer driver circuitry.

[0040] The first buffer driver circuit arrangement may include a different number of buffer elements than the second buffer driver circuit arrangement, and the method may further include determining the skew using delays introduced by the buffer elements in the second buffer driver circuit arrangement.

[0041] The method may further include generating a trigger signal using a timing generator, and buffering the trigger signal using a fourth buffer driver circuit device to generate a drive signal of a VCSEL driver for driving the VCSEL array to emit light toward a target, wherein a delay introduced by a buffer element in the second buffer driver circuit device is used to determine a delay between generation of the trigger signal and generation of the drive signal of the VCSEL driver.

[0042] The calibration phase may include using a multiplexer to selectively pass either the first timing reference or the second timing reference to the return readout circuitry based on a control signal.

[0043] A calibration phase may be performed prior to normal operation of the TOF system and comprises acquiring a first time of flight measurement using the first return readout circuitry and acquiring a second time of flight measurement using the second return readout circuitry. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a diagram of a known time-of-flight sensor.

[0045] Figure 2 is a block diagram of the time-of-flight system disclosed herein.

[0046] Figure 3 is a block diagram of an alternative embodiment of the time-of-flight system disclosed herein. DETAILED DESCRIPTION

[0047] The following disclosure enables those skilled in the art to make and use the subject matter described herein. The general principles outlined in this disclosure may be applied to embodiments and applications beyond those described above without departing from the spirit and scope of the disclosure. It is not intended that the disclosure be limited to the embodiments shown, but rather that it be accorded the widest scope consistent with the principles and features disclosed or suggested herein.

[0048] First, an exemplary specific TOF system will be described to give an example of a particular implementation, and thereafter, a generalized version will be described to provide an overall understanding of the range of applications in which the response time monitoring circuitry disclosed herein may be utilized.

[0049] Now refer to Figure 2 A TOF system 100 is described. During operation, TOF system 100 includes a VCSEL array 102, which is driven by driver circuitry 101 to emit light pulses toward a target, a reference SPAD array 103, and a return SPAD array 105. Reference array 103 and return array 105 are carried within a housing. Reference array 103 receives a portion of light reflected from within the housing, while return array 105 receives a portion of light reflected from the target and returned. Reference readout circuitry 104 reads signals from reference array 103. Return readout circuitry 106 reads signals from return array 105.

[0050] Return readout circuitry 106 receives the outputs of the SPADs of return array 105, reads those outputs (e.g., via an OR tree, an asynchronous front end, and digital readout), and provides the results to a finite state machine and digital pipeline 140, which may implement a finite state machine (e.g., a finite state machine). Digital pipeline 140 is connected to receive the output of return readout circuitry 106 and the output of reference readout circuitry 104, and the output of digital pipeline 140 is stored in SRAM 145. Digital pipeline 140 performs a time-of-flight measurement based on the outputs of return readout circuitry 106 and reference readout circuitry 104.

[0051] The drive circuitry 101, the reference readout circuitry 104, and the return readout circuitry 106 are clocked by a clock signal generated by a timing generator 121 such as a phase locked loop (PLL).

[0052] Specifically, the timing generator 121 generates a trigger signal TRIG, which is passed to the buffer driver 122. As shown, the buffer driver 122 includes eight buffers configured to apply a timing delay to the trigger signal TRIG and generate a VCSEL driver signal TRIG_DLY for triggering the driver circuit device 101. It should be noted here that, as a result of the action of the buffer driver 122, the VCSEL driver signal TRIG_DLY is delayed relative to the trigger signal TRIG.

[0053] Timing generator 121 also generates a timing reference TREF, which is passed to buffer driver 123. As shown, buffer driver 123 includes a single buffer and generates a predetermined timing reference signal TREF0, which is passed to buffer drivers 124 and 126. As shown, buffer driver 124 includes six buffers and is configured to apply a timing delay to predetermined timing reference signal TREF0, generate a first timing reference signal TREF1 at its output, and provide this first timing reference signal to a first input of multiplexer 127. As shown, buffer driver 125 includes four buffers and is configured to apply a timing delay to the first timing reference signal TREF1, receive the first timing reference signal TREF1 at its input, and generate a second timing reference signal TREF2 at its output. Buffer driver 125 provides this second timing reference signal TREF2 to a second input of multiplexer 127. As shown, buffer driver 126 includes three buffers configured to apply a timing delay to predetermined timing reference signal TREF0 , generate a third timing reference signal TREF3 at its output, and provide the third timing reference signal TREF3 to return readout circuitry 106 .

[0054] It is noted here that as a result of the action of buffer driver 124, the first timing reference signal TREF1 is delayed relative to the timing reference signal TREF0, as a result of the action of buffer driver 125, the second timing reference signal TREF2 is delayed relative to the first timing reference signal TREF1, and as a result of the action of buffer driver 126, the third timing reference signal TREF3 is delayed relative to the timing reference signal TREF0.

[0055] The output of multiplexer 127 is the selected one of the TREF1 and TRFE2 signals, which is passed through buffer driver 128 and provides a clock signal for use by reference readout circuitry 104. The selected input of multiplexer 127 is selected for passing the TREF1 and TRFE2 signals to the output in response to a select signal SEL generated by controller 130. Return readout circuitry 106 is clocked by a third timing reference signal TREF3.

[0056] A calibration process is performed by controller 130 to determine the delay between the edges of timing reference signal TREF0 and timing reference signal TREF1, utilizing the additional delay provided by buffer driver 125. This calibration process utilizes the difference in TOF measurements between the signal paths between timing generator 121 and multiplexer 127, with and without the additional delay imposed by buffer driver 124, respectively. To this end, select signal SEL is set so that multiplexer 127 selects TREF1 to pass through reference readout circuitry 104, and a TOF measurement along the reference path is then taken (e.g., the time between assertion of trigger signal TRIG by timing generator 121 to initiate outgoing ranging light and readout of the detected reflected light by reference readout circuitry 104). Thereafter, select signal SEL is set so that multiplexer 127 selects TREF2 to pass through reference readout circuitry 104, and a TOF measurement along the reference path is again taken (e.g., the time between the assertion of trigger signal TRIG by timing generator 121 and the readout of the detected reflected light by reference readout circuitry 104 is again taken). Based on the difference between these two time measurements, the offset between the TOF measurements taken by return readout circuitry 106 and reference readout circuitry 104 can be determined.

[0057] This is possible because buffer drivers 123, 124, 125, and 128 are constructed to match in polarity and capacitance. They are manufactured using the same metal layer, providing uniformity in spacing and environmental factors. This manufacturing makes the delays between buffer drivers 122, 123, 124, 125, and 128 proportionally scalable, so that the measured delay from buffer driver 125 can be reliably used to infer the delay through buffer driver 124.

[0058] The determination of the offset will now be described. Consider that the delay through the path between timing generator 121 and return readout circuitry 106 (i.e., the return channel) is set by the delays of buffer drivers 123 and 126, which together have four buffers. Consider that the delay through the path between timing generator 121 and reference readout circuitry 104 (i.e., the reference channel) is set by the delays of buffer drivers 123, 124, and 128, which together have eight buffers. Therefore, the reference channel has N = 4 additional buffers compared to the return channel. Now observe that buffer driver 125 has M = N = 4 additional buffers.

[0059] Recall that the time of flight to an object in the scene can be measured by subtracting the TOF measurement of reference readout circuitry 104 from the TOF measurement from return readout circuitry 106 and adding an offset to the TOF measurement of reference readout circuitry 104. Mathematically, this can be written as:

[0060] TOF=TOF 返回 -(TOF 参考 +OFFSET 总量 )

[0061] With this in mind, the time of flight when select signal SEL is set so that multiplexer 127 selects TREF1 for passing to reference readout circuitry 104 can be calculated as:

[0062] TOF1=TOF 返回 -(TOF 参考 +N×OFFSET 单位 )

[0063] Here, the offset between the TOF measurements made by return readout circuitry 106 and reference readout circuitry 104 is caused by the N=4 extra buffers of the reference channel, and OFFSET 单位 is the delay of each buffer in the reference and return channels. Therefore:

[0064] TOF1=TOF 返回 -(TOF 参考 +4×OFFSET 单位 )

[0065] The flight time when select signal SEL is set so that multiplexer 127 selects TREF2 for passing to reference readout circuitry 104 can be calculated as:

[0066] TOF2=TOF 返回 -(TOF 参考+(M+N)×OFFSET 单位 )

[0067] Recall that the buffer driver 125 comprises M=4 buffers. Therefore:

[0068] TOF2=TOF 返回 -(TOF 参考 +(4+4)×OFFSET 单位 )

[0069] TOF2=TOF 返回 -(TOF 参考 +8×OFFSET 单位 )

[0070] Therefore, to remove the offset, during normal operation the time of flight of the reference array can be calculated as:

[0071]

[0072] Recall that M=4 and N=4, for Figure 2 The offset for the specific example of can therefore be calculated by the controller 130 as:

[0073]

[0074] Another technique for determining the offset can also be implemented using TOF system 100. Considering that only the time-of-flight measurements taken from reference readout circuitry 104 are used, the delay of buffer driver 125 can be calculated as:

[0075] DELAY=TOF 参考2 -TOF 参考1

[0076] In this calculation, TOF 参考1 is the reference time of flight measurement acquired when select signal SEL is set so that multiplexer 127 selects TREF1 for transmission to reference readout circuitry 104, and TOF 参考2 is the reference time of flight measurement acquired when select signal SEL is set such that multiplexer 127 selects TREF2 for transmission to reference readout circuitry 104 .

[0077] Therefore, when the delay (DELAY) is known and the total offset OFFSET is expressed 总量 In the case of , the time of flight to an object in the scene during operation may alternatively be calculated by the controller 130 as:

[0078] TOF=TOF 返回 -(TOF 参考 +DELAY)

[0079] Furthermore, using known delays, and assuming that the buffers within buffer driver 122 match the buffers within buffer drivers 124 and 125, the delay between the edges of trigger signal TRIG and VCSEL driver signal TRIG_DLY can be calculated as DELAY multiplied by the ratio between the number of buffers within buffer driver 122 and the number of buffers within buffer driver 125. Mathematically, this is expressed as:

[0080]

[0081] Thus, as an example, if the buffer driver 122 includes eight buffers, the delay DEAY by the buffer driver 122 122 is 2 x DELAY. This can further be used by the controller 130 to calculate the time of flight to objects in the scene.

[0082] In the above example, due to the use of the multiplexer 127 , the determination of the offset and delay between the edges of the trigger signal TRIG and the VCSEL drive signal TRIG_DLY is performed in a separate calibration phase from the normal operation of the TOF system 100 .

[0083] As an alternative, Figure 3 As shown in TOF system 100′, the output of buffer driver 124 can be directly connected to reference readout circuitry 104 via buffer driver 128, and the output of buffer driver 125 can be connected to replica reader 132 via buffer 131. Buffer 131 is a replica of buffer driver 128, and replica reader 132 is a replica of reference readout circuitry 104. Therefore, in this embodiment, controller 130 can continuously or periodically perform the above-described calibration in the background during normal operation of TOF system 100.

[0084] In summary, the TOF systems 100, 100' disclosed herein offer significant advancements in timing accuracy and operational reliability. A particularly useful advantage of the system is its absolute timing accuracy, which remains consistent across voltage and temperature ranges. This robustness enables the system to perform with high accuracy in a variety of applications and environments where fluctuations in voltage and temperature may compromise accuracy. Furthermore, the TOF systems 100, 100' reduce the need for range offset fine-tuning during testing, as the calibration described herein performs this function in situ. This reduction not only reduces testing costs—helping to lower production costs—but also simplifies the process of integration into products, facilitating adoption by manufacturers and end users. Finally, it will be apparent that modifications and variations may be made to what has been described and illustrated herein without departing from the scope of the present disclosure.

[0085] Although the present disclosure has been described with a limited number of embodiments, those skilled in the art having benefit of this disclosure may devise other embodiments that do not depart from the scope of the disclosure. Furthermore, those skilled in the art may devise embodiments that represent various combinations of the embodiments disclosed herein made in various ways.

Claims

1. A time-of-flight (TOF) system, comprising: Vertical cavity surface emitting laser VCSEL array; a VCSEL driver configured to drive the VCSEL array to emit light toward a target during operation; a reference single-photon avalanche diode (SPAD) array positioned to receive a reference optical signal; a return SPAD array positioned to receive a portion of the light emitted by the VCSEL array that is reflected from the target; a reference readout circuit arrangement configured to read out a signal from the reference SPAD array; return readout circuitry configured to read out signals from the return array; a timing generator configured to generate a base timing reference; a first buffer driver circuit arrangement configured to buffer the base timing reference to generate a first timing reference; a second buffer driver circuit arrangement configured to buffer the first timing reference to generate a second timing reference; a third buffer driver circuitry configured to buffer the base timing reference to generate a third timing reference for clocking the return readout circuitry; as well as A calibration circuit device is configured to: when the return readout circuit device is clocked by the first timing reference, use the return readout circuit device to perform a first flight time measurement; when the return readout circuit device is clocked by the second timing reference, use the return readout circuit device to perform a second flight time measurement; and compensate for an offset between the flight time measurements performed by the return readout circuit device and the reference readout circuit device during normal operation based on at least the first flight time measurement and the second flight time measurement.

2. A TOF system according to claim 1, wherein the calibration circuit device compensates for the offset between the flight time measurements performed by the return readout circuit device and the reference readout circuit device during normal operation based on the first flight time measurement, the second flight time measurement, the number of delay-inducing elements within the second buffer driver circuit device, and the difference between the number of delay-inducing elements within the first buffer driver circuit device and the number of delay-inducing elements within the third buffer driver circuit device.

3. The TOF system of claim 2 , wherein the offset in making the time-of-flight measurements made by the reference readout circuitry is compensated as: Wherein TOF is a time-of-flight measurement obtained by the reference readout circuit device during normal operation, TOF1 is the first time-of-flight measurement, TOF2 is the second time-of-flight measurement, N is the difference between the number of delay-inducing elements within the first buffer driver circuit device and the number of delay-inducing elements within the third buffer driver circuit device, and M is the number of delay-inducing elements within the second buffer driver circuit device. 4 . The TOF system of claim 2 , wherein the calibration circuitry is configured to calculate the offset based on a difference between the second time-of-flight measurement and the first time-of-flight measurement.

5. A TOF system according to claim 4, wherein the calibration circuit device calculates the offset based on the difference between the second time-of-flight measurement and the first time-of-flight measurement, and applies a scaling factor based on the difference in the number of delay-inducing elements within the second buffer driver circuit device relative to the number of delay-inducing elements within the first buffer driver circuit device and the third buffer driver circuit device.

6. The TOF system according to claim 2, wherein: The first buffer driver circuit arrangement comprises a different number of buffer elements than the second buffer driver circuit arrangement, such that the second timing reference is delayed relative to the first timing reference. 7 . The TOF system of claim 6 , wherein the delay introduced by the buffer element in the second buffer driver circuitry is used by the calibration circuitry to determine the offset.

8. The TOF system according to claim 2, wherein: The calibration circuit device is configured to calculate the offset based on the difference between the second flight time measurement and the first flight time measurement; wherein the timing generator is also configured to generate a trigger signal; further including a fourth buffer driver circuit device, which is configured to buffer the trigger signal to generate a drive signal for the VCSEL driver; and wherein the delay introduced by the buffer element in the second buffer driver circuit device is used by the calibration circuit device to determine the delay between the generation of the trigger signal and the generation of the drive signal for the VCSEL driver.

9. The TOF system according to claim 2, wherein: The calibration circuit device is configured to calculate the offset based on a difference between the second time-of-flight measurement and the first time-of-flight measurement; wherein the timing generator is further configured to generate a trigger signal; further comprising a fourth buffer driver circuit device, the fourth buffer driver circuit device being configured to buffer the trigger signal to generate a drive signal for the VCSEL driver; and wherein the calibration circuit device is further configured to determine a delay between generation of the trigger signal and generation of the drive signal for the VCSEL driver based on the first time-of-flight measurement and the second time-of-flight measurement. 10 . The TOF system of claim 1 , wherein the third buffer driver circuit device has fewer delay-inducing elements than the first buffer driver circuit device.

11. The TOF system of claim 2, wherein the delay inducing elements of the first driver circuit arrangement, the delay inducing elements in the third buffer driver circuit arrangement, and the delay inducing elements in the second buffer circuit arrangement are matched.

12. The TOF system of claim 1, wherein the calibration circuitry comprises a multiplexer configured to selectively pass the first timing reference or the second timing reference to the return readout circuitry based on a control signal from the calibration circuitry.

13. The TOF system of claim 1, wherein the calibration circuitry is further configured to perform the first time-of-flight measurement and the second time-of-flight measurement during a calibration phase prior to normal operation of the TOF system.

14. A TOF system according to claim 1, wherein the return readout circuit device includes a first return readout circuit device and a second return circuit device, the first return readout circuit device is used by the calibration circuit device to perform the first flight time measurement and is used by the control circuit device to perform the flight time measurement of the reference readout circuit device during normal operation, and the second return circuit device is used by the calibration circuit device to perform the second flight time measurement.

15. The TOF system according to claim 1, wherein: The reference light signal is formed by the portion of light reflected off the interior of the housing of the TOF system.

16. A method for calibrating a time-of-flight (TOF) system in a calibration phase, the method comprising: emit light toward a target; receiving a reference optical signal at a reference array; receiving light reflected from the target at a return array; reading out the reference optical signal using a reference readout circuit device; reading out signals from the return array using return readout circuitry; Generate a basic timing reference using a timing generator; applying a first time delay to the base timing reference to generate a first timing reference; applying a second time delay to the first timing reference to generate a second timing reference; applying a third time delay to the base timing reference to generate a third timing reference for clocking the return readout circuitry; performing a first time-of-flight measurement using the return readout circuitry while being clocked by the first timing reference; performing a second time-of-flight measurement using the return readout circuitry while being clocked by the second timing reference; and performing a first time-of-flight measurement using the return readout circuitry when the return readout circuitry is clocked by the first timing reference; performing a second time-of-flight measurement using the return readout circuitry when the return readout circuitry is clocked by the second timing reference; and compensating for an offset between the time-of-flight measurements performed by the return readout circuitry and the reference readout circuitry during normal operation based at least on the first time-of-flight measurement and the second time-of-flight measurement.

17. The method according to claim 16, wherein: The offset between the flight time measurements obtained by the return readout circuit device and the reference readout circuit device is determined during normal operation based on the first flight time measurement, the second flight time measurement, the number of delay-inducing elements within the second buffer driver circuit device that applies the second time delay, and the difference between the number of delay-inducing elements within the first buffer driver circuit device that applies the first time delay and the number of delay-inducing elements within the third buffer driver circuit device that applies the third time delay.

18. The method of claim 17 , further comprising compensating for offsets in time-of-flight measurements acquired by the reference readout circuitry during normal operation by: Wherein TOF represents a time-of-flight measurement obtained by the reference readout circuit device during normal operation, TOF1 is the first time-of-flight measurement, TOF2 is the second time-of-flight measurement, N is the difference between the number of delay-inducing elements within the first buffer driver circuit device and the number of delay-inducing elements within the third buffer driver circuit device, and M is the number of delay-inducing elements within the second buffer driver circuit device.

19. The method according to claim 17, wherein Calculating the offset includes applying a scaling factor based on the difference in the number of delay causing elements within the second buffer driver circuitry relative to the number of delay causing elements within the first and third buffer driver circuitry.

20. The method of claim 17, wherein the first buffer driver circuit arrangement comprises a different number of buffer elements than the second buffer driver circuit arrangement, and the method further comprises determining the offset using the delay introduced by the buffer elements in the second buffer driver circuit arrangement.

21. The method according to claim 20, wherein The method further includes generating a trigger signal with the timing generator and buffering the trigger signal with a fourth buffer driver circuit device to generate a drive signal for a VCSEL driver for driving the VCSEL array to emit light toward the target, wherein a delay introduced by the buffer element in the second buffer driver circuit device is used to determine a delay between generation of the trigger signal and generation of the drive signal for the VCSEL driver.

22. The method of claim 16, wherein the calibration phase includes using a multiplexer to selectively pass the first timing reference or the second timing reference to the return readout circuitry based on a control signal.

23. The method according to claim 16, wherein The calibration phase is performed prior to normal operation of the TOF system and comprises using a first return readout circuitry to make the first time of flight measurement and using a second return readout circuitry to make the second time of flight measurement.

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