Method, device, electronic device and storage medium for repairing expansion chips

Abstract

The present application discloses a method, device, electronic device, and storage medium for repairing an expansion chip, which relates to the field of computer technology and includes: obtaining the number of communication timeouts corresponding to the current functional submodule in the expansion chip within the first communication cycle, wherein the number of communication timeouts is used to indicate the number of times the communication interaction between the master object and at least one slave object of the current functional submodule exceeds a preset time threshold; when the number of communication timeouts meets the fault detection condition, determining the faulty object from the master object and at least one slave object; and performing a repair operation on the faulty object. Since the repair operation can be performed on the faulty object without restarting the entire expansion chip to perform the repair operation, the technical problem of the excessive impact of the expansion chip repair process on normal business can be solved, thereby achieving the technical effect of reducing the interference of the expansion chip repair process on normal business.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to the field of chip repair. Background Art

[0002] In a storage system, to compensate for the main controller's deficiencies in functionality, performance, or interfaces, expansion chips can be used to implement tasks that the main controller cannot directly complete, such as providing additional storage capacity or power management functions. This simplifies the design complexity of the main controller and improves the scalability and flexibility of the storage system.

[0003] In the prior art, when a functional submodule in an expansion chip experiences a functional anomaly, the entire expansion chip needs to be restarted and repaired to restore its functionality. However, during this restart and repair process, the operation of other normal functional submodules in the expansion chip is affected, causing significant disruption to the normal operation of the expansion chip. This results in the expansion chip repair process having a significant impact on normal operations.

[0004] In response to technical issues in related technologies, such as the excessive impact of the chip repair process on normal business, no effective solutions have been proposed. Summary of the Invention

[0005] The present application provides a method, device, electronic device and storage medium for repairing an expansion chip, so as to at least solve the problem in the related art that the repair process of the expansion chip has too great an impact on normal business.

[0006] The present application provides a method for repairing an expansion chip, comprising: obtaining the number of communication timeouts corresponding to a current functional submodule in the expansion chip within a first communication cycle, wherein the above-mentioned number of communication timeouts is used to indicate the number of times that the communication interaction between a master object and at least one slave object of the above-mentioned current functional submodule takes longer than a preset time threshold; when the above-mentioned number of communication timeouts meets a fault detection condition, determining a faulty object from the above-mentioned master object and at least one of the above-mentioned slave objects; and performing a repair operation on the above-mentioned faulty object.

[0007] The present application also provides a repair device for an expansion chip, comprising: an acquisition unit, used to acquire the number of communication timeouts corresponding to the current functional sub-module in the expansion chip within the first communication cycle, wherein the above-mentioned communication timeout number is used to indicate the number of times that the communication interaction between the master object and at least one slave object of the above-mentioned current functional sub-module takes longer than a preset time threshold; a determination unit, used to determine a faulty object from the above-mentioned master object and at least one of the above-mentioned slave objects when the above-mentioned communication timeout number meets the fault detection condition; and a repair unit, used to perform a repair operation on the above-mentioned faulty object.

[0008] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned methods for repairing an expansion chip when executing the computer program.

[0009] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for repairing an expansion chip are implemented.

[0010] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned methods for repairing an expansion chip when the computer program is executed by a processor.

[0011] Through this application, if the number of communication timeouts in the first communication cycle of the current functional submodule in the expansion chip meets the fault detection conditions, it can be determined that the current functional submodule is abnormal, and the fault object can be determined from the abnormal current functional submodule, so that a repair operation can be performed on the fault object. Because the repair operation can be performed on the fault object without restarting the entire expansion chip to perform the repair operation, the technical problem of the expansion chip repair process having a significant impact on normal business operations can be solved, achieving the technical effect of reducing the interference of the expansion chip repair process on normal business operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 A hardware structure block diagram of a server device for an extended chip repair method provided in an embodiment of the present application;

[0014] Figure 2 This is a schematic diagram of a method for optionally extending a chip repair according to an embodiment of the present application;

[0015] Figure 3 This is a second schematic diagram of an optional method for repairing an extended chip according to an embodiment of the present application;

[0016] Figure 4 This is a third schematic diagram of an optional extended chip repair method according to an embodiment of the present application;

[0017] Figure 5 This is a fourth schematic diagram of an optional method for repairing an extended chip according to an embodiment of the present application;

[0018] Figure 6 This is a fifth schematic diagram of an optional extended chip repair method according to an embodiment of the present application;

[0019] Figure 7 Schematic diagram six of an optional method for repairing an extended chip according to an embodiment of the present application;

[0020] Figure 8 FIG7 is a seventh schematic diagram of an optional method for repairing an extended chip according to an embodiment of the present application;

[0021] Figure 9 This is a structural block diagram of a device for repairing an expansion chip according to an embodiment of the present application;

[0022] Figure 10 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0023] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0024] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0025] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0026] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a hardware structure diagram of a computer device for a method of repairing an extended chip according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1Only one is shown) a processor 102 (the processor 102 may include but is not limited to a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. The server device may also include a transmission device 106 and an input / output device 108 for communication functions. It will be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown.

[0027] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for repairing the expansion chip in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely located relative to the processor 102, and these remote memories may be connected to a server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0028] Transmission device 106 is used to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by a communication provider of the server device. In one embodiment, transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0029] In this embodiment, a method for repairing an expansion chip is provided. Figure 2 This is a flow chart of a method for repairing an expansion chip according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0030] S202, obtaining a number of communication timeouts corresponding to the current functional submodule in the expansion chip within the first communication cycle, wherein the number of communication timeouts is used to indicate the number of times that the communication interaction between the master object and at least one slave object in the current functional submodule exceeds a preset time threshold;

[0031] Optionally, in this embodiment, the expansion chip (Expand, abbreviated as EXP) is a chip component in the storage server used to expand storage capacity and manage storage devices. It integrates functional sub-modules such as the Serial Attached Small Computer System Interface (SAS), Serial Advanced Technology Attachment (SATA), Inter-IC Bus (I2C), and Serial Peripheral Interface (SPI), and can support high-speed data transmission and monitor device storage status.

[0032] Optionally, in this embodiment, the functional sub-module refers to a functional sub-module that performs corresponding functions in the expansion chip. For example, the I2C sub-module is a bidirectional two-wire bus that can be used to connect a microcontroller and other serial I2C bus devices, such as sensors, memories, etc., and can control all I2C bus-specific timing, protocols, and timing, etc.; for example, the SPI sub-module is a high-speed synchronous serial communication protocol used for data transmission between a microcontroller and peripheral devices, such as sensors, memories, and display drivers, etc. It can manage SPI data transmission, including sending and receiving operations, and can also control the master or slave mode switching of the SPI bus, handle interrupt events during data transmission, support synchronous and asynchronous data transmission operations, and realize high-speed data communication between the microcontroller and various peripherals.

[0033] Optionally, in this embodiment, the master object refers to an object in the functional sub-module that actively initiates data transmission (such as sending a request, command or data) and determines the start and end of communication. It can be the master device of the functional sub-module, such as in the I2C functional sub-module, the master device generates and controls the clock signal (Serial Clock Line, SCL).

[0034] Optionally, in this embodiment, the slave object refers to the responder of the communication process. The slave object passively cooperates with the instructions of the master object to operate, cannot actively initiate communication, and can only wait for the instructions of the master object before responding. It can be a slave device of a functional sub-module. For example, in the SPI functional sub-module, the acceleration sensor acts as a slave object, waiting for the read or write command of the master object.

[0035] Optionally, in this embodiment, the number of communication timeouts refers to the number of times that the communication interaction between the slave object and the master object in the current functional sub-module within the first communication cycle exceeds a preset time threshold. If the preset time threshold is 1 second, if the actual communication interaction between the master object and the slave object exceeds 1 second, it can be deemed as a timeout.

[0036] Optionally, in this embodiment, before determining whether the expansion chip needs to be repaired, it is first necessary to obtain the number of communication timeouts corresponding to the current functional submodule in the expansion chip during the first communication cycle to determine whether the current functional submodule has an abnormality based on the number of communication timeouts.

[0037] Optionally, in this embodiment, when the master object and the slave object have a one-to-one relationship, it can be understood that there is a communication interaction between one master object and only one slave object. At this time, the number of communication interaction timeouts can be the number of communication interaction timeouts between the master object and the slave object.

[0038] Optionally, in this embodiment, when the master object and the slave objects are in a one-to-many relationship, it can be understood that there is communication interaction between one master object and multiple slave objects. At this time, the number of communication interaction timeouts can be the number of communication interaction timeouts between the master object and a certain slave object; or the number of communication interaction timeouts between the master object and some slave objects, where the some slave objects are more than one slave objects; or the number of communication interaction timeouts between the master object and all slave objects.

[0039] S204, when the number of communication timeouts meets the fault detection condition, determining a faulty object from the master object and at least one slave object;

[0040] Optionally, in this embodiment, the fault detection condition refers to a standard for determining whether the current functional sub-module is in an abnormal state. For example, if the number of communication timeouts between the master object and a slave object reaches 5 times during the first communication cycle, it can be determined that the number of communication timeouts meets the fault detection condition; for example, if the number of communication timeouts between the master object and all slave objects reaches 10 times during the second communication cycle, it can be determined that the number of communication timeouts meets the fault detection condition.

[0041] Optionally, in this embodiment, when there is one slave object and one master object, if the number of communication timeouts between the master object and the current slave object meets the fault detection condition, the fault object between the master object and the slave object can be obtained by executing diagnostic commands or hardware fault injection tests between the master object and the slave object respectively.

[0042] Optionally, in this embodiment, when there are multiple slave objects and a single master object, if the number of communication timeouts between the master object and the current slave object meets the fault detection criteria, the faulty object can be determined by disabling the current slave object and then determining the clock signal status between the remaining slave objects and the master object after disabling the current slave object. If the clock signal between the remaining slave objects and the master object is normal after disabling the current slave object, the current slave object can be determined to be the faulty object; if the clock signal between the remaining slave objects and the master object is abnormal, the master object can be determined to be the faulty object.

[0043] Optionally, in this embodiment, when there are multiple slave objects and multiple master objects, if the number of communication timeouts between the master object and the current slave object meets the fault detection condition, the master object can be replaced, and after the master object is replaced, the number of communication timeouts between the replaced master object and multiple slave objects is obtained. If the fault detection condition is not met, it can be considered that the master object before replacement is the faulty object; if the fault detection condition is met, it can be considered that one or some of the multiple slave objects are the faulty objects. At this time, the faulty object can be judged by clock signal judgment, diagnostic command response detection, hardware fault injection test, etc.

[0044] Optionally, in this embodiment, although a functional submodule may have multiple master objects and multiple slave objects in some cases, the communication process is between a single master object and multiple slave objects. For example, if a functional submodule has multiple master objects and master object A in the functional submodule communicates with multiple slave objects, and if master object A needs to be replaced with master object B, master object A enters sleep mode after the replacement with master object B.

[0045] In addition, if the information of any device between the master device or slave device under the current functional submodule cannot be obtained, it can be considered that the fault object is not the main object, but the entire current functional submodule has an abnormality, and the entire current functional submodule is regarded as the fault object.

[0046] Optionally, in this embodiment, the fault object refers to a specific object with a fault in the current functional submodule, such as a faulty slave object or a faulty master object.

[0047] Optionally, in this embodiment, the fault object may be determined by performing diagnostic command response checks on the master object and the slave object, performing hardware fault injection testing, performing log analysis, and the like to determine the specific object where the fault occurs.

[0048] Optionally, in this embodiment, after obtaining the number of communication timeouts of the current functional sub-module, it is determined whether the current functional sub-module has an abnormality by determining whether the number of communication timeouts meets the fault detection conditions. If the number of communication timeouts meets the fault detection conditions, the specific fault object is determined in the current functional sub-module.

[0049] S206: Perform a repair operation on the faulty object.

[0050] Optionally, in this embodiment, after the fault object is determined, a repair operation is performed on the fault object to repair the abnormality existing in the current functional submodule, thereby completing the repair of the expansion chip without restarting the entire expansion chip.

[0051] It should be noted that by monitoring the number of communication timeouts of specific functional sub-modules, once the number of timeouts meets the preset fault detection conditions, the fault object can be identified and located, and then corresponding repair measures can be taken. The expansion chip can be repaired without restarting the entire expansion chip, thereby ensuring the continuity and stability of the business during the repair process, thereby improving the operation and maintenance efficiency and stability of the storage server.

[0052] Through the embodiments of the present application, if the number of communication timeouts in the first communication cycle of the current functional submodule in the expansion chip meets the fault detection conditions, it can be determined that the current functional submodule is abnormal, and the fault object can be determined from the abnormal current functional submodule, so that a repair operation can be performed on the fault object. Because the repair operation can be performed on the fault object without restarting the entire expansion chip to perform the repair operation, the technical problem of the expansion chip repair process having an excessive impact on normal business operations can be solved, achieving the technical effect of reducing the interference of the expansion chip repair process on normal business operations.

[0053] As an optional solution, determining a faulty object from the master object and at least one slave object includes:

[0054] S1, performing a first clock signal detection on a current slave object among at least one slave object to obtain a first detection result, wherein the first detection result is used to indicate a clock signal condition between the master device and the current slave device;

[0055] S2. Based on the first detection result, if no faulty object is determined from the master object and the current slave object, obtain a clock signal detection result of a next slave object among the at least one slave object.

[0056] Optionally, in this embodiment, clock signal detection refers to the process of testing the quality of the clock signal during communication between the master and slave objects. Optionally, a clock signal refers to a periodic pulse signal that provides a synchronous timing reference for operations in a circuit, such as data transmission, calculations, and logic control. Through a fixed frequency and a stable pulse rhythm, it coordinates the operating pace of different circuit modules or devices, ensuring that data is sent, received, or processed at the correct time.

[0057] Optionally, in this embodiment, the detection result is used to indicate the clock signal condition of the master device during communication interaction with the slave device through the current functional submodule, such as whether the clock signal is stable, whether the clock signal is interrupted or delayed, etc.

[0058] Optionally, in this embodiment, when a faulty object is determined between a master object and at least one slave object, a clock signal detection is first performed between a current slave object in at least one slave object and the master object, and based on the detection result, it is determined whether there is a problem in the communication between the current slave object and the master object.

[0059] Optionally, in this embodiment, if the clock signal detection result between the master object and the current slave object indicates normal and no faulty object is detected between the master object and the current slave object, the clock signal detection result between the master object and the next slave object in at least one slave object is obtained.

[0060] When the clock signal detection result between the master object and the next slave object among the at least one slave object indicates that there is an abnormality in the clock signal between the master object and the next slave object among the at least one slave object, a faulty object is determined between the master object and the next slave object among the at least one slave object.

[0061] When a clock signal detection result between the master object and the next slave object among at least one slave object indicates that the clock signal between the master object and the next slave object among at least one slave object is normal, a faulty object is determined between the master object and the next slave object among at least one slave object until a detection result indicating that the clock signal between the master object and a certain slave object is abnormal is obtained.

[0062] It should be noted that by refining the detection steps and introducing a clock signal detection mechanism, the main object and specific slave object of the fault can be judged more accurately, thereby narrowing the scope of fault determination, more accurately determining the specific fault object, and improving the accuracy of determining the specific fault object.

[0063] Through the embodiments of the present application, a first clock signal detection is performed on the current slave object in at least one slave object to obtain a first detection result, wherein the first detection result is used to represent the clock signal status between the master device and the current slave device; based on the first detection result, if no faulty object has been determined between the master object and the current slave object, the clock signal detection result of the next slave object in at least one slave object is obtained. By refining the detection steps and introducing a clock signal detection mechanism, the scope of fault determination can be narrowed, and the specific faulty object can be more accurately determined, thereby achieving the technical effect of improving the accuracy of faulty object determination.

[0064] As an optional solution, after performing clock signal detection on a current slave object among at least one slave object and obtaining a first detection result, the method further includes:

[0065] S1, when the first detection result indicates that the clock signal between the master object and the current slave object is abnormal, obtaining the object address of the current slave object;

[0066] S2, sending a disable signal to the current slave object indicated by the object address, wherein the disable signal is used to adjust the current slave object to a dormant state;

[0067] S3, performing a second clock signal detection on the current functional submodule to obtain a second detection result;

[0068] S4, if the second detection result indicates that the clock signal between the master object and at least one reference slave object is normal, determining the current slave object as a faulty object, wherein the reference slave object is a slave object other than the current slave object in the at least one slave object;

[0069] S5 , when the second detection result indicates that the clock signal between the master object and at least one reference slave object is abnormal, determine the master object as a faulty object.

[0070] Optionally, in this embodiment, the disable signal is used to eliminate the influence of the slave object on the communication process of the entire functional sub-module, and is a signal used to adjust the slave object to a dormant or non-working state in a specific manner.

[0071] Optionally, in this embodiment, the object address refers to address information used to represent the identity of the slave object, and a signal may be sent to the target object address so that the slave object corresponding to the target object address receives the signal.

[0072] Optionally, in this embodiment, when the first detection result indicates that there is an abnormality in the clock signal between the current slave object and the master object, the object address of the slave object is first obtained, and a disable signal is sent to the current slave object indicated by the object address, so that the current slave object is adjusted to a sleep state.

[0073] Next, after the current slave object is set to a dormant state, a second clock signal test is performed on the master object and at least one reference slave object among the slave objects, excluding the current slave object, to obtain a second test result. If the second test result indicates that the clock signal between the master object and the at least one reference slave object is normal, it indicates that the current slave object has experienced an abnormality, and the current slave object can be determined to be a faulty object.

[0074] If the second detection result indicates that the clock signal between the master device and at least one reference slave device is abnormal, it indicates that the master device has experienced an abnormality, and the master device is determined to be a faulty device. The abnormality in the master device can also be understood as an abnormality occurring while executing the function corresponding to the current submodule of the master device. In this case, the master device can also be determined to be a faulty device.

[0075] Optionally, in this embodiment, the accuracy of fault diagnosis is ensured by disabling the current slave object suspected of being faulty, performing a second clock signal detection, and accurately locating the faulty object based on the result of the second clock signal detection.

[0076] According to an embodiment of the present application, when a first detection result indicates that the clock signal between the master object and the current slave object is abnormal, the object address of the current slave object is obtained; a disable signal is sent to the current slave object indicated by the object address, wherein the disable signal is used to adjust the current slave object to a dormant state; a second clock signal detection is performed on the current functional submodule to obtain a second detection result; when the second detection result indicates that the clock signal between the master object and at least one reference slave object is normal, the current slave object is determined to be a faulty object, wherein the reference slave object is a slave object other than the current slave object among the at least one slave object; when the second detection result indicates that the clock signal between the master object and at least one reference slave object is abnormal, the master object is determined to be a faulty object. By disabling the suspected faulty current slave object and performing a second clock signal detection, and by accurately locating the faulty object based on the result of the second clock signal detection, the accuracy of fault diagnosis is ensured.

[0077] As an optional solution, perform repair operations on the faulty object, including:

[0078] S1, when the main object is a faulty object, calling a repair subroutine to repair the current functional submodule, wherein the repair subroutine is a program pre-set by the expansion chip and is used to repair the current functional submodule according to a preset repair algorithm;

[0079] S2: If the faulty object is the current slave object, the current slave object is repaired by restarting the thread.

[0080] Optionally, in this embodiment, the repair subroutine is a program preset by the expansion chip and is used to repair the current functional submodule according to a preset repair algorithm.

[0081] Optionally, in this embodiment, if the main object is the faulty object, the specific faulty object can be further determined by judging other functional submodules installed in the main object. If the other functional submodules installed in the main object are normal, it can be determined that the current submodule installed in the main object is faulty. After determining that the main object is the faulty object, the current submodule is further determined to be the object to be repaired.

[0082] After the current submodule is identified as the target for repair, a repair subroutine is used to repair the current submodule. This repair process can be accomplished by resetting registers in the functional submodule controller, such as by clearing the functional submodule's counter to zero to prevent process freezes. During this process, the repair subroutine can also simulate clock pulses via general-purpose inputs and outputs to attempt to restore the functional submodule.

[0083] If the main object is a faulty object and other functional submodules of the main object also have abnormal conditions, it can be determined that the main object itself has an abnormality. At this time, the main object can be repaired by restarting the main object.

[0084] Optionally, in this embodiment, if the faulty object is the current slave object, the function corresponding to the functional submodule corresponding to the current slave object is restarted by restarting the thread to repair the slave object.

[0085] It should be noted that by expanding the built-in repair subroutine and restart thread of the chip, different repair methods can be performed on different objects according to the specific fault objects, thereby achieving targeted repairs without restarting the entire expansion chip, thereby improving the business logic of the expansion chip.

[0086] According to the embodiment of the present application, when the main object is a faulty object, a repair subroutine is called to repair the current functional submodule, wherein the repair subroutine is pre-set by the expansion chip and is used to repair the current functional submodule according to a preset repair algorithm; when the faulty object is the current slave object, the current slave object is repaired by restarting the thread. By using the built-in repair subroutine and restart thread of the expansion chip, different repair methods can be executed on different objects according to the specific faulty object, thereby achieving targeted repairs without restarting the entire expansion chip, thereby achieving the technical effect of improving the business logic of the expansion chip.

[0087] As an optional solution, after performing the repair operation on the faulty object, the method further includes:

[0088] S1, obtaining a third detection result obtained by a first chip performing a third clock signal detection on a current functional submodule, wherein the first chip is used to manage an expansion chip;

[0089] S2. When the third detection result indicates that the clock signal between the master object and the slave object is abnormal, a second signal is sent to the second chip through the first chip, wherein the second signal is used to instruct the second chip to restart the current functional submodule.

[0090] Optionally, in this embodiment, the first chip can be used to manage the expansion chip, which can be a baseboard management controller (BMC), an embedded microcontroller specifically used to monitor and manage computer hardware, mainly stored in systems such as servers and data center equipment.

[0091] Optionally, in this embodiment, the second signal is a signal for instructing the second chip to restart the current functional submodule. After receiving the second signal, the second chip performs a corresponding operation to restart the current functional submodule.

[0092] Optionally, in this embodiment, after performing a repair operation on the faulty object, a clock signal detection is obtained between the main object and at least one slave object of the current sub-module after the repair operation is performed through the first chip, and a third detection result is obtained. Whether the repair operation performed is successful is determined by the third detection result.

[0093] Optionally, in this embodiment, after obtaining the third detection result, if the third detection result indicates that there is an abnormality in the clock signal between the main object and at least one slave object of the functional sub-module after the repair operation is performed, it is determined that there is an abnormality in the repair operation performed and the function of the current functional sub-module has not been successfully repaired.

[0094] Then, a second signal is sent to the second chip through the first chip to instruct the second chip to restart the current functional submodule.

[0095] It should be noted that after performing the repair operation, the monitoring and management function of the first chip is enabled, and the current functional sub-module of the expansion chip is monitored based on the third detection result to see whether it has returned to normal. If the third detection result indicates that the current functional sub-module of the expansion chip has not returned to normal, it means that the repair operation has failed, and the current functional sub-module needs to be restarted through hardware restart to improve the success rate of the repair.

[0096] Through an embodiment of the present application, a third detection result is obtained by a first chip performing a third clock signal detection on the current functional submodule, wherein the first chip is used to manage the expansion chip. If the third detection result indicates that the clock signal between the master object and the slave object is abnormal, a second signal is sent to the second chip via the first chip, wherein the second signal is used to instruct the second chip to restart the current functional submodule. After performing a repair operation, the monitoring and management function of the first chip is enabled, and the current functional submodule of the expansion chip is monitored for recovery based on the third detection result. If the repair indicates failure, the current functional submodule is restarted based on the second signal, thereby improving the success rate of the repair.

[0097] As an optional solution, after the first chip sends the second signal to the second chip, the method further includes:

[0098] S1, obtaining a determination result returned by the second chip, wherein the determination result is a result obtained by the second chip after executing an abnormality determination algorithm on the current functional submodule and is used to indicate an abnormal state of the current functional submodule;

[0099] S2, when the determination result indicates that the current functional submodule is abnormal, obtaining a level control signal of the second chip, wherein the level control signal is used to set the level of the enable signal pin of the current functional submodule to be less than a first threshold;

[0100] S3, restarting the current functional submodule after the level is set low, to obtain a repaired current functional submodule.

[0101] Optionally, in this embodiment, the determination result is a result obtained by the second chip after executing an abnormality determination algorithm on the current functional submodule, indicating an abnormal state of the current functional submodule. The abnormality determination algorithm is an algorithm for performing abnormality determination on the functional submodule, and may be a filtering algorithm, an abnormality detection algorithm, or the like.

[0102] Optionally, in this embodiment, after obtaining the determination result returned by the second chip, the abnormal state of the current functional submodule is determined based on the determination result. If the determination result determines that the current functional submodule is indeed abnormal, a level control signal from the second chip is further obtained to set the level of the enable signal pin of the current functional submodule to less than a first threshold. The current submodule with the level set low is then restarted through hardware logic to obtain a repaired current functional submodule.

[0103] It should be noted that the second chip performs a secondary judgment on the current functional sub-module. Only when the secondary judgment determines that the current functional sub-module is indeed abnormal, the hardware logic of the current functional sub-module is restarted. This can effectively prevent the problem of erroneous restart of the functional sub-module due to clock signal abnormalities caused by accidental events after the repair operation is performed, thereby improving the continuity of the overall business of the expanded chip.

[0104] Through the embodiment of the present application, the determination result returned by the second chip is obtained, wherein the determination result is a result obtained by the second chip after executing an abnormality determination algorithm on the current functional submodule, which is used to represent the abnormal state of the current functional submodule; when the determination result indicates that the current functional submodule is abnormal, the level control signal of the second chip is obtained, wherein the level control signal is used to set the level of the enable signal pin of the current functional submodule to be less than the first threshold; the current functional submodule after the level is set low is restarted to obtain the repaired current functional submodule. Performing a secondary determination on the current functional submodule by the second chip can effectively prevent the problem of erroneous restart of the functional submodule in the case of clock signal abnormality caused by accidental events after the repair operation is performed, thereby improving the continuity of the overall business of the expansion chip.

[0105] As an optional solution, before obtaining the number of communication timeouts corresponding to the current functional submodule in the expansion chip in the first communication cycle, the method includes:

[0106] S1, executing a decoupling algorithm on at least two submodules in the extended chip to obtain at least two decoupled target submodules, wherein a function call relationship exists between the at least two submodules, and the decoupling algorithm is used to remove the function call relationship between the at least two submodules;

[0107] S2: Determine a current functional submodule from at least two target submodules.

[0108] Optionally, in this embodiment, the decoupling algorithm is an algorithm for contacting the function call relationship between at least two sub-modules. During the execution of the decoupling algorithm, the decoupling between at least two sub-modules can be achieved by first defining an abstract interface, then executing the module independently, then initializing the scheduler, and finally initializing the registration module.

[0109] It should be noted that when manufacturers produce expansion chips, in order to reduce production costs, they will couple the various functional sub-modules in the expansion chip. However, the coupling relationship between the functional sub-modules of the expansion chip will result in the inability to perform targeted repairs on the abnormal functional sub-module when an abnormality occurs in a functional sub-module of the expansion chip. The only way is to restart the entire expansion chip to restore the function of the abnormal functional sub-module.

[0110] Therefore, in this embodiment, before obtaining the number of communication timeouts of the current functional sub-module, at least two sub-modules in the expansion chip are decoupled through a decoupling algorithm, so that there is no function call relationship between the at least two target sub-modules after decoupling. Therefore, when repairing the functional sub-module, it will not affect the functional implementation of other target sub-modules. When repairing the abnormal functional sub-module, not only the affected functional sub-modules are reduced and the efficiency of the repair is improved, but also the impact on the overall business of the expansion chip can be reduced.

[0111] Through the embodiments of the present application, a decoupling algorithm is executed on at least two submodules in an expansion chip to obtain at least two target submodules after decoupling, wherein a function call relationship exists between the at least two submodules. The decoupling algorithm is used to dissolve the function call relationship between the at least two submodules; and a current functional submodule is determined from the at least two target submodules. Through the decoupling algorithm, at least two submodules in the expansion chip are decoupled, so that no function call relationship exists between the at least two target submodules after decoupling. This reduces the number of affected functional submodules when repairing an abnormal functional submodule, thereby improving the efficiency of repairing the functional submodule.

[0112] As an optional solution, in order to better understand the process of the above-mentioned extended chip repair method, the following describes the repair process of the above-mentioned extended chip repair method in combination with an optional embodiment, but it is not used to limit the technical solution of the embodiment of this application.

[0113] This embodiment relates to a storage model expansion chip management method and device in the field of data center technology. With the advent of the era of big data, cloud computing, and cloud storage, internet traffic and data volumes have experienced rapid growth. Many large enterprises generate an enormous amount of data daily, often requiring petabyte-level data storage. Petabyte-level storage servers are primarily used for cold data storage, data backup, and data archiving. As storage capacity increases, the number of servers deployed increases, the density increases, and the load becomes increasingly greater. To improve storage management efficiency, multi-link storage clusters consisting of multiple storage servers have emerged. A multi-server cluster can contain thousands of traditional hard disk drives (HDDs) for large-capacity storage. Currently, common mass storage servers typically consist of dozens to hundreds of disks. Disk management and communication are paramount for storage servers. This includes data reading and writing, disk operations, hot maintenance of disks during operations, and monitoring of disk status parameters, all of which are closely related to disk management. At the same time, due to server failure, the amount of business data to be migrated is large (the migration time is dozens or even hundreds of times that of ordinary computing), the impact range is wide (a storage machine may be used for different business scopes), and the business is in urgent need of self-repair and software repair of the server without or with little impact on the business.

[0114] Based on the above problems, this embodiment proposes a management method for storage model expansion chips, which is used to solve the current problem that storage management modules are prone to failure, and realize self-repair and soft repair functions of SAS, SATA, I2C, SPI and other functional modules of the expansion chip from the software and hardware levels, reduce operations such as restart, and reduce business disruptions, so as to provide solutions from hardware, software and other aspects in a more systematic, scientific and reasonable manner.

[0115] For existing servers, if a function of the EXP chip fails, recovery and verification are typically performed by manually restarting the entire server and then the EXP. The EXP chip contains multiple functional modules, such as the SAS link module (responsible for reading in-band hard drive storage media), the I2C link module (responsible for obtaining out-of-band hard drive temperature and other parameters), and other modules. Restarting the entire server or the EXP chip will impact services (partially restarting the SAS link) and prevent the reading of hard drive information under the EXP. This significantly inconveniences maintenance and operations, potentially leading to incorrect data disk replacement during repair, and severely impacting server maintainability.

[0116] The specific plan is as follows:

[0117] EXP firmware software layer realizes the functions of hot maintenance and soft repair:

[0118] Through a code decoupling algorithm, the coupled algorithm calls of each functional module are reduced, minimizing the impact of single module restarts. During the code initialization phase of each submodule of the EXP chip, function calls are decoupled, eliminating the need for underlying initialization sub-function calls between modules. Functional modules include SAS, SATA, I2C, and SPI. Taking the I2C function as an example, before optimization, the thread initialization process of the EXP I2C function code contained mutual calls with the SAS function code, causing I2C initialization to rely on certain SAS functions. This made it impossible to achieve seamless initialization of the I2C function. Therefore, to address this issue, call scenarios were eliminated from the code algorithm process of each submodule of the EXP code, reducing the impact of soft repairs on other modules at the code level.

[0119] To further illustrate, optionally Figure 3 As shown in (a), there are function codes 304, 306, and 308 in function module 302, and function codes 304, 312, 314, and 316 in function module 310. After executing the decoupling algorithm, as shown in FIG. Figure 3 As shown in (b), function module 302 includes function codes 304 , 306 , and 308 , and function module 310 includes function codes 312 , 314 , 316 , and 318 , wherein function code 318 is used to implement a function similar to or identical to function code 304 .

[0120] In the decoupling algorithm process, taking the decoupling of I2C and SAS function initialization functions as an example, modular design and dependency injection are used to separate the initialization logic of the two to avoid direct coupling. The specific solution is as follows:

[0121] Step 1: Define the abstract interface. Create a general hardware initialization interface for the I2C and SAS modules to implement, as shown in the following code:

[0122] Step 2: Module independent implementation.

[0123] Step 3: Initialize the scheduler (decoupled core). Implement the central scheduler management module registration and initialization sequence, and achieve the isolation and call of I2C and SAS functions. The call phenomenon will not occur in the underlying sequence of I2C and SAS.

[0124] Step 4: Initialize and register the module. Register the module when the system starts (no code coupling).

[0125] Through the EXP firmware algorithm, the abnormality monitoring and self-soft repair functions of each EXP sub-module are realized; each EXP sub-module adds module abnormality monitoring (module self-monitoring, other module monitoring). If a module abnormality is detected, the software reset function can be used to correct the code abnormality in time; if the correction is ineffective, the self-restart repair function of the abnormal module can be used.

[0126] Functional modules include SAS, SATA, I2C, SPI and other functional modules. Taking I2C function as an example, for example:

[0127] The I2C module of EXP uses its own I2C timeout detection function mechanism. If the number of communication timeouts exceeds the set threshold (for example, 3 times), it will actively trigger the detection mechanism of the I2C clock signal SLC.

[0128] A. Slave device abnormality: Check whether a slave device actively pulls down the clock signal, causing the abnormality. After identifying the abnormal device by the slave address, you can further restore the I2C link communication by re-enabling the I2C function of the slave device;

[0129] B. Server device abnormality: When Exp is unable to distinguish any device status under this link communication, it is determined that the server device is abnormal (that is, the EXP's own I2C module has an abnormality). After a set time (for example, 20 seconds), EXP enters the subroutine that automatically calls the I2C restart and repair subroutine to further restore the EXP's own I2C function. The restart and repair subroutine is as follows: (1) (lightest): reset the register of the I2C controller (do not restart the I2C module, just clear the counter in the I2C module to avoid process freezing) (2): simulate the generation of clock pulses through general purpose input / output (GPIO) (need to be able to control the SCL pin of the I2C bus, do not restart the I2C module, and simulate the clock pulse to see if the I2C can be saved).

[0130] To further illustrate, optionally Figure 4 As shown:

[0131] S401, firmware soft repair;

[0132] S402, decoupling of underlying software code calls;

[0133] S403: Initialization and decoupling of each underlying module, so that each submodule can be initialized without any other modules;

[0134] S404, executing abnormality monitoring and self-repair functions of each submodule;

[0135] S405: Determine whether there is a problem with the expansion chip. If so, execute S406 and S407.

[0136] S406, detecting the slave device and actively triggering the reconstruction of the submodule of the slave device;

[0137] S407: After the timeout, the expansion chip calls the module restart function, and the abnormal module automatically restarts and repairs.

[0138] The service provides software monitoring for each module of the entire system, enabling hot maintenance and soft repair. Scenario 2: If the EXP's self-monitoring and soft repair functions fail, the system can trigger hardware signals through other chip modules such as the BMC and Complex Programmable Logic Device (CPLD), restarting the EXP's submodules at the hardware logic level to achieve recovery.

[0139] Functional modules include SAS, SATA, I2C, SPI and other functional modules. Take the I2C bus as an example, for example:

[0140] When the EXP's I2C module becomes abnormal and the repair in scenario 1 fails, the BMC and CPLD detect that the EXP's I2C signal clock signal SLC and data signal SDA time out (for example, the set time is 60 seconds) and there is no signal response. In this case, the BMC triggers the CPLD to set the EXP's I2C enable signal pin low. After receiving the BMC signal, the CPLD uses the CPLD's filtering algorithm to determine (if it is truly abnormal) and sets the EXP's I2C enable pin low.

[0141] At this time, the EXP's I2C module restarts the module through the internal hardware logic of the EXP chip, thereby restoring I2C communication.

[0142] Alternatively, as Figure 5 The following is the hardware control logic:

[0143] S501, firmware logic restart failure;

[0144] S502, baseboard control manager / complex programmable logic device adds expansion chip monitoring function;

[0145] S503, the baseboard control manager / complex programmable logic device detects whether the signal of the expansion chip is normal, if not, execute S504;

[0146] S504, obtaining a detection result of communication timeout and clock signal / data signal no response;

[0147] S505, after the baseboard control manager makes a judgment, it triggers the complex programmable logic device to make a secondary judgment;

[0148] S506, the complex programmable logic device determines again whether there is an abnormality;

[0149] S507, triggering a hardware enable signal for restarting the submodule of the expansion chip;

[0150] S508: After the submodule is restarted, normal communication is restored.

[0151] Alternatively, as Figure 6 The following is the optimization diagram of the hardware part. The specific steps are as follows:

[0152] S601: The baseboard control manager detects that the function module A of the expansion chip is abnormal and changes the level state of the general input and output pins;

[0153] S602, the level state change of the general input and output pin triggers the secondary detection of the complex programmable logic device to determine whether the functional module A is abnormal;

[0154] S603 , the hardware enable pin of the functional module A of the expansion chip is set low, triggering the functional module A of the expansion chip to restart.

[0155] Alternatively, as Figure 7 The following is a flowchart of soft repair. The specific steps are as follows:

[0156] S701, health self-test management thread starts;

[0157] S702, the timer thread detects every 10 seconds;

[0158] S703: Check if the submodule is abnormal. If so, execute S704; otherwise, execute S702.

[0159] S704, the test management threads of submodule A, submodule B, submodule C, etc. are started;

[0160] S705, detecting all functional conditions of submodule A, submodule B, submodule C, ... modules;

[0161] S706, determine whether all functions under submodule A are abnormal, if yes, execute S707, otherwise execute S708;

[0162] S707, determining that the submodule A body is abnormal;

[0163] S708, disable / disable device Y with the same function;

[0164] S709, determine whether the function of submodule A is restored, if yes, execute S710, otherwise execute S707;

[0165] S710: Downstream device Y causes submodule A to malfunction.

[0166] S711: Actively trigger the soft repair and hot restart thread of downstream device Y;

[0167] S712, self-repair thread of submodule A.

[0168] Alternatively, as Figure 8 As shown, continue Figure 7 The content is a hardware repair flowchart. The specific steps are as follows:

[0169] S801, after executing the self-repair thread of submodule A in S712, determine whether submodule A has recovered, if so, execute S702, otherwise execute S802;

[0170] S802, the baseboard control manager detects that the submodule A function process of the expansion chip is started;

[0171] S803, the abnormal information of functional module A is recorded in the precise log of the baseboard control manager;

[0172] S804: The baseboard control manager transmits a high or low level signal or a data packet to the complex programmable logic device via a general-purpose input / output (GPIO) to indicate that submodule A is abnormal.

[0173] S805, secondary detection to determine whether the function module A is abnormal, if yes, execute S806, otherwise execute S802;

[0174] S806, the complex programmable logic device triggers the hardware restart signal of submodule A to be enabled;

[0175] S807: Is the function of submodule A restored? If yes, execute S808; otherwise, execute S809;

[0176] S808, submodule A restores information and records it into the precise log of the baseboard control manager;

[0177] S809, the submodule A hardware recovery failure information is recorded in the precise log of the baseboard control manager;

[0178] S810: Record abnormal alarm information of submodule A of the expansion chip into the daily log.

[0179] Through the embodiments of the present application, through the design of EXP's own firmware code, monitoring of external inspection hardware and other multi-dimensional dimensions, for the sub-modules of EXP, the self-repair and soft repair functions of modules such as Expand out-of-band monitoring are realized from the software and hardware levels, reducing operations such as restarts and reducing business disruptions, so as to provide solutions from hardware, software and other aspects in a more systematic, scientific and reasonable manner.

[0180] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0181] Based on this understanding, the technical solution of this application, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, or optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of this application.

[0182] In this embodiment, a device for repairing an expansion chip is also provided. The device is used to implement the above-mentioned embodiments and preferred embodiments, and the details that have been described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.

[0183] Figure 9 is a structural block diagram of a repair device for an expansion chip according to an embodiment of the present application; Figure 9 Shown, including:

[0184] An acquiring unit 902 is configured to acquire a number of communication timeouts corresponding to a current functional submodule in the expansion chip within a first communication cycle, wherein the number of communication timeouts indicates the number of times that a communication interaction between a master object and at least one slave object in the current functional submodule exceeds a preset time threshold.

[0185] A determining unit 904 is configured to determine a faulty object from the master object and at least one slave object when the number of communication timeouts meets a fault detection condition;

[0186] The repair unit 906 is configured to perform a repair operation on the faulty object.

[0187] As an optional unit, the determination unit 904 includes: a detection module, which is used to perform a first clock signal detection on a current slave object among at least one slave object to obtain a first detection result, wherein the first detection result is used to represent the clock signal situation between the master object and the current slave object; a first acquisition module, which is used to obtain the clock signal detection result of the next slave object among at least one slave object based on the first detection result, when no faulty object is determined between the master object and the current slave object.

[0188] As an optional solution, as an optional unit, the detection module includes: a first acquisition submodule, used to perform a first clock signal detection on a current slave object among at least one slave object to obtain a first detection result, and after the first detection result indicates that the clock signal between the master object and the current slave object is abnormal, obtain the object address of the current slave object; a sending submodule, used to send a disable signal to the current slave object indicated by the object address, wherein the disable signal is used to adjust the current slave object to a sleep state; a detection submodule, used to perform a second clock signal detection on the current functional submodule to obtain a second detection result; a first determination submodule, used to determine the current slave object as a faulty object when the second detection result indicates that the clock signal between the master object and at least one reference slave object is normal, wherein the reference slave object is a slave object other than the current slave object among the at least one slave object; a second determination submodule, used to determine the master object as a faulty object when the second detection result indicates that the clock signal between the master object and at least one reference slave object is abnormal.

[0189] As an optional solution, the repair unit 906 includes: a repair module, which is used to call a repair subroutine to repair the current functional sub-module when the main object is a faulty object, wherein the repair subroutine is a program pre-set by the expansion chip and is used to repair the current functional sub-module according to a preset repair algorithm; a restart module, which is used to repair the current slave object by restarting the thread when the faulty object is the current slave object.

[0190] As an optional solution, the repair unit 906 includes: a second acquisition module, used to obtain a third detection result obtained by the first chip performing a third clock signal detection on the current functional sub-module, wherein the first chip is used to manage the expansion chip; a sending module, used to send a second signal to the second chip through the first chip when the third detection result indicates that the clock signal between the master object and the slave object is abnormal, wherein the second signal is used to instruct the second chip to restart the current functional sub-module.

[0191] As an optional solution, the sending module includes: a second acquisition submodule, used to obtain the judgment result returned by the second chip, wherein the judgment result is a result obtained by the second chip after executing an abnormality judgment algorithm on the current functional submodule, which is used to represent the abnormal state of the current functional submodule; a third acquisition submodule, used to obtain the level control signal of the second chip when the judgment result indicates that there is an abnormality in the current functional submodule, wherein the level control signal is used to set the level of the enable signal pin of the current functional submodule to be less than a first threshold; a restart submodule, used to restart the current functional submodule after the level is set low, to obtain the repaired current functional submodule.

[0192] The above-mentioned extended chip repair device also includes: a decoupling unit, used to execute a decoupling algorithm on at least two sub-modules in the extended chip to obtain at least two target sub-modules after decoupling, wherein there is a function call relationship between the at least two sub-modules, and the decoupling algorithm is used to release the function call relationship between the at least two sub-modules; a determination unit, used to determine the current functional sub-module from the at least two target sub-modules.

[0193] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0194] For the description of the features in the embodiment corresponding to the extended chip repair device, please refer to the relevant description of the embodiment corresponding to the extended chip repair method, which will not be repeated here.

[0195] An embodiment of the present application further provides an electronic device, Figure 10 is a schematic diagram of an electronic device according to an embodiment of the present application, such as Figure 10 As shown, the electronic device includes a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned embodiments of the method for repairing an extended chip.

[0196] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0197] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0198] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned embodiments of the method for repairing an extended chip when running.

[0199] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0200] An embodiment of the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the method in each embodiment of the present application; the computer program product also includes a non-volatile computer-readable storage medium, which stores the computer program, which, when executed by a processor, implements the steps of the method for repairing the expansion chip in each embodiment of the present application.

[0201] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0202] The above is a detailed introduction to a method for repairing an expansion chip provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A method for repairing an expansion chip, characterized in that: include: Obtaining a number of communication timeouts corresponding to a current functional submodule in the expansion chip within a first communication cycle, wherein the number of communication timeouts is used to indicate the number of times that a communication interaction between a master object and at least one slave object of the current functional submodule exceeds a preset time threshold; When the number of communication timeouts meets the fault detection condition, Performing a first clock signal detection on a current slave object among at least one of the slave objects to obtain a first detection result, wherein the first detection result is used to represent a clock signal condition between the master object and the current slave object; When the first detection result indicates that the clock signal between the master object and the current slave object is abnormal, obtaining the object address of the current slave object; sending a disable signal to the current slave object indicated by the object address, wherein the disable signal is used to adjust the current slave object to a sleep state; Performing a second clock signal detection on the current functional submodule to obtain a second detection result; If the second detection result indicates that the clock signal between the master object and at least one reference slave object is normal, determining the current slave object as the faulty object, wherein the reference slave object is the slave object among the at least one slave object except the current slave object; If the second detection result indicates that the clock signal between the master object and at least one of the reference slave objects is abnormal, determining the master object as the faulty object; Based on the first detection result, if the faulty object is not determined from the master object and the current slave object, obtaining a clock signal detection result of a next slave object among at least one of the slave objects; Perform a repair operation on the faulty object.

2. The method according to claim 1, characterized in that The performing of a repair operation on the faulty object includes: In the case where the main object is the faulty object, calling a repair subroutine to repair the current functional submodule, wherein the repair subroutine is a program pre-set by the expansion chip and used to repair the current functional submodule according to a preset repair algorithm; In a case where the faulty object is the current slave object, the current slave object is repaired by restarting the thread.

3. The method according to claim 1, characterized in that After performing a repair operation on the faulty object, the method further includes: Obtaining a third detection result obtained by a first chip performing a third clock signal detection on the current functional submodule, wherein the first chip is used to manage the expansion chip; When the third detection result indicates that the clock signal between the master object and the slave object is abnormal, a second signal is sent to the second chip through the first chip, wherein the second signal is used to instruct the second chip to restart the current functional sub-module.

4. The method according to claim 3, characterized in that After the first chip sends the second signal to the second chip, the method further includes: Obtaining a determination result returned by the second chip, wherein the determination result is a result obtained by the second chip after executing an abnormality determination algorithm on the current functional submodule and is used to indicate an abnormal state of the current functional submodule; If the determination result indicates that the current functional submodule is abnormal, obtaining a level control signal of the second chip, wherein the level control signal is used to set the level of the enable signal pin of the current functional submodule to be less than a first threshold; The current functional submodule after the level is set low is restarted to obtain the repaired current functional submodule.

5. The method according to any one of claims 1 to 4, characterized in that Before obtaining the number of communication timeouts corresponding to the current functional submodule in the expansion chip in the first communication cycle, the method includes: executing a decoupling algorithm on at least two submodules in the extended chip to obtain at least two decoupled target submodules, wherein a function call relationship exists between at least two of the submodules, and the decoupling algorithm is used to remove the function call relationship between the at least two submodules; The current functional sub-module is determined from at least two target sub-modules.

6. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the method for expanding a chip as claimed in any one of claims 1 to 5 when executing the computer program.

7. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method for expanding a chip according to any one of claims 1 to 5.

8. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method for expanding a chip according to any one of claims 1 to 5 are implemented.

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