Improved vector fitting algorithm based on hierarchical residual optimization and storage medium
Through the vector fitting method of layered residual optimization, the problems of low modeling accuracy and poor convergence in the existing technology are solved, and efficient multi-port S parameter modeling and simulation are realized to generate SPICE equivalent circuits with strong compatibility.
Patent Information
- Application Number
- CN202510680477.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-26
- Publication Date
- 2025-08-15
AI Technical Summary
Existing vector fitting algorithms face problems such as low modeling accuracy, poor convergence and insufficient simulation efficiency when dealing with complex high-frequency circuits, especially in multiple delays, high-frequency noise and multi-port networks.
A vector fitting method with hierarchical residual optimization is adopted. Through hierarchical delay extraction and signal decomposition, combined with adaptive vector fitting algorithm and multi-level iterative reconstruction, a hybrid topology SPICE equivalent circuit is generated, including time domain delay estimation, frequency domain smoothing processing, adaptive pole optimization and multi-level iterative residual update.
It significantly improves the robustness and simulation efficiency of high-frequency band modeling, solves the modeling accuracy problems under multiple delays and high-frequency noise interference, generates an equivalent circuit compatible with multi-port S parameters, and improves the engineering applicability of simulation results.
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Figure CN120493844A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuit design and provides an improved vector fitting algorithm based on hierarchical residual optimization and a storage medium. Background Art
[0002] With the rapid advancement of integrated circuit manufacturing and integration processes, signal integrity issues in high-speed electronic systems have become increasingly prominent. Higher data rates, lower logic levels, and dense interconnect layouts in multilayer printed circuit boards have significantly increased the impact of parasitic effects on signal quality. Signal integrity (SI), a core metric that measures the degree of variability in electrical signal transmission, has become a key consideration in high-speed electronic system design. Issues such as signal reflections, crosstalk, and electromagnetic interference directly impact system reliability, and traditional analysis methods face significant challenges when dealing with complex high-frequency circuits.
[0003] 1. Signal integrity and S-parameter modeling
[0004] In signal integrity analysis, transmission lines, as fundamental components, require their frequency-dependent and distributed electromagnetic properties to be accurately characterized using scattering parameters (S-parameters). S-parameters can fully describe the frequency-dependent gain, return loss, and impedance characteristics of a device and are widely used in RF, microwave, and high-speed circuit design. However, directly using raw S-parameters for circuit simulation often faces numerical convergence difficulties and time-domain simulation limitations. To address this, the industry typically converts S-parameters into SPICE-compatible equivalent circuit models, reproducing frequency-domain behavior using lumped components such as inductors and capacitors to improve simulation efficiency and stability.
[0005] 2. Development and limitations of vector fitting algorithms
[0006] The Vector Fitting (VF) algorithm, a core technology for passive device macromodeling, maps S-parameters to equivalent circuits through rational function approximation. While derivative algorithms such as Relaxed Vector Fitting (MVF) and Vector Adaptive Fitting (VFAS) improve convergence in noisy environments, they still suffer from the following issues:
[0007] Limited high-frequency fitting capability: MVF requires the number of poles to be specified in advance and cannot adapt to complex spectra;
[0008] Insufficient delay processing: VFAS ignores the signal delay component, resulting in phase error;
[0009] High computational complexity: Although Delay Vector Fitting (DVF) introduces delay compensation, the computational complexity increases dramatically in scenarios with multiple delays, making it difficult to converge to the correct solution and unsuitable for large-scale modeling. Even slightly inaccurate delay extraction can lead to numerical oscillations that cause slight misalignments. These misalignments accumulate over the number of cycles, becoming more pronounced with increasing oscillation periods. When the delay is large, the numerical oscillations can be severe, and a single data point can contain many cycles. While initially fine, the misalignment becomes increasingly pronounced, ultimately deviating from the phase by a full cycle. Consequently, the least squares method cannot effectively obtain the optimal fitting parameters. Furthermore, if the data contains multiple levels of delay, the iterative process is particularly prone to divergence.
[0010] 3. Challenges of Equivalent Circuit Generation
[0011] Existing equivalent circuit generation methods are mostly based on classical network synthesis theory, but face the following bottlenecks:
[0012] Poor model compatibility: Early algorithms only supported admittance parameters and had difficulty processing multi-port S parameters;
[0013] Passive forced error: Passive correction introduces small fitting deviations;
[0014] Lack of delay characterization: Existing methods cannot effectively characterize networks containing delays, limiting their scope of application. Summary of the Invention
[0015] The purpose of the present invention is to solve the problems of poor convergence, low modeling accuracy and insufficient simulation efficiency caused by the accumulation of explicit delay parameter extraction errors, limited pole migration freedom and insufficient equivalent circuit topology representation in existing vector fitting algorithms when dealing with complex multiple delays, high-frequency noise interference and multi-port network modeling.
[0016] In order to achieve the above-mentioned purpose, the present invention adopts the following technical means:
[0017] The present invention provides a vector fitting method based on hierarchical residual optimization for S-parameter modeling and equivalent circuit generation in high-speed circuit signal integrity analysis, comprising the following steps:
[0018] Step 1: Obtain the multi-port S-parameter frequency domain data of the device to be modeled, set the original frequency domain response as the initial level residual signal, and initialize the total frequency domain model to zero;
[0019] Step 2: Hierarchical delay extraction and signal decomposition: perform time domain delay estimation on the current residual signal and extract the main delay component τ m And by performing delay removal and frequency domain smoothing on the residual signal, the de-delayed smoothed signal corresponding to the current level is generated;
[0020] Step 3: Hierarchical vector fitting: hierarchical adaptive vector fitting: using adaptive vector fitting algorithm (VFAS) to perform pole-residual modeling on the de-delayed smoothed signal, by dynamically adding and deleting poles to match signal features, to generate a local rational function model of the current level;
[0021] Step 4: Hierarchical model reconstruction and residual update: Reconstruct the local rational function model and delay component of the current level into frequency domain response, add them to the total model, and calculate the residual signal between the total model and the original data;
[0022] Step 5: Multi-level hierarchical iteration: Use the updated residual signal as the input of the next layer and repeat steps 2-4 until the residual error is lower than the preset threshold, completing the superposition synthesis of the multi-level fitting model;
[0023] Step 6: Equivalent circuit generation: Based on the pole-residual parameters in the final hierarchical fitting results, a hybrid topology SPICE equivalent circuit containing a distributed transmission line model and a lumped parameter network is generated by mapping real poles to RLC networks and complex pole pairs to RLCG coupled networks.
[0024] In the above scheme, step 1 includes the following steps:
[0025] Step 1.1: Obtain a frequency domain data set of multi-port S-parameters of the device to be modeled, represented as a sequence of discrete frequency points where s k is the kth complex frequency point, is the corresponding S-parameter matrix frequency domain response value;
[0026] Step 1.2: Set the multi-port S-parameter frequency domain data set as the initial level residual signal And the total frequency domain model Initialize the matrix to zeros.
[0027] In the above scheme, step 2 includes the following steps:
[0028] Step 2.1: For the current level residual signal Perform time domain delay estimation and extract the main delay component τ based on time domain impulse response peak detection m , where T m is the time delay corresponding to the local peak in the residual signal whose amplitude exceeds the average level;
[0029] Step 2.2: Perform delay removal on the residual signal to generate a de-delayed frequency domain signal in Represents the frequency domain phase compensation term, which is used to eliminate the delay effect Tm in the residual signal, where s kis the complex frequency point;
[0030] Step 2.3: Perform frequency domain smoothing on the de-delayed frequency domain signal, suppress high-frequency noise and spectrum spikes through low-pass filtering, and generate the de-delayed smoothed signal corresponding to the current level.
[0031] In the above scheme, step 3 includes the following steps:
[0032] The overall idea is divided into three parts. It requires n1 steps of relocation, then n2 steps of pole addition and deletion + relocation. After convergence, it is necessary to perform redundant pole deletion and n3 steps of pole relocation again until convergence. The specific detailed steps are as follows:
[0033] Step 3.1: Use the vector fitting algorithm VFAS to smooth the signal Perform the first stage of pole-residual modeling and build a local rational function model Its expression is:
[0034]
[0035] Among them, c m0 is the constant term coefficient, c j is the residual coefficient corresponding to the j-th pole, p j is the stable pole generated by VFAS dynamic migration, and n is the total number of poles in the current level; the specific steps are as follows:
[0036] Step 3.1.1: Initialize the module: Based on Frequency domain trend characteristics, select the initial pole set {q j}, where q j is the initial pole position, and the maximum number of iteration steps n1, n2, and n3 in each stage are set;
[0037] Step 3.1.2: By linearizing the error equation:
[0038]
[0039] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point;
[0040] Step 3.1.3: Pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data: According to:
[0041]
[0042] Update the pole position {p i}, where {p i} is solved by matrix The characteristic value is obtained, A=diag(q1,q2,…,q n ) is the initial pole diagonal matrix, 1=(1,1,…,1) T , d=(d1,d2,…,d n ); The number of pole relocations is increased by one. If the number of pole relocations is less than n1, return to step 3.1.2, otherwise go to step 3.2;
[0043] Step 3.2: The VFAS algorithm implements the second stage of dynamic pole addition and deletion through the following steps:
[0044] Step 3.2.1: By linearizing the error equation:
[0045]
[0046] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point;
[0047] Step 3.2.2: Pole relocation module: According to Update the pole position {p i};
[0048] Step 3.2.3: Pole addition and deletion module: According to the residual energy distribution, new poles are inserted at the peak position of the residual energy spectrum. At the same time, poles with coefficients less than the threshold are cleared and clustered poles with distances less than the threshold δ are merged to generate an optimized pole set.
[0049] Step 3.2.4: Error evaluation module: Calculate the root mean square error (RMSE) of the fitting result. If the RMSE does not reach the preset threshold, the number of extreme points is within the limit, and the number of iterations is less than n2 (the maximum number of iterations is set here to prevent infinite iterations and ensure that the algorithm can terminate in time), return to step 3.2.1 and iterate until convergence.
[0050] Step 3.3: The VFAS algorithm implements the third stage of redundant pole removal and post-processing through the following steps:
[0051] Step 3.3.1: Pole deletion module: remove poles with coefficients less than the threshold, merge clustered poles with distances less than the threshold δ, generate an optimized pole set, and reset the pole relocation count;
[0052] Step 3.3.2: By linearizing the error equation:
[0053]
[0054] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ;
[0055] Step 3.3.3: Use the pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data, according to:
[0056]
[0057] Update the pole position {p i}, the number of pole relocations increases by one. If the number of pole relocations is less than n3, return to step 3.3.2; otherwise, end step 3.3.
[0058] In the above scheme, step 4 includes the following steps:
[0059] Step 4.1: Convert the local rational function model of the current level and the extracted main delay component τ m Reconstruction into frequency domain response
[0060] Step 4.2: Reconstruct the frequency domain response Accumulated to the total frequency domain model The updated total model is:
[0061]
[0062] Step 4.3: Calculate the updated total model Compared with the original S parameter data The residual signal between
[0063]
[0064] In the above scheme, step 5 includes the following steps:
[0065] The updated residual signal As the input of the next layer, repeat the delay extraction, vector fitting, and model reconstruction steps from step 2 to step 4 until one of the following iteration termination conditions is met:
[0066] a) The residual error ∈ is lower than the preset threshold ∈ th , the residual error ∈ is calculated by the root mean square error formula:
[0067]
[0068] Among them, K is the total number of frequency points, is the residual signal of the i-th layer;
[0069] b) The number of iterations reaches the preset maximum number of levels L max ;
[0070] Complete the superposition synthesis of multi-level fitting models and output the total frequency domain model
[0071] In the above scheme, step 6 includes the following steps:
[0072] Based on the extreme-residual parameters {p j , c j}, execute the following circuit mapping rules to generate the SPICE equivalent circuit:
[0073] Step 6.1: Real pole mapping: Map the real poles p j ∈R corresponding item Mapped as a series RLC network, where the resistor R j With inductance L j satisfy:
[0074]
[0075] Step 6.2: Complex conjugate pole pair mapping: Map the complex pole pair p j and its residual c j Mapped into an RLCG coupling network, it satisfies:
[0076]
[0077] Among them, L, R, C m Forming a parallel resonant circuit, G m is a voltage-controlled current source connected across the capacitor node;
[0078] Step 6.3: Distributed transmission line embedding: Extract the main delay component T m The transmission line element is modeled as a time delay T m Distributed transmission line model;
[0079] Step 6.4: Hybrid topology synthesis: interconnect the RLC network, RLCG coupling network and distributed transmission line model according to the port coupling relationship to generate a multi-port hybrid topology SPICE equivalent circuit.
[0080] The present invention also provides a storage medium. When a processor executes a program in the storage medium, the vector fitting method based on hierarchical residual optimization is implemented.
[0081] Because the present invention adopts the above technical means, it has the following beneficial effects:
[0082] 1. Efficiently handle multiple delays and high-frequency noise interference (corresponding to steps 2 and 4): Through layered delay extraction and signal decomposition (step 2), the residual signal is subjected to time-domain delay estimation and frequency-domain smoothing, effectively separating the main delay component and suppressing high-frequency noise. This solves the phase error and spectral peaking problems caused by multiple delay superposition in traditional methods. Combined with layered model reconstruction and residual iteration (step 4), the complex delay effects are approximated layer by layer, significantly improving the robustness of high-frequency modeling.
[0083] 2. Adaptive Pole Optimization and Convergence Improvement (corresponding to Steps 3 and 5): Hierarchical adaptive vector fitting (Step 3) dynamically adds and removes poles, merges clustered poles, and constrains the stable migration of poles to adaptively match the signal's frequency domain characteristics, avoiding the limitations of a predefined number of poles. Combined with multi-level hierarchical iteration (Step 5), only low-order models are required at each layer to approximate local features, significantly reducing the matrix condition number and improving the convergence speed and stability of the overall algorithm.
[0084] 3. High compatibility of hybrid topology equivalent circuits (corresponding to step 6): Based on the pole-residual parameters in the hierarchical fitting results (step 6), a hybrid topology SPICE equivalent circuit is generated by mapping real poles to RLC networks and complex pole pairs to RLCG coupled networks, and embedding a distributed transmission line model. This structure is compatible with multi-port S-parameters and lumped / distributed components, resolving the issues of model passivity, forced errors, and lack of delay representation in traditional network synthesis, thereby improving the universality of circuit simulation.
[0085] 4. Global Accuracy Optimization via Multi-Level Residual Iteration (corresponding to Steps 2-5): Through layered residual signal decomposition and layer-by-layer fitting (Steps 2-5), the complex spectrum is decomposed into multiple smooth components, with each layer focusing on specific frequency band characteristics to avoid error accumulation caused by parameter coupling during global fitting. This strategy ensures accuracy of high-frequency details while leveraging low-level models to efficiently fit large-scale frequency domain trends, achieving balanced error control across the entire frequency band.
[0086] 5. Joint time-frequency analysis enhances the physical feasibility of the model (corresponding to steps 2 and 6): Combining time-domain delay estimation (step 2) with frequency-domain rational function modeling, the delay component and lumped parameter effects are accurately separated. Furthermore, through hybrid topology mapping of transmission line elements and RLCG networks in equivalent circuit generation (step 6), the generated circuit model is ensured to strictly meet physical constraints such as passivity and causality, thereby improving the engineering applicability of the simulation results.
[0087] 6. The present invention achieves a deep integration of multiple technical approaches through a layered collaborative architecture from steps 1 to 6: Initial residual data (step 1) undergoes layered delay extraction and frequency domain smoothing (step 2) to remove primary delay and high-frequency noise, providing a locally smoothed signal for adaptive vector fitting (step 3). Dynamic pole migration and residual updating (step 4) approximate complex frequency response characteristics layer by layer. Multi-level iteration (step 5) decomposes global fitting into a multi-scale optimization problem, replacing high-order global fitting with low-order model stacking, significantly reducing computational complexity. Finally, equivalent circuit generation (step 6) integrates real pole / conjugate complex pole pair mapping with a lossless transmission line model to achieve a hybrid topology representation of lumped parameters and distributed delay. Each step is closely linked, hierarchically addressing delay effects and frequency domain noise, dynamically optimizing pole distribution, and achieving layer-by-layer error convergence through residual iteration. This improves high-frequency modeling accuracy while balancing algorithm convergence speed and the physical feasibility of the equivalent circuit, forming a closed-loop optimization link from frequency domain data to circuit model. BRIEF DESCRIPTION OF THE DRAWINGS
[0088] Figure 1 It is a simplified flow chart of the present invention;
[0089] Figure 2 This is the circuit diagram for test case 1;
[0090] Figure 3 This is the circuit diagram for test case 2;
[0091] Figure 4 This is the circuit diagram for test case 3;
[0092] Figure 5 This is the fitting effect diagram of Case 1;
[0093] Figure 6 This is the fitting effect diagram of Case 2;
[0094] Figure 7 This is the fitting effect diagram of Case 3. DETAILED DESCRIPTION
[0095] The following is a detailed description of the embodiments of the present invention. Although the present invention will be described and illustrated in conjunction with certain specific embodiments, it should be noted that the present invention is not limited to these embodiments. On the contrary, modifications or equivalent substitutions of the present invention are intended to fall within the scope of the claims of the present invention.
[0096] In addition, in order to better illustrate the present invention, numerous specific details are given in the following detailed description. It will be understood by those skilled in the art that the present invention can also be implemented without these specific details.
[0097] In order to achieve the optimal balance between automated modeling and high-precision characterization, the present invention proposes a Hierarchical Residual Fitting (HRF) algorithm, the core of which is to construct a hierarchical iterative architecture for multi-scale frequency domain data. This algorithm integrates the mathematical advantages of vector fitting and delayed vector fitting, and innovatively introduces a time-lag compensation mechanism on the basis of fully retaining the high-precision modeling capability of vector fitting for smoothed frequency response data, thereby effectively solving the high-dimensional parameter space problem in periodic oscillation data modeling. Specifically, HRF adopts an adaptive frequency band division strategy to decompose the original frequency domain response into a low-frequency smooth component and a high-frequency oscillation component, which are jointly characterized by the optimized extreme residual model and the time domain convolution kernel, thereby mathematically avoiding the exponential growth of computational complexity caused by global unified modeling in traditional methods.
[0098] Principle Introduction
[0099] Since the impact of delay on data is the presence of a large number of periodic oscillations in the data, and the oscillation frequency is related to the length of the delay, smoothing can be used after estimating the first-level delay to remove the oscillation effect caused by higher delays, and vector fitting is performed on the smoothed data to ensure algorithm convergence. After the current level of fitting is completed, the residuals of the original data and the fitted data are calculated, and the first-level delay is estimated again for the residuals and fitted until the fitting accuracy meets the requirements. This method does not require the explicit extraction of any time delay parameters. Fast oscillations and noise components in the frequency domain naturally appear in the residuals of the lower levels, and VFAS dynamically generates sufficient poles at this level to compensate. At the same time, the upper layer only needs very few poles to efficiently fit large-scale smooth features, significantly reducing the condition number and computational complexity of the overall iterative matrix.
[0100] The hierarchical residual strategy makes the dimension of each VFAS fitting matrix controllable. The algorithm performs pole migration within a specific frequency band for noise and residuals, greatly improving convergence robustness and rejecting high-spectrum jitter interference. The adaptive addition and deletion of poles ensures the compactness of the final model, ensuring fast convergence and high-precision fitting when facing noise, spectral unevenness, or multi-segment transmission delays.
[0101] Algorithm Design
[0102] This algorithm utilizes a "layered extraction-residual iteration" approach to separate complex multiple time delays and high-frequency noise components layer by layer. At each layer, vector fitting is performed only on the smoothed signal, significantly improving the synthesis accuracy and robustness of frequency domain responses containing multiple delays and noise interference. The specific process is as follows: First, the original frequency domain data is treated as the initial residual, and the fitting result accumulator is reset to zero. Delay estimation is then performed sequentially on the current residual, removing the detected delay effect. The de-delayed signal is smoothed to suppress noise and spectral spikes. The VFAS algorithm is then called to perform a rational fit on the smoothed signal. The fitting result is then reapplied to the corresponding time delay, updating the model output of the current layer. The layer output is then added to the overall fitting result, and the residual between the original data and the overall result is recalculated. If the residual error indicator remains above a preset threshold, the above steps are repeated until the overall fitting error converges. To ensure the physical feasibility of the model, the algorithm uses constrained optimization to ensure that all parameters meet the real number condition.
[0103] During vector fitting of multi-port networks, we discovered that several elements in the S-parameter matrix often exhibit highly similar frequency-domain characteristics. To exploit this property, this application proposes a pole-sharing strategy based on impulse response peak grouping. First, the time-domain impulse response of each response curve is normalized, extracting all local peaks above the overall average amplitude and their instantaneous locations. Using the set of peak locations as a similarity metric, S-parameter elements with the same peak distribution pattern are grouped together. The data within each group is then merged and fitted simultaneously. This grouping method is particularly effective for delayed device spectrum data. Because the peak filtering and grouping operations only require a single pass through all channels, its time complexity is O(n), significantly superior to traditional Euclidean distance or cross-correlation distance metrics. Furthermore, practical results show that the overall serial fitting time can be reduced by more than one-third while maintaining nearly unchanged fitting accuracy. This strategy not only reduces the amount of repetitive computation required for parameter extraction but also improves the efficiency of equivalent circuit generation and simulation for large-scale multi-port systems, possessing significant engineering value for high-frequency interconnect modeling and signal integrity analysis.
[0104] Effect test
[0105] The present invention selected three typical high-speed interconnect circuit examples and systematically evaluated the applicability of the hierarchical residual fitting algorithm in S-parameter fitting. Specifically, the accuracy of delay identification was first investigated to verify the accuracy of the algorithm in extracting delay parameters; secondly, the convergence speed and stability of the algorithm were compared with those of the traditional vector fitting algorithm (VFAS) during the iteration process to analyze its improvement effect in convergence; finally, the response characteristics of the obtained fitting model were compared with the results of the VFAS algorithm and the dynamic vector fitting (DVF) algorithm to evaluate the performance of the hierarchical residual fitting algorithm in modeling accuracy. Through the benchmarking analysis of the above three aspects, it was fully verified that the proposed algorithm has good accuracy, convergence and applicability in the S-parameter fitting process. In order to ensure the objectivity and consistency of the evaluation, this application study selected the full-band root mean square error (RMSE) as the error evaluation indicator.
[0106] Case 1
[0107] This case builds a multi-stage delay network composed of three segments of lossless transmission line in different proportions, and implements impedance matching at the end of the network to achieve precise control of signal delay. Specifically, by connecting transmission line segments with different delay characteristics in series, a multi-stage, configurable delay effect can be generated between each input port and output port. The circuit structure is as follows: Figure 2 This network fully reflects the multi-delay characteristics and aims to evaluate the performance of the proposed hierarchical residual fitting algorithm in modeling S parameters with complex time delay behavior. The fitting results are shown in Figure 5 As shown: Figure 5 The figure a shows the fitting effect of the diagonal elements of the S-parameter matrix, and the root mean square error of the full frequency band is 1.12×10 -2 ; Figure 5 The figure b shows the fitting performance of the off-diagonal elements, and its full-band root mean square error is 7.00×10 -3 In summary, the proposed algorithm not only maintains excellent fitting accuracy but also demonstrates good adaptability and stability when dealing with multi-level delay characteristics.
[0108] Case 2
[0109] This case consists of a crosstalk delay network consisting of multiple lossless transmission lines and inductor, capacitor, and resistor coupling units. Impedance matching is performed at the end to simulate the crosstalk effect between multiple parallel transmission lines (see the circuit structure for details). Figure 3 Inserting multiple resistors and inductors into the middle of the network creates LC coupling paths, introducing capacitive crosstalk and inductive coupling. This example evaluates the performance of the hierarchical residual fitting algorithm for fitting S-parameter data with complex crosstalk behavior.
[0110] The fitting results are as follows Figure 6 As shown, Figure 6 The figure a shows the fitting effect of the diagonal elements of the S-parameter matrix. The root mean square error of the HRF algorithm over the entire frequency band is 5.987×10 -3 , its fitting effect is significantly better than that of VFAS algorithm and DVF algorithm; Figure 6 Middle b shows the fitting effect of the off-diagonal elements. The root mean square error of the HRF algorithm in the full frequency band is 3.114×10 -3 The fitting effect is significantly better than the VFAS algorithm and the DVF algorithm. At the same time, the HRF algorithm significantly shortens the time consumption and significantly improves the fitting efficiency. The comparative analysis shows that the hierarchical residual fitting algorithm can maintain high fitting accuracy and has good convergence and stability when processing multi-port networks with complex crosstalk characteristics.
[0111] Case 3
[0112] This case constructs a relatively typical PCB interconnect transmission scenario, which consists of a delay network composed of a lossy coupled transmission line (CLINP) and an inductor, and an end impedance matching unit to simulate the S parameters of commonly used transmission line devices in the industry. The circuit structure is as follows: Figure 4 This case study aims to test the performance of the hierarchical residual fitting algorithm in modeling complex S-parameters in such practical scenarios and to evaluate its applicability in real engineering scenarios.
[0113] The fitting results are as follows Figure 7 As shown, Figure 7 The figure a shows the fitting effect of the diagonal elements of the S-parameter matrix. The root mean square error of the full frequency band corresponding to the HRF algorithm is 2.458×10 -3 , which is comparable to the VFAS algorithm and significantly better than the DVF algorithm; Figure 7 The figure b in the figure shows the fitting effect of the off-diagonal elements. The root mean square error of the full frequency band corresponding to the HRF algorithm is 3.730×10 -3 , significantly outperforming the VFAS and DVF algorithms. Furthermore, the HRF algorithm's time consumption is several times shorter than that of the DVF and VFAS algorithms. This comprehensive comparison shows that the HRF algorithm maintains high modeling accuracy while exhibiting good convergence and stability when simultaneously handling complex delay and crosstalk characteristics.
[0114] The fitting time of the above three cases is recorded in the following table:
[0115]
[0116] From the above test results, it can be seen that the hierarchical residual fitting algorithm can fully capture the signal change characteristics at different time scales when facing multiple delay characteristics, effectively suppress the local fitting errors caused by the superposition of complex delays, and significantly improve the overall modeling accuracy, which can well adapt to actual engineering scenarios. In addition, because the algorithm adopts a local optimal strategy in each level of residual fitting, it is less sensitive to the selection of initial values and exhibits good adaptability and robustness. The experimental results verify the potential of the hierarchical residual fitting algorithm in modeling complex interconnect networks and improving the efficiency and accuracy of multi-scale delay system modeling, indicating that it has high application value in high-end signal integrity analysis, complex packaging design, and high-speed interconnect simulation. In the future, it can be further combined with robustness analysis in noisy environments and large-scale system modeling verification to continuously expand the engineering applicability and theoretical depth of the hierarchical residual fitting algorithm method.
[0117] Example 1
[0118] The present invention provides a vector fitting method based on hierarchical residual optimization for S-parameter modeling and equivalent circuit generation in high-speed circuit signal integrity analysis, comprising the following steps:
[0119] Step 1: Obtain the multi-port S-parameter frequency domain data of the device to be modeled, set the original frequency domain response as the initial level residual signal, and initialize the total frequency domain model to zero;
[0120] Step 2: Hierarchical delay extraction and signal decomposition: perform time domain delay estimation on the current residual signal and extract the main delay component τ m And by performing delay removal and frequency domain smoothing on the residual signal, the de-delayed smoothed signal corresponding to the current level is generated;
[0121] Step 3: Hierarchical vector fitting: hierarchical adaptive vector fitting: using adaptive vector fitting algorithm (VFAS) to perform pole-residual modeling on the de-delayed smoothed signal, by dynamically adding and deleting poles to match signal features, to generate a local rational function model of the current level;
[0122] Step 4: Hierarchical model reconstruction and residual update: Reconstruct the local rational function model and delay component of the current level into frequency domain response, add them to the total model, and calculate the residual signal between the total model and the original data;
[0123] Step 5: Multi-level hierarchical iteration: Use the updated residual signal as the input of the next layer and repeat steps 2-4 until the residual error is lower than the preset threshold, completing the superposition synthesis of the multi-level fitting model;
[0124] Step 6: Equivalent circuit generation: Based on the pole-residual parameters in the final hierarchical fitting results, a hybrid topology SPICE equivalent circuit containing a distributed transmission line model and a lumped parameter network is generated by mapping real poles to RLC networks and complex pole pairs to RLCG coupled networks.
[0125] In the above scheme, step 1 includes the following steps:
[0126] Step 1.1: Obtain a frequency domain data set of multi-port S-parameters of the device to be modeled, represented as a sequence of discrete frequency points where s k is the kth complex frequency point, is the corresponding S-parameter matrix frequency domain response value;
[0127] Step 1.2: Set the multi-port S-parameter frequency domain data set as the initial level residual signal And the total frequency domain model Initialize the matrix to zeros.
[0128] In the above scheme, step 2 includes the following steps:
[0129] Step 2.1: For the current level residual signal Perform time domain delay estimation and extract the main delay component τ based on time domain impulse response peak detection m , where τ m is the time delay corresponding to the local peak in the residual signal whose amplitude exceeds the average level;
[0130] Step 2.2: Perform delay removal on the residual signal to generate a de-delayed frequency domain signal in Represents the frequency domain phase compensation term, which is used to eliminate the delay effect T in the residual signal m , where s k is the complex frequency point;
[0131] Step 2.3: Perform frequency domain smoothing on the de-delayed frequency domain signal, suppress high-frequency noise and spectrum spikes through low-pass filtering, and generate the de-delayed smoothed signal corresponding to the current level.
[0132] In the above scheme, step 3 includes the following steps
[0133] The overall idea is divided into three parts. It requires n1 steps of relocation, then n2 steps of pole addition and deletion + relocation. After convergence, it is necessary to perform redundant pole deletion and n3 steps of pole relocation again until convergence. The specific detailed steps are as follows:
[0134] Step 3.1: Use the vector fitting algorithm VFAS to smooth the signal Perform the first stage of pole-residual modeling and build a local rational function model Its expression is:
[0135]
[0136] Among them, c m0 is the constant term coefficient, c j is the residual coefficient corresponding to the j-th pole, p j is the stable pole generated by VFAS dynamic migration, and n is the total number of poles in the current level; the specific steps are as follows:
[0137] Step 3.1.1: Initialize the module: Based on Frequency domain trend characteristics, select the initial pole set {q j}, where q j is the initial pole position, and the maximum number of iteration steps n1, n2, and n3 in each stage are set;
[0138] Step 3.1.2: By linearizing the error equation:
[0139]
[0140] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point;
[0141] Step 3.1.3: Pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data: According to:
[0142]
[0143] Update the pole position {p i}, where {p i} is solved by matrix The characteristic value is obtained, A=diag(q1,q2,…,q n ) is the initial pole diagonal matrix, 1=(1,1,…,1) T , d=(d1,d2,…,d n ); The number of pole relocations is increased by one. If the number of pole relocations is less than n1, return to step 3.1.2, otherwise go to step 3.2;
[0144] Step 3.2: The VFAS algorithm implements the second stage of dynamic pole addition and deletion through the following steps:
[0145] Step 3.2.1: By linearizing the error equation:
[0146]
[0147] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point;
[0148] Step 3.2.2: Pole relocation module: According to Update the pole position {p i};
[0149] Step 3.2.3: Pole addition and deletion module: According to the residual energy distribution, new poles are inserted at the peak position of the residual energy spectrum. At the same time, poles with coefficients less than the threshold are cleared and clustered poles with distances less than the threshold δ are merged to generate an optimized pole set.
[0150] Step 3.2.4: Error evaluation module: Calculate the root mean square error (RMSE) of the fitting result. If the RMSE does not reach the preset threshold, the number of extreme points is within the limit, and the number of iterations is less than n2 (the maximum number of iterations is set here to prevent infinite iterations and ensure that the algorithm can terminate in time), return to step 3.2.1 and iterate until convergence.
[0151] Step 3.3: The VFAS algorithm implements the third stage of redundant pole removal and post-processing through the following steps:
[0152] Step 3.3.1: Pole deletion module: remove poles with coefficients less than the threshold, merge clustered poles with distances less than the threshold δ, generate an optimized pole set, and reset the pole relocation count;
[0153] Step 3.3.2: By linearizing the error equation:
[0154]
[0155] Solve the linearized error equation using the least squares method to find the coefficient c j with d j ;
[0156] Step 3.3.3: Use the pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data, according to:
[0157]
[0158] Update the pole position {p i}, the number of pole relocations increases by one. If the number of pole relocations is less than n3, return to step 3.3.2; otherwise, end step 3.3.
[0159] In the above scheme, step 4 includes the following steps:
[0160] Step 4.1: Convert the local rational function model of the current level With the extracted main delay component T m Reconstruction into frequency domain response
[0161] Step 4.2: Reconstruct the frequency domain response Accumulated to the total frequency domain model The updated total model is:
[0162]
[0163] Step 4.3: Calculate the updated total model Compared with the original S parameter data The residual signal between
[0164]
[0165] In the above scheme, step 5 includes the following steps:
[0166] The updated residual signal As the input of the next layer, repeat the delay extraction, vector fitting, and model reconstruction steps from step 2 to step 4 until one of the following iteration termination conditions is met:
[0167] a) The residual error ∈ is lower than the preset threshold ∈ th , the residual error ∈ is calculated by the root mean square error formula:
[0168]
[0169] Among them, K is the total number of frequency points, is the residual signal of the i-th layer;
[0170] b) The number of iterations reaches the preset maximum number of levels L max ;
[0171] Complete the superposition synthesis of multi-level fitting models and output the total frequency domain model
[0172] In the above scheme, step 6 includes the following steps:
[0173] Based on the extreme-residual parameters {p j , c j}, execute the following circuit mapping rules to generate the SPICE equivalent circuit:
[0174] Step 6.1: Real pole mapping: Map the real poles p j ∈R corresponding item Mapped as a series RLC network, where the resistor R j With inductance L j satisfy:
[0175]
[0176] Step 6.2: Complex conjugate pole pair mapping: Map the complex pole pair p j and its residual c j Mapped into an RLCG coupling network, it satisfies:
[0177]
[0178] Among them, L, R m 、C m Forming a parallel resonant circuit, G m is a voltage-controlled current source connected across the capacitor node;
[0179] Step 6.3: Distributed transmission line embedding: Extract the main delay component τ m The transmission line element is modeled as a time delay τ m Distributed transmission line model;
[0180] Step 6.4: Hybrid topology synthesis: interconnect the RLC network, RLCG coupling network and distributed transmission line model according to the port coupling relationship to generate a multi-port hybrid topology SPICE equivalent circuit.
[0181] The present invention also provides a storage medium. When a processor executes a program in the storage medium, the vector fitting method based on hierarchical residual optimization is implemented.
Claims
1. An improved vector fitting algorithm based on hierarchical residual optimization for S-parameter modeling and equivalent circuit generation in high-speed circuit signal integrity analysis, characterized in that: The following steps are involved: Step 1: Obtain the multi-port S-parameter frequency domain data of the device to be modeled, set the original frequency domain response as the initial level residual signal, and initialize the total frequency domain model to zero; Step 2: Hierarchical delay extraction and signal decomposition: perform time domain delay estimation on the current residual signal and extract the main delay component τ m And by performing delay removal and frequency domain smoothing on the residual signal, the de-delayed smoothed signal corresponding to the current level is generated; Step 3: Hierarchical vector fitting: hierarchical adaptive vector fitting: using adaptive vector fitting algorithm (VFAS) to perform pole-residual modeling on the de-delayed smoothed signal, by dynamically adding and deleting poles to match signal features, to generate a local rational function model of the current level; Step 4: Hierarchical model reconstruction and residual update: Reconstruct the local rational function model and delay component of the current level into frequency domain response, add them to the total model, and calculate the residual signal between the total model and the original data; Step 5: Multi-level hierarchical iteration: Use the updated residual signal as the input of the next layer and repeat steps 2-4 until the residual error is lower than the preset threshold, completing the superposition synthesis of the multi-level fitting model; Step 6: Equivalent circuit generation: Based on the pole-residual parameters in the final hierarchical fitting results, a hybrid topology SPICE equivalent circuit containing a distributed transmission line model and a lumped parameter network is generated by mapping real poles to RLC networks and complex pole pairs to RLCG coupled networks.
2. The method according to claim 1, characterized in that Step 1 includes the following steps: Step 1.1: Obtain a frequency domain data set of multi-port S-parameters of the device to be modeled, represented as a sequence of discrete frequency points where s k is the kth complex frequency point, is the corresponding S-parameter matrix frequency domain response value; Step 1.2: Set the multi-port S-parameter frequency domain data set as the initial level residual signal And the total frequency domain model Initialize the matrix to zeros.
3. The method according to claim 1, characterized in that Step 2 includes the following steps: Step 2.1: For the current level residual signal Perform time domain delay estimation and extract the main delay component τ based on time domain impulse response peak detection m , where τ m is the time delay corresponding to the local peak in the residual signal whose amplitude exceeds the average level; Step 2.2: Perform delay removal on the residual signal to generate a de-delayed frequency domain signal in Represents the frequency domain phase compensation term, which is used to eliminate the delay effect T in the residual signal m , where s k is the complex frequency point; Step 2.3: Perform frequency domain smoothing on the de-delayed frequency domain signal, suppress high-frequency noise and spectrum spikes through low-pass filtering, and generate the de-delayed smoothed signal corresponding to the current level.
4. The method according to claim 1, wherein Step 3 includes the following steps: Step 3.1: Use the vector fitting algorithm VFAS to smooth the de-delayed signal Perform the first stage of pole-residual modeling and build a local rational function model Its expression is: Among them, cm0 is the constant coefficient, c j is the residual coefficient corresponding to the j-th pole, p j is the stable pole generated by VFAS dynamic migration, and n is the total number of poles in the current level; the specific steps are as follows: Step 3.1.1: Initialize the module: Based on Frequency domain trend characteristics, select the initial pole set {q j }, where q j is the initial pole position, and the maximum number of iteration steps n1, n2, and n3 in each stage are set; Step 3.1.2: By linearizing the error equation: Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point; Step 3.1.3: Pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data: According to: Update the pole position {p i }, where {p i } is solved by matrix The characteristic value is obtained, A=diag(q1,q2,…,q n ) is the initial pole diagonal matrix, 1=(1,1,…,1) T , d=(d1,d2,…,d n ); The number of pole relocations is increased by one. If the number of pole relocations is less than n1, return to step 3.1.2, otherwise go to step 3.2; Step 3.2: The VFAS algorithm implements the second stage of dynamic pole addition and deletion through the following steps: Step 3.2.1: By linearizing the error equation: Solve the linearized error equation using the least squares method to find the coefficient c j with d j ,in is the basis function, q j is the initial extreme point; Step 3.2.2: Pole relocation module: According to Update the pole position {p i }; Step 3.2.3: Pole addition and deletion module: According to the residual energy distribution, new poles are inserted at the peak position of the residual energy spectrum. At the same time, poles with coefficients less than the threshold are cleared and clustered poles with distances less than the threshold δ are merged to generate an optimized pole set. Step 3.2.4: Error evaluation module: Calculate the root mean square error (RMSE) of the fitting result. If the RMSE does not reach the preset threshold, the number of extreme points is within the limit, and the number of iterations is less than n2, return to step 3.2.1 and iterate until convergence. Step 3.3: The VFAS algorithm implements the third stage of redundant pole removal and post-processing through the following steps: Step 3.3.1: Pole deletion module: remove poles with coefficients less than the threshold, merge clustered poles with distances less than the threshold δ, generate an optimized pole set, and reset the pole relocation count; Step 3.3.2: By linearizing the error equation: Solve the linearized error equation using the least squares method to find the coefficient c j with d j ; Step 3.3.3: Use the pole relocation module to make the overall trend of the fitting curve consistent with the smoothed data, according to: Update the pole position {p i }, the number of pole relocations increases by one. If the number of pole relocations is less than n3, return to step 3.3.2; otherwise, end step 3.
3.
5. The method according to claim 1, wherein Step 4 includes the following steps: Step 4.1: Convert the local rational function model of the current level and the extracted main delay component τ m Reconstruction into frequency domain response Step 4.2: Reconstruct the frequency domain response Accumulated to the total frequency domain model The updated total model is: Step 4.3: Calculate the updated total model Compared with the original S parameter data The residual signal between 6. The method according to claim 1, characterized in that Step 5 includes the following steps: The updated residual signal As the input of the next layer, repeat the delay extraction, vector fitting, and model reconstruction steps from step 2 to step 4 until one of the following iteration termination conditions is met: a) The residual error ∈ is lower than the preset threshold ∈ th , the residual error ∈ is calculated by the root mean square error formula: Among them, K is the total number of frequency points, is the residual signal of the i-th layer; b) The number of iterations reaches the preset maximum number of levels L max ; Complete the superposition synthesis of multi-level fitting models and output the total frequency domain model 7. The method according to claim 1, characterized in that Step 6 includes the following steps: Based on the extreme-residual parameters {p j , c j }, execute the following circuit mapping rules to generate the SPICE equivalent circuit: Step 6.1: Real pole mapping: Map the real poles p j ∈R corresponding items Mapped as a series RLC network, where the resistor R j With inductance L j satisfy: Step 6.2: Complex conjugate pole pair mapping: Map the complex pole pair p j and its residual c j Mapped into an RLCG coupling network, it satisfies: Among them, L m 、R m 、C m Forming a parallel resonant circuit, G m is a voltage-controlled current source connected across the capacitor node; Step 6.3: Distributed transmission line embedding: Extract the main delay component T m The transmission line element is modeled as a time delay T m Distributed transmission line model; Step 6.4: Hybrid topology synthesis: interconnect the RLC network, RLCG coupling network and distributed transmission line model according to the port coupling relationship to generate a multi-port hybrid topology SPICE equivalent circuit.
8. A storage medium, characterized in that: When the processor executes the program in the storage medium, the method according to any one of claims 1 to 7 is implemented.