Multi-feature chip defect detection method

Abstract

The multi-feature chip defect detection method comprises the following steps: acquiring a detection area image comprising a target chip; matching a binding rectangle of the target chip according to the standard chip image template; determining the position and the edge of a target chip according to the binding rectangle, and determining a plurality of detection points on the detection area image; continuously detecting the detection points, extracting gray features, and comparing gray values of the detection points with standard gray values of corresponding points of a standard chip image template; extracting color features, and calculating the Euclidean distance between the RGB value of the detection point and the corresponding point of the standard chip image template; texture feature extraction: extracting a texture mode of a detection point neighborhood, and comparing the texture difference of a standard chip image template; calculating a comprehensive difference value of the detection point, and if the comprehensive difference value is greater than a set threshold value, determining that the detection point is an offset point; otherwise, skipping and resetting the continuous offset count. According to the multi-feature chip defect detection method, through multi-parameter joint judgment, the misjudgment rate in chip surface defect detection is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of chip defect detection, and in particular to a multi-feature chip defect detection method. Background Art

[0002] Semiconductor chip technology, especially during the wafer production and processing, can cause chip edge chipping if excessive or uneven external forces are applied during wafer cutting, grinding, or polishing. Chip edge chipping can damage circuitry at the wafer edge, impacting overall chip performance and even causing complete chip failure. Therefore, chip edge chip detection is an essential part of the chip production process, playing a vital role in ensuring semiconductor manufacturing precision, improving product yield, preventing contamination, optimizing production processes, and maintaining equipment.

[0003] In the previously published invention patent application, the technical solution for "A Chip Surface Defect Detection Method, Device, and Storage Medium Thereof," with publication number CN118657734A, proposes a method for rapidly detecting chipping and bad pixels through grayscale comparison and scoring, improving detection efficiency. This method primarily involves image acquisition and template matching: acquiring an image of the inspection area containing the target chip, matching the target chip's binding rectangle with a chip image template (standard chip image), and determining its position and edges within the image. A pyramid image is then constructed and normalized to improve matching accuracy, while the rotation angle of the target chip image is adjusted to align with the template. Inspection point setting and offset determination involves determining multiple inspection points along the chip edge based on the binding rectangle. The grayscale values of these inspection points are continuously compared with the standard grayscale values of the corresponding template points. If the first grayscale difference exceeds a first threshold, the point is identified as an "offset point." Furthermore, depending on whether the difference exceeds a second threshold, a different offset score is assigned (first score < second score). Finally, the total score of these consecutive "offset points" is calculated. If the score reaches the chipping score, the point is considered chipping, eliminating the need to inspect all points.

[0004] However, this method of wafer surface defect detection relies solely on grayscale value difference judgment, and is easily affected by factors such as uneven lighting and chip surface reflection, leading to misjudgment. At the same time, in actual detection, there are also many other factors that affect it, and it is unable to achieve extremely accurate detection results. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a multi-feature chip defect detection method, which reduces the misjudgment rate in chip surface defect detection through multi-parameter joint judgment.

[0006] The technical solution of the present invention is: A multi-feature chip defect detection method, comprising: Acquire an inspection area image including a target chip; match a binding rectangle of the target chip according to a standard chip image template; determine a position and an edge of the target chip according to the binding rectangle, and determine a plurality of inspection points on the inspection area image; Continuously detecting the detection points, extracting grayscale features, and comparing the grayscale values of the detection points with the standard grayscale values of corresponding points in the standard chip image template; Color feature extraction, calculating the Euclidean distance between the RGB value of the detection point and the corresponding point of the standard chip image template; Texture feature extraction: extract the texture pattern of the detection point neighborhood and compare the texture difference with the standard chip image template; Calculate the comprehensive difference of the detection point. If the comprehensive difference is greater than the set threshold, it is determined to be an offset point; otherwise, it is skipped and the continuous offset count is reset.

[0007] The multi-feature chip defect detection method as described above, wherein: The grayscale feature extraction includes: obtaining the grayscale value of the detection point in the detection area image and the standard chip image, and calculating the absolute difference ; The color feature extraction includes: extracting RGB three-channel values and calculating color differences through Euclidean distance: ; The texture feature extraction includes: taking the detection point as the center, calculating the local binary pattern LBP value of the 3×3 neighborhood to obtain the texture difference: .

[0008] In the multi-feature chip defect detection method described above, the comprehensive difference is a comprehensive difference calculated according to preset multi-feature weights: ; like , is the preset threshold, the detection point is determined to be an offset point.

[0009] The multi-feature chip defect detection method as described above includes offset point scoring and edge collapse determination; the offset point scoring includes: assigning different scores according to the size of the comprehensive difference, Mild offset: , score 1; Medium Offset: , score 3; Heavy offset: , score 5; The total score of the current continuous offset points is accumulated. If the following conditions are met, it is determined to be a broken edge: The number of consecutive offset points ≥ the set minimum length; or the total score ≥ the set edge collapse score.

[0010] The multi-feature chip defect detection method described above, wherein for the detection point P, its grayscale feature , color characteristics and texture features Including preset weights; the comprehensive difference is the weighted sum of grayscale features, color features and texture features: ; in: , G is the gray value; , R, G, B are three-channel values; , LBP is the local binary pattern value; .

[0011] In the multi-feature chip defect detection method described above, the preset threshold is a dynamic threshold, and its dynamic adjustment formula is: ; in, is the baseline threshold, is the grayscale variance of the detection area image, and k is the illumination compensation coefficient.

[0012] The multi-feature chip defect detection method described above includes performing bad pixel detection and calculating the compactness of the bad pixel group when the edge collapse is not detected: C =4 π Area / Perimeter 2 ; and major axis ratio R=MajorAxis / MinorAxis; If the number of pixels is greater than or equal to the threshold and the shape is irregular, that is, C < 0.5 or R > 2.0, it is determined to be a bad pixel.

[0013] From the above description, it can be seen that the present invention has the following advantages: A multi-feature chip defect detection method of the present invention adds multi-parameter joint judgment of color features and texture features on the basis of the original grayscale detection. The multi-parameter joint judgment reduces light and noise interference, reduces the false positive rate, and significantly improves the detection accuracy, thereby realizing high-precision defect detection that is resistant to light interference. In addition, through dynamic detection point and threshold adjustment, it can adapt to different chip types and industries, thereby improving and enhancing adaptability. Furthermore, combined with shape and texture features, it can distinguish between defect types such as edge collapse, scratches, and pits, providing a more accurate basis for subsequent processing in the chip production process. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 Schematic diagram of the method flow of a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0015] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described with reference to the accompanying drawings.

[0016] The present invention discloses a multi-feature chip defect detection method, which can provide a more accurate detection effect for the detection of chip surface defects and improve the efficiency of the chip production process. Specifically, the present invention acquires the image of the detection area through a conventional image capture device, and can adopt the conventional image acquisition method in the prior art to acquire the image, wherein the outer frame of the acquired image is the overall image edge of the detection area, and multiple chips to be detected can be placed inside the frame. Generally, while ensuring the orthogonal range of the camera angle and sufficient resolution, the number of chips placed in the detection area can be configured according to the capture range size and resolution of the image capture device. Before capturing the image, the camera must be calibrated and aligned in advance to ensure that the captured image is accurate. The method of the present invention can be carried out in the existing chip surface defect detection system, and by adding analysis and judgment of image information of color and texture features in addition to grayscale, the accuracy of chip surface defect detection is greatly improved. In its preferred embodiment, please refer to Figure 1 As shown, preferably, the multi-feature chip defect detection method of the present invention includes: Acquire an inspection area image including a target chip; match a binding rectangle of the target chip according to a standard chip image template; determine a position and an edge of the target chip according to the binding rectangle, and determine a plurality of inspection points on the inspection area image; Continuously detect the detection points, extract grayscale features, and compare the grayscale values of the detection points with the standard grayscale values of the corresponding points of the standard chip image template; the method used can be the existing technical content mentioned in the background technology or technical means related to grayscale detection.

[0017] Color feature extraction, calculate the Euclidean distance between the RGB value of the detection point and the corresponding point of the standard chip image template; avoid single grayscale value being affected by lighting and causing false detection.

[0018] Texture feature extraction: extract the texture pattern of the detection point neighborhood, compare the texture differences with the standard chip image template, and identify subtle defects (such as burrs and scratches).

[0019] Calculate the comprehensive difference of the detection point. If the comprehensive difference is greater than the set threshold, it is determined to be an offset point; otherwise, it is skipped and the continuous offset count is reset.

[0020] In the preferred embodiment of the multi-feature chip defect detection method of the present invention as described above, The grayscale feature extraction includes: obtaining the grayscale value of the detection point in the detection area image and the standard chip image, and calculating the absolute difference ; The color feature extraction includes: extracting RGB three-channel values and calculating color differences through Euclidean distance: ; The texture feature extraction includes: taking the detection point as the center, calculating the local binary pattern LBP value of the 3×3 neighborhood to obtain the texture difference: .

[0021] The present invention introduces multi-parameter joint detection and uses the above formula to extract grayscale, color and texture features for comprehensive difference calculation, thereby effectively obtaining more accurate judgment results.

[0022] In the multi-feature chip defect detection method of the present invention as described above, in a preferred embodiment, the comprehensive difference is a comprehensive difference calculated according to preset multi-feature weights: ; like , is the preset threshold, the detection point is determined to be an offset point. Weight coefficient Training and optimization can be performed using historical defect data (e.g., using a neural network to fit optimal weights) to adapt to different chip types. In applications, feature weights should be adjusted based on the chip material (e.g., silicon wafer, compound semiconductor). For example, metal-coated chips can have color features weighted more heavily, while silicon-based chips can have grayscale and texture features emphasized.

[0023] The multi-feature chip defect detection method of the present invention as described above, in a preferred embodiment, includes offset point scoring and edge collapse determination; the offset point scoring includes: assigning different scores according to the size of the comprehensive difference, Mild offset: , score 1; Medium Offset: , score 3; Heavy offset: , score 5; The total score of the current continuous offset points is accumulated. If the following conditions are met, it is determined to be a broken edge: The number of consecutive offset points ≥ the set minimum length; or the total score ≥ the set edge collapse score.

[0024] Based on the comprehensive difference in the offset points (such as the weighted sum of grayscale, color, and texture), the offset points are classified into three levels: "mild / moderate / severe", and assigned different scores (such as 1 / 3 / 5 points). This replaces the traditional "yes / no" binary judgment and enables a more refined characterization of the severity of the defect. Traditional methods only use thresholds to determine whether a point is an offset, and cannot distinguish between "minor light and shadow fluctuations" and "severe edge cracking." Among them: Mild offset (score 1): may be caused by slight changes in lighting, with a low score to avoid misjudgment; Severe offset (score 5): corresponds to obvious edge damage, and a high score accelerates the edge collapse judgment.

[0025] For example, in actual production, a chip edge may have slight chipping due to grinding, resulting in a comprehensive difference of 2.5×Tmulti, which is judged as severe offset and scored 5. However, the difference caused by reflection, 1.3×Tmulti, only receives 1 point, effectively distinguishing between real defects and noise.

[0026] Furthermore, by combining dynamic threshold settings with different dynamic weights, different defect types can be adapted. Severe offset points have a higher proportion in edge collapse determination, and by adjusting the scoring thresholds, such as 1.2×Tmulti and 2.0×Tmulti, different defect severity standards can be flexibly adapted.

[0027] An example scenario is as follows: For edge collapse: Increase the severe offset score (for example, lower the threshold for a score of 5 to 1.8×Tmulti) to speed up edge collapse detection. For glitches: Reduce the moderate deviation score (for example, increase the threshold of score 3 to 1.5×Tmulti) to avoid misjudgment of subtle glitches.

[0028] In the multi-feature chip defect detection method of the present invention, in a preferred embodiment, for the detection point P, its grayscale feature , color characteristics and texture features Including preset weights; the comprehensive difference is the weighted sum of grayscale features, color features and texture features: ; in: , G is the gray value; , R, G, B are three-channel values; , LBP is the local binary pattern value; .

[0029] As described above, in the multi-feature parameter detection of the present invention, the weights assigned to each feature are dynamic, and their values determine their importance in defect detection. Properly adjusting these weights can address the following issues: varying sensitivity to features across different chip materials (silicon, compound semiconductors, metal coatings); preventing misjudgments caused by a single dominant feature when lighting conditions vary; and optimizing detection priorities for specific defect types (such as chipping, scratches, and oxidation).

[0030] In the engineering application of general defect feature analysis, the edge collapse of silicon-based chips: grayscale and texture features are more critical. w gray=0.6, w texture=0.3, w color=0.1; Metal coating oxidation: color features are more sensitive, then w color=0.5, w gray=0.3, w texture=0.2.

[0031] Hypothetical scenario: Optimizing edge chipping detection on a silicon-based chip production line; initial weights: wgray=0.5, wcolor=0.3, wtexture=0.2; grayscale fluctuations in reflective areas lead to misjudgments (misjudgment rate 15%), and the actual edge chipping detection rate is 85%; adjustments can be made through the following steps: 1. Increase the texture feature weight to 0.4 (wtexture=0.4), because edge chipping destroys edge texture continuity; 2. Reduce the color weight to 0.2 (wcolor=0.2) to reduce the interference of reflections on color features; 3. Use gradient descent to optimize on 200 sets of samples, and the final weights: wgray=0.5, wcolor=0.2, wtexture=0.3; the effect of this adjustment is that the misjudgment rate drops to 5% and the detection rate increases to 95%.

[0032] In the preferred embodiment of the multi-feature chip defect detection method of the present invention, the preset threshold is a dynamic threshold, and the dynamic adjustment formula is: ; in, is the baseline threshold, is the grayscale variance of the detection area image, and k is the illumination compensation coefficient.

[0033] In the formula T multi= T 0 (1+ k var( I )) In the illumination compensation coefficient k Controls the threshold value with the image grayscale variance var( I) changes: The role of k is: when the uneven illumination causes the local grayscale fluctuation of the image, k The larger the threshold T The faster the variance grows, the more likely multi is to be used, thus preventing normal pixels in bright areas from being misjudged as offset points; k It is necessary to balance "anti-light interference" and "detection sensitivity"; if k If the threshold is too high, the real defects may be missed. k If it is too small, the light noise cannot be effectively suppressed.

[0034] In general, an example is used to determine the value of k: The chip material is silicon-based chip, dominated by grayscale features ( w gray=0.5), the lighting fluctuation has a significant impact on the gray value; Lighting conditions: The production line uses LED surface light sources. Under normal operation, the grayscale variance is about 0.05~0.1, and the variance can reach 0.2 under strong light interference; Test verification: When k = 0.1, in a bright light image with a variance of 0.1, the threshold increases from 15 to 15×(1+0.1×0.1)=15.15, which is only a slight increase and avoids missed detection; In the uniform light image with a variance of 0.02, the threshold is 15.3, which is close to the benchmark value and ensures the detection sensitivity; Verified by 200 sets of production data, the false positive rate is controlled within 5% and the missed detection rate is less than 3%, meeting industrial standards.

[0035] In practical applications, the k value can be dynamically adjusted according to the real-time lighting characteristics to improve robustness.

[0036] In a preferred embodiment of the multi-feature chip defect detection method of the present invention as described above, the method further includes performing bad pixel detection and calculating the compactness of the bad pixel group when the edge collapse is not detected: C =4 π Area / Perimeter 2 ; and the major axis ratio R=MajorAxis / MinorAxis; if the number of pixels ≥ the threshold and the shape is irregular, that is, C < 0.5 or R > 2.0, it is determined to be a bad pixel.

[0037] In this embodiment, real defects are accurately distinguished from noise interference and false positives are filtered out. Traditional bad pixel detection only determines the number of pixels, which can easily misjudge circular spots (such as reflective spots) as bad pixels. The compactness C and the major axis ratio R introduce shape constraints: Circular noise: C≈1 and R≈1, which is considered normal; Real bad pixels: such as scratches (R>2) or edge chipping (C<0.5), which are detected due to irregular shapes.

[0038] For example, in a real example, a circular bright spot (Area=20 pixels, C=0.95) formed by light reflection is filtered, while a thin scratch (Area=15 pixels, R=3.2) is correctly identified.

[0039] Different defect types can be distinguished by C and R: Bad pixels derived from chipping: C<0.4 and R>2.5 (irregular and elongated edges); Material defect: C < 0.6 and R ≈ 1.5 (approximately elliptical pit); Scratches: R>3 and C<0.3 (extremely long and thin shape).

[0040] Therefore, it has very good technical application value. Different defects correspond to different process problems. For example, edge chipping indicates abnormal cutting parameters, and scratches indicate defects in the grinding process, which helps optimize production lines.

[0041] Taking the above preferred embodiment as an example, under a specified scenario, the comprehensive difference is calculated to determine whether there is edge collapse on the chip surface. The characteristics of a detection point P are as follows: Grayscale value: GT=120 in template T, GI=145 in detection image I; RGB value: template T is (80, 90, 100), detection image I is (70, 110, 120); LBP value: LBPT=64 for template T, LBPI=120 for detection image I; Image illumination variance: var(I)=0.08; then: Grayscale difference: ; Color Difference: ; Texture Difference: ; Dynamic Threshold: ; Comprehensive difference: ; Since 32.7>15.12, P is determined to be the offset point.

[0042] Then, suppose: the scores of three consecutive offset points are 3, 5, and 3 respectively, and the edge collapse score S edge =10, minimum continuous length L min= 3. Total score: 3+5+3=11≥10, and the continuous length is 3, it is determined that edge collapse occurs.

[0043] In the above example of the present invention, Tmulti dynamically adjusts the threshold. When uneven lighting causes local grayscale fluctuations, the threshold changes accordingly, preventing misjudgments. Grayscale captures brightness differences, color features distinguish between light and shadow and true defects (e.g., small color differences in reflective areas), and LBP texture features identify edge glitches. While Dgray accounts for a high proportion in this example, the combination of color and texture features improves judgment reliability. This system is highly scalable: the weight coefficient w can be optimized through training with historical defect data (e.g., using a neural network to find the optimal weight), adapting to different chip types. (In practical applications, feature weights need to be adjusted based on chip material (e.g., silicon wafer vs. compound semiconductor). For example, for metal-coated chips, color features can be weighted more heavily, while for silicon-based chips, grayscale and texture features can be prioritized.)

[0044] A multi-feature chip defect detection method of the present invention adds multi-parameter joint judgment of color features and texture features on the basis of the original grayscale detection. The multi-parameter joint judgment reduces light and noise interference, reduces the false positive rate, and significantly improves the detection accuracy, thereby realizing high-precision defect detection that is resistant to light interference. In addition, through dynamic detection point and threshold adjustment, it can adapt to different chip types and industries, thereby improving and enhancing adaptability. Furthermore, combined with shape and texture features, it can distinguish between defect types such as edge collapse, scratches, and pits, providing a more accurate basis for subsequent processing in the chip production process.

[0045] The present invention realizes chip defect detection that is resistant to light interference through a three-layer mechanism of "multi-feature fusion-dynamic threshold-continuous score statistics": feature complementarity: grayscale captures brightness differences, color distinguishes light and shadow from defects, and texture identifies micro-edge anomalies; adaptive adjustment: dynamically adjusts the threshold according to the image lighting to avoid misjudgment of a single threshold under complex lighting; intelligent judgment: combines the continuous length of the offset point with the score to distinguish between real defects and random noise, thereby improving detection reliability.

[0046] The above description is only an illustrative embodiment of the present invention and is not intended to limit the scope of the present invention. Any equivalent changes and modifications made by those skilled in the art without departing from the concept and principle of the present invention shall fall within the scope of protection of the present invention.

Claims

1. A multi-feature chip defect detection method, characterized in that: include: Acquire an image of the detection area including the target chip; match the binding rectangle of the target chip according to the standard chip image template; Determining the position and edge of the target chip according to the binding rectangle, and determining a plurality of detection points on the detection area image; Continuously detecting the detection points, extracting grayscale features, and comparing the grayscale values of the detection points with the standard grayscale values of corresponding points in the standard chip image template; Color feature extraction, calculating the Euclidean distance between the RGB value of the detection point and the corresponding point of the standard chip image template; Texture feature extraction: extract the texture pattern of the detection point neighborhood and compare the texture difference with the standard chip image template; Calculate the comprehensive difference of the detection point. If the comprehensive difference is greater than the set threshold, it is determined to be an offset point; otherwise, it is skipped and the continuous offset count is reset.

2. The multi-feature chip defect detection method according to claim 1, wherein: The grayscale feature extraction includes: obtaining the grayscale value of the detection point in the detection area image and the standard chip image, and calculating the absolute difference ; The color feature extraction includes: extracting RGB three-channel values and calculating color differences through Euclidean distance: ； The texture feature extraction includes: taking the detection point as the center, calculating the local binary pattern LBP value of the 3×3 neighborhood to obtain the texture difference: .

3. The multi-feature chip defect detection method according to claim 2, wherein: The comprehensive difference is calculated based on the preset multi-feature weights: ； like , is the preset threshold, the detection point is determined to be an offset point.

4. The multi-feature chip defect detection method according to claim 3, wherein: Including offset point scoring and edge collapse judgment; the offset point scoring includes: assigning different scores according to the size of the comprehensive difference, Mild offset: , score 1; Medium Offset: , score 3; Heavy offset: , score 5; The total score of the current continuous offset points is accumulated. If the following conditions are met, it is determined to be a broken edge: The number of consecutive offset points ≥ the set minimum length; or the total score ≥ the set edge collapse score.

5. The multi-feature chip defect detection method according to claim 4, wherein: For the detection point P, its grayscale feature , color characteristics and texture features Including preset weights; the comprehensive difference is the weighted sum of grayscale features, color features and texture features: ； in: , G is the gray value; , R, G, B are three-channel values; , LBP is the local binary pattern value; 。 6. The multi-feature chip defect detection method according to claim 5, wherein: The preset threshold is a dynamic threshold, and its dynamic adjustment formula is: ; in, is the baseline threshold, is the grayscale variance of the detection area image, and k is the illumination compensation coefficient.

7. The multi-feature chip defect detection method according to claim 6, wherein: This includes detecting bad pixels when no road collapse is detected, and calculating the compactness of the bad pixel group: C =4 π Area / Perimeter 2 ; and major axis ratio R=MajorAxis / MinorAxis; If the number of pixels is greater than or equal to the threshold and the shape is irregular, that is, C < 0.5 or R > 2.0, it is determined to be a bad pixel; This algorithm uses a three-layer mechanism of "multi-feature fusion - dynamic threshold - continuous score statistics" to achieve chip defect detection that is resistant to light interference:

1. Feature complementarity: Grayscale captures brightness differences, color distinguishes light and shadow and defects, and texture identifies micro-edge anomalies; 2. Adaptive adjustment: Dynamically adjust the threshold according to the image lighting to avoid misjudgment of a single threshold under complex lighting conditions; 3. Intelligent judgment: Combine the continuous length of offset points with the score to distinguish real defects from random noise and improve detection reliability.

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