Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a substrate; a plurality of pixel circuits disposed on the substrate; the pixel circuit at least comprises a first light-emitting control transistor, a driving transistor, a second light-emitting control transistor and a light-emitting element which are sequentially connected between a first power signal and a second power signal in series. The grid electrodes of the first light-emitting control transistor and the second light-emitting control transistor are connected with light-emitting control signals; the pixel circuit at least comprises a first pixel circuit and a second pixel circuit; the first pixel circuit comprises a first light-emitting element; the second pixel circuit comprises a second light-emitting element; the first light-emitting element and the second light-emitting element are different in light-emitting color; the luminous efficiency of the first luminous element is lower than that of the second luminous element; a gate of a first light emission control transistor of the first pixel circuit includes a first gate and a second gate. According to the technical scheme provided by the invention, the color cast under a low-gray-scale picture can be improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Light Emitting Diode (LED) display panels have many advantages such as self-luminescence, low driving voltage, high luminous efficiency, short response time, high clarity and contrast, and have gradually become a research hotspot in the field of display technology.

[0003] The display panel includes pixel circuits arranged in an array. When displaying low grayscale, the light emitting elements of different pixel circuits have different light emitting current characteristics, which causes display color deviation. Summary of the Invention

[0004] Embodiments of the present invention provide a display panel and a display device to improve color cast in low grayscale images.

[0005] In a first aspect, an embodiment of the present invention provides a display panel comprising: a substrate; a plurality of pixel circuits disposed on the substrate; the pixel circuits comprising at least a first light emission control transistor, a driving transistor, a second light emission control transistor, and a light emitting element sequentially connected in series between a first power supply signal and a second power supply signal; the gates of the first light emission control transistor and the second light emission control transistor are both connected to a light emission control signal;

[0006] The pixel circuit includes at least a first pixel circuit and a second pixel circuit; the first pixel circuit includes a first light-emitting element; the second pixel circuit includes a second light-emitting element; the first light-emitting element and the second light-emitting element emit different colors; and the light-emitting efficiency of the first light-emitting element is lower than the light-emitting efficiency of the second light-emitting element;

[0007] The gate of the first light emission control transistor of the first pixel circuit includes a first gate and a second gate.

[0008] In a second aspect, an embodiment of the present invention provides a display device, which includes the display panel provided by any embodiment of the present invention.

[0009] In the present invention, a display panel includes multiple pixel circuits, each including at least a first pixel circuit and a second pixel circuit. The first pixel circuit includes a first light-emitting element, and the second pixel circuit includes a second light-emitting element. The first and second light-emitting elements emit different colors, and the first light-emitting element has a lower luminous efficiency than the second light-emitting element. Each pixel circuit includes at least a first emission control transistor, a driving transistor, a second emission control transistor, and a light-emitting element, connected in series between a first power supply signal and a second power supply signal. It should be noted that in the embodiment of the present invention, the gate of the first emission control transistor in the first pixel circuit includes a first gate and a second gate. When the gate of the emission control transistor receives an emission control signal that transitions multiple times within a frame period, the parasitic capacitance of the first emission control transistor may cause a coupling current. However, this coupling current has a relatively small impact on the luminous efficiency of the first light-emitting element, but a relatively large impact on the luminous efficiency of the second light-emitting element. Therefore, in this embodiment, the gate of the first emission control transistor in the first pixel circuit is configured as a dual-gate structure including a first gate and a second gate. This increases the coupling parasitic capacitance of the first emission control transistor, thereby increasing the impact of the coupling current on the first light-emitting element, preventing color shift between the first and second light-emitting elements at low grayscale levels and improving display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0011] Figure 2 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0012] Figure 3 A schematic cross-sectional structure diagram of a first light-emitting control transistor provided in an embodiment of the present invention;

[0013] Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0014] Figure 5 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0015] Figure 6 A schematic diagram of the principle of a first light-emitting control transistor provided by an embodiment of the present invention;

[0016] Figure 7 A schematic cross-sectional structure diagram of another first light-emitting control transistor provided by an embodiment of the present invention;

[0017] Figure 8 A schematic cross-sectional structure diagram of another first light-emitting control transistor provided by an embodiment of the present invention;

[0018] Figure 9 A schematic cross-sectional structure diagram of another first light-emitting control transistor provided by an embodiment of the present invention;

[0019] Figure 10 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0020] Figure 11 A schematic cross-sectional view of a display panel provided by an embodiment of the present invention;

[0021] Figure 12 A schematic cross-sectional view of another display panel provided by an embodiment of the present invention;

[0022] Figure 13 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0024] An embodiment of the present invention provides a display panel, Figure 1 A schematic structural diagram of a display panel provided by an embodiment of the present invention is shown in FIG. Figure 2 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention is shown. Figure 3 A schematic cross-sectional view of a first light-emitting control transistor according to an embodiment of the present invention. Figures 1 to 3 , comprising: a substrate 10; a plurality of pixel circuits 11 provided on the substrate 10; the pixel circuit 11 at least comprising a first light emission control transistor M1, a driving transistor M3, a second light emission control transistor M6, and a light emitting element D1 sequentially connected in series between a first power supply signal PVDD and a second power supply signal PVEE; the gates of the first light emission control transistor M1 and the second light emission control transistor M6 are both connected to a light emission control signal Emit;

[0025] The pixel circuit 11 includes at least a first pixel circuit 111 and a second pixel circuit 112; the first pixel circuit 111 includes a first light-emitting element D11; the second pixel circuit 112 includes a second light-emitting element D12; the first light-emitting element D11 and the second light-emitting element D12 emit different colors; the light-emitting efficiency of the first light-emitting element D11 is lower than the light-emitting efficiency of the second light-emitting element D12;

[0026] The gate of the first light emission control transistor M1 of the first pixel circuit 111 includes a first gate G1 and a second gate G2 .

[0027] In an embodiment of the present invention, a display panel includes multiple pixel circuits, each including at least a first pixel circuit and a second pixel circuit. The first pixel circuit includes a first light-emitting element, and the second pixel circuit includes a second light-emitting element. The first and second light-emitting elements emit different colors, and the first light-emitting element has a lower luminous efficiency than the second light-emitting element. Each pixel circuit includes at least a first emission control transistor, a driving transistor, a second emission control transistor, and a light-emitting element, connected in series between a first power supply signal and a second power supply signal. It should be noted that in the embodiment of the present invention, the gate of the first emission control transistor in the first pixel circuit includes a first gate and a second gate. When the gate of the emission control transistor receives an emission control signal that transitions multiple times within a frame period, the parasitic capacitance of the first emission control transistor may cause a coupling current. However, this coupling current has a relatively small impact on the luminous efficiency of the first light-emitting element, but a relatively large impact on the luminous efficiency of the second light-emitting element. Therefore, in this embodiment, the gate of the first emission control transistor in the first pixel circuit is configured as a dual-gate structure including a first gate and a second gate. This increases the coupling parasitic capacitance of the first emission control transistor, thereby increasing the impact of the coupling current on the first light-emitting element, thereby preventing color shift between the first and second light-emitting elements at low grayscale levels and improving display uniformity.

[0028] The above is the core concept of the present invention. The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0029] refer to Figure 1 , the display panel includes a substrate 10 and pixel circuits 11 arranged in an array on the substrate 10. Each pixel circuit 11 includes a pixel driving circuit 113 and a light-emitting element D1. The pixel driving circuit 113 can generate a light-emitting current and transmit it to the light-emitting element D1. The light-emitting element D1 can be an LED, a micro-LED display panel, a mini-LED, etc. The specific type of the light-emitting element D1 is not limited in this embodiment. The pixel driving circuit 113 can be a 7T1C (7 transistors and 1 storage capacitor), 8T1C or other circuit structures. The specific circuit structure of the pixel driving circuit 113 is not specifically limited in this embodiment. Figure 2As shown, pixel circuit 11 includes at least a first emission control transistor M1, a driving transistor M3, a second emission control transistor M6, and a light-emitting element D1, which are connected in series in sequence. A first terminal of the first emission control transistor M1 receives a first power signal PVDD, a second terminal of the first emission control transistor M1 is electrically connected to the first terminal of the driving transistor M3 and the second node N2, respectively. A second terminal of the driving transistor M3 is electrically connected to the first terminal of the second emission control transistor M6 and the third node N3, respectively. A second terminal of the second emission control transistor M6 receives a second power signal PVEE. The gates of the first and second emission control transistors M1 and M6 receive an emission control signal Emit, and the gate of the driving transistor M3 is electrically connected to the first node N1. The emission current flows from the first power signal PVDD through the first emission control transistor M1, the driving transistor M3, the second emission control transistor M6, the light-emitting element D1, and the second power signal PVEE.

[0030] like Figure 4 As shown, Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 5A driving timing diagram of a pixel circuit provided by an embodiment of the present invention. In a specific example (8T1C circuit), optionally, the pixel circuit 11 may further include: a data writing transistor M8, a bias adjustment transistor M2, a first initialization transistor M4, a threshold compensation transistor M5, a second initialization transistor M7 and a storage capacitor Cst; a first end of the storage capacitor Cst is electrically connected to a first end of the first light-emitting control transistor M1; a first end of the first light-emitting control transistor M1 is connected to a first power supply signal PVDD; a second end of the storage capacitor Cst is electrically connected to a gate of the driving transistor M3; a first end of the bias adjustment transistor M2 is connected to a bias adjustment signal DVH; a second end of the bias adjustment transistor M2 is electrically connected to a first end of the driving transistor M3; a gate of the bias adjustment transistor M2 is connected to a first scanning signal SPX; a first end of the data writing transistor M8 is connected to a data signal Data; a second end of the data writing transistor M8 is electrically connected to a gate of the driving transistor M 3; the gate of the data writing transistor M8 is connected to the second scanning signal SP; the first end of the first initialization transistor M4 is connected to the first reset signal Vref1; the second end of the first initialization transistor M4 is electrically connected to the gate of the driving transistor M3; the gate of the first initialization transistor M4 is connected to the third scanning signal S1N; the first end of the threshold compensation transistor M5 is electrically connected to the gate of the driving transistor M3; the second end of the threshold compensation transistor M5 is electrically connected to the second end of the driving transistor M3; the gate of the threshold compensation transistor M5 is connected to the fourth scanning signal S2N; the first end of the second initialization transistor M7 is connected to the second reset signal Vref2; the second end of the second initialization transistor M7 is electrically connected to the first end of the light emitting element D1; the gate of the second initialization transistor M7 is connected to the first scanning signal SPX; the second end of the light emitting element D1 is connected to the second power supply signal PVEE. Figure 4 and Figure 5 Optionally, the first initialization transistor M4 and the threshold compensation transistor M5 are N-type transistors; the first emission control transistor M1, the drive transistor M3, the second emission control transistor M6, the data write transistor M8, the bias adjustment transistor M2, and the second initialization transistor M7 are P-type transistors. The N-type first initialization transistor M4 and the threshold compensation transistor M5 can effectively reduce leakage current and improve the driving capability of the pixel circuit.

[0031] refer to Figure 5In each frame period (frame), the driving process of the pixel circuit includes a data writing phase and a holding phase. In the data writing phase, the following processes are sequentially performed: the fourth scan signal S2N is at a high level (enable level), the first scan signal SPX is at a low level (enable level), the first node N1 and the second node N2 are reset, and the anode of the light-emitting element D1 is reset; the third scan signal S1N is at a high level, and the first node N1 continues to be reset; the second scan signal SP is at a low level, and the data signal Data is written to the first node N1; the first scan signal SPX is at a low level, and the second node N2 and the first end of the light-emitting element D1 are reset again; the light-emitting control signal EM (Emit) is at a low level, and the first light-emitting control transistor M1, the driving transistor M3, the second light-emitting control transistor M6, and the light-emitting element D1 are turned on in sequence; in the holding phase, due to the effect of the storage capacitor Cst, when the light-emitting control signal EM is at a low level, the light-emitting element D1 continues to emit light. Optionally, the light-emitting control signal Emit can be configured to include multiple valid pulses P1 in one frame period of the pixel circuit 11. This embodiment can control the number and duration of the effective pulses P1, thereby achieving PWM brightness adjustment.

[0032] The pixel circuit 11 of the display panel may include at least a first pixel circuit 111 and a second pixel circuit 112. The first pixel circuit 111 includes a first pixel driving circuit 114 and a first light-emitting element D11; the second pixel circuit 112 includes a second pixel driving circuit 115 and a second light-emitting element D12. In this embodiment, the first light-emitting element D11 and the second light-emitting element D12 can emit light of different colors, and the luminous efficiency of the first light-emitting element D11 is lower than the luminous efficiency of the second light-emitting element D12. In addition, if the pixel circuit 11 includes 3 or more light-emitting elements D1 of different colors, the first light-emitting element D11 is the light-emitting element with the lowest luminous efficiency among the light-emitting elements D1 of multiple colors of the display panel. This embodiment is preferably an OLED device. Based on the luminous characteristics of the OLED device, the display efficiency of light-emitting elements D1 of different colors varies greatly. Under the same low grayscale display state, the luminous current generated by the first light-emitting element D11 is larger. By Figure 4 and Figure 5As can be seen, during PWM low-grayscale display, the EM signal transitions multiple times within a frame period (the time required to scan a single frame). When the EM signal transitions from a low level to a high level, it pulls up the potential of the second node N2 via parasitic capacitance coupling, generating a coupling current Ie. Therefore, the driving current driving light-emitting element D1 includes the normal driving light-emitting current Id and the coupling current Ie. However, there is a difference in the luminous efficiency of the first light-emitting element D11 and the second light-emitting element D12. The first light-emitting element D11 has a lower luminous efficiency. Therefore, during low-grayscale display, the current of the first light-emitting element D11 is higher and is less affected by the coupling current Ie, while the second light-emitting element D12 is more affected by the coupling current Ie. In other words, light-emitting elements of different colors are affected differently by the coupling current Ie, resulting in color shift in low-grayscale display images. In a specific example, if the first light-emitting element D11 is a blue light-emitting element, the second light-emitting element D12 can be a red light-emitting element, a green light-emitting element, or a white light-emitting element. It is only necessary to ensure that the luminous efficiency of the first light-emitting element D11 is lower than that of the second light-emitting element D12.

[0033] As can be seen from the above, in order to balance the color shift between the light-emitting elements D1 of different colors, the gate of the first light-emitting control transistor M1 of the first pixel circuit 111 can be set to increase the influence of the coupling current Ie on the first light-emitting element D11. In this embodiment, the first light-emitting control transistor M1 is set in a dual-gate structure, such as Figure 3 As shown, the gate of the first light-emitting control transistor M1 includes a first gate G1 and a second gate G2, which increases the size of the capacitor Cgd between the gate and the second end of the first light-emitting control transistor M1, thereby enhancing the coupling effect of the light-emitting control signal Emit on the second node N2 and the third node N3 of the first light-emitting control transistor M1, so that the coupling effect generated by the beating light-emitting control signal Emit has similar effects on the first light-emitting element D11 and the second light-emitting element D12, thereby avoiding color shift problems on the display panel and improving the picture display effect.

[0034] Continue to refer Figure 3 Optionally, the first light-emitting control transistor M1 of the first pixel circuit 111 may include: a second gate G2, arranged on one side of the substrate 10; a first active layer 12, arranged on the side of the second gate G2 away from the substrate 10; a first gate G1, arranged on the side of the first active layer 12 away from the substrate 10; the first active layer 12 includes a channel portion 121; in a direction perpendicular to the substrate 10, the channel portion 121 overlaps with the first gate G1. In this embodiment, the first light-emitting control transistor M1 of the first pixel circuit 111 may include a second gate G2, a first active layer 12 and a first gate G1, which are sequentially arranged away from the substrate 10, to form a top-bottom double-gate transistor. The first active layer 12 forms a channel portion 121 by doping carriers to realize the transmission of current signals. As Figure 6 As shown, Figure 6 This is a schematic diagram of the principle of a first light-emitting control transistor provided by an embodiment of the present invention. A top-bottom dual-gate transistor can form a larger Cgd capacitance (Cgd1 + Cgd2) through the bottom gate (second gate G2). Cgd1 is the parasitic capacitance formed between the first gate G1 and the second node N2, and Cgd2 is the parasitic capacitance formed between the second gate G2 and the second node N2. The bottom gate can enhance the coupling effect of the Gate signal (light-emitting control signal Emit) on the nodes at both ends of ds (the source and drain of the first light-emitting control transistor M1), increasing the effect of the coupling effect on the first light-emitting control transistor M1, and preventing the first light-emitting element D11 and the second light-emitting element D12 from being affected differently by the coupling current Ie, thereby effectively preventing color difference and improving the uniformity of the picture display.

[0035] Continue to refer Figure 3 Optionally, in a direction perpendicular to the substrate 10, the projection of the second gate G2 may cover the first gate G1. In this embodiment, the first gate G1 and the second gate G2 are both connected to the light-emitting control signal Emit. In a plane parallel to the substrate 10, the projection of the second gate G2 may cover the first gate G1, thereby forming a larger Cgd2 capacitor on the bottom layer of the second gate G2. In this embodiment, in a direction perpendicular to the substrate 10, the projection of the first gate G1 may cover the channel portion 121 to facilitate control of the degree of channel conduction, further increasing the effect of the coupling current on the first light-emitting element D11, thereby avoiding color shift in light-emitting elements of different colors and improving image uniformity.

[0036] Continue to refer Figure 3 Optionally, in a direction parallel to the substrate 10, a first distance L1 between a first edge S1 of the second gate G2 and a second edge S2 of the first gate G1 is ≥ 1.2 μm. In the above embodiment, it can be seen that in a direction perpendicular to the substrate 10, the projection of the second gate G2 covers the first gate G1, thereby significantly increasing the effect of the coupling effect on the first light-emitting element D11. In this embodiment, optionally, the outward extension (first distance L1) of the first edge S1 of the second gate G2 relative to the second edge S2 of the first gate G1 can be limited. For example, the first distance L1 is limited to a range greater than or equal to 1.2 μm. On the one hand, this embodiment maximizes the effect of the coupling capacitance on the first light-emitting element D11 during the transition process of the emission control signal Emit, so that the effect on the first light-emitting element D11 is consistent with that on the second light-emitting element D12. On the other hand, this embodiment can limit the area of the second gate G2 parallel to the plane of the substrate 10 while ensuring the effect, thereby preventing the first emission control transistor M1 from occupying too large a plane area, thereby reducing the overall area of the first pixel circuit 111.

[0037] Figure 7 A schematic cross-sectional structure diagram of another first light-emitting control transistor provided in an embodiment of the present invention. Figure 8 This is a cross-sectional structural diagram of another first light-emitting control transistor provided by an embodiment of the present invention. Based on the above embodiment, the size of the second gate G2 can also be set in other ways. For example, Figure 7 As shown, the second gate G2 only needs to form Cgd2 between the second node N2. The size of the second gate G2 parallel to the substrate 10 can be the same as that of the first gate G1, which can also increase the parasitic capacitance and thus increase the coupling current. Alternatively, as Figure 8 As shown, in the direction perpendicular to the substrate 10, the second gate G2 only partially overlaps with the first gate G1, which can also change the parasitic capacitance of the first light-emitting control transistor, increase the influence of the coupling current on the first light-emitting element, and effectively avoid color deviation under low grayscale display images.

[0038] Figure 9 A schematic cross-sectional structure diagram of another first light emission control transistor provided in an embodiment of the present invention. Optionally, the first light emission control transistor M1 of the first pixel circuit 111 may include: a first active layer 12, disposed on one side of the substrate 10; a first gate G1 and a second gate G2, disposed on a side of the first active layer 12 away from the substrate 10; the first gate G1 and the second gate G2 are disposed on the same layer. Figure 9 As shown, in addition to top- and bottom-gate transistors, the first emission control transistor M1 in this embodiment can also have a conventional dual-gate structure. Specifically, the first emission control transistor M1 of the first pixel circuit 111 includes a first active layer 12, and a first gate G1 and a second gate G2 disposed on a side of the first active layer 12 away from the substrate 10. In this embodiment, the second gate G2 is connected in parallel with the first gate G1 to increase the parasitic capacitance between the first emission control transistor M1 and the second node N2, thereby increasing the effect of the coupling current on the first light-emitting element, so that the first light-emitting element and other light-emitting elements are affected by the coupling current Ie to the same extent. In particular, in low grayscale display images, when the normal driving emission current Id is small, the coupling current Ie accounts for a large proportion of the driving current of the light-emitting element D1. In this embodiment, by adjusting the second gate G2 and the first gate G1, the effect of the coupling current on light-emitting elements of different colors is minimized, thereby improving the low grayscale display effect.

[0039] Figure 10This is a schematic diagram of the structure of another pixel circuit provided in an embodiment of the present invention. In this embodiment, in addition to the first emission control transistor M1 of the first pixel circuit 111, the gate of the second emission control transistor M6 of the first pixel circuit 111 may optionally include a third gate G3 and a fourth gate G4. In addition to the first pixel circuit 111, to further increase the coupling current, the gate of the second emission control transistor M6 may include a third gate G3 and a fourth gate G4. Optionally, the third gate G3 and the fourth gate G4 may form a top-bottom gate structure and may be provided on the same metal layer. This embodiment does not specifically limit the specific configuration. In this embodiment, the first emission control transistor M1 and the second emission control transistor M6 both have a dual-gate structure, further reducing color shift issues in low-grayscale images.

[0040] Continue to refer Figure 1 Optionally, the pixel circuit 11 may further include a third pixel circuit 116; the third pixel circuit 116 includes a third light-emitting element D13; the emission color of the third light-emitting element D13 is different from the emission color of the first light-emitting element D11 and the emission color of the second light-emitting element D12; and the luminous efficiency of the first light-emitting element D11 is lower than the luminous efficiency of the second light-emitting element D12. In this embodiment, the pixel circuit 11 may include a first pixel circuit 111, a second pixel circuit 112, and a third pixel circuit 116; the third pixel circuit 116 includes a third light-emitting element D13; the emission colors of the first light-emitting element D11, the second light-emitting element D12, and the third light-emitting element D13 are different. The luminous efficiency of the first light-emitting element D11 is the lowest among the three aforementioned light-emitting elements. Exemplarily, the first light-emitting element D11 can be a blue light-emitting element, the second light-emitting element D12 can be a red light-emitting element, and the third light-emitting element D13 can be a green light-emitting element. In this embodiment, the parasitic capacitance of the first light-emitting control transistor M1 of the first pixel circuit 111 can be adjusted through a dual-gate structure, so that the proportion of the coupling current in the driving current of the first light-emitting element D11, the second light-emitting element D12 and the third light-emitting element D13 tends to be consistent, thereby effectively reducing the color deviation problem.

[0041] Figure 11A cross-sectional schematic diagram of a display panel provided by an embodiment of the present invention. Optionally, the first light-emitting control transistor M1 of the second pixel circuit 112 may include a fifth gate G5, a second active layer 13, and a sixth gate G6 that are sequentially away from the substrate 10; the first light-emitting control transistor M1 of the third pixel circuit 116 includes a seventh gate G7, a third active layer 14, and an eighth gate G8 that are sequentially away from the substrate 10; the second active layer 13 and the third active layer 14 are both arranged in the same layer as the first active layer 12; in a direction perpendicular to the substrate 10, the projection of the sixth gate G6 covers the fifth gate G5, and the projection of the eighth gate G8 covers the seventh gate G7. In addition to the first pixel circuit 111, the first light-emitting control transistors M1 of the second pixel circuit 112 and the third pixel circuit 116 may also be set to a dual-gate structure, such as Figure 11 As shown, the first emission control transistor M1 of the second pixel circuit 112 is a top-bottom gate transistor, including a fifth gate G5, a second active layer 13, and a sixth gate G6, which are sequentially away from the substrate 10. Similarly, the first emission control transistor M1 of the third pixel circuit 116 is a top-bottom gate transistor, including a seventh gate G7, a third active layer 14, and an eighth gate G8, which are sequentially away from the substrate 10. In this embodiment, the first emission control transistors M1 of the first pixel circuit 111, the second pixel circuit 112, and the third pixel circuit 116 all have a dual-gate structure. Therefore, when adjusting the effect of the coupling current on the driving current of the light-emitting element D1, the three first emission control transistors M1 can be adjusted simultaneously, thereby ensuring that the coupling current has a consistent effect on the first light-emitting element D11, the second light-emitting element D12, and the third light-emitting element D13, further resolving the color shift problem of the display panel and improving the quality of low grayscale images.

[0042] Continue to refer Figure 11 Optionally, in a direction parallel to the substrate 10, L1 ≥ L2; L1 ≥ L3; where L1 is the first distance between the first edge S1 of the second gate G2 and the second edge S2 of the first gate G1; L2 is the second distance between the sixth edge S6 of the sixth gate G6 and the fifth edge S5 of the fifth gate G5; and L3 is the third distance between the eighth edge S8 of the eighth gate G8 and the seventh edge S7 of the seventh gate G7. It should be noted that the first light-emitting element D11 is the light-emitting element with the lowest luminous efficiency among the light-emitting elements D1. The bottom gate extension of the first light-emitting control transistor M1 of the first pixel circuit 111 is L1, the bottom gate extension of the first light-emitting control transistor M1 of the second pixel circuit 112 is L2, and the bottom gate extension of the first light-emitting control transistor M1 of the third pixel circuit 116 is L3. To increase the influence of the coupling capacitance on the first light-emitting element D11, in this embodiment, L1 ≥ L2 and L1 ≥ L3, so that the effects of the coupling current on the various light-emitting elements are consistent, improving low-grayscale display effects.

[0043] Figure 12 A cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention. Optionally, the display panel may include: a substrate 10; an auxiliary metal layer 15, disposed on one side of the substrate 10; a second gate electrode G2 disposed on the auxiliary metal layer 15; a first semiconductor layer 16, disposed on a side of the auxiliary metal layer 15 away from the substrate 10; a first active layer 12 disposed on the first semiconductor layer 16; a first metal layer 17, disposed on a side of the first active layer 12 away from the substrate 10; and a first gate electrode G1 disposed on the first metal layer 17. In this embodiment, the display panel includes, in a direction perpendicular to the substrate 10, the auxiliary metal layer 15, the first semiconductor layer 16, and the first metal layer 17, wherein the auxiliary metal layer 15 is used to provide the second gate electrode G2, the first semiconductor layer 16 is doped to form the first active layer 12, and the first metal layer 17 can be provided with the second gate electrode G2. The above-mentioned film layers form the first light-emitting control transistor M1. On the basis of the above embodiment, optionally, the display panel may further include: a capacitor plate layer 18, which is arranged on the side of the first gate G1 layer away from the substrate 10; the capacitor plate layer 18 is provided with a second plate of the storage capacitor Cst; the first plate of the storage capacitor Cst is provided on the first metal layer 17; a second semiconductor layer 19, which is arranged on the side of the capacitor plate layer 18 away from the substrate 10; the second semiconductor layer 19 is provided with a fourth active layer 20 of the first initialization transistor M4 and a fifth active layer 21 of the threshold compensation transistor M5; a third metal layer 23, which is arranged on the side of the second semiconductor layer 19 away from the substrate 10; the third metal layer 23 includes a ninth gate G9 of the first initialization transistor M4 and a tenth gate G10 of the threshold compensation transistor M5; a second metal layer 22, which is arranged on the side of the third metal layer 23 away from the substrate 10; the second metal layer 22 is provided with a source 221 and a drain 222 of the transistor. Because the pixel circuits 11 in this embodiment all employ an LTPO circuit structure, including both N-type and P-type transistors, a first semiconductor layer 16 and a second semiconductor layer 19 are required. The gate of the first emission control transistor M1 is disposed on the auxiliary metal layer 15 and the first metal layer 17, effectively implementing dual-gate control and adjusting the effect of the coupled current on the light-emitting element D1 to correct color shift.

[0044] An embodiment of the present invention further provides a display device. Figure 13 A schematic structural diagram of a display device provided by an embodiment of the present invention is shown in FIG. Figure 13 As shown, the display device provided by the embodiment of the present invention includes the display panel 200 described in any embodiment of the present invention. The display device can be as follows Figure 13 The mobile phone shown in the figure may also be a computer, a television, a smart wearable device, etc., and this embodiment does not specifically limit this.

[0045] The display device provided by the embodiment of the present invention includes the technical features of the display panel provided by any embodiment of the present invention, and has the beneficial effects of the corresponding features, which will not be repeated here.

[0046] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: substrate; a plurality of pixel circuits disposed on the substrate; The pixel circuit at least includes a first light-emitting control transistor, a driving transistor, a second light-emitting control transistor, and a light-emitting element, which are sequentially connected in series between a first power supply signal and a second power supply signal; the gates of the first light-emitting control transistor and the second light-emitting control transistor are both connected to the light-emitting control signal; The pixel circuit includes at least a first pixel circuit and a second pixel circuit; the first pixel circuit includes a first light-emitting element; the second pixel circuit includes a second light-emitting element; the first light-emitting element and the second light-emitting element emit different colors; and the light-emitting efficiency of the first light-emitting element is lower than the light-emitting efficiency of the second light-emitting element; The gate of the first light emission control transistor of the first pixel circuit includes a first gate and a second gate.

2. The display panel according to claim 1, wherein: The first light emission control transistor of the first pixel circuit includes: The second gate is disposed on one side of the substrate; a first active layer, disposed on a side of the second gate away from the substrate; The first gate is disposed on a side of the first active layer away from the substrate; The first active layer includes a channel portion; in a direction perpendicular to the substrate, the channel portion overlaps with the first gate.

3. The display panel according to claim 1, wherein: The first light emission control transistor of the first pixel circuit includes: a first active layer, disposed on one side of the substrate; The first gate and the second gate are arranged on a side of the first active layer away from the substrate; the first gate and the second gate are arranged in the same layer.

4. The display panel according to claim 2, wherein: In a direction perpendicular to the substrate, a projection of the second gate covers the first gate.

5. The display panel according to claim 4, wherein: In a direction parallel to the substrate, a first distance L1 between a first edge of the second gate and a second edge of the first gate is ≥1.2 μm.

6. The display panel according to claim 1, wherein: The gate of the second light emission control transistor of the first pixel circuit includes a third gate and a fourth gate.

7. The display panel according to claim 4, wherein: The pixel circuit further includes a third pixel circuit; the third pixel circuit includes a third light-emitting element; the light-emitting color of the third light-emitting element is different from the light-emitting color of the first light-emitting element and the light-emitting color of the second light-emitting element; The light emitting efficiency of the first light emitting element is lower than the light emitting efficiency of the second light emitting element.

8. The display panel according to claim 7, wherein: The first light emission control transistor of the second pixel circuit includes a fifth gate, a second active layer and a sixth gate sequentially away from the substrate; The first light emission control transistor of the third pixel circuit includes a seventh gate, a third active layer, and an eighth gate sequentially away from the substrate; the second active layer and the third active layer are both provided in the same layer as the first active layer; In a direction perpendicular to the substrate, a projection of the sixth gate covers the fifth gate, and a projection of the eighth gate covers the seventh gate.

9. The display panel according to claim 8, wherein: In the direction parallel to the substrate, L1≥L2; L1≥L3; Among them, L1 is the first distance between the first edge of the second gate and the second edge of the first gate; L2 is the second distance between the sixth edge of the sixth gate and the fifth edge of the fifth gate; L3 is the third distance between the eighth edge of the eighth gate and the seventh edge of the seventh gate.

10. The display panel according to claim 2, wherein: The display panel includes: the substrate; an auxiliary metal layer, disposed on one side of the substrate; the auxiliary metal layer is provided with the second gate; a first semiconductor layer, disposed on a side of the auxiliary metal layer away from the substrate; the first semiconductor layer is provided with the first active layer; The first metal layer is arranged on a side of the first active layer away from the substrate; the first metal layer is provided with the first gate.

11. The display panel according to claim 10, wherein: The pixel circuit further includes: a data writing transistor, a bias adjustment transistor, a first initialization transistor, a threshold compensation transistor, a second initialization transistor and a storage capacitor; The first end of the storage capacitor is electrically connected to the first end of the first light-emitting control transistor; the first end of the first light-emitting control transistor is connected to the first power supply signal; the second end of the storage capacitor is electrically connected to the gate of the driving transistor; the first end of the bias adjustment transistor is connected to the bias adjustment signal; the second end of the bias adjustment transistor is electrically connected to the first end of the driving transistor; the gate of the bias adjustment transistor is connected to the first scan signal; the first end of the data writing transistor is connected to the data signal; the second end of the data writing transistor is electrically connected to the first end of the driving transistor; the gate of the data writing transistor is connected to the second scan signal; The first end of the first initialization transistor is connected to the first reset signal; the second end of the first initialization transistor is electrically connected to the gate of the driving transistor; the gate of the first initialization transistor is connected to the third scan signal; the first end of the threshold compensation transistor is electrically connected to the gate of the driving transistor; the second end of the threshold compensation transistor is electrically connected to the second end of the driving transistor; the gate of the threshold compensation transistor is connected to the fourth scan signal; the first end of the second initialization transistor is connected to the second reset signal; the second end of the second initialization transistor is electrically connected to the first end of the light-emitting element; the gate of the second initialization transistor is connected to the first scan signal; and the second end of the light-emitting element is connected to the second power supply signal.

12. The display panel according to claim 11, wherein: The first initialization transistor and the threshold compensation transistor are N-type transistors; the first emission control transistor, the driving transistor, the second emission control transistor, the data writing transistor, the bias adjustment transistor and the second initialization transistor are P-type transistors; The display panel further includes: a capacitor plate layer, arranged on a side of the first gate layer away from the substrate; the capacitor plate layer is provided with the second plate of the storage capacitor; the first plate of the storage capacitor is arranged on the first metal layer; a second semiconductor layer, disposed on a side of the capacitor plate layer away from the substrate; the second semiconductor layer is provided with a fourth active layer of the first initialization transistor and a fifth active layer of the threshold compensation transistor; a third metal layer, disposed on a side of the second semiconductor layer away from the substrate; the third metal layer including a ninth gate of the first initialization transistor and a tenth gate of the threshold compensation transistor; The second metal layer is arranged on a side of the third metal layer away from the substrate; the second metal layer is provided with a source and a drain of the transistor.

13. The display panel according to claim 1, wherein The light emission control signal is configured to include a plurality of valid pulses in one frame period of the pixel circuit.

14. A display device, characterized in that: The display panel comprises any one of claims 1 to 13.

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