Low-cost high-efficiency three-dimensional integrated phased-array antenna fan-out wafer-level packaging structure

Abstract

The invention discloses a low-cost and high-efficiency fan-out wafer level packaging structure of a three-dimensional integrated phased array antenna, and belongs to the technical field of phased arrays. The structure comprises an antenna module, a radio frequency module and a printed board circuit module which are arranged from top to bottom. A metal bump array is arranged between the antenna module and the radio frequency module, and a ball grid array is arranged between the radio frequency module and the printed board circuit module. According to the invention, the antenna module and the radio frequency module are independently packaged and then stacked, and the air-filled grounding coplanar waveguide is used as a transmission line for radio frequency signals, so that the radio frequency loss can be effectively reduced, the sensitivity of the material loss characteristic is reduced, and low-cost and high-efficiency three-dimensional integrated phased-array antenna packaging is realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of phased arrays, and in particular designs a low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure. Background Art

[0002] Millimeter-wave technology has attracted significant attention due to its numerous advantages, including high data rates, low latency, high reliability, and dense connectivity. These advantages have driven recent advances in millimeter-wave applications, encompassing a wide range of applications, including automotive radar, wireless communications, imaging radar, and point-to-point communications across multiple frequency bands. A notable development in this field is the integration of radar front-ends operating at frequencies up to 100 GHz into monolithic microwave integrated circuits. Furthermore, the increasing use of phased array antennas has effectively enhanced the high directivity and adaptive beam scanning capabilities of millimeter-wave systems. However, as technology advances toward higher frequencies, W-band active phased array packaging faces challenges such as high cost and high losses. The reduced electrical length in the W-band requires extremely high-precision processes for chip packaging. Furthermore, the dielectric loss of W-band materials is generally increased, with loss tangents on the order of 0.01, resulting in a sharp increase in transmission losses.

[0003] Currently, mainstream packaging solutions for the W-band can be categorized into three main types. The first utilizes organic prepreg substrate technology combined with flip-chip technology. However, this packaging solution has significant drawbacks: because the RF traces are embedded within the dielectric layer, significant losses occur in the W-band due to the increased material loss tangent. Furthermore, the substrate utilizes a multi-layer metal structure, requiring low-frequency signal lines, power lines, and control lines to be routed through the RF substrate, making this design significantly less cost-effective.

[0004] The second packaging solution integrates the RF chip into a multi-layer substrate to optimize routing and minimize losses. Compared to traditional routing methods, this design effectively reduces RF signal loss and improves signal transmission efficiency. However, this solution requires the use of advanced multi-layer substrates, such as ceramic or silicon-based materials, which imposes stringent processing requirements and increases manufacturing costs.

[0005] The third type is traditional fan-out wafer-level packaging (FOWLP). Due to its compact size and low cost, it has become a prominent technology for high-performance packaging. The RF chip is encapsulated in epoxy molding compound (EMC), and the redistribution layer on both sides of the package is used to lay out the RF signal lines and DC signal lines. This architecture significantly reduces the cost of packaging wiring. However, traditional FOWLP packaging has difficulties in making molded through holes, and these difficulties mainly come from the uneven distribution of particles in the EMC molding material. In order to reduce the roughness of the laser-drilled sidewalls and achieve a uniform conformal seed layer, additional chemical plating steps are necessary, which increase the complexity and cost of the process. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this paper proposes a low-cost, high-efficiency, fan-out wafer-level packaging structure for a three-dimensional integrated phased array antenna. In this paper, the antenna module and RF module are independently packaged and then stacked. This design enables the RF signal to use an air-filled grounded coplanar waveguide as a transmission line, effectively minimizing RF losses and reducing sensitivity to material loss characteristics, achieving a low-cost, high-efficiency, three-dimensional integrated phased array antenna package.

[0007] The technical solution adopted in the present invention is:

[0008] A low-cost, high-efficiency, three-dimensional integrated phased array antenna fan-out wafer-level packaging structure, from top to bottom, includes an antenna module, a radio frequency module, and a printed circuit module; a metal bump array is provided between the antenna module and the radio frequency module, and a ball grid array is provided between the radio frequency module and the printed circuit module;

[0009] The printed circuit module is composed of a bottom dielectric substrate and metal layers on its upper and lower surfaces; wherein the upper metal layer is provided with a plurality of control signal output ports and power output ports, each of which is electrically interconnected with the radio frequency module via a ball grid array;

[0010] The RF module adopts a fan-out wafer-level packaging architecture, including an RF chip, a core layer component with molded through holes located on both sides of the RF chip, an epoxy molding layer that wraps and encapsulates the RF chip and the core layer component, a polyimide film layer located on the upper and lower surfaces of the epoxy molding layer, an RF signal transmission line located in the upper polyimide film layer, and an RF signal transmission line, a control signal line, and a power supply line located in the lower polyimide film layer; wherein the RF output port of the RF chip is connected to the metal bump array via the RF signal transmission line and the molded through hole, and the control signal input port and the power input port are connected to the ball grid array via the control signal line and the power supply line, respectively;

[0011] The antenna module includes an antenna dielectric substrate and Ajinomoto deposited film layers on its upper and lower surfaces, a polyimide film layer located on the surface of the Ajinomoto deposited film layer, a metal radiation layer located in the upper polyimide film layer, and a metal antenna ground layer located in the lower polyimide film layer; wherein the metal radiation layer is provided with a feeding point, and the metal antenna ground layer is provided with a soldering pad, and the feeding point is connected to the soldering pad and the metal bump array below in sequence through a molded through hole to achieve electrical interconnection with the radio frequency module.

[0012] Preferably, the radio frequency signal transmission line uses an air-filled grounded coplanar waveguide as the transmission line to reduce radio frequency signal transmission loss.

[0013] Preferably, the condition for realizing the air-filled grounded coplanar waveguide as a transmission line is: h0≥2ha, where h0 is the thickness of the epoxy molding layer and ha is the thickness of the air-filled grounded coplanar waveguide (ie, the air gap thickness).

[0014] Preferably, a metal matching line segment is further provided at the soldering pad of the metal antenna ground layer, so as to achieve better impedance matching between the metal radiation layer and the air-filled grounded coplanar waveguide.

[0015] Preferably, during the packaging process of the fan-out wafer-level antenna packaging structure, the RF chip and the core layer component with molded through holes are placed on a carrier containing a heat release tape and used as a new wafer; the wafer is then wrapped and packaged with EMC material to form an epoxy plastic sealing layer.

[0016] Preferably, the antenna module comprises an antenna which is a phased array antenna array composed of a plurality of antenna units arranged regularly in a periodic manner.

[0017] The principles and beneficial effects of the present invention are as follows:

[0018] In the present invention, an air-filled grounded coplanar waveguide is used as a radio frequency signal transmission line;

[0019] In the air-filled grounded coplanar waveguide above the RF module, the central guide signal line and the grounded coplanar conductors on both sides are located in the polyimide film layer above the RF module, and the transmission line ground layer and the antenna share the metal antenna ground layer; at the same time, the grounded coplanar conductors on both sides and the transmission line ground layer are connected to each other through a metal bump array to achieve common ground.

[0020] In the air-filled grounded coplanar waveguide below the RF module, the central guide signal line and the grounded coplanar conductors on both sides are located in the polyimide film layer below the RF module, and the transmission line ground layer is the upper metal layer of the printed circuit board; at the same time, the grounded coplanar conductors on both sides are connected to the transmission line ground layer through a ball grid array to achieve common ground.

[0021] This design enables RF signals to use an air-filled grounded coplanar waveguide as a transmission line, effectively minimizing RF losses and reducing sensitivity to material loss characteristics.

[0022] Furthermore, the present invention simultaneously encapsulates the core layer components and RF chips, which already have molded-in through-holes, with EMC materials, eliminating the need for additional chemical plating and reducing packaging costs. This provides a low-cost, high-efficiency, three-dimensional integrated phased array antenna packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0024] Figure 1 This is a side view of the stacked architecture of a low-cost, high-efficiency, three-dimensional integrated phased array fan-out wafer-level package antenna of the present invention.

[0025] Figure 2 This is an exploded view of a low-cost, high-efficiency, three-dimensional integrated phased array antenna fan-out wafer-level packaging structure in an embodiment and a three-dimensional diagram of an air-filled coplanar waveguide grounded transmission line; among them, the upper left figure is an air-filled grounded coplanar waveguide located on the upper layer of the RF module, and the lower left figure is an air-filled grounded coplanar waveguide located on the lower layer of the RF module.

[0026] Figure 3 Schematic diagram of the structure of an antenna unit in a low-cost and high-efficiency three-dimensional integrated phased array fan-out wafer-level package antenna in an embodiment.

[0027] Figure 4 This is a process flow chart of a low-cost and high-efficiency three-dimensional integrated phased array fan-out wafer-level packaged antenna according to the present invention.

[0028] Figure 5 1 is a structural diagram of a horseshoe-shaped molded via array in a low-cost and high-efficiency three-dimensional integrated phased array fan-out wafer-level package antenna in an embodiment.

[0029] Description of reference numerals:

[0030] 1. Printed circuit board module; 2. RF module; 3. Antenna module; 4. Metal bump array; 5. Ball grid array; 11. Metal layer on the upper surface of the printed circuit board module; 12. Metal layer on the lower surface of the printed circuit board module; 21. Metal layer located in the upper polyimide film layer in the RF module; 13. Bottom dielectric substrate; 22. Core layer component with molded through holes in the RF module; 23. RF chip; 24. Metal layer located in the lower polyimide film layer in the RF module; 25. Epoxy molding layer; 31. Radiating metal layer located in the upper polyimide film layer in the antenna module; 32. Molded through holes in the antenna module; 33. Metal antenna ground layer located in the lower polyimide film layer in the antenna module; 34. Antenna dielectric substrate; 35. Metal matching line segment; 61. Thermal release tape; 62. Carrier board. DETAILED DESCRIPTION

[0031] In order to enable people skilled in the art to better understand the technical solutions in this specification, the technical solutions of the embodiments of the present application will be described in detail and completely below in combination with the drawings in the embodiments of the present application. Obviously, the embodiments described with reference to the drawings are exemplary and are intended to be used to explain the present application, and cannot be understood as limiting the present application.

[0032] This embodiment provides a low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure, the side view of which is shown in FIG. Figure 1 As shown, from top to bottom, it includes an antenna module, a radio frequency module, and a printed circuit board module; a metal bump array is set between the antenna module and the radio frequency module, and a ball grid array is set between the radio frequency module and the printed circuit board module.

[0033] The printed circuit module is composed of a bottom dielectric substrate and metal layers on its upper and lower surfaces; the upper metal layer is provided with a plurality of control signal output ports and power output ports, and each port is electrically interconnected with the radio frequency module through a ball grid array.

[0034] The RF module adopts a fan-out wafer-level packaging architecture, including an RF chip, a core layer component located on both sides of the RF chip and with molded through holes, an epoxy molding layer that wraps and packages the RF chip and the core layer component, a polyimide film layer located on the upper and lower surfaces of the epoxy molding layer, an RF signal transmission line located in the upper polyimide film layer, and an RF signal transmission line, a control signal trace, and a power trace located in the lower polyimide film layer; wherein the RF output port of the RF chip is connected to the metal bump array through the RF signal transmission line and the molded through hole, and the control signal input port and the power input port are connected to the ball grid array through the control signal trace and the power trace, respectively.

[0035] The antenna module includes an antenna dielectric substrate and Ajinomoto deposited film layers on its upper and lower surfaces, a polyimide film layer located on the surface of the Ajinomoto deposited film layer, a metal radiation layer located in the upper polyimide film layer, and a metal antenna ground layer located in the lower polyimide film layer; wherein, the metal radiation layer is provided with a feeding point, and the metal antenna ground layer is provided with a soldering pad and a metal matching line segment, and the feeding point is connected to the soldering pad and the metal bump array below in sequence through a molded through hole to achieve electrical interconnection with the radio frequency module.

[0036] The metal matching line segment is used to achieve better impedance matching between the metal radiating layer and the air-filled grounded coplanar waveguide.

[0037] Specifically, in this embodiment, Figure 2 As shown in the exploded view, the antenna is a 4×4 array of magnetoelectric dipole antenna units arranged regularly to form the entire antenna array surface. The unit spacing is 2.1mm on the E plane and 1.8mm on the H plane. This array spacing can support the phased array antenna to achieve ±30° scanning on the E plane and ±40° scanning on the H plane.

[0038] Antenna unit structure Figure 3 As shown, it consists of four square metal patches, four sets of grounding vias (molded vias), and an L-shaped feed probe (rectangular metal strip and connected molded vias). In the figure, the x-direction is the direction of the electric flux vector on the magnetoelectric dipole antenna, and the y-direction is the direction of the magnetic flux vector. The unit dimensions are lx = 1.8 mm, ly = 1.5 mm, wc = 1.7 mm, and lc = 1.4 mm. Each square metal patch has a side length of lp = 0.48 mm and wp = 0.48 mm. The distance between the square metal patch and the unit frame is c1 = 0.12 mm and c2 = 0.27 mm. The spacing between the grounding vias within the square metal patch is s = 0.25 mm. The rectangular metal strip of the L-shaped feed probe has a length of lf = 0.8 mm and a width of wf = 0.06 mm. The molded via in the center of the probe has a diameter of d = 0.07 mm. The metal matching line segment has a length of ld = 0.15 mm and a width of wd = 0.06 mm.

[0039] like Figure 2 Explosive photos and Figure 2 As shown in the left-hand block diagram, the antenna's feed structure consists of a metal bump array, an upper layer of air-filled grounded coplanar waveguide, molded vias in the core assembly, and a lower layer of air-filled grounded coplanar waveguide. These four feed components interconnect the antenna with the RF chip's output port.

[0040] Specifically, in the air-filled grounded coplanar waveguide above the RF module, the central guide signal line and the grounded coplanar conductors on both sides are located in the polyimide film layer on the upper layer of the RF module, and the transmission line ground layer and the antenna share the metal antenna ground layer; at the same time, the grounded coplanar conductors on both sides and the transmission line ground layer are connected to each other through a metal bump array to achieve common ground.

[0041] In the air-filled grounded coplanar waveguide below the RF module, the central guide signal line and the grounded coplanar conductors on both sides are located in the polyimide film layer below the RF module, and the transmission line ground layer is the upper metal layer of the printed circuit board; at the same time, the grounded coplanar conductors on both sides are connected to the transmission line ground layer through a ball grid array to achieve common ground.

[0042] Among them, the thickness of the upper air-filled grounded coplanar waveguide (air gap) is ha1=0.06mm, the thickness of the lower air-filled grounded coplanar waveguide (air gap) is ha2=0.16mm, and the thickness of the epoxy molding layer is h0=0.44mm. That is, the thickness of the epoxy molding layer h0 is much larger than the thickness of the air-filled grounded coplanar waveguide (ha1, ha2). Therefore, the air-filled grounded coplanar waveguide will not be transformed into a dielectric-filled substrate-integrated coaxial cable, and the electromagnetic waves will be confined in the air gap, so that the radio frequency signal does not need to pass through materials with high loss tangent, which greatly reduces the insertion loss in the entire package and improves efficiency.

[0043] like Figure 4 The figure shows the overall process flow chart of the packaged antenna, with the following specific steps: 1. Prepare a carrier with thermal release tape; 2. Precisely place the RF chip and the cut core layer component with mold seal vias on the thermal release tape and treat it as a new wafer for subsequent operations; 3. Wrap the wafer with EMC material for packaging and molding; 4. After molding, the wafer is separated from the carrier through heat treatment and the front-side redistribution layer (RDL) is manufactured. This front-side RDL manufacturing includes the deposition of two passivation layers and a metal layer. EMC material is added in this step. After front-end processing, the wafer is thinned to a thickness of 440μm, exposing the mold seal vias for the next step; 5. After adding protective tape, the wafer is flipped so that the active side of the RF chip faces down to facilitate subsequent processes; 6. RDL manufacturing is performed on the top of the flipped wafer. This is the back-side RDL manufacturing. After the RDL is completed, the protective tape is removed; 7. The antenna packaging module uses a larger embedded chip and follows the same manufacturing sequence to deposit the metal pattern on a base with a metal bump array. After the two independent packages are processed, the RF module and antenna are vertically stacked and connected using thermal pressing bonds; 8. The ball grid array connection is implanted on the package base.

[0044] Compared to flip-chip architectures, the present invention's packaging process has lower losses and greater economic efficiency. Compared to multi-layer substrate packaging architectures, the present invention's packaging costs are significantly lower. Furthermore, compared to traditional FOWLP packaging architectures, the present invention directly places the core layer components with molded-in through-holes in step 2, eliminating the need for additional chemical plating of a uniform conformal seed layer, thus avoiding the increased complexity and cost associated with this additional process step.

[0045] Figure 5 It is a core layer component with molded through holes, where the molded through holes form a horseshoe-shaped array. Its function is to suppress the leakage of electromagnetic fields in non-propagation directions without affecting the transmission of radio frequency signals by air-filled grounded coplanar waveguides.

[0046] In the above description, many specific details are set forth in order to fully understand the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person skilled in the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure, characterized in that: It includes an antenna module, a radio frequency module, and a printed circuit board module arranged from top to bottom; a metal bump array is arranged between the antenna module and the radio frequency module, and a ball grid array is arranged between the radio frequency module and the printed circuit board module; The printed circuit module is composed of a bottom dielectric substrate and metal layers on its upper and lower surfaces; wherein the upper metal layer is provided with a plurality of control signal output ports and power output ports, each of which is electrically interconnected with the radio frequency module via a ball grid array; The RF module adopts a fan-out wafer-level packaging architecture, including an RF chip, a core layer component with molded through holes located on both sides of the RF chip, an epoxy molding layer that wraps and encapsulates the RF chip and the core layer component, a polyimide film layer located on the upper and lower surfaces of the epoxy molding layer, an RF signal transmission line located in the upper polyimide film layer, and an RF signal transmission line, a control signal line, and a power supply line located in the lower polyimide film layer; wherein the RF output port of the RF chip is connected to the metal bump array via the RF signal transmission line and the molded through hole, and the control signal input port and the power input port are connected to the ball grid array via the control signal line and the power supply line, respectively; The antenna module includes an antenna dielectric substrate and Ajinomoto deposited film layers on its upper and lower surfaces, a polyimide film layer located on the surface of the Ajinomoto deposited film layer, a metal radiation layer located in the upper polyimide film layer, and a metal antenna ground layer located in the lower polyimide film layer; wherein the metal radiation layer is provided with a feeding point, and the metal antenna ground layer is provided with a soldering pad, and the feeding point is connected to the soldering pad and the metal bump array below in sequence through a molded through hole to achieve electrical interconnection with the radio frequency module.

2. The low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure according to claim 1, characterized in that: The RF signal transmission line uses an air-filled grounded coplanar waveguide as the transmission line to reduce the RF signal transmission loss.

3. The low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure according to claim 2, characterized in that: The air-filled grounded coplanar waveguide satisfies: h0≥2ha, where h0 is the thickness of the epoxy molding layer and ha is the thickness of the air-filled grounded coplanar waveguide.

4. The low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure according to claim 3, characterized in that: A metal matching line segment is also provided at the soldering pad of the metal antenna ground layer to achieve impedance matching between the metal radiation layer and the air-filled grounded coplanar waveguide.

5. The low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure according to claim 4, characterized in that: During the packaging process of the fan-out wafer-level antenna packaging structure, the RF chip and the core layer component with molded through-holes are placed on a carrier with a heat release tape and used as a new wafer; the wafer is then wrapped and packaged with EMC material to form an epoxy plastic sealing layer.

6. The low-cost and high-efficiency three-dimensional integrated phased array antenna fan-out wafer-level packaging structure according to claim 5, characterized in that: The antenna module comprises a phased array antenna array composed of a number of antenna units arranged in a regular periodic pattern.

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