Battery management integrated circuit, system, battery pack, functional integrated circuit and method

Abstract

The invention discloses a battery management integrated circuit, a system, a battery pack, a function integrated circuit and a method, and the battery management integrated circuit is used for connecting at least one battery unit in parallel or connecting a plurality of battery units in series in parallel for power management and comprises at least one loop switch. The loop switch is configured in a charging loop or a discharging loop of the battery units; the at least one voltage detection circuit is used for measuring an open-circuit terminal voltage of each battery unit when the loop switch cuts off the charging loop or the discharging loop; and the management unit is used for defining the state of charge (SOC) of each battery unit according to the open-circuit terminal voltage of each battery unit. According to the battery management integrated circuit, the battery management system, the battery pack and the related method provided by the invention, the safety doubt of a large battery is reduced to be very low, and the cycle life and the use efficiency of the large battery are improved to a higher level.

Description

Technical Field

[0001] The present invention relates to a battery configuration and a management system and method thereof, and more particularly to a power battery suitable for high-power equipment and a management system and method thereof. Background Art

[0002] Figure 1 The open circuit rechargeable battery unit C (battery cell) is shown, and its terminal voltages are Vbat+ and Vbat- respectively. Figure 2 The equivalent circuit of a battery cell C is shown, including a battery pack Rbat and an open-circuit voltage Vopen connected in series with the battery pack Rbat. The open-circuit voltage Vopen represents the equivalent voltage of the battery cell C in an open-circuit state. The battery cell C can be a ternary lithium battery (Rbat = 110mΩ / Ah, Vopen = 4.20V / 3.65V / 3.00V) or a lithium iron phosphate battery (Rbat = 22mΩ / Ah, Vopen = 3.70V / 3.00V / 2.50V).

[0003] Figure 3 The configuration of an existing battery pack P is shown, which includes a battery cell C, a protection integrated circuit PIC, a power switch S, and one or more passive components, wherein the battery cell is a charge-discharge battery, and the power switch S can be a transistor switch (such as a MOSFET). The battery pack P has terminal voltages VP+ and VP-, wherein the voltage VP+ is connected to one terminal of the protection integrated circuit PIC and one end of the battery cell C, and the voltage VP- is connected to the other terminal of the protection integrated circuit PIC and the other end of the battery cell C. The power switch S is connected between the battery cell C and the voltage VP-, and can be controlled by the protection integrated circuit PIC to operate in conduction (ON) and cutoff (OFF) to determine whether the battery cell C is connected to the voltage VP-. Preferably, the power switch S is configured to withstand a voltage in the range of 20V to 40V when cut off, and has a conduction resistance of the mΩ level when turned on. This application uses Ron to represent the on-resistance of the switching element.

[0004] The protection integrated circuit PIC is connected to the battery cell C via a connection means 10, allowing a temperature sensing terminal of the protection integrated circuit PIC to contact or approach the surface of the battery cell C to measure the temperature of the battery cell C. Therefore, the protection integrated circuit PIC primarily serves multiple purposes, including: protecting the battery cell C from overcharging or overdischarging; protecting against excessive charging or discharging currents; and protecting against excessive circuit temperatures (caused by battery temperature). Aside from the aforementioned protection purposes, the protection integrated circuit PIC does not control the power switch S to turn OFF.

[0005] Conventional Gauge ICs (GICs) perform both measurement and calculation functions, such as measuring the terminal voltage Vbat of a battery cell C, the battery charge or discharge current Ibat, and measuring the battery temperature Tbat via external components (such as a thermistor). Because GICs are combined with external components after production to achieve specific functions, mass-produced GICs cannot be individually calibrated to accommodate these external components. Therefore, directly combining GICs with external components can lead to inaccurate measurement results, which in turn affects the assessment of the battery's state-of-charge (SOC). SOC can be determined using known methods, such as the coulomb method, the voltage method, the charge method, and the current method. According to the charge calculation formula (CV = IT = Q), SOC estimation primarily relies on five variables: capacitance, open-circuit voltage, current, time, and charge. In practice, existing technologies first estimate SOC based on long-term charge and discharge ratios, then use this estimated SOC to interpret the battery's capacity and battery health.

[0006] Figure 4 Hint Figure 3 The battery pack P shown is connected to a load system SYS. A measurement integrated circuit GIC is provided in the load system SYS. A thermistor TH is attached to the battery pack P, and the measurement integrated circuit GIC measures the temperature of the battery pack P through the thermistor TH. In the load system SYS, a detection resistor Rsense (10mΩ) is arranged in the charge and discharge path of the battery pack P for the measurement integrated circuit GIC to measure the charge and discharge current. The thermistor TH and the detection resistor Rsense are both external components of the measurement integrated circuit GIC. The measurement integrated circuit GIC was not calibrated for the thermistor TH and the detection resistor Rsense during manufacturing. Therefore, the measurement integrated circuit GIC can only assume that these matching external components are accurate. In the load system SYS, the existing measurement integrated circuit GIC cannot measure the terminal voltage Vbat of the battery cells in the battery pack P. Using the temperature of the battery pack P to calibrate the battery terminal voltage can only be used to estimate the SOC of the charging and discharging battery cells.

[0007] Figure 4 The measurement integrated circuit GIC shown mainly has some functions, such as measuring the terminal voltages VP+ and VP- of the battery pack P, measuring the charging and discharging currents Ibat of the battery pack P, and measuring the temperature of the battery pack P, so as to evaluate parameters such as SOC. It can also calibrate the measurement integrated circuit GIC for the values of the charging and discharging currents Ibat and the terminal voltages VP+ and VP- of the battery pack P. Summary of the Invention

[0008] One of the purposes of the present invention is to provide a complete solution for battery management, including a battery management integrated circuit, a battery management system, a battery pack, a functional integrated circuit and a method for calculating the internal resistance of a battery.

[0009] The battery management system of the present invention is configured to manage the discharge of at least one or more battery cells to or from a terminal device, and is configured to manage power by at least one battery cell connected in parallel or by connecting multiple battery cells in series in parallel. The battery management integrated circuit measures the at least one battery cell or multiple battery cells in series to calculate the power level of each battery cell, monitor the safety of each battery cell, and assess the health of each battery cell. It collects battery management information for all battery cells and provides at least partial battery management information to an authorized terminal device for reading, displays it to a user via the terminal device, or provides the complete battery management information to an authorized dedicated battery management device for reading to screen battery cells that require updating and maintenance. In various embodiments of the present invention, the terminal device is an electric vehicle, an electric scooter, a smartphone, a laptop, a portable electronic device, or other electronic device.

[0010] The battery management integrated circuit of the present invention includes a circuit switch having a sense resistor Rsense. Rsense is used herein to represent the circuit switch. The battery management integrated circuit of the present invention can also be electrically connected to one or more circuit switches belonging to an external component. The battery management integrated circuit of the present invention can control the circuit switch Rsense or an external circuit switch to temporarily open the charging circuit or discharging circuit of the battery cell to measure the open circuit voltage (or open circuit voltage) Vopen of each battery cell and then calculate the state of charge (SOC) of each battery cell based on the circuit switch.

[0011] The battery management integrated circuit of the present invention includes a pair of detection pins, which are connected in parallel to a temperature sensor for measuring the battery temperature. Preferably, the temperature sensor is a diode, which can be used in conjunction with a temperature difference measurement circuit in the battery management integrated circuit, so that the battery management integrated circuit does not need to additionally calibrate the external temperature-sensing diode. The battery management integrated circuit of the present invention includes a plurality of electrode pins, which are used to measure the terminal voltage Vbat of each battery cell, as well as a balancing resistor Rbalance and a switch Ron connected in series. The electrode pins are connected in parallel to the at least one battery cell or a plurality of battery cells in series, so that the battery management integrated circuit can synchronously measure the terminal voltage Vbat, the battery temperature Tbat, and the charging current or discharging current Ibat of the battery cell, and calculate an open circuit terminal voltage (or open circuit voltage) Vopen and a battery internal resistance Rbat in each battery cell that are associated with the battery temperature Tbat. The battery management system of the present invention collects battery management information associated with the battery temperature Tbat in each battery cell.

[0012] One objective of the present invention is to provide a battery management system and method for assessing battery health based on battery internal resistance Rbat. The method comprises using at least one battery management integrated circuit to measure the battery internal resistance Rbat and the battery internal resistance difference ΔRbat of each battery cell in real time. The quality of the battery cell is determined by comparing the measured battery internal resistance Rbat with the rated battery internal resistance Rbat of the battery cell. Furthermore, changes in the measured battery internal resistance difference ΔRbat are monitored to determine the lifespan of the battery cell. The measured battery internal resistance Rbat and the measured battery internal resistance difference ΔRbat are then provided to an authorized terminal device or an authorized dedicated battery management device, where the health of the battery cell is presented via a user interface.

[0013] In one embodiment, at least one battery cell managed by the battery management system of the present invention can measure the open circuit voltage (or open circuit voltage) Vopen, battery internal resistance Rbat, battery internal resistance variability ΔRbat, terminal voltage Vbat, battery temperature Tbat, and charge or discharge current Ibat of the battery cell via a battery management integrated circuit, thereby defining battery management information such as the state of charge (SOC), battery life (SOH), remaining service life, temperature safety, battery quality, and battery health of the battery cell. The battery management system of the present invention can provide real-time measurement battery management data to an authorized terminal device or an authorized dedicated battery management device, presenting at least a portion of the battery management information of the battery cell through a user interface.

[0014] In one embodiment, the battery management system of the present invention manages at least one battery pack, which includes multiple battery cells and is charged or discharged in one of a series, parallel, series-parallel, and parallel-serial configuration. At least one battery management integrated circuit measures the open circuit voltage (or open circuit voltage) Vopen, battery internal resistance Rbat, battery internal resistance variability ΔRbat, terminal voltage Vbat, battery temperature Tbat, and charge or discharge current Ibat of each battery cell in the battery pack, thereby defining battery management information such as the state of charge (SOC), battery life (SOH), remaining service life, temperature safety, battery quality, and battery health of the battery pack. The battery management system of the present invention can provide real-time measurement battery management data to an authorized terminal device or an authorized dedicated battery management device, presenting at least a portion of the battery management information of the battery pack through a user interface.

[0015] In one embodiment, the battery management system of the present invention further includes a data processing system that establishes communication with the communication module of the battery management integrated circuit to receive the open circuit voltage (or open circuit voltage) Vopen, the battery internal resistance Rbat, the battery internal resistance variability ΔRbat, the terminal voltage Vbat, the battery temperature Tbat, and the charge current or discharge current Ibat of each battery cell. The data processing system obtains the state of charge (SOC) based on the open circuit voltage (or open circuit voltage) Vopen, obtains temperature safety information based on the battery temperature Tbat, obtains battery quality based on the battery internal resistance Rbat, obtains cycle life based on the battery internal resistance variability ΔRbat, obtains health based on the battery internal resistance Rbat and ΔRbat, and monitors the overcharge voltage and overdischarge voltage variability based on the terminal voltage Vbat to obtain battery performance.

[0016] One of the objects of the present invention is to provide a battery pack, which includes a first battery group and a second battery group connected in parallel, and at least one battery management integrated circuit, wherein the first and second battery groups are respectively composed of a battery cell or a plurality of battery cells connected in series, wherein the battery management integrated circuit is configured to connect the first and second battery groups in parallel, and can respectively control the temporary opening of the charging path or the discharging path of the first or second battery group to respectively measure the open circuit voltage (or open circuit voltage) Vopen and the battery internal resistance Rbat of each battery cell of the first or second battery group, thereby defining the battery management information of the battery pack.

[0017] One objective of the present invention is to provide a battery management system and method configured to manage the discharge of at least one or more battery packs to or from a terminal device, wherein each battery pack includes at least one plurality of battery cells connected in series and at least one battery management integrated circuit (BMI). The BMI measures the open circuit voltage (Vopen) and the internal resistance (Rbat) of each battery cell in each battery pack, thereby defining battery management information for the battery pack. The BMI collects the battery management information for each battery pack and selects each battery pack or each battery cell for replacement or maintenance based on a pre-prepared evaluation criteria, and indicates the location of each battery pack or each battery cell on a display interface of a battery structure configuration diagram.

[0018] One objective of the present invention is to provide a battery management system and method that utilizes a battery management integrated circuit (BMI) to perform cell balancing to maintain consistent battery quality. The BMI performs cell balancing, including cell balancing between battery cells or between battery packs. Cell balancing is based on capacitive energy storage. The energy storage path or energy release path is implemented by electrical connections between adjacent BMIs. The capacitor can be located within the BMI or on the electrical connections of adjacent BMIs.

[0019] According to the present invention, the battery management integrated circuit implements a battery balancing function. By obtaining the battery management information of the battery cells, the cycle life, health and performance of each battery cell can be immediately improved. Its effects include: improving the cycle life of each battery cell and improving the performance of each battery cell; consumers can avoid expensive battery pack replacements one at a time, and can measure battery management data in real time to maintain and protect each battery cell at all times; terminal device manufacturers can quickly and safely assemble a high-power battery and test the battery internal resistance Rbat of each battery cell to understand the battery quality; the battery can be extended from 10W (3hr·3.65V) to various products of tens of kilowatts, hundreds of kilowatts, and thousands of kilowatts, which reduces the safety concerns of large batteries to a very low level and brings the cycle life and performance of large batteries to a higher level. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The present invention may be further understood with reference to the following figures and descriptions. Non-limiting and non-exhaustive examples are described with reference to the following figures. The components in the figures are not necessarily to actual size; the emphasis is on illustrating the structure and principles.

[0021] Figure 1 A circuit diagram of a battery unit (battery cell).

[0022] Figure 2 for Figure 1 Equivalent circuit diagram of the battery unit (battery cell) shown.

[0023] Figure 3 FIG. 1 is a configuration diagram of a conventional battery pack, which includes a protection integrated circuit (PIC) and a battery cell.

[0024] Figure 4 for Figure 3 A diagram showing the configuration of a battery pack connected to a system end, wherein the system end includes a gauge integrated circuit (GIC).

[0025] Figure 5 FIG1 is a configuration diagram of a customized battery pack according to the present invention. The conventional battery pack includes a protection integrated circuit (PIC), a battery cell, and a gauge integrated circuit (GIC).

[0026] Figure 6 This is a configuration diagram of the battery pack of the present invention.

[0027] Figure 7 FIG. 1 is a block diagram of the battery management integrated circuit of the present invention.

[0028] Figure 8 FIG. 1 is a block diagram of a battery pack according to the present invention, wherein a battery management integrated circuit (GIC) includes a loop switch.

[0029] Figure 9 FIG. 4 is a block diagram of another embodiment of a battery pack according to the present invention, wherein an Rsense switch is disposed outside a battery management integrated circuit (GIC), and the Rsense switch is controlled by the GIC.

[0030] Figure 10 is a configuration diagram of the battery pack of the present invention, wherein when the Ron switch is turned on and the Rsense switch is turned off, the battery management integrated circuit can measure the terminal voltage Vbat of the battery cell and the terminal voltage Von of the Ron switch.

[0031] Figure 11 is a configuration diagram of the battery pack of the present invention, wherein when the Ron switch is cut off and the Rsense switch is turned on, the battery management integrated circuit can measure the terminal voltage Vbat of the battery cell and the terminal voltage Vsense of the Rsense switch.

[0032] Figure 12 FIG. 1 is a configuration diagram of a battery pack having battery cells connected in series according to the present invention.

[0033] Figure 13 FIG. 1 is a configuration diagram of a battery pack having parallel-connected battery cells according to the present invention.

[0034] Figure 14 FIG2 is a configuration diagram of another battery pack having parallel-connected battery cells according to the present invention.

[0035] Figure 15FIG. 1 is a configuration diagram of a battery pack having parallel battery groups according to the present invention.

[0036] Figure 16 FIG. 4 is a configuration diagram of another battery pack having parallel battery groups according to the present invention.

[0037] Figure 17 for Figure 12 The battery pack shown is configured in a multi-series and multi-parallel structure.

[0038] Figure 18 for Figure 12 The battery pack shown is configured in a multi-parallel structure.

[0039] Figure 19 for Figure 15 The battery pack shown is configured in a multi-series and multi-parallel structure.

[0040] Figure 20 FIG. 1 is a configuration diagram of a battery pack with a charger and discharger according to the present invention.

[0041] Figure 21 FIG2 is a configuration diagram of another battery pack with a charger and discharger according to the present invention.

[0042] Figure 22 This is a configuration diagram of another battery pack of the present invention.

[0043] Figure 23 Component diagrams of multiple specific embodiments of the loop switch Rsense according to the present invention.

[0044] Figure 24 FIG. 4 is another configuration diagram of the battery pack of the present invention, wherein the Rsense switch is electrically connected to the VP+ terminal of the battery pack.

[0045] Figure 25 for Figure 24 Schematic diagram showing the battery pack of the present invention used to measure the terminal voltage Vbat of the battery cell and the terminal voltage Von of the Ron switch.

[0046] Figure 26 for Figure 24 The schematic diagram shown is a battery pack of the present invention used to measure the terminal voltage Vbat of a battery cell and the terminal voltage Vsense of an Rsense switch twice.

[0047] Figure 27 (A), (B), and (C) are various structural diagrams of battery cells.

[0048] Figure 28 (A), (B), and (C) are Figure 27 (A), (B), and (C) are equivalent circuit diagrams of the battery cells shown.

[0049] Figure 29A circuit diagram illustrating multiple battery packs connected in series, wherein each battery pack is connected in parallel with a functional integrated circuit (FIC), and synchronization control pins are provided between the functional integrated circuits.

[0050] Figure 30 (A), (B), (C), and (D) show the structural diagram of the power battery and its equivalent circuit diagram.

[0051] Figure 31 (A), (B), (C), and (D) illustrate various balanced circuit diagrams.

[0052] Figure 32 FIG2 is a parallel structure diagram of a battery pack of the present invention, wherein the battery management integrated circuit (GIC) further includes a series balancing circuit and a parallel balancing circuit for voltage balancing function.

[0053] Figure 33 FIG. 1 is a schematic diagram illustrating high-power string balancing management implemented in a battery management system according to an embodiment of the present invention.

[0054] Figure 34 FIG. 1 is a schematic diagram illustrating high-power string balancing management implemented in another embodiment of a battery management system according to the present invention.

[0055] Figure 35 (A) and (B) Figure 33 The battery management system's charge balancing circuit diagram is shown.

[0056] Figure 36 (A) and (B) Figure 34 The battery management system's charge balancing circuit diagram is shown.

[0057] Figure 37 (A) and (B) are power balancing circuit diagrams for implementing high-power string balancing management in another embodiment of the battery management system of the present invention.

[0058] Figure 38 (A) and (B) are power balancing circuit diagrams for implementing high-power string balancing management in another embodiment of the battery management system of the present invention.

[0059] Figure 39 (A), (B) and Figure 40 (A) and (B) illustrate a power balancing circuit diagram of a high-power string balancing management of the battery management system of the present invention.

[0060] Figure 41 (A), (B) and Figure 42 (A) and (B) illustrate another type of power balancing circuit diagram for high-power string balancing management of the battery management system of the present invention.

[0061] Description of reference numerals:

[0062] C, C1, C2 battery cells

[0063] P, P1, P2, P3 battery pack

[0064] Ibat battery current

[0065] Rbat internal resistance

[0066] Vbat terminal voltage

[0067] Vopen open circuit voltage

[0068] PIC protection integrated circuit

[0069] S, S1, S2, S3, S4, S5 switches

[0070] ADC analog-to-digital converter

[0071] Ron on-resistance, on-switch

[0072] Rsense detection resistor, loop switch

[0073] Rbalance Balance resistance

[0074] TH thermistor

[0075] GIC Battery Management Integrated Circuit

[0076] Von is the terminal voltage when the switch is turned on.

[0077] Vsense loop switch conduction terminal voltage

[0078] VP battery pack terminal voltage

[0079] Vsys system power supply terminal

[0080] CHG charge and discharge circuit

[0081] SNW Switching Network

[0082] G1, G2 battery pack

[0083] FIC Functional Integrated Circuit

[0084] FOSC control signal

[0085] Cbalance, C12, C23 balance capacitor

[0086] Cd-u bottom to top contact

[0087] Cu-d top to bottom contact DETAILED DESCRIPTION

[0088] The present invention is described more fully below with reference to the accompanying drawings, with specific exemplary embodiments shown by way of illustration. However, the claimed subject matter may be embodied in many different forms, and thus the construction of the claimed subject matter as covered or claimed is not limited to any exemplary embodiment disclosed herein; the exemplary embodiments are provided for illustrative purposes only. Likewise, the present invention is intended to provide a reasonably broad scope for the claimed or claimed subject matter as claimed or claimed. Furthermore, the drawings and illustrations herein are generally not drawn to scale and are not intended to correspond to actual relative dimensions.

[0089] For consistency and ease of understanding, the exemplary figures are labeled with reference numerals to identify the same features (although in some cases, they are not so labeled). However, features in different embodiments may differ in other aspects and should not be limited to the features shown in the figures. The terms "first" and "second" in the description of the present invention and the figures are used to distinguish different objects, not to describe a specific order.

[0090] In one embodiment of the present invention, the battery management system and method are configured to manage a high-power battery, or power battery, comprised of thousands or more than 10,000 battery cells connected in series and parallel. This power battery is provided for use in an electric vehicle. The system and method utilize multiple battery management integrated circuits (BMIs) to provide a complete solution based on low-energy, low-internal-resistance intelligent integrated circuits. Each BMI manages multiple battery cells connected in series and performs the following tasks:

[0091] (1) Measure the temperature of each battery cell (to monitor battery safety), the terminal voltage of the battery cell, the open circuit voltage of the battery cell (to evaluate battery capacity), and the battery current value (to evaluate the remaining battery life).

[0092] (2) Calculate the open circuit voltage Vopen and / or battery internal resistance Rbat of each battery cell to define the capacity, quality, cycle life, and health of the battery cell.

[0093] (3) Monitor each battery cell for overcharge, short circuit, and overtemperature protection.

[0094] (4) Implement a balancing circuit to make the difference between the highest cell voltage and the lowest cell voltage less than a critical value (e.g., 10 mV), and monitor the battery internal resistance Rbat to extend the cycle life of all battery cells and improve battery performance.

[0095] (5) Provide a communication module to transmit the battery management data of each battery unit to a data processing system.

[0096] (6) Provides fast and safe assembly of a high-power battery and can test the internal resistance Rbat of each battery cell to understand the battery quality.

[0097] Figure 5 The configuration of the customized battery pack P of the present invention is shown, which includes a battery cell (rechargable battery unit, C), a protection integrated circuit PIC, a power switch S, a measurement integrated circuit GIC, a detection resistor Rsense, a thermistor TH, and one or more other passive components. The measurement integrated circuit GIC is arranged in the battery pack P, and measures the temperature of the battery pack P through the thermistor TH attached to the battery cell C. In one embodiment, the detection resistor Rsense is 10mΩ, and the power switch S is implemented by one or more transistors. When the power switch S is turned off, it can withstand a voltage range of 20V to 40V. When the power switch S is turned on, its on-resistance Ron is in the micro-ohm level.

[0098] In an embodiment of the present invention, the open circuit voltage Vopen of the battery cell C is used to determine the capacity (%) of the battery. The charging or discharging current Ibat of the battery cell C is used to evaluate the current consumption and remaining usage time of the terminal device. The internal resistance Rbat of the battery is used to determine the quality of the battery cell C. The open circuit voltage Vopen, the internal resistance Rbat of the battery and the identification information of the battery cell C are used to generate the usage history of the battery cell, including life, manufacturing information, number of charges, etc., which are stored in the non-volatile memory NVM. In one embodiment, the open circuit voltage Vopen is used to define the precise capacity SOC, and the open circuit voltage Vopen and SOC can further define the internal resistance Rbat of the battery. In another embodiment, according to the formula Q / I=T, the power (i.e., SOC) divided by the discharge current Ibat can evaluate how long the battery cell can be used under the same conditions.

[0099] In one embodiment, a battery management system is configured to manage the discharge of a plurality of battery cells to a terminal device or the charging of the terminal device from the terminal device. The battery management system includes a plurality of battery cells and at least one battery management integrated circuit. The plurality of battery cells are charged or discharged in one of a series connection, a parallel connection, a series-parallel connection, and a parallel-series connection. The at least one battery management integrated circuit connects at least one battery cell in parallel, or connects a plurality of series-connected battery cells in parallel to perform real-time power management. The battery management integrated circuit includes a circuit switch Rsense, which is used to temporarily open the charging circuit or the discharging circuit of the at least one battery cell or the plurality of series-connected battery cells, so that the battery management integrated circuit can measure the open-circuit voltage Vopen of each battery cell in real time and define the state of charge (SOC) of each battery cell accordingly.

[0100] In one embodiment, a battery management method is used to manage the discharge of multiple battery cells to or the charging of multiple battery cells from a terminal device. The battery management method includes configuring multiple battery cells in one of a series connection, a parallel connection, a series-parallel connection, and a parallel-serial connection for charging or discharging, connecting at least one battery cell in parallel with at least one battery management integrated circuit, or connecting multiple series-connected battery cells in parallel with at least one battery management integrated circuit for power management. The battery management integrated circuit includes a circuit switch Rsense, which is configured in the charging circuit or the discharging circuit of the at least one battery cell or the multiple series-connected battery cells. When the switch briefly opens the charging circuit or the discharging circuit, the battery management integrated circuit instantly measures the open-circuit voltage Vopen of each battery cell and defines the state of charge (SOC) of each battery cell accordingly.

[0101] In one embodiment, a battery management integrated circuit (BMI) connects at least one battery cell in parallel, or multiple battery cells connected in series, to manage power. The BMI includes a circuit switch Rsense, at least one voltage detection circuit, and a management unit. The circuit switch Rsense is configured in the charging or discharging circuit of the at least one battery cell or multiple battery cells connected in series. The at least one voltage detection circuit measures the open-circuit voltage of each battery cell in real time when the switch briefly opens the charging or discharging circuit. The management unit determines the state of charge (SOC) of each battery cell based on the open-circuit voltage Vopen of each battery cell.

[0102] In one embodiment, a battery management system is configured to manage the discharge of multiple battery cells to or the charging of multiple battery cells from a terminal device. The battery management system includes multiple battery cells and at least one battery management integrated circuit. The multiple battery cells are charged or discharged in one of a series connection, a parallel connection, a series-parallel connection, and a parallel-serial connection. At least one battery management integrated circuit is connected in parallel to at least one battery cell, or multiple series connection battery cells in parallel to perform power management. The battery management integrated circuit synchronously measures the terminal voltage Vbat, the battery temperature Tbat, and the charging current or discharging current Ibat of each battery cell, and calculates the open circuit terminal voltage Vopen and the battery internal resistance Rbat of each battery cell associated with the battery temperature Tbat, so that the battery management integrated circuit can represent the power management of each battery cell associated with the battery temperature Tbat, including the state of charge SOC, the remaining battery life SOH, and the remaining usage time.

[0103] In one embodiment, a battery management method is used to manage the discharge of multiple battery cells to or the charging of multiple battery cells from a terminal device. The battery management method includes configuring the multiple battery cells in one of a series connection, a parallel connection, a series-parallel connection, and a parallel-serial connection for charging or discharging, connecting at least one battery cell in parallel with at least one battery management integrated circuit, or connecting multiple series-connected battery cells in parallel with at least one battery management integrated circuit for power management, and the battery management integrated circuit synchronously measuring the terminal voltage Vbat, the battery temperature Tbat, and the charge current or discharge current Ibat of each battery cell, and calculating the open-circuit terminal voltage Vopen and the battery internal resistance Rbat of each battery cell associated with the battery temperature Tbat, so that the battery management integrated circuit can indicate the power management of each battery cell associated with the battery temperature Tbat, including the state of charge (SOC), the remaining battery life (SOH), and the remaining service life.

[0104] In one embodiment, a battery management integrated circuit is connected in parallel to at least one battery cell, or multiple battery cells connected in series in parallel to perform power management. The battery management integrated circuit includes at least one voltage detection circuit, at least one temperature detection circuit, at least one current detection circuit, and a calculation unit. The at least one voltage detection circuit measures the terminal voltage Vbat of the battery cell connected in parallel to the battery management integrated circuit. The at least one temperature detection circuit measures the battery temperature Tbat of the battery cell connected in parallel to the battery management integrated circuit. The at least one current detection circuit measures the charging current or discharging current Ibat of the battery cell connected in parallel to the battery management integrated circuit. The calculation unit calculates the open circuit terminal voltage Vopen and the battery internal resistance Rbat of the battery cell associated with the battery temperature Tbat based on the terminal voltage Vbat, the battery temperature Tbat, and the charging current or discharging current Ibat of each battery cell. Among them, the battery management integrated circuit synchronously measures the terminal voltage Vbat, the battery temperature Tbat and the charging current or discharging current Ibat, and the battery management integrated circuit represents the power management of each battery cell associated with the battery temperature Tbat based on the calculated open-circuit terminal voltage Vopen and the battery internal resistance Rbat, including the state of charge SOC, the remaining battery life SOH, and the remaining usage time.

[0105] The following further describes various embodiments of the present invention with reference to the drawings. Figure 6 Another configuration of the battery pack of the present invention is shown, wherein ADC1, ADC2, and ADC4 are used to measure the battery temperature, the battery terminal voltage, and the terminal voltage of the loop switch Rsense. Figure 7 A block diagram of the battery management integrated circuit of the present invention is shown.

[0106] The present invention proposes a combination of a conduction switch Ron, a loop switch Rsense and a balancing resistor Rbalance. By turning the conduction switch Ron and the loop switch Rsense on and off, the open-circuit voltage Vopen and the internal resistance Rbat of the battery can be measured. The balancing resistor Rbalance provides Ibat measurement and limits Ibat within a certain range, and balances the open-circuit voltage Vopen when the conduction switch Ron is turned on. The conduction switch Ron and the loop switch Rsense can be calibrated before packaging to accurately measure the current of the battery. The conduction switch Ron and the loop switch Rsense can be transistor switches, such as MOSFETs. The turned-on conduction switch Ron and the loop switch Rsense are used to measure Vopen. The turned-off conduction switch Ron and the turned-on loop switch Rsense are used to calculate Vopen and Rbat, and to balance Vopen.

[0107] The battery management integrated circuit (GIC) of the present invention is connected in parallel to at least one battery cell C, or in parallel to multiple battery cells C connected in series. The battery management integrated circuit (GIC) includes at least one positive electrode pin and at least one negative electrode pin, at least one pair of detection pins, a balancing resistor Rbalance and a conduction switch Ron connected in series, and a circuit switch Rsense. The at least one positive electrode pin and the at least one negative electrode pin are respectively used to electrically connect the positive and negative electrodes of the corresponding battery cell C. The at least one pair of detection pins is used to connect in parallel to a temperature sensor TH of the corresponding battery cell, which can be implemented by a diode. The series balancing resistor Rbalance and the conduction switch Ron are used to connect in parallel to the at least one battery cell C or multiple battery cells C connected in series. The circuit switch Rsense is configured in the charging circuit or the discharging circuit of the at least one battery cell C or multiple battery cells C connected in series.

[0108] The battery management integrated circuit (GIC) further includes an MCU and at least one voltage detection circuit. The at least one voltage detection circuit measures the terminal voltage Vbat of the battery cell C connected in parallel with the battery management integrated circuit (GIC). When the MCU controls the circuit switch Rsense to briefly open the charging circuit or the discharging circuit and controls the conduction switch Ron to disconnect, the at least one voltage detection circuit instantly measures the open-circuit voltage Vopen of the corresponding battery cell C. The MCU receives the measurement result of the open-circuit voltage Vopen via ADC2 (analog-to-digital converter) and defines the state of charge (SOC) of the corresponding battery cell C based on the open-circuit voltage Vopen. The MCU can be implemented as a calculation unit and a management unit.

[0109] In addition to including at least one voltage detection circuit, the battery management integrated circuit GIC further includes: at least one battery temperature detection circuit, an Ron current detection circuit, an Rsense current detection circuit, and a GIC temperature detection circuit. The at least one battery temperature detection circuit measures the temperature sensor TH of the battery cell C connected in parallel with the battery management integrated circuit GIC to measure the battery temperature Tbat. The Ron current detection circuit measures the current flowing through the conduction switch Ron. The Rsense current detection circuit measures the charging current or discharging current flowing through the loop switch Rsense. The GIC temperature detection circuit measures the chip temperature of the battery management integrated circuit GIC. The MCU receives measurement results such as the battery temperature, the current flowing through the conduction switch Ron, the current flowing through the loop switch Rsense, and the chip temperature of the battery management integrated circuit GIC via ADC1, ADC3, ADC4, and ADC5, respectively. In an embodiment of the present invention, the battery management integrated circuit (GIC) synchronously measures the terminal voltage Vbat, the battery temperature Tbat, and the charge or discharge current Ibat. The MCU calculates the open-circuit terminal voltage Vopen and the battery internal resistance Rbat of each battery cell C associated with the battery temperature Tbat based on the terminal voltage Vbat, the battery temperature Tbat, and the charge or discharge current Ibat. This information is used to represent the power management of each battery cell C associated with the battery temperature Tbat, including the state of charge (SOC), the remaining battery life (SOH), and the remaining operating time. Furthermore, the battery management integrated circuit (GIC) further includes a communication module for transmitting the power management information of each battery cell C to an external battery management system.

[0110] In another embodiment, the circuit switch Rsense of the battery management integrated circuit GIC can be externally configured in the charging circuit or the discharging circuit of the battery cell C. The battery management integrated circuit GIC is provided with a control pin to control the external circuit switch to temporarily disconnect the charging circuit or the discharging circuit, so that the battery management integrated circuit GIC can measure the open-circuit terminal voltage of each battery cell C.

[0111] Figure 8 A battery pack P according to another embodiment of the present invention is shown. Figure 5 The embodiment shown, Figure 8 The battery pack P of the present invention does not have a protection integrated circuit PIC. The battery management integrated circuit GIC only controls the circuit switch Rsense to open and measure the open-circuit voltage of each battery cell C when receiving an external signal. Because there is only one battery cell C in the battery pack P, the circuit switch Rsense cannot arbitrarily open or cut off the power supply circuit in order to avoid power outages. Figure 3The conventional protection integrated circuit PIC shown turns off the power switch S only when an over-temperature or over-charge condition occurs. The conventional protection integrated circuit PIC cannot measure the open-circuit voltage Vopen of the battery cell C.

[0112] Figure 8 The battery pack P of the present invention shown includes a positive electrode terminal VP+ and a negative electrode terminal VP-, a battery cell C, a battery management integrated circuit GIC, a balancing resistor Rbalance and a conduction switch Ron connected in series. The battery cell C has a positive electrode and a negative electrode. The battery management integrated circuit GIC includes a positive electrode pin and a negative electrode pin, the positive electrode pin is electrically connected to the positive electrode of the battery cell C and the positive electrode terminal VP+, and the negative electrode pin is electrically connected to the negative electrode of the battery cell C. The balancing resistor Rbalance is connected in series with the conduction switch Ron and is electrically connected between the positive electrode pin and the negative electrode pin. The loop switch Rsense is electrically connected between the negative electrode pin and the negative electrode terminal VP-. The block diagram of the battery management integrated circuit GIC and its operation are shown as follows. Figure 5 and descriptions of its paragraphs.

[0113] Figure 9 A battery pack P according to another embodiment of the present invention is shown. The battery management integrated circuit (GIC) includes a battery protection function. When the GIC detects overcharge, overdischarge, or elevated temperature in a battery cell C, it controls a loop switch (Rsense) via a control pin to open, thereby disconnecting the charging or discharging circuit for the battery cell C. Furthermore, the GIC only controls loop switch Rsense to open upon receiving an external signal, measuring the open-circuit voltage of each battery cell C and determining the state of charge (SOC) of that battery cell C.

[0114] Figure 10 The configuration diagram of the battery pack of the present invention is shown, wherein when the Ron switch is turned on and the Rsense switch is turned off, the battery management integrated circuit GIC can measure the terminal voltage Vbat of the battery cell and the terminal voltage Von of the Ron switch.

[0115] The present invention discloses a method for calculating the internal resistance Rbat of a battery, which is implemented in a battery management integrated circuit GIC, and the battery pack P of the present invention is electrically connected to a power source or a load. The battery management integrated circuit GIC includes a balancing resistor Rbalance, a conduction switch Ron, and a circuit switch Rsense connected in series. The resistor Rbalance is connected in series with the conduction switch Ron and in parallel with at least one battery cell C or multiple battery cells C in series. The circuit switch Rsense is configured in the charging circuit or the discharging circuit of the at least one battery cell C or multiple battery cells C in series. The method for calculating the internal resistance Rbat of the present invention includes: the battery management integrated circuit GIC controls the circuit switch Rsense to cut off the charging circuit or the discharging circuit of the battery cell C and controls the period during which the conduction switch Ron is opened to measure each open circuit voltage Vopen (Vbat=Vopen) of the at least one battery cell C or multiple battery cells C in series. The battery management integrated circuit (GIC) then controls the loop switch Rsense to disconnect the charging or discharging circuit of the battery cell C and controls the duration of the conduction switch Ron, causing the GIC to synchronously measure each battery terminal voltage Vbat and battery current Ibat of the at least one battery cell C or multiple battery cells C connected in series, where the battery current Ibat = Von / Ron, and Ron is the on-resistance of the conduction switch Ron. Based on the open-circuit voltage Vopen, battery terminal voltage Vbat, and battery current Ibat of each battery cell C, the GIC calculates the battery internal resistance Rbat of each battery cell C. The specific calculation formula is: Rbat = (Vbat - Vopen) / Ibat.

[0116] Figure 11 is a configuration diagram of the battery pack of the present invention, wherein when the Ron switch is cut off and the Rsense switch is turned on, the battery management integrated circuit can measure the terminal voltage Vbat of the battery cell and the terminal voltage Vsense of the Rsense switch.

[0117] The present invention discloses another method for calculating the internal resistance Rbat of a battery, which is implemented in a battery management integrated circuit (GIC), and the battery pack P of the present invention is electrically connected to a power source or a load. The battery management integrated circuit (GIC) includes a balancing resistor (Rbalance), a conduction switch (Ron), and a circuit switch (Rsense) connected in series. The resistor (Rbalance) and the Ron switch are used to be connected in parallel to at least one battery cell (C) or multiple battery cells (C) in series. The circuit switch (Rsense) is used to be configured in the charging circuit or the discharging circuit of the at least one battery cell (C) or multiple battery cells (C) in series. The method for calculating the internal resistance Rbat of the present invention includes: the battery management integrated circuit (GIC) controls the circuit switch (Rsense) to be conductive to form the charging circuit or the discharging circuit of the battery cell (C) and controls the conduction switch (Ron) to be disconnected, so that the battery management integrated circuit (GIC) synchronously measures twice each battery terminal voltage (Vbat) and battery current (Ibat) of the at least one battery cell (C) or multiple battery cells (C) in series, wherein the battery current (Ibat) = (Vsense / Rsense), and Rsense is the conduction resistance of the circuit switch (Rsense). The battery internal resistance Rbat of each battery cell C is calculated based on the two measured battery terminal voltages Vbat and battery currents Ibat of each battery cell C. The specific calculation formula is to combine the equation Vbat1 = Vopen - (Vsense1 / Rsense) · Rbat obtained from the first measurement with the equation Vbat2 = Vopen - (Vsense2 / Rsense) · Rbat obtained from the second measurement into simultaneous equations and solve them to obtain the open-circuit terminal voltage Vopen and the battery internal resistance Rbat.

[0118] Figure 12 A diagram showing the configuration of a battery pack having battery cells connected in series according to the present invention.

[0119] Figure 12 The battery pack P of the present invention shown includes a positive electrode terminal VP+ and a negative electrode terminal VP-, multiple battery cells C, and a battery management integrated circuit GIC. The multiple battery cells C are connected in series. The battery management integrated circuit GIC includes a positive electrode pin, a negative electrode pin and at least one intermediate pin, a balancing resistor Rbalance and a conductive switch Ron connected in series, and a loop switch Rsense. The positive electrode pin electrically connects the positive electrode of the battery cells C in series with the positive electrode terminal VP+, the intermediate pin electrically connects the positive electrode or negative electrode between two adjacent battery cells in series, and the negative electrode pin electrically connects the negative electrode of the battery cells C in series. The balancing resistor Rbalance is connected in series with the conductive switch Ron and is electrically connected between the positive electrode pin and the negative electrode pin. The loop switch Rsense is electrically connected between the negative electrode pin and the negative electrode terminal.

[0120] The block diagram of the battery management integrated circuit GIC and its operation are as follows Figure 5 The MCU controls the loop switch Rsense to cut off the charging or discharging current of the series-connected battery cells C, allowing the battery management integrated circuit GIC to measure the open-circuit voltage Vopen of each battery cell C and thereby define the state of charge (SOC) of each battery cell. Furthermore, during the period when the MCU controls the loop switch Rsense to cut off the charging or discharging current of the series-connected battery cells C, the battery management integrated circuit GIC synchronously measures the open-circuit voltage Vopen of each battery cell C and the battery temperature Tbat, thereby representing the power management of each battery cell C in relation to the battery temperature Tbat.

[0121] In another embodiment, the circuit switch Rsense of the battery management integrated circuit (GIC) can be externally configured in the charging or discharging circuit of the series-connected battery cells C. The battery management integrated circuit (GIC) is provided with a control pin to control the external circuit switch to temporarily disconnect the charging or discharging circuit, allowing the battery management integrated circuit (GIC) to measure the open-circuit voltage Vopen of each battery cell C. The control pin is electrically connected to the circuit switch Rsense to control the circuit switch Rsense to disconnect the charging or discharging current of the series-connected battery cells C, allowing the battery management integrated circuit (GIC) to measure the open-circuit voltage Vopen of each battery cell C and thereby determine the state of charge (SOC) of each battery cell C.

[0122] Figure 13 The present invention shows a battery pack P with parallel batteries. The battery management integrated circuit (GIC) of the present invention connects two battery cells C1 and C2 in parallel, controlling two circuit switches Rsense1 and Rsense2 to connect the two battery cells C1 and C2 in parallel and charge or discharge them between the positive electrode terminal VP+ and the negative electrode terminal VP-. When one of the circuit switches temporarily disconnects the charge or discharge circuit, the battery management integrated circuit (GIC) can measure the open-circuit voltage of one of the battery cells, while the other battery cell can continue to charge or discharge between the positive electrode terminal VP+ and the negative electrode terminal VP-. Because the battery pack P of the present invention includes battery cells C1 and C2 in parallel, the battery management integrated circuit (GIC) does not need to rely on external signals to control when the two circuit switches Rsense1 and Rsense2 disconnect the charge or discharge circuit. Instead, the battery management integrated circuit (GIC) autonomously controls one of the circuit switches to temporarily disconnect the charge or discharge circuit of one battery cell, while allowing the other battery cell to continue to charge or discharge.

[0123] Figure 13The battery pack P shown includes a positive electrode terminal VP+ and a negative electrode terminal VP-, a first battery cell C1, a second battery cell C2, and a battery management integrated circuit GIC. The first battery cell C1 has a first positive electrode and a first negative electrode. The second battery cell C2 has a second positive electrode and a second negative electrode. The battery management integrated circuit GIC includes a positive electrode pin, a first negative electrode pin, and a second negative electrode pin, a first balancing resistor Rbalance1 and a first conductive switch Ron1 connected in series, a second balancing resistor Rbalance2 and a second conductive switch Ron2 connected in series, a first return switch Rsense1, and a second return switch Rsense2. The positive electrode pin is electrically connected to the first positive electrode, the second positive electrode, and the positive electrode terminal VP+. The first negative electrode pin is electrically connected to the first negative electrode of the first battery cell C1, and the second negative electrode pin is electrically connected to the second negative electrode of the second battery cell C2. The first balancing resistor Rbalance1 and the first conductive switch Ron1 are electrically connected between the positive pin and the first negative pin. The second balancing resistor Rbalance2 and the second conductive switch Ron2 are electrically connected between the positive pin and the second negative pin. The first loop switch Rsense1 is electrically connected between the first negative pin and the negative electrode terminal VP-. The second loop switch Rsense2 is electrically connected between the second negative pin and the negative electrode terminal VP-.

[0124] During the period when the first circuit switch Rsense1 and the second circuit switch Rsense2 are controlled to cut off the charging current or discharging current of the first battery cell C1 and the second battery cell C2, respectively, the battery management integrated circuit GIC measures the open circuit voltages Vopen1 and Vopen2 of the first and second battery cells C1 and C2, respectively, and defines the state of charge (SOC) of the first and second battery cells C1 and C2 accordingly.

[0125] Figure 14 Another battery pack P of the present invention is shown as a parallel battery pack. Figure 13 and Figure 14The difference between the illustrated embodiments lies in that the battery management integrated circuit (GIC) of the present invention and the two battery cells C1 and C2 are connected in parallel between the positive electrode terminal VP+ and the negative electrode terminal VP-. Two circuit switches, Rsense1 and Rsense2, are configured externally to the GIC, respectively, in the charging or discharging circuits of the two battery cells C1 and C2. The GIC controls the two circuit switches, Rsense1 and Rsense2, via two control pins to cut off the charging or discharging current of the two battery cells, respectively, allowing the GIC to measure the open-circuit voltages of the two battery cells C1 and C2. Similarly, the GIC does not require external signals to control when the two circuit switches Rsense1 and Rsense2 cut off the charging or discharging circuit. Instead, the GIC autonomously controls one of the circuit switches to temporarily cut off the charging or discharging circuit of one battery cell, while allowing the other battery cell to continue charging or discharging.

[0126] When the first circuit switch Rsense1 and the second circuit switch Rsense2 are controlled to cut off the charging current or discharging current of the first battery cell C1 and the second battery cell C2 respectively, the battery management integrated circuit GIC measures the open circuit voltages Vopen1 and Vopen2 of the first and second battery cells C1 and C2 respectively, and defines the SOC of the first and second battery cells C1 and C2 accordingly.

[0127] Preferably, the circuits of the two independent battery cells C1 and C2 connected in parallel are opened one at a time to avoid power interruption caused by opening both circuits at the same time. The battery pack P may also include a protection circuit, a MOSFET element, and a battery cell temperature measurement element.

[0128] Figure 15 The present invention shows a battery pack P with parallel battery packs. Figure 13 The difference between the illustrated embodiments is that the positive electrode terminal VP+ and the negative electrode terminal VP- of the battery pack P are powered by two parallel battery groups G1 and G2, and each battery cell of the two battery groups G1 and G2 is connected in parallel to the battery management integrated circuit GIC of the present invention. When one of the circuit switches temporarily disconnects the charging or discharging circuit, the battery management integrated circuit GIC can measure the open-circuit voltage of each battery cell in one of the battery groups, while the other battery group can continue to charge or discharge between the positive electrode terminal VP+ and the negative electrode terminal VP-. The battery management integrated circuit GIC does not need to rely on external signals to control when the two circuit switches Rsense1 and Rsense2 disconnect the charging or discharging circuit. Instead, the battery management integrated circuit GIC autonomously controls one of the circuit switches to temporarily disconnect the charging circuit or discharge circuit of one battery group, while allowing the other battery group to continue charging or discharging.

[0129] Figure 15 The illustrated battery pack P includes a positive electrode terminal VP+ and a negative electrode terminal VP-, a first battery group G1, a second battery group G2, and a battery management integrated circuit GIC. The first battery group G1 comprises multiple battery cells connected in series and has a first positive electrode and a first negative electrode. The second battery group G2 comprises multiple battery cells connected in series and has a second positive electrode and a second negative electrode. The battery management integrated circuit GIC includes a positive electrode pin, at least one first intermediate pin, at least one second intermediate pin, a first negative electrode pin and a second negative electrode pin, a first balancing resistor Rbalance1 and a first conduction switch Ron1 connected in series, a second balancing resistor Rbalance2 and a second conduction switch Ron2 connected in series, a first return switch Rsense1, and a second return switch Rsense2. The positive electrode pin electrically connects the first positive electrode, the second positive electrode, and the positive electrode terminal VP+. The first intermediate pin electrically connects the positive electrode or negative electrode between two adjacent series-connected battery cells in the first battery group G1. The first negative electrode pin is electrically connected to the first negative electrode of the first battery pack. The second middle pin is electrically connected to the positive electrode or negative electrode between two adjacent series-connected battery cells in the second battery pack G2. The second negative electrode pin is electrically connected to the second negative electrode of the second battery pack G2. The first balancing resistor Rbalance1 and the first conductive switch Ron1 are electrically connected between the positive electrode pin and the first negative electrode pin. The second balancing resistor Rbalance2 and the second conductive switch Ron2 are electrically connected between the positive electrode pin and the second negative electrode pin. The first loop switch Rsense1 is electrically connected between the first negative electrode pin and the negative electrode terminal. The second loop switch Rsense2 is electrically connected between the second negative electrode pin and the negative electrode terminal.

[0130] During the period when the first circuit switch Rsense1 and the second circuit switch Rsense2 are controlled to cut off the charging current or discharging current of the first battery group G1 and the second battery group G2 respectively, the battery management integrated circuit GIC measures the open circuit voltage Vopen of each battery cell of the first and second battery groups G1 and G2, and defines the SOC of each battery cell of the first and second battery groups G1 and G2 accordingly.

[0131] Figure 16 Another battery pack of the present invention is shown with parallel battery packs. Figure 15The difference between the illustrated embodiments lies in that the battery management integrated circuit (GIC) of the present invention is connected in parallel with two battery groups G1 and G2, between the positive electrode terminal VP+ and the negative electrode terminal VP-. Two circuit switches, Rsense1 and Rsense2, are configured externally to the GIC, respectively in the charging or discharging circuits of the two battery groups G1 and G2. The GIC controls the two circuit switches, Rsense1 and Rsense2, via two control pins to cut off the charging or discharging current of the two battery groups, respectively, allowing the GIC to measure the open-circuit voltage of each battery cell in the two battery groups G1 and G2. Similarly, the GIC does not require external signals to control when the two circuit switches Rsense1 and Rsense2 cut off the charging or discharging circuit. Instead, the GIC autonomously controls one of the circuit switches to temporarily cut off the charging or discharging circuit of one battery group, allowing the other battery group to continue charging or discharging.

[0132] The first circuit switch Rsense1 and the second circuit switch Rsense2 are controlled to cut off the charging current or discharging current of the first and second battery groups G1 and G2 respectively, so that the battery management integrated circuit GIC measures the open circuit voltage Vopen of each battery cell of the first and second battery groups G1 and G2 respectively, and defines the SOC of each battery cell of the first and second battery groups G1 and G2 accordingly.

[0133] Figure 17 show Figure 12 The battery pack shown is configured in a multi-series and multi-parallel structure, wherein the figure does not show that each battery cell of the battery pack is connected in parallel to the battery management integrated circuit GIC of the present invention.

[0134] Figure 17 The battery management system shown includes a plurality of battery packs P and a loop switch Rsense. The plurality of battery packs P are configured to discharge from or charge a terminal device in a parallel-series manner. Each battery pack P includes a plurality of battery cells and a battery management integrated circuit GIC. The battery cells are structured in series. The battery management integrated circuit GIC includes a plurality of polarity pins for connecting each battery cell in parallel. The loop switch Rsense connects the plurality of battery cells in series in series. During the charging or discharging period of each battery pack P, the battery management integrated circuit GIC receives an external instruction, which causes the battery management integrated circuit GIC to control the loop switch Rsense to temporarily cut off a charging current during the charging period or a discharging current during the discharging period, and during the period of cutting off the charging current or the discharging current, causes the battery management integrated circuit GIC to measure the open circuit voltage Vopen of each battery cell and define the SOC of each battery cell accordingly.

[0135] The battery management method of the present invention includes: during the charging period or the discharging period of each battery pack P, according to an external instruction, the battery management integrated circuit GIC controls the loop switch Rsense to temporarily cut off a charging current during the charging period or a discharging current during the discharging period; and, during the period of cutting off the charging current or the discharging current, the battery management integrated circuit GIC measures the open circuit voltage Vopen of each battery cell and defines the SOC of each battery cell accordingly.

[0136] Figure 18 show Figure 12 The battery pack shown is configured in a multi-parallel structure, where the loop switch Rsense is located in the battery management integrated circuit GIC and is connected between the negative electrode of the battery pack and the negative terminal VP- of the battery pack P to control the battery pack to cut off the discharge current or charging current.

[0137] Figure 19 show Figure 15 The battery packs shown are arranged in a multi-series, multi-parallel configuration. The figure does not show how each battery cell in the two battery packs is individually connected in parallel to the battery management integrated circuit (GIC) of the present invention. The battery management system of the present invention includes multiple battery packs P. These multiple battery packs P are arranged in a parallel-serial configuration to discharge from or be charged by a terminal device.

[0138] In this embodiment, each battery pack P includes a first battery group G1, a second battery group G2, and a battery management integrated circuit (GIC). The first battery group G1 and the second battery group G2 each consist of multiple battery cells connected in series. The first battery group G1 and the second battery group G2 are connected in parallel. The battery management integrated circuit (GIC) includes multiple polarity pins and a first circuit switch Rsense1 and a second circuit switch Rsense2. The first circuit switch Rsense1 and the second circuit switch Rsense2 are connected in series with the first battery group G1 and the second battery group G2, respectively. During the charging or discharging period of each battery pack P, the battery management integrated circuit GIC controls the first circuit switch Rsense1 or the second circuit switch Rsense2 to temporarily cut off a charging current or a discharging current of the first battery group G1 or the second battery group G2, and during the period of cutting off the charging current or the discharging current, the battery management integrated circuit GIC measures the open circuit voltage Vopen of each battery cell of the first battery group G1 or the second battery group G2 through the polarity pins, and defines the SOC of each battery cell accordingly.

[0139] Figure 20 A diagram showing the configuration of a battery pack with a charge and discharge circuit according to the present invention.

[0140] In this embodiment, the battery pack P of the present invention includes a positive electrode terminal VP+ and a negative electrode terminal VP-, a first battery cell C1, a second battery cell C2, and a battery management integrated circuit GIC. The positive electrode terminal VP+ and the negative electrode terminal VP- are used to electrically connect to an external charging and discharging power source. The first battery cell C1 has a first positive electrode and a first negative electrode. The second battery cell C2 has a second positive electrode and a second negative electrode. The battery management integrated circuit GIC includes: a first positive electrode pin, a first negative electrode pin, a second positive electrode pin, a second negative electrode pin, a first balancing resistor Rbalance1 and a first conduction switch Ron1 connected in series, a second balancing resistor Rbalance2 and a second conduction switch Ron2 connected in series, a first return switch Rsense1, a second return switch Rsense2, a first charge-discharge circuit CHG1, and a second charge-discharge circuit CHG2. The first positive electrode pin is electrically connected to the first positive electrode. The second positive electrode pin is electrically connected to the second positive electrode. The first negative electrode pin is electrically connected to the first negative electrode. The second negative electrode pin is electrically connected to the second negative electrode. The first balancing resistor Rbalance1 is connected in series with the first conductive switch Ron1 and is electrically connected between the positive electrode pin and the first negative electrode pin. The second balancing resistor Rbalance2 is connected in series with the second conductive switch Ron2 and is electrically connected between the positive electrode pin and the second negative electrode pin. The first loop switch Rsense1 is electrically connected between the first negative electrode pin and the negative electrode terminal. The second loop switch Rsense2 is electrically connected between the second negative electrode pin and the negative electrode terminal. The first charge-discharge circuit CHG1 is electrically connected between the positive electrode terminal VP+ and the first positive electrode pin. The second charge-discharge circuit CHG2 is electrically connected between the positive electrode terminal VP+ and the second positive electrode pin. The positive electrode terminal VP+ and the negative electrode terminal VP- are electrically connected to an external power source or load.

[0141] In another embodiment, the first circuit switch Rsense1 and the second circuit switch Rsense2 can be replaced by a first circuit switch and a second circuit switch, respectively, located outside the battery management integrated circuit (GIC). The first circuit switch is electrically connected between the first negative electrode and the negative electrode terminal, and the second circuit switch is electrically connected between the second negative electrode and the negative electrode terminal. The battery management integrated circuit (GIC) includes a first control pin and a second control pin, each electrically connected to the first circuit switch and the second circuit switch, respectively, for controlling the first circuit switch and the second circuit switch to cut off the charging current or discharging current of the first battery cell (C1) and the second battery cell (C2), respectively, so that the battery management integrated circuit (GIC) measures the open-circuit voltages (Vopen1) and (Vopen2) of the first and second battery cells (C1 and C2), and uses these voltages to determine the state of charge (SOC) of the first and second battery cells (C1 and C2).

[0142] Figure 21 A diagram shows another configuration of a battery pack with a charger and discharger according to the present invention. The battery pack P of the present invention can be connected to a Type-C USB port via the charging and discharging power supply (VP+, VP-), and the system power supply (Vsys+, Vsys-). Therefore, the present invention can completely separate the charging and discharging power supply from the system power supply (e.g., the power used by the app).

[0143] In this embodiment, the battery pack P of the present invention includes a first positive electrode terminal VP+, a second positive electrode terminal Vsys+, a first negative electrode terminal VP-, a second negative electrode terminal Vsys-, a first battery cell C1, a second battery cell C2, and a battery management integrated circuit GIC. The first battery cell C1 has a first positive electrode and a first negative electrode. The second battery cell C2 has a second positive electrode and a second negative electrode.

[0144] The first positive electrode terminal VP+ and the first negative electrode terminal VP- are used to electrically connect to an external charging and discharging power source. The second positive electrode terminal Vsys+ and the second negative electrode terminal Vsys- are used to electrically connect to system power.

[0145] The battery management integrated circuit GIC includes a first positive electrode pin, a second positive electrode pin, a first negative electrode pin and a second negative electrode pin, a first charge and discharge circuit CHG1, a second charge and discharge circuit CHG2, a first balancing resistor Rbalance1 and a first conductive switch Ron1 connected in series, a second balancing resistor Rbalance2 and a second conductive switch Ron2 connected in series, and a switching network SNW.

[0146] The first positive electrode pin is electrically connected to the first positive electrode. The second positive electrode pin is electrically connected to the second positive electrode. The first negative electrode pin is electrically connected to the first negative electrode. The second negative electrode pin is electrically connected to the second negative electrode. The second positive electrode terminal Vsys+ is electrically connected to the first positive electrode pin and the second positive electrode pin. The first charge-discharge circuit CHG1 is electrically connected between the first positive electrode terminal VP+ and the first positive electrode pin. The second charge-discharge circuit CHG2 is electrically connected between the first positive electrode terminal VP+ and the second positive electrode pin. The first balancing resistor Rbalance1 and the first conduction switch Ron1 are electrically connected between the positive electrode pin and the first negative electrode pin. The second balancing resistor Rbalance2 and the second conduction switch Ron2 are electrically connected between the positive electrode pin and the second negative electrode pin. The switching network SNW selectively switches the first negative electrode terminal VP- and the second negative electrode terminal Vsys- to be electrically connected to the first negative electrode and the second negative electrode, so as to selectively cut off the charging path and the discharging path of the first battery cell C1 and the second battery cell C2, so that the battery management integrated circuit GIC measures the open circuit voltages Vopen1 and Vopen2 of the first and second battery cells C1 and C2, and defines the SOC of the first and second battery cells C1 and C2 accordingly.

[0147] Figure 22 A diagram illustrating another battery pack configuration with a charger and discharger according to the present invention is shown. In this embodiment, the battery pack P includes a positive electrode terminal VP+, a first negative electrode terminal VP-, a second negative electrode terminal Vsys-, a first battery group G1, a second battery group G2, and a battery management integrated circuit GIC.

[0148] The positive electrode terminal VP+ can also serve as the system's positive electrode terminal Vsys+. The positive electrode terminal VP+ and the first negative electrode terminal VP- are used to electrically connect to an external charging and discharging power source. The first positive electrode terminal VP+ and the second negative electrode terminal Vsys- are used to electrically connect to the system's power supply. For example, in charging applications, a Type C connector can be used to electrically connect the positive electrode terminal VP+ and the first negative electrode terminal VP-. In applications that supply power to the system, the battery pack P can provide the required power through the positive electrode terminal VP+ and the second negative electrode terminal Vsys-.

[0149] The first battery group G1 is composed of multiple battery cells connected in series and has a first positive electrode and a first negative electrode. The second battery group G2 is composed of multiple battery cells connected in series and has a second positive electrode and a second negative electrode. The battery management integrated circuit GIC includes a positive electrode pin, at least one first intermediate pin, at least one second intermediate pin, a first negative electrode pin and a second negative electrode pin, a first balancing resistor Rbalance1 and a first conduction switch Ron1 connected in series, a second balancing resistor Rbalance2 and a second conduction switch Ron2 connected in series, and a switching network SNW.

[0150] The positive electrode pin is electrically connected to the first positive electrode, the second positive electrode, and the positive electrode terminal VP+. The first intermediate pin is electrically connected to the positive electrode or negative electrode between two adjacent battery cells connected in series in the first battery group G1. The first negative electrode pin is electrically connected to the first negative electrode of the first battery cell. The second intermediate pin is electrically connected to the positive electrode or negative electrode between two adjacent battery cells connected in series in the second battery group G2. The second negative electrode pin is electrically connected to the second negative electrode of the second battery cell. The first balancing resistor Rbalance1 and the first conductive switch Ron1 are electrically connected between the positive electrode pin and the first negative electrode pin. The second balancing resistor Rbalance2 and the second conductive switch Ron2 are electrically connected between the positive electrode pin and the second negative electrode pin. The switching network SNW selectively switches the first negative electrode terminal VP- and the second negative electrode terminal Vsys- to be electrically connected to the first negative electrode and the second negative electrode, so as to selectively cut off the charging path and the discharging path of the first and second battery groups G1 and G2, so that the battery management integrated circuit GIC measures the open circuit voltage Vopen of each battery cell of the first and second battery groups G1 and G2, and defines the SOC of each battery cell of the first and second battery groups G1 and G2 accordingly.

[0151] Figure 23 Component diagram showing multiple specific embodiments of the loop switch Rsense implemented by the present invention, wherein Figure 23 A shows the circuit element pattern of the loop switch Rsense. Figure 23 B illustrates various specific P-type and N-type field effect transistor circuit switches (the circuit can be opened when the battery pack is charging or discharging). Figure 23 C illustrates a specific P-type and N-type field effect transistor circuit switch (the circuit can only be opened when the battery pack is discharged). Figure 23 D illustrates a specific P-type and N-type field effect transistor loop switch (the loop can only be opened when the battery pack is charging).

[0152] Figure 24Another configuration diagram of the battery pack of the present invention is shown. The battery management integrated circuit (GIC) includes a loop switch (Rsense) and a series-connected conduction switch (Ron) and a balancing resistor (Rbalance). The series-connected conduction switch (Ron) and balancing resistor (Rbalance) are connected in parallel with the battery cell (C). The loop switch (Rsense) is configured in the charge-discharge loop between the VP+ terminal and the positive electrode of the battery cell (C). The positive electrode of the battery cell (C) is electrically connected to the VP- terminal. The Rsense switch can be a P-type field-effect transistor.

[0153] The battery management integrated circuit GIC can measure the open circuit voltage Vopen of the battery cell C and the battery internal resistance Rbat by turning on and off the conduction switch Ron and the loop switch Rsense.

[0154] The balancing resistor Rbalance is configured to measure the discharge current Ibat and limit it to a specific range. When the conduction switch Ron is closed, generating the discharge current Ibat, the balancing resistor Rbalance balances the open-circuit voltage Vopen. The conduction switch Ron and the return switch Rsense can be calibrated before packaging the battery management integrated circuit (GIC) to accurately measure the battery's discharge current Ibat. The following further explains how to calculate the open-circuit voltage Vopen and the battery's internal resistance Rbat.

[0155] Figure 25 show Figure 24 The schematic diagram shown is a battery pack of the present invention used to measure the open circuit terminal voltage Vopen of the battery cell C and the terminal voltage Von of the Ron switch, so as to calculate the battery internal resistance Rbat.

[0156] The present method for calculating the battery internal resistance Rbat is implemented in a battery management integrated circuit (GIC). First, the loop switch Rsense is opened to disconnect the charging or discharging circuit of the battery cell C. The conduction switch Ron is then opened. The GIC then measures the terminal voltage Vbat of the battery cell C. At this point, the terminal voltage Vbat is equal to the open-circuit terminal voltage Vopen.

[0157] Next, after the conduction switch Ron is turned off, the terminal voltage Vbat of the battery cell C and the terminal voltage Von of the conduction switch are measured again, and according to the equation Von=Ibat·Ron, Ibat=Von / Ron is calculated.

[0158] Finally, the battery internal resistance Rbat is calculated according to the equation Vbat=Vopen+Ibat·Rbat.

[0159] Figure 26 show Figure 24The battery pack of the present invention is used to measure the voltage Vopen and current Ibat of the battery cell twice to calculate the resistance Rbat.

[0160] The method for calculating the battery internal resistance Rbat of the present invention is implemented in the battery management integrated circuit GIC. First, the conduction switch Ron is turned on and the loop switch Rsense is closed.

[0161] Next, the first measurement is performed to synchronously measure the battery cell terminal voltage Vbat1 and the loop switch terminal voltage Vsense1. According to the equations Vbat1 = Vopen - Ibat1·Rbat and Vsense1 = Ibat1·Rsense, the binary equation Vbat1 = Vopen - (Vsense1 / Rsense)·Rbat is obtained.

[0162] Next, a second measurement is performed to simultaneously measure the battery cell terminal voltage Vbat2 and the detection opening terminal voltage Vsense2. According to the equations Vbat2=Vopen-Ibat2·Rbat and Vsense2=Ibat2·Rsense, the binary equation Vbat2=Vopen-(Vsense2 / Rsense)·Rbat can be obtained.

[0163] Finally, the simultaneous equations are calculated to obtain the open circuit voltage Vopen and the battery internal resistance Rbat.

[0164] Figure 27 (A), (B), and (C) show various structural diagrams of battery cells in a battery pack.

[0165] like Figure 27 (A) A battery pack is composed of a single battery cell. Figure 27 (B) A battery pack is composed of multiple battery cells connected in series. Figure 27 (C) A battery pack is composed of multiple battery cells connected in parallel. Figure 27 (B) shows that multiple battery cells connected in series can be Figure 27 (A) shows an equivalent battery, wherein the terminal voltage of the equivalent battery is the sum of the terminal voltages of multiple battery cells, the current of the equivalent battery is equal to the current of each battery cell, and the capacity of the equivalent battery is the product of the sum of the terminal voltages and the current. Figure 27 (C) shows that multiple battery cells connected in parallel can also be Figure 27 (A) shows an equivalent battery, wherein the terminal voltage of the equivalent battery is the terminal voltage of each battery cell, the current of the equivalent battery is equal to the sum of the currents of multiple battery cells, and the capacity of the equivalent battery is the product of the terminal voltage and the sum of the currents.

[0166] Figure 28 (A), (B), and (C) show Figure 27(A), (B), and (C) are equivalent circuit diagrams of the battery cells shown.

[0167] like Figure 28 (A) The equivalent circuit of a single battery cell. Figure 28 (B) Equivalent circuit of multiple battery cells connected in series. Figure 28 (C) Equivalent circuit of multiple battery cells connected in parallel. Figure 28 (B) The equivalent open-circuit voltage and equivalent battery internal resistance of the equivalent circuit are the sum of the individual open-circuit voltages (Vopen) and the individual battery internal resistances (Rbat) of the series-connected battery cells, respectively. The battery internal resistance of the equivalent circuit can be used to assess the capacity limitations of the series-connected battery cells. Figure 28 (C) shows the equivalent open-circuit voltage and equivalent battery internal resistance of the equivalent circuit, representing the open-circuit voltage Vopen of the individual parallel-connected battery cells and the parallel combination of the battery internal resistance Rbat. The battery internal resistance of the equivalent circuit can be used to evaluate the quality of the parallel-connected battery cells.

[0168] Figure 29 A circuit diagram illustrating multiple battery packs connected in series, with each battery pack connected in parallel to a functional integrated circuit (FIC), and at least one synchronization control pin between the functional integrated circuits. The functional integrated circuit is used to balance the charge between the series-connected battery packs, maintaining consistent charging and discharging performance across all battery cells in the series-connected battery packs. In addition to being connected in parallel with the corresponding battery pack P, the functional integrated circuit FIC is also electrically connected to the functional integrated circuit FIC connected in parallel to adjacent battery packs P, receiving synchronization control signals from the other functional integrated circuits FIC, or sending synchronization control signals to the other functional integrated circuits FIC.

[0169] Figure 30 (A), (B), (C), and (D) show the structure of a power battery and its equivalent circuit diagram.

[0170] Take the power batteries used in electric vehicles as an example. Figure 30 As shown in (B), each battery cell C has an internal resistance of 16.5mΩ and supplies 4V voltage and 6Ah of energy. Four battery cells C connected in series form a battery pack P with an internal resistance of 66mΩ. The battery pack P provides 16V voltage and 6Ah of energy and its charge and discharge circuit is controlled by a circuit switch. The equivalent circuit of the battery pack P is shown as follows Figure 30 (C) Next, the 33 battery packs P connected in parallel have an internal resistance of 2mΩ and can provide a voltage of 16V and a capacity of 198Ah. Finally, the 27 battery packs connected in series, consisting of 33 battery packs connected in parallel, form a power battery assembly with an internal resistance of 54mΩ, a voltage of 432V, and a capacity of 198Ah. Figure 30(D) shows the equivalent circuit of the power battery assembly, which can supply a total power of approximately 85 kWh, a capacity of 198 Ah, and an equivalent internal resistance of 54 mΩ. However, if there are quality differences among the numerous battery cells, this will cause charge and discharge string balancing issues within each battery pack P, as well as charge, discharge, and balance issues within the parallel power battery packs.

[0171] Figure 31 (A), (B), (C), and (D) illustrate various balanced circuit diagrams.

[0172] like Figure 31 (A) shows an example of a common ground passive voltage balancing circuit. Figure 31 (B) shows an example of a common ground capacitor active voltage balancing circuit, whose equivalent resistance is 1 / (f·C), where f is the frequency of the non-overlapping control signals of switches S1 and S2, and Cbalance is the balancing capacitance. Figure 30 (C) illustrates a non-common ground passive voltage balancing circuit. Figure 30 (D) illustrates a non-common-ground capacitor active voltage balancing circuit, whose equivalent resistance is 1 / (f·C), where f is the frequency of the non-overlapping control signals of switches S1 and S2, and Cbalance is the balancing capacitance.

[0173] Figure 32 The parallel structure diagram of the battery pack of the present invention is shown, wherein the battery management integrated circuit GIC further includes a series balancing circuit and a parallel balancing circuit for voltage balancing function.

[0174] like Figure 32 The small-unit battery string balancing circuit of the battery management integrated circuit (GIC) shown here balances the series-connected battery cells within the battery pack. The string balancing function for four battery cells is primarily accomplished by a switching network SNW consisting of multiple first switches S1 and multiple second switches S2, along with three string balancing capacitors Cbalance1, Cbalance2, and Cbalance3. Each string balancing capacitor transfers charge between adjacent battery cells C through the operation of the switching network SNW.

[0175] A fourth switch S4 is controlled to connect a parallel balancing capacitor Cbalance4 to the series-connected battery cells, and cooperates with a fifth switch S5 to complete the parallel balancing function between the parallel battery packs. Each battery management integrated circuit GIC has a common ground pin, and these common ground pins are electrically connected to each other. A third switch S3 is connected to the battery cell charging and discharging circuit, as shown in the figure, connected between a negative terminal of the battery string and a negative terminal VP- of the battery pack to control the opening and closing of this circuit. Whether the third switch S3 is opened or closed does not affect the balancing operation performed between the four battery cells.

[0176] like Figure 32 The battery management integrated circuit GIC of the present invention is used to parallel balance multiple parallel-connected battery packs and string balance multiple series-connected battery cells to discharge or charge a terminal device.

[0177] The battery management system of the present invention is used for parallel balancing of multiple parallel-connected battery packs P and string balancing of multiple series-connected battery cells C to discharge or charge a terminal device. Each battery pack P includes multiple series-connected battery cells C and a battery management integrated circuit (GIC), wherein each battery cell C is connected to the GIC. The GIC includes multiple electrode pins, a switching network SNW, multiple string balancing capacitors Cbalance1 to Cbalance3, a parallel balancing capacitor Cbalance4, and a common pin.

[0178] The plurality of electrode pins are used to connect each battery cell C in parallel. The plurality of string balancing capacitors (i.e., Cbalance1, Cbalance2, and Cbalance3) are each used to balance two adjacent battery cells C. The switching network SNW electrically connects the plurality of electrode pins with the plurality of string balancing capacitors to switch the electrode pins of adjacent battery cells C to be electrically connected to the corresponding string balancing capacitor. The parallel balancing capacitor Cbalance4 is used to selectively connect to the plurality of battery cells C connected in series in parallel. The common pin is selectively electrically connected to the parallel balancing capacitor Cbalance4.

[0179] The battery management integrated circuit (GIC) further includes a first switch S1, which selectively opens the charging or discharging circuits of the multiple battery cells C and determines when the multiple battery cells C of the battery pack P are connected in parallel with other battery packs P. According to the battery management system of the present invention, terminal device manufacturers can quickly and safely assemble a high-power battery. By electrically connecting the common pins of the battery management integrated circuit, the added battery pack can be pre-balanced when connected in parallel with the high-power battery, reducing the difference between the highest and lowest cell voltages and avoiding loss of battery internal resistance. At the appropriate time, the third switch S3 determines when the added battery pack is connected in parallel with other battery packs.

[0180] The present invention discloses a battery management system that implements a battery pack string balancing circuit. In an embodiment of the present invention, a battery management system includes a plurality of battery packs connected in series and a plurality of functional integrated circuits FIC. Adjacent functional integrated circuits FIC cooperate to implement a battery pack string balancing circuit to balance the charge balance of the battery packs connected in series. Each battery pack includes a battery group G composed of a plurality of battery cells C, and each battery pack is connected in parallel with a functional integrated circuit FIC. Through the synchronous control of the functional integrated circuits FIC, the high-power string balancing function is completed between adjacent battery packs P. The functional integrated circuit FIC of the present invention includes at least one synchronous control pin, at least one balancing pin and a switching network SNW, wherein the synchronous control pin FOSC is electrically connected to the synchronous control pin of the adjacent functional integrated circuit FIC to instruct the battery pack with a higher end voltage to balance the charge of the battery pack with a lower end voltage. The balancing pin is electrically connected to the balancing pin of the adjacent functional integrated circuit FIC to establish a charge balancing loop of the adjacent functional integrated circuit FIC. At least one balancing capacitor Cbalance for balancing the charge can be configured inside the functional integrated circuit FIC, such as Figure 33 and Figure 34 The embodiment shown in the figure may be arranged between the balance pins of adjacent functional integrated circuits FIC, such as Figure 37 and Figure 38 The embodiment shown.

[0181] The battery pack string balancing function refers to the balance of power between battery packs connected in series. Figure 33 In the embodiment shown, the voltage balance between the equivalent battery terminal voltages Vbat_n and Vbat_n+1 of two battery packs connected in series is achieved, and the synchronous control pins FOSC of the functional integrated circuits FIC_n+1 and FIC_n are electrically connected to the balance pins respectively. In one embodiment of the present invention, when the terminal voltage Vbat_n is greater than the terminal voltage Vbat_n+1 by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC, and implements the power balance (or bottom-to-top power balance) of the battery packs P2 to P1 according to the direction indicated by the control signal FOSC. To simplify Figure 33 The functional integrated circuits FIC_n+1 and FIC_n only illustrate the power balancing circuit of the switching network SNW. The balancing capacitor Cbalance is configured inside the functional integrated circuit FIC_n+1. According to the direction indicated by the control signal FOSC, the two switching networks SNW implement the bottom-to-top power balancing. First, the two switches S2 are turned on and the two switches S1 are opened to establish Figure 35 The power balancing circuit shown in (A) balances the power of the battery pack P2 and the balancing capacitor Cbalance (balancing capacitor energy storage). Then, the two switches S2 are opened and the two switches S1 are turned on to establish Figure 35The power balancing circuit shown in (B) balances the power of the battery pack P1 and the balancing capacitor Cbalance (the balancing capacitor releases energy). In another embodiment of the present invention, when the terminal voltage Vbat_n+1 is greater than the terminal voltage Vbat_n by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement power balancing (or top-to-bottom power balancing) of the battery packs P1 to P2 according to the direction indicated by the control signal FOSC, as shown in FIG. Figure 33 and Figure 35 The two switching networks SNW implement upper-to-lower power balancing, first establishing Figure 35 The energy balancing circuit shown in (B) balances the energy of the battery pack P1 and the balancing capacitor Cbalance (balancing capacitor energy storage), and then establishes Figure 35 The charge balancing circuit shown in (A) balances the charge of the battery pack P2 and the balancing capacitor Cbalance (the balancing capacitor releases energy).

[0182] like Figure 34 In another embodiment shown, the voltage balance between the equivalent battery terminal voltages Vbat_n and Vbat_n+1 of two battery packs connected in series is achieved, and the synchronous control pins FOSC of the functional integrated circuits FIC_n+1 and FIC_n are electrically connected to the balance pins respectively. In one embodiment of the present invention, when the terminal voltage Vbat_n+1 is greater than the terminal voltage Vbat_n by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC, and implements the power balance (or top-to-bottom power balance) of the battery packs P1 to P2 according to the direction indicated by the control signal FOSC. To simplify Figure 34 The functional integrated circuits FIC_n+1 and FIC_n only show the power balancing circuit of the switching network SNW. The balancing capacitor Cbalance is configured inside the functional integrated circuit FIC_n. According to the direction indicated by the control signal FOSC, the two switching networks SNW implement the upper-to-lower power balancing. First, the two switches S1 are turned on and the two switches S2 are opened to establish Figure 36 The power balancing circuit shown in (A) balances the power of the battery pack P1 and the balancing capacitor Cbalance (balancing capacitor energy storage). Then, the two switches S1 are opened and the two switches S2 are turned on to establish Figure 36 The power balancing circuit shown in (B) balances the power of the battery pack P2 and the balancing capacitor Cbalance (balance capacitor releases energy). In another embodiment of the present invention, when the terminal voltage Vbat_n is greater than the terminal voltage Vbat_n+1 by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement power balancing (or bottom-to-top power balancing) of the battery pack P2 to P1 according to the direction indicated by the control signal FOSC, as shown in FIG. Figure 34 and Figure 36 The two switching networks SNW implement the power balance between the lower and upper parts, first establish Figure 36 The energy balancing circuit shown in (B) balances the energy of the battery pack P2 and the balancing capacitor Cbalance (balancing capacitor energy storage), and then establishes Figure 36 The charge balancing circuit shown in (A) balances the charge of the battery pack P1 and the balancing capacitor Cbalance (the balancing capacitor releases energy).

[0183] according to Figure 33 and Figure 34 In the embodiment shown, the present invention achieves voltage string balancing between two battery packs through the coordinated operation between the two functional integrated circuits FIC and the configuration of the balancing capacitor Cbalance. The balancing capacitor Cbalance can be set in the functional integrated circuit FIC_n+1 or in the functional integrated circuit FIC_n. Those skilled in the art can also easily configure the balancing capacitor in both the two functional integrated circuits FIC_n+1 and FIC_n, such as Figure 38 As shown, this increases the capacitance of the balancing capacitor. Switches S1 and S2 in the two functional integrated circuits FIC_n+1 and FIC_n must be synchronous, non-overlapping switches. The direction of the control signal FOSC between the two functional integrated circuits FIC can be transmitted from FIC_n+1 to FIC_n, or from FIC_n to FIC_n+1, to synchronously control the operation of switches S1 and S2.

[0184] Figure 37 (A) and (B) show the power balancing circuit diagram of another embodiment of the battery management system of the present invention for implementing high-power string balancing management. Figure 33 and Figure 34 In the illustrated embodiment, the balancing capacitor Cbalance is electrically connected between the balancing pin of the functional integrated circuit FIC_n+1 and the balancing pin of FIC_n.

[0185] In one embodiment of the present invention, when the terminal voltage Vbat_n is greater than the terminal voltage Vbat_n+1 by a predetermined value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement the power balance (or bottom-to-top power balance) of the battery pack P2 to P1 according to the direction indicated by the control signal FOSC. Figure 37 The complexity of the functional integrated circuits FIC_n+1 and FIC_n is shown in the figure only for the power balancing circuit of the switching network SNW. The balancing capacitor Cbalance is configured between the balance pins of the two functional integrated circuits FIC_n+1. According to the direction indicated by the control signal FOSC, the two switching networks SNW implement the bottom-to-top power balancing. First, the two switches S2 are turned on and the two switches S1 are opened to establish Figure 37 The power balancing circuit shown in (A) balances the power of the battery pack P2 and the balancing capacitor Cbalance (balancing capacitor energy storage). Then, the two switches S2 are opened and the two switches S1 are turned on to establish Figure 37 The power balancing circuit shown in (B) balances the power of the battery pack P1 and the balancing capacitor Cbalance (the balancing capacitor releases energy). In another embodiment of the present invention, when the terminal voltage Vbat_n+1 is greater than the terminal voltage Vbat_n by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement power balancing (or top-to-bottom power balancing) of the battery packs P1 to P2 according to the direction indicated by the control signal FOSC, as shown in FIG. Figure 37 (A) and (B) show the opposite direction of FOSC. The two switching networks SNW implement the upper-to-lower power balance, first establish Figure 37 The energy balancing circuit shown in (B) balances the energy of the battery pack P1 and the balancing capacitor Cbalance (balancing capacitor energy storage), and then establishes Figure 37 The charge balancing circuit shown in (A) balances the charge of the battery pack P2 and the balancing capacitor Cbalance (the balancing capacitor releases energy).

[0186] Figure 38 (A) and (B) show the power balancing circuit diagram of another embodiment of the battery management system of the present invention for implementing high-power string balancing management, which is combined with the above Figure 33 、 Figure 34 and Figure 37 The three balancing capacitors Cbalance in the illustrated embodiment. In this embodiment of the present invention, each functional integrated circuit FIC has two balancing pins. These three balancing capacitors are respectively disposed within the functional integrated circuits FIC_n+1 and FIC_n, connected in parallel to the two balancing pins, and disposed between the balancing pin of FIC_n+1 and the two balancing pins of FIC_n. Therefore, by correspondingly connecting the two balancing pins of the two functional integrated circuits FIC, the three balancing capacitors Cbalance can be connected in parallel, increasing the capacity of the balancing capacitors and facilitating string balancing between higher-power battery packs.

[0187] In one embodiment of the present invention, when the terminal voltage Vbat_n is greater than the terminal voltage Vbat_n+1 by a predetermined value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement the power balance (or bottom-to-top power balance) of the battery pack P2 to P1 according to the direction indicated by the control signal FOSC. Figure 38The functional integrated circuits FIC_n+1 and FIC_n only illustrate the power balancing circuit of the switching network SNW. According to the direction indicated by the control signal FOSC, the two switching networks SNW implement the bottom-to-top power balancing. First, the two switches S2 are turned on and the two switches S1 are opened, so that the negative terminal of the battery pack P1 is electrically connected to an upper-to-lower contact Cu-d and the negative terminal of the battery pack P2 is electrically connected to a lower-to-upper contact Cd-u, thereby establishing Figure 38 The energy balancing circuit shown in (A) balances the energy of the battery pack P2 and the three parallel balancing capacitors Cbalance (balancing capacitor energy storage). Then, the two switches S2 are opened and the two switches S1 are turned on, so that the positive terminal of the battery pack P1 is electrically connected to the upper-to-lower contact Cu-d and the positive terminal of the battery pack P2 is electrically connected to the lower-to-upper contact Cd-u, so as to establish Figure 38 The power balancing circuit shown in (B) balances the power of the battery pack P1 and the three parallel balancing capacitors Cbalance (balance capacitors release energy). In another embodiment of the present invention, when the terminal voltage Vbat_n+1 is greater than the terminal voltage Vbat_n by more than a preset value, the battery management system of the present invention activates a corresponding measure to enable at least one functional integrated circuit FIC to implement power balancing (or top-to-bottom power balancing) of the battery packs P1 to P2 according to the direction indicated by the control signal FOSC, as shown in FIG. Figure 38 (A) and (B) show the opposite direction of FOSC. The two switching networks SNW implement the upper-to-lower power balance, first establish Figure 38 The energy balancing circuit shown in (B) balances the energy of the battery pack P1 and the three parallel balancing capacitors Cbalance (balancing capacitor energy storage), and then establishes Figure 38 The power balancing circuit shown in (A) balances the power of the battery pack P2 and the three parallel balancing capacitors Cbalance (balance capacitors release energy).

[0188] according to Figure 33 、 Figure 34 、 Figure 37 and Figure 38 In the illustrated embodiment and description thereof, the switching network SNW of the functional integrated circuit FIC includes an up-to-down battery balancing circuit and a down-to-up battery balancing circuit. In the embodiments of the present invention, "up-to-down" or "down-to-up" is used to describe the connection between adjacent battery cells, not to describe the balance of charge levels, similar to the use of "left-to-right" or "right-to-left" to describe the connection between adjacent battery cells.

[0189] Figure 39 (A), (B) and Figure 40 (A) and (B) illustrate a power balance circuit diagram of a high-power string balance management of the battery management system of the present invention. Figure 38As shown, two battery packs P1 and P2 are connected in series. When three battery packs P1, P2, and P3 are connected in series, and each battery pack is connected in parallel with a functional integrated circuit FIC1, FIC2, and FIC3, as shown in FIG. Figure 39 The battery management system shown in FIG. Each functional integrated circuit is identical, and the two balancing pins and synchronization control pins of two adjacent functional integrated circuits FIC are electrically connected to each other. Taking battery pack P2 as an example, functional integrated circuit FIC3 is the upper functional integrated circuit of functional integrated circuit FIC2, and functional integrated circuit FIC1 is the lower functional integrated circuit of functional integrated circuit FIC2. Functional integrated circuit FIC2 includes a switching network SNW, two lower-to-up balancing pins, two upper-to-lower balancing pins, a lower-to-up synchronization control pin, and an upper-to-lower synchronization control pin. The switching network connects a positive terminal and a negative terminal of battery pack P2 in parallel via a positive pin and a negative pin. The switching network SNW includes an upper-to-lower energy balancing circuit and a lower-to-up energy balancing circuit. The upper-to-lower energy balancing circuit includes switches S1 and S2, respectively, for switching the positive and negative terminals of battery pack P2 to be electrically connected to an upper-to-lower contact Cu-d, and the upper-to-lower contact Cu-d is electrically connected to the two upper-to-lower balancing pins. The bottom-to-up battery balancing circuit includes switches S1 and S2, respectively, for connecting the positive and negative terminals of battery pack P2 to a bottom-to-up contact Cd-u. The bottom-to-up contact Cd-u is electrically connected to two bottom-to-up balancing pins. A balancing capacitor Cbalance is connected in parallel to the two up-to-bottom balancing pins, and another balancing capacitor Cbalance is connected in parallel to the two bottom-to-up balancing pins.

[0190] When the two lower-to-upper balancing pins of functional integrated circuit FIC2 are electrically connected to the two upper-to-lower balancing pins of functional integrated circuit FIC3, an external balancing capacitor C23 is connected in parallel with the two lower-to-upper balancing pins of functional integrated circuit FIC2. When the two upper-to-lower balancing pins of functional integrated circuit FIC2 are electrically connected to the two lower-to-upper balancing pins of functional integrated circuit FIC1, an external balancing capacitor C12 is connected in parallel with the two upper-to-lower balancing pins of functional integrated circuit FIC2. In addition, the lower-to-up synchronization control pin of functional integrated circuit FIC2 is electrically connected to the upper-to-lower synchronization control pin of functional integrated circuit FIC3, and the upper-to-lower synchronization control pin of functional integrated circuit FIC2 is electrically connected to the lower-to-up synchronization control pin of functional integrated circuit FIC1.

[0191] When the terminal voltage of the battery pack P3 is greater than the terminal voltage of the battery pack P2 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the up-to-down synchronous control pin of the functional integrated circuit FIC3 to the down-to-up synchronous control pin of the functional integrated circuit FIC2, such as Figure 39As shown. According to the direction indicated by the control signal FOSC, the functional integrated circuits FIC2 and FIC3 work together to achieve the balance of power between the battery pack P3 and P2. First, the lower-to-upper power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC2 and the upper-to-lower power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC3 operate to establish Figure 39 The energy balancing circuit shown in (A) balances the energy between the battery pack P3 and the three parallel balancing capacitors (balancing capacitor energy storage). The lower-to-upper energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC2 and the upper-to-lower energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC3 operate to establish Figure 39 The power balancing circuit shown in (B) balances the power of the battery pack P2 and the three parallel balancing capacitors (balance capacitors release energy). Conversely, when the terminal voltage of the battery pack P2 is greater than the terminal voltage of the battery pack P3 by more than a preset value, the direction of the control signal FOSC is transmitted from the lower-to-up synchronous control pin of the functional integrated circuit FIC2 to the upper-to-lower synchronous control pin of the functional integrated circuit FIC3, as shown in FIG. Figure 39 The switching network of the two functional integrated circuits FIC2 and FIC3 implements the power balance between P2 and P3. Figure 39 The energy balancing circuit shown in (B) balances the energy of the battery pack P2 and the three parallel balancing capacitors (balancing capacitor energy storage), and then establishes Figure 39 The charge balancing circuit shown in (A) balances the charge of the battery pack P3 and the three parallel-connected balancing capacitors (balance capacitors release energy).

[0192] When the terminal voltage of the battery pack P2 is greater than the terminal voltage of the battery pack P1 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the up-to-down synchronous control pin of the functional integrated circuit FIC2 to the down-to-up synchronous control pin of the functional integrated circuit FIC1, such as Figure 40 As shown. According to the direction indicated by the control signal FOSC, the functional integrated circuits FIC1 and FIC2 work together to achieve the balance of power between the battery pack P2 and P1. First, the upper to lower power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC2 and the lower to upper power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC1 operate to establish Figure 40The energy balancing circuit shown in (A) balances the energy between the battery pack P2 and the three parallel balancing capacitors (energy storage in the balancing capacitors). The upper-to-lower energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC2 and the lower-to-upper energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC1 operate to establish Figure 40 The power balancing circuit shown in (B) balances the power of the battery pack P1 and the three parallel balancing capacitors (balance capacitors release energy). Conversely, when the terminal voltage of the battery pack P1 is greater than the terminal voltage of the battery pack P2 by more than a preset value, the direction of the control signal FOSC is transmitted from the lower-to-up synchronous control pin of the functional integrated circuit FIC1 to the upper-to-lower synchronous control pin of the functional integrated circuit FIC2, as shown in FIG. Figure 40 The switching network of the two functional integrated circuits FIC1 and FIC2 implements the upper and lower power balance, first establishing Figure 40 The energy balancing circuit shown in (B) balances the energy of the battery pack P1 and the three parallel balancing capacitors (balancing capacitor energy storage), and then establishes Figure 40 The charge balancing circuit shown in (A) balances the charge of the battery pack P2 and the three parallel-connected balancing capacitors (balance capacitors release energy).

[0193] Figure 41 (A), (B) and Figure 42 (A) and (B) illustrate another type of high-power string balancing management circuit diagram of the battery management system of the present invention. When three battery packs P1, P2, and P3 are connected in series, and each battery pack is connected in parallel with a functional integrated circuit FIC1, FIC2, and FIC3, as shown in FIG. Figure 41The battery management system shown in FIG. Each functional integrated circuit is identical, and the two balancing pins and synchronization control pins of two adjacent functional integrated circuits FIC are electrically connected to each other. Taking battery pack P2 as an example, functional integrated circuit FIC3 is the upper functional integrated circuit of functional integrated circuit FIC2, and functional integrated circuit FIC1 is the lower functional integrated circuit of functional integrated circuit FIC2. Functional integrated circuit FIC2 includes a switching network SNW, a lower-to-up balancing pin, two upper-to-lower balancing pins, a lower-to-up synchronization control pin, and an upper-to-lower synchronization control pin. The switching network connects a positive terminal and a negative terminal of battery pack P2 in parallel via a positive pin and a negative pin. The switching network SNW includes an upper-to-lower power balancing circuit and a lower-to-up power balancing circuit. The upper-to-lower power balancing circuit includes switches S1 and S2, respectively, for switching the positive and negative terminals of battery pack P2 to be electrically connected to an upper-to-lower contact Cu-d, and the upper-to-lower contact Cu-d is electrically connected to the two upper-to-lower balancing pins. The bottom-to-top battery balancing circuit includes switches S1 and S2 for switching the positive terminal and negative terminal of the battery pack P2 to be electrically connected to the bottom-to-top balancing pins. A balancing capacitor Cbalance is connected in parallel to the two top-to-bottom balancing pins.

[0194] When the lower-to-up balancing pin of functional integrated circuit FIC2 is electrically connected to one of the upper-to-lower balancing pins of functional integrated circuit FIC3, an external balancing capacitor C23 is connected in parallel between the lower-to-up balancing pin of functional integrated circuit FIC2 and the other upper-to-lower balancing pin of functional integrated circuit FIC3. When one of the upper-to-lower balancing pins of functional integrated circuit FIC2 is electrically connected to the lower-to-up balancing pin of functional integrated circuit FIC1, an external balancing capacitor C12 is connected in parallel between the other upper-to-lower balancing pin of functional integrated circuit FIC2 and the lower-to-up balancing pin of functional integrated circuit FIC1. Furthermore, the lower-to-up synchronization control pin of functional integrated circuit FIC2 is electrically connected to the upper-to-lower synchronization control pin of functional integrated circuit FIC3, and the upper-to-lower synchronization control pin of functional integrated circuit FIC2 is electrically connected to the lower-to-up synchronization control pin of functional integrated circuit FIC1.

[0195] When the terminal voltage of the battery pack P3 is greater than the terminal voltage of the battery pack P2 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the up-to-down synchronous control pin of the functional integrated circuit FIC3 to the down-to-up synchronous control pin of the functional integrated circuit FIC2, such as Figure 41As shown. According to the direction indicated by the control signal FOSC, the functional integrated circuits FIC2 and FIC3 work together to achieve the balance of power between the battery pack P3 and P2. First, the lower-to-upper power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC2 and the upper-to-lower power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC3 operate to establish Figure 41 The energy balancing circuit shown in (A) balances the energy between the battery pack P3 and the two parallel balancing capacitors (energy storage in the balancing capacitors). The lower-to-upper energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC2 and the upper-to-lower energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC3 operate to establish Figure 41 The power balancing circuit shown in (B) balances the power of the battery pack P2 and the two parallel balancing capacitors (balance capacitors release energy). Conversely, when the terminal voltage of the battery pack P2 is greater than the terminal voltage of the battery pack P3 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the lower-to-up synchronous control pin of the functional integrated circuit FIC2 to the upper-to-lower synchronous control pin of the functional integrated circuit FIC3, as shown in FIG. Figure 41 The switching network of the two functional integrated circuits FIC2 and FIC3 implements the power balance between P2 and P3. Figure 41 The energy balancing circuit shown in (B) balances the energy of the battery pack P2 and the two parallel balancing capacitors (balancing capacitor energy storage), and then establishes Figure 41 The charge balancing circuit shown in (A) balances the charge of the battery pack P3 and the two parallel balancing capacitors (balance capacitors release energy).

[0196] When the terminal voltage of the battery pack P2 is greater than the terminal voltage of the battery pack P1 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the up-to-down synchronous control pin of the functional integrated circuit FIC2 to the down-to-up synchronous control pin of the functional integrated circuit FIC1, such as Figure 42 As shown. According to the direction indicated by the control signal FOSC, the functional integrated circuits FIC1 and FIC2 work together to achieve the balance of power between the battery pack P2 and P1. First, the upper to lower power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC2 and the lower to upper power balancing circuit (switch S2 is open and switch S1 is on) of the switching network SNW of the functional integrated circuit FIC1 operate to establish Figure 42The energy balancing circuit shown in (A) balances the energy between the battery pack P2 and the two parallel balancing capacitors (energy storage in the balancing capacitors). The upper-to-lower energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC2 and the lower-to-upper energy balancing circuit (switch S1 is open and switch S2 is on) of the switching network SNW of the functional integrated circuit FIC1 operate to establish Figure 42 The power balancing circuit shown in (B) balances the power of the battery pack P1 and the two parallel balancing capacitors (balance capacitors release energy). Conversely, when the terminal voltage of the battery pack P1 is greater than the terminal voltage of the battery pack P2 by more than a preset value, the battery management system of the present invention initiates a corresponding measure to enable at least one functional integrated circuit FIC, and the direction of the control signal FOSC is transmitted from the lower-to-up synchronous control pin of the functional integrated circuit FIC1 to the upper-to-lower synchronous control pin of the functional integrated circuit FIC2, as shown in FIG. Figure 42 The switching network of the two functional integrated circuits FIC1 and FIC2 implements the upper and lower power balance, first establishing Figure 42 The energy balancing circuit shown in (B) balances the energy of the battery pack P1 and the two parallel balancing capacitors (balancing capacitor energy storage), and then establishes Figure 42 The charge balancing circuit shown in (A) balances the charge of the battery pack P2 and the two parallel balancing capacitors (balance capacitors release energy).

[0197] from Figures 33 to 42 In the illustrated embodiment, the battery pack string balancing circuit of the present invention utilizes the electrode connection between the two battery packs and at least one balancing pin connection between the two functional integrated circuits FIC to establish a power balancing loop, thereby achieving top-to-bottom power balancing and bottom-to-top power balancing between the two battery packs connected in series.

[0198] However, it should be understood that the various embodiments of the present invention are for illustrative purposes only. Various modifications may be made without departing from the scope and spirit of the present invention, and all modifications are intended to be encompassed by the claims. Therefore, the various embodiments described in this specification are not intended to limit the present invention. The true scope and spirit of the present invention are revealed in the claims.

Claims

1. A battery management integrated circuit, characterized in that: The battery management integrated circuit is used to connect at least one battery cell in parallel or to connect multiple battery cells in series in parallel to perform power management. The battery management integrated circuit includes: At least one circuit switch, the circuit switch being configured in a charging circuit or a discharging circuit of the at least one battery cell or a plurality of battery cells in series; at least one voltage detection circuit, measuring an open-circuit terminal voltage of each battery cell during a period in which the circuit switch cuts off the charging circuit or the discharging circuit; and A management unit defines the state of charge of each battery cell according to the open circuit terminal voltage of each battery cell.

2. A battery management integrated circuit, characterized in that: The battery management integrated circuit is used to connect at least one battery cell in parallel or to connect multiple battery cells in series in parallel to perform power management. The battery management integrated circuit includes: at least one voltage detection circuit for measuring the terminal voltage of the battery cells connected in parallel to the battery management integrated circuit; At least one temperature detection circuit, measuring the battery temperature of the battery cells connected in parallel to the battery management integrated circuit; at least one current detection circuit, measuring the charging current or discharging current of the battery cells connected in parallel to the battery management integrated circuit; as well as A calculation unit calculates an open-circuit terminal voltage and a battery internal resistance of the battery cell associated with the battery temperature based on the terminal voltage, the battery temperature, and the charging current or discharging current of each battery cell; wherein the battery management integrated circuit synchronously measures the terminal voltage, the battery temperature, and the charging current or discharging current, and the battery management integrated circuit defines the charge state of each battery cell based on the calculation of the open-circuit terminal voltage of each battery cell associated with the battery temperature.

3. A battery management system, characterized in that: A battery management system for managing the discharge of a plurality of battery cells to a terminal device or the charging of the terminal device, the battery management system comprising: A plurality of battery cells are charged or discharged in one of a series connection, a parallel connection, a series-parallel connection, and a parallel-serial connection; and at least one battery management integrated circuit as described in claim 1 or 2; wherein the battery management system provides an open-circuit voltage for each battery cell according to the battery management integrated circuit, and accordingly manages the power of the plurality of battery cells in the structure described above.

4. A battery management integrated circuit, characterized in that: The battery management integrated circuit is used to connect at least one battery cell in parallel or to connect multiple battery cells in series in parallel to perform power management. The battery management integrated circuit includes: At least one positive electrode pin and at least one negative electrode pin, respectively used to electrically connect to the positive electrode and negative electrode of the corresponding battery unit; At least one pair of detection pins for connecting in parallel to a temperature sensor of a corresponding battery cell; A balancing resistor and a parallel circuit switch connected in series are used to be connected in parallel to the at least one battery cell or multiple battery cells in series; and a circuit switch configured to be disposed in a charging circuit or a discharging circuit of the at least one battery cell or a plurality of battery cells in series; When the circuit switch cuts off the charging circuit or the discharging circuit, the battery management integrated circuit measures an open circuit terminal voltage of each battery cell associated with the battery temperature through the at least one pair of detection pins.

5. A battery management integrated circuit, characterized in that: The battery management integrated circuit is used to connect at least one battery cell in parallel or to connect multiple battery cells in series in parallel to perform power management. The battery management integrated circuit includes: At least one positive electrode pin and at least one negative electrode pin, respectively used to electrically connect to the positive electrode and negative electrode of the corresponding battery unit; At least one pair of detection pins for connecting in parallel to a temperature sensor of a corresponding battery cell; A balancing resistor and a parallel circuit switch connected in series are used to be connected in parallel to the at least one battery cell or multiple battery cells in series; and a control pin for electrically connecting to a circuit switch, the circuit switch being disposed in a charging circuit or a discharging circuit of the at least one battery cell or a plurality of battery cells connected in series, and the circuit switch being controlled by the control pin to cut off a charging current of the charging circuit or a discharging current of the discharging circuit; When the control pin controls the circuit switch to cut off the charging circuit or the discharging circuit, the battery management integrated circuit measures an open circuit terminal voltage of each battery cell associated with the battery temperature through the at least one pair of detection pins.

6. A method for calculating the internal resistance of a battery, characterized in that: Implemented in a battery management integrated circuit, the battery management integrated circuit is connected in parallel to at least one battery cell or is used to connect multiple battery cells in series in parallel for power management. The method for calculating the battery internal resistance includes: controlling a circuit switch to cut off the charging circuit or the discharging circuit of the battery cell, so that the battery management integrated circuit measures the open circuit terminal voltage of each battery cell; Controlling the circuit switch to cut off the charging circuit or the discharging circuit of the battery cell and controlling a parallel circuit switch to conduct a circuit connecting the at least one battery cell or a plurality of battery cells in series, so that the battery management integrated circuit synchronously measures each battery terminal voltage and a battery current; and A battery internal resistance of each battery cell is calculated according to the open-circuit terminal voltage, the battery terminal voltage, and the battery current of each battery cell.

7. A method for calculating the internal resistance of a battery, characterized in that: Implemented in a battery management integrated circuit, the battery management integrated circuit is connected in parallel to at least one battery cell or is used to connect multiple battery cells in series in parallel for power management. The method for calculating the battery internal resistance includes: Controlling a circuit switch to conduct a charging circuit or a discharging circuit of the battery cell and controlling a parallel circuit switch to disconnect a circuit connecting the at least one battery cell or a plurality of battery cells connected in series, so that the battery management integrated circuit synchronously measures each battery terminal voltage and a battery current; as well as A battery internal resistance of each battery cell is calculated according to the battery terminal voltage and the battery current measured twice synchronously for each battery cell.

8. A battery pack, characterized in that: Include: a positive electrode terminal and a negative electrode terminal; A first battery unit or a first battery pack having a first positive electrode and a first negative electrode; a second battery unit or a second battery pack having a second positive electrode and a second negative electrode; and a battery management integrated circuit; The battery management integrated circuit includes: a positive electrode pin, a first negative electrode pin, and a second negative electrode pin, the positive electrode pin is electrically connected to the first positive electrode, the second positive electrode, and the positive electrode terminal, the first negative electrode pin is electrically connected to the first negative electrode of the first battery cell or the first battery pack, and the second negative electrode pin is electrically connected to the second negative electrode of the second battery cell or the second battery pack; During the charging or discharging of the first battery cell or the first battery pack, the battery management integrated circuit cuts off the charging circuit or the discharging circuit of the second battery cell or the second battery pack, so that the battery management integrated circuit measures each open-circuit end voltage of the second battery cell or the second battery pack and defines the charge state of the second battery cell or the second battery pack accordingly.

9. The battery pack according to claim 8, wherein: During the period when the battery management integrated circuit controls a first circuit switch to turn on the charging circuit or the discharging circuit of the first battery cell or the first battery pack, the battery management integrated circuit controls a second circuit switch to cut off the charging circuit or the discharging circuit of the second battery cell or the second battery pack, and the first circuit switch is configured between the first negative electrode pin and the negative electrode terminal, and the second circuit switch is configured between the second negative electrode pin and the negative electrode terminal.

10. A battery management integrated circuit, characterized in that: Include: a positive pin, a first negative pin, and a second negative pin; The positive electrode pin is used to electrically connect a first positive electrode of a first battery cell or a first battery pack and a second positive electrode of a second battery cell or a second battery pack, the first negative electrode pin is used to electrically connect a first negative electrode of the first battery cell or the first battery pack, and the second negative electrode pin is used to electrically connect a second negative electrode of the second battery cell or the second battery pack; During the charging or discharging of the first battery cell or the first battery pack, the battery management integrated circuit cuts off the charging circuit or the discharging circuit of the second battery cell or the second battery pack, so that the battery management integrated circuit measures each open-circuit end voltage of the second battery cell or the second battery pack and defines the charge state of the second battery cell or the second battery pack accordingly.

11. A battery management system, characterized in that: Include: A plurality of battery packs configured to discharge from or charge a terminal device in a parallel-serial configuration, wherein each battery pack comprises a plurality of battery cells and a battery management integrated circuit, the plurality of battery cells being in a series configuration; During the charging or discharging period of each battery pack, the battery management integrated circuit receives an external instruction, and the external instruction causes the battery management integrated circuit to cut off a charging current during the charging period or a discharging current during the discharging period through a loop switch. During the period of cutting off the charging current or the discharging current, the battery management integrated circuit measures the open circuit terminal voltage of each battery cell and defines the charge state of each battery cell accordingly.

12. A battery pack, characterized in that: Include: a positive electrode terminal and a negative electrode terminal; A first battery unit or a first battery pack having a first positive electrode and a first negative electrode; a second battery unit or a second battery pack having a second positive electrode and a second negative electrode; and a battery management integrated circuit; The battery management integrated circuit includes: a first positive electrode pin, a first negative electrode pin, a second positive electrode pin and a second negative electrode pin, wherein the first positive electrode pin is electrically connected to the first positive electrode, the second positive electrode pin is electrically connected to the second positive electrode, the first negative electrode pin is electrically connected to the first negative electrode, and the second negative electrode pin is electrically connected to the second negative electrode; a first charge and discharge circuit is electrically connected between the positive electrode terminal and the first positive electrode pin; a second charge and discharge circuit is electrically connected between the positive electrode terminal and the second positive electrode pin; a first loop switch is electrically connected between the first negative electrode pin and the negative electrode terminal; and a second loop switch is electrically connected between the second negative electrode pin and the negative electrode terminal.

13. A battery pack, characterized in that: Include: At least one positive electrode terminal, a first negative electrode terminal and a second negative electrode terminal; A first battery unit or a first battery pack having a first positive electrode and a first negative electrode; a second battery unit or a second battery pack having a second positive electrode and a second negative electrode; and a battery management integrated circuit; The battery management integrated circuit includes: at least one positive electrode pin, a first negative electrode pin, and a second negative electrode pin, wherein the at least one positive electrode pin is electrically connected to one of the first positive electrode and the second positive electrode, the first negative electrode pin is electrically connected to the first negative electrode, and the second negative electrode pin is electrically connected to the second negative electrode; and a switching circuit that selectively switches the first negative electrode terminal and the second negative electrode terminal to be electrically connected to the first negative electrode and the second negative electrode to selectively cut off the charging path and the discharging path of the first and second battery cells or the first and second battery groups.

14. A battery management integrated circuit, characterized in that: For managing multiple battery cells to discharge from a terminal device or to charge from the terminal device, comprising: A plurality of electrode pins for connecting each battery cell corresponding to a battery pack in parallel, wherein the plurality of battery cells are connected in series to form the battery pack; A plurality of balancing capacitors connected in series, each balancing capacitor being used to balance adjacent battery cells; a switching network electrically connecting the plurality of electrode pins and the plurality of series balancing capacitors, and switching the electrode pins of adjacent battery cells to electrically connect to the corresponding series balancing capacitors in response to a corresponding measure; and A circuit switch is configured on a charging path and a discharging path of the battery pack, and the circuit switch can cut off the charging path and the discharging path to measure the state of charge of each battery cell.

15. The battery management integrated circuit according to claim 14, wherein: Also includes: a common pin for electrically connecting to a common pin of another battery management integrated circuit; and a parallel balancing capacitor for balancing multiple battery packs connected in parallel; The switching network selectively switches the parallel balancing capacitor to be electrically connected in parallel with the battery pack or at least one other battery pack in response to the corresponding measure.

16. A battery management system, characterized in that: Used to manage the charge and discharge of multiple battery packs, including: a plurality of battery packs connected in parallel to discharge or charge a terminal device, each battery pack comprising a plurality of battery cells connected in series; and Multiple battery management integrated circuits as claimed in claim 14 or 15, wherein the battery management integrated circuit implements a series power balancing function on multiple battery cells of a battery pack and / or implements a parallel power balancing function on multiple battery packs in response to the corresponding measures.

17. A functional integrated circuit, characterized in that: Used to manage the charge and discharge balance of multiple battery cells connected in series, including: A positive electrode pin and a negative electrode pin for connecting the positive electrode and the negative electrode of at least one battery cell or a plurality of battery cells connected in series in parallel; At least one upper-to-lower balancing pin, for electrically connecting at least one lower-to-upper balancing pin of a lower functional integrated circuit; At least one lower-to-up balanced pin, for electrically connecting at least one upper-to-lower balanced pin of an upper functional integrated circuit; as well as, a switching network for switching the positive pin and the negative pin to be electrically connected to the at least one lower-to-upper balancing pin, and switching the positive pin and the negative pin to be electrically connected to the at least one upper-to-lower balancing pin; A balancing capacitor is electrically connected between the switching network and the at least one lower-to-upper balancing pin; or a balancing capacitor is electrically connected between the switching network and the at least one upper-to-lower balancing pin; or a balancing capacitor is electrically connected between the at least one upper-to-lower balancing pin of the functional integrated circuit and the lower-to-upper balancing pin of the lower functional integrated circuit, and another balancing capacitor is electrically connected between the at least one lower-to-upper balancing pin of the functional integrated circuit and the upper-to-lower balancing pin of the upper functional integrated circuit. The pin configurations of the functional integrated circuit, the upper functional integrated circuit, and the lower functional integrated circuit are all the same.

18. A functional integrated circuit, characterized in that: Used to manage the charge and discharge balance of multiple battery cells connected in series, including: A positive electrode pin and a negative electrode pin for connecting the positive electrode and the negative electrode of at least one battery cell or a plurality of battery cells connected in series in parallel; At least one upper-to-lower balancing pin, for electrically connecting to a lower-to-upper balancing pin of a lower functional integrated circuit; At least one lower-to-up balanced pin for electrically connecting an upper-to-lower balanced pin of an upper functional integrated circuit; and a switching network for switching the positive pin and the negative pin to be electrically connected to a lower-to-upper contact, and switching the positive pin and the negative pin to be electrically connected to an upper-to-lower contact; A balancing capacitor is electrically connected between the lower-to-upper contact and the lower-to-upper balancing pin, and the upper-to-lower contact is electrically connected to the upper-to-lower balancing pin; or a balancing capacitor is electrically connected between the upper-to-lower contact and the upper-to-lower balancing pin, and the lower-to-upper contact is electrically connected to the lower-to-upper balancing pin; or a balancing capacitor is electrically connected between the upper-to-lower balancing pin and the lower-to-upper balancing pin of the lower functional integrated circuit, and another balancing capacitor is electrically connected between the lower-to-upper balancing pin and the upper-to-lower balancing pin of the upper functional integrated circuit, and the upper-to-lower contact is electrically connected to the upper-to-lower balancing pin, and the lower-to-upper contact is electrically connected to the lower-to-upper balancing pin. The pin configurations of the functional integrated circuit, the upper functional integrated circuit, and the lower functional integrated circuit are all the same.

19. A functional integrated circuit, characterized in that: Used to manage the charge and discharge balance of multiple battery cells connected in series, including: A positive electrode pin and a negative electrode pin for connecting the positive electrode and the negative electrode of at least one battery cell or a plurality of battery cells connected in series in parallel; At least one up-to-down balancing pin for electrically connecting to a pair of down-to-up balancing pins of a lower functional integrated circuit; A pair of lower-to-upper balanced pins for electrically connecting to at least one upper-to-lower balanced pin of an upper functional integrated circuit; as well as, a switching network for switching the positive pin and the negative pin to be electrically connected to the pair of lower and upper balancing pins, and switching the positive pin and the negative pin to be electrically connected to the at least one pair of upper and lower balancing pins; Wherein, a balancing capacitor is electrically connected between the pair of lower and upper balancing pins; The pin configurations of the functional integrated circuit, the upper functional integrated circuit, and the lower functional integrated circuit are all the same.

20. A battery management system, characterized in that: Include: A plurality of battery cells connected in series and a plurality of functional integrated circuits as described in claim 17, 18 or 19, each functional integrated circuit being used to connect in parallel at least one corresponding battery cell; wherein the battery management system enables at least one functional integrated circuit in response to a corresponding measure to manage the charge and discharge balance with adjacent battery cells connected in series.

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