Solar cell and preparation method thereof

Abstract

A preparation method of a solar cell comprises the steps that a monocrystalline silicon substrate is pretreated, the monocrystalline silicon substrate comprises a front face and a back face which are opposite to each other, and pretreatment comprises texturing treatment and formation of a tunneling oxide layer and a polycrystalline silicon layer on the back face in sequence; a buffer layer is formed on the phosphorus expansion surface of the monocrystalline silicon substrate, the buffer layer is undoped silica glass, one of the front surface and the surface, deviating from the monocrystalline silicon substrate, of the polycrystalline silicon layer is the phosphorus expansion surface, and the other one is the boron expansion surface; sequentially forming a phosphorus-doped silica glass layer and a first diffusion barrier layer on the buffer layer; boron diffusion is carried out on the boron diffusion surface, and the diffusion temperature is controlled to be 900-1100 DEG C; by arranging the buffer layer, the phosphorus-doped silica glass layer and the first diffusion barrier layer which are sequentially stacked on the phosphorus diffusion surface of the silicon substrate, boron-phosphorus co-diffusion can be completed at the same annealing temperature, and excessive phosphorus diffusion doping and excessive oxidation of a phosphorus-doped region at the high temperature of boron diffusion can be avoided. The invention also provides a solar cell.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic material manufacturing and processing, and more specifically, to a solar cell and a method for preparing the same. Background Art

[0002] With the rapid advancement of solar cell technology, the solar cell industry has entered the era of N-type cells. N-type cells are available in a variety of technologies, with the Tunnel Oxide Passivated Contact (TOPCon) cell currently the mainstream in the market. TOPCon cells utilize back-side tunneling passivation technology to effectively passivate the back side of the N-type silicon substrate, particularly improving the passivation level in the metal contact area. Combined with front-side aluminum oxide passivation, this has significantly improved the photovoltaic efficiency of mass-produced crystalline silicon solar cells. However, the preparation method for TOPCon cells involves both boron and phosphorus doping steps. Currently, TOPCon cell production typically involves two high-temperature doping steps: first, boron diffusion at temperatures of 900°C to 1100°C, followed by phosphorus diffusion at temperatures of 800°C to 900°C. Summary of the Invention

[0003] In view of this, the present application provides a method for preparing a solar cell, comprising: Pre-processing a single crystal silicon substrate, wherein the single crystal silicon substrate includes a front surface and a back surface opposite to each other, wherein the pre-processing includes texturing the single crystal silicon substrate and forming a tunneling oxide layer and a polysilicon layer stacked in sequence on the back surface of the single crystal silicon substrate; forming a buffer layer on the phosphorus-expanded surface of the single crystal silicon substrate, wherein the buffer layer is undoped silicon glass, and one of the front surface and the surface of the polysilicon layer facing away from the single crystal silicon substrate is the phosphorus-expanded surface, and the other is the boron-expanded surface; forming a phosphorus-doped silicate glass layer and a first diffusion barrier layer in sequence on the buffer layer, wherein the first diffusion barrier layer is undoped silicate glass; and Boron diffusion is performed on the boron diffusion surface, and the diffusion temperature is controlled to be 900°C-1100°C. Alternatively, a boron-doped silicon glass layer and a second diffusion barrier layer are sequentially formed on the boron diffusion surface and then annealed, wherein the second diffusion barrier layer is undoped silicon glass and the annealing temperature is 900°C-1100°C.

[0004] The solar cell fabrication method disclosed herein utilizes a sequentially stacked buffer layer, a phosphorus-doped silicon glass layer (phosphorus source layer), and a first diffusion barrier layer on the phosphorus diffusion surface of a single-crystal silicon substrate. This allows for simultaneous boron and phosphorus co-diffusion at the same annealing temperature. The buffer layer and first diffusion barrier layer prevent excessive phosphorus doping during boron diffusion at high temperatures, as well as excessive oxidation of the phosphorus-doped region during boron diffusion and oxidation of the boron-rich layer. Furthermore, both the buffer layer and the first diffusion barrier layer are fabricated using atmospheric pressure chemical vapor deposition (APC) silicon oxide, resulting in a fast deposition rate, adjustable film thickness, and no wraparound plating.

[0005] Furthermore, the step of forming a buffer layer on the phosphorus surface of the single crystal silicon substrate is implemented using atmospheric pressure chemical vapor deposition equipment, and a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment, the silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and ethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

[0006] Furthermore, the buffer layer has a thickness of 20 nm-50 nm.

[0007] Furthermore, the step of forming a phosphorus-doped silicon glass layer on the buffer layer is implemented using atmospheric pressure chemical vapor deposition equipment, and a phosphorus source, a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment, the phosphorus source is at least one of PH3, trishydroxymethylphosphine oxide, trimethyl phosphate, and tributyl phosphate, the silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and tetraethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

[0008] Furthermore, the step of forming a first diffusion barrier layer on the buffer layer is implemented using atmospheric pressure chemical vapor deposition equipment, and a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment, the silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and ethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

[0009] Furthermore, the thickness of the phosphorus-doped silicate glass layer is 30 nm-50 nm, and the thickness of the first diffusion barrier layer is 20 nm-30 nm.

[0010] Furthermore, the step of diffusing boron on the boron expansion surface is carried out using a diffusion furnace, into which a boron source, nitrogen and oxygen are introduced.

[0011] Furthermore, the step of forming a boron-doped silicon glass layer on the boron expansion surface is implemented using atmospheric pressure chemical vapor deposition equipment, and a boron source, a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment. The boron source is at least one of B2H6, BCl3, BBr3, trimethylboron and triethyl borate, the silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4 and ethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

[0012] Furthermore, the thickness of the boron-doped silicate glass layer is 50 nm-70 nm; the thickness of the second diffusion barrier layer is 50 nm-60 nm.

[0013] Furthermore, after the boron diffusion is completed, the preparation method further comprises: forming a front passivation film and an anti-reflection film in sequence on the side of the single crystal silicon substrate where the front surface is located; forming a back passivation film on the back side of the single crystal silicon substrate; and An electrode is formed on the single crystal silicon substrate.

[0014] The present application also provides a solar cell, which is manufactured using the above-mentioned manufacturing method. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a flow chart of a method for preparing a solar cell according to an embodiment of the present application.

[0016] Figure 2 The cross-sectional view of each step of the method for preparing a solar cell according to an embodiment of the present application is shown in FIG. Figure 1 .

[0017] Figure 3 The cross-sectional view of each step of the method for preparing a solar cell according to an embodiment of the present application is shown in FIG. Figure 2 .

[0018] Figure 4 FIG. 1 is a schematic diagram of a low pressure chemical vapor deposition apparatus according to an embodiment of the present application.

[0019] Figure 5 FIG. 1 is a cross-sectional schematic diagram of a solar cell according to an embodiment of the present application.

[0020] Description of main component symbols: Solar cell 100, single crystal silicon substrate 10, front surface 11, back surface 12, tunnel oxide layer 121, polysilicon layer 122, Buffer layer 123, PSG layer 124, first diffusion barrier layer 125, second diffusion barrier layer 112, BSG layer 111, APCVD equipment 200, chain transport platform 210, first USG deposition chamber 221, PSG deposition chamber 222, The second USG deposition chamber 223, the BSG deposition chamber 224, the third USG deposition chamber 225, the P-type emitter 20, Front passivation film 30, anti-reflection film 40, doped polysilicon layer 60, back passivation film 70, front electrode 81, Back electrode 82. DETAILED DESCRIPTION

[0021] The present application provides a method for preparing a passivated contact solar cell, which achieves the simultaneous co-diffusion of boron and phosphorus at the same temperature, and prepares a buffer layer and a diffusion barrier layer on the phosphorus diffusion area to prevent excessive phosphorus diffusion doping at the high temperature of boron diffusion, and excessive oxidation of the phosphorus-doped area when boron diffusion oxidizes the boron-rich layer. The buffer layer and the diffusion barrier layer are both formed by depositing silicon oxide using atmospheric pressure chemical vapor deposition (APCVD). The deposition rate is fast and the film thickness can be adjusted arbitrarily. The thin film formed by APCVD technology is characterized by no wrap-around plating. Wrap-around plating is the growth of a film of a certain thickness on the non-coated surface.

[0022] See also Figure 1 , which is a flow chart of a method for preparing a solar cell according to a specific embodiment of the present invention. It should be noted that the method for preparing a solar cell according to the present invention is not limited to the order of the following steps. In other embodiments, the method for preparing a solar cell according to this embodiment may include only a portion of the following steps, or some of the steps may be omitted.

[0023] The following combination Figure 1 The steps of the process are described in detail for the preparation method of the solar cell provided by the specific embodiment of the present invention. The preparation method of the solar cell includes the following steps S1 to S7.

[0024] S1: Pre-treating the single crystal silicon substrate.

[0025] In the embodiment of the present application, the pretreatment includes texturing the single crystal silicon substrate, and forming a tunneling oxide layer and a polysilicon layer stacked in sequence on a surface of the single crystal silicon substrate.

[0026] In the embodiments of the present application, the single crystal silicon substrate is an N-type single crystal silicon substrate doped with an N-type dopant element. The N-type dopant element may be at least one of Group V elements, such as phosphorus (P), bismuth (Bi), antimony (Sb), and arsenic (As). In other embodiments, the single crystal silicon substrate may also be a P-type single crystal silicon substrate doped with a P-type dopant element.

[0027] A single crystal silicon substrate includes a front surface, a back surface opposite the front surface, and side surfaces connecting the front and back surfaces. The texturing process can be performed on only the front surface or on both the front and back surfaces of the single crystal silicon substrate. For example, the single crystal silicon substrate is placed in an alkaline solution for surface etching to form a pyramid-shaped textured surface. The silicon substrate is then cleaned with alkali and hydrogen peroxide, and then rinsed clean with HF and HCl.

[0028] The purpose of texturing is to remove the mechanical damage layer on the surface of the single-crystal silicon substrate, remove surface oil, foreign particles, and metallic impurities, and form an undulating velvet surface structure. This increases the surface area of the single-crystal silicon substrate and creates a light-trapping structure that increases sunlight absorption and reduces reflection. In some embodiments, the reflectivity of the front surface of the single-crystal silicon substrate after texturing is less than 11%.

[0029] In the embodiment of this application, Figure 2 As shown, the texturing process is performed only on the front surface 11 of the single-crystal silicon substrate 10, forming a pyramid-shaped textured surface. A tunneling oxide layer (silicon oxide layer) 121 and a polysilicon layer 122 are stacked, sequentially formed from the inside out, on the back surface 12 of the single-crystal silicon substrate 10. Tunneling oxide layer 121 and polysilicon layer 122 can be formed using APCVD technology or other CVD technologies.

[0030] S2: If Figure 2 As shown, a buffer layer is formed on the phosphorus surface of the single crystal silicon substrate 10, and the buffer layer is undoped silicate glass (USG).

[0031] One of the side where the front surface 11 of the single crystal silicon substrate 10 is located and the side where the back surface 12 is located will subsequently undergo phosphorus diffusion, and the other will subsequently undergo boron diffusion. In some embodiments, specifically, one of the surfaces of the front surface 11 and the polysilicon layer 122 facing away from the single crystal silicon substrate 10 is the surface where phosphorus diffusion will be performed later, referred to as a phosphorus diffusion surface, and the other of the surfaces of the front surface 11 and the polysilicon layer 122 facing away from the single crystal silicon substrate 10 is the surface where boron diffusion will be performed later, referred to as a boron diffusion surface. In the embodiment of the present application, the phosphorus diffusion surface is located on the side where the back surface 12 of the silicon substrate 10 is located, and the boron diffusion surface is located on the side where the front surface 11 of the silicon substrate 10 is located. Figure 2 As shown, a buffer layer 123 is formed on the polysilicon layer 122 of the back side 12 .

[0032] The function of the buffer layer 123 is to delay the diffusion of phosphorus into the silicon substrate during subsequent high-temperature annealing and to delay the inward diffusion of oxygen during high-temperature annealing to reduce oxidation of the silicon substrate.

[0033] In some embodiments, a buffer layer 123 is formed on the phosphorus surface of the single crystal silicon substrate 10 using CVD technology. In some embodiments, the buffer layer 123 is formed using APCVD technology. This involves using atmospheric pressure chemical vapor deposition (APCVD) equipment to form the buffer layer 123, using a silicon source and an oxygen source to react and form silicon oxide. The silicon source can be at least one of gaseous SiH₄, SiH₂Cl₂, SiHCl₃, SiCl₄, or liquid tetraethyl orthosilicate (TEOS). The oxygen source can be at least one of O₂ and ozone. The buffer layer thickness is 20-50 nm. In some embodiments, SiH₄ and O₂ are used, with a SiH₄ flow rate of 100-300 sccm and an O₂ flow rate of 500-100 sccm. The ambient temperature is controlled at 400°C-500°C. In other embodiments, the buffer layer 123 is formed using APCVD technology using at least one of O₂ and ozone and tetraethyl orthosilicate.

[0034] Therefore, subsequent phosphorus diffusion must pass through the buffer layer (USG layer) 123 before it can diffuse into the silicon substrate 10. Furthermore, the diffusion coefficient of phosphorus in the buffer layer (USG layer) 123 is much lower than that in the silicon substrate 10. S3: A phosphorus-doped silicon glass (PSG) layer and a diffusion barrier layer are sequentially formed on the phosphorus diffusion surface.

[0035] like Figure 2 As shown, in the embodiment of the present application, a PSG layer 124 and a first diffusion barrier layer 125 are sequentially deposited on the buffer layer 123 of the back surface (phosphorus diffusion surface) 12 .

[0036] The purpose of forming the PSG layer 124 on the phosphorus surface is to form a phosphorus source layer on the phosphorus surface, thereby introducing phosphorus atoms onto the silicon substrate 10. In some embodiments, the PSG layer 124 can be formed on the phosphorus surface using APCVD technology, i.e., using atmospheric pressure chemical vapor deposition equipment to form the PSG layer 124, using a phosphorus source, a silicon source, and an oxygen source. The phosphorus source can be at least one of gaseous PH3, liquid trishydroxymethylphosphine oxide (TMOP), liquid trimethyl phosphate (TMP), and liquid tributyl phosphate (TBP). The silicon source can be at least one of gaseous SiH4, SiH2Cl2, SiHCl3, SiCl4, or liquid tetraethyl orthosilicate (TEOS). The oxygen source can be at least one of O2 and ozone. In some embodiments, PH3, SiH4, and O2 are used, with a PH3 flow rate of 20 sccm-50 sccm, a SiH4 flow rate of 100 sccm-300 sccm, and an O2 flow rate of 500 sccm-1000 sccm, and the ambient temperature is controlled at 400° C.-500° C. In some embodiments, the thickness of the PSG layer 124 is 30 nm-50 nm, for example, 30 nm, 35 nm, 40 nm, 45 nm, or 50 nm.

[0037] In the embodiment of the present application, the first diffusion barrier layer 125 is a USG layer, which can be deposited on the surface of the PSG layer 124 using APCVD technology. This involves using atmospheric pressure chemical vapor deposition (APCVD) equipment to form the diffusion barrier layer 125 by reacting a silicon source and an oxygen source to produce silicon oxide. The silicon source can be at least one of gaseous SiH₄, SiH₂Cl₂, SiHCl₃, SiCl₄, or liquid tetraethyl orthosilicate (TEOS). The oxygen source can be at least one of O₂ and ozone. In some embodiments, the thickness of the first diffusion barrier layer 125 is between 30 nm and 100 nm, for example, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, or 100 nm.

[0038] The first diffusion barrier layer 125 is formed on the PSG layer 124 to prevent the phosphorus source from diffusing to the outside during high-temperature processes, thereby preventing the loss of phosphorus source from affecting the doping of the silicon substrate. The first diffusion barrier layer 125 can also control the doping concentration and doping depth of phosphorus, thereby providing protection and passivation to prevent the silicon surface from being oxidized. S4: Boron diffusion is performed.

[0039] Boron diffusion is a conventional boron diffusion process performed in a diffusion furnace (e.g., a tubular diffusion furnace). During the boron diffusion process, the phosphorus diffusion surface is annealed, causing the phosphorus source to diffuse toward the silicon substrate.

[0040] In some embodiments, after the boron diffusion step, boron is diffused into the front side of the silicon substrate, thereby forming a boron diffusion layer on the front side. A phosphorus source is diffused into the polysilicon layer on the back side of the silicon substrate, forming a phosphorus-doped polysilicon layer. Boron diffusion can be performed using a boron source, nitrogen, and oxygen. The boron source is at least one of gaseous B2H6, BCl3, BBr3, and trimethylboron (TMB). The boron diffusion is controlled in an ambient temperature of 900°C to 1100°C.

[0041] In this way, during the high-temperature oxidation advancement phase of boron diffusion, the buffer layer effectively slows the diffusion of phosphorus into the silicon substrate, preventing excessive phosphorus intrusion, and slows the diffusion of oxygen, reducing oxidation of the silicon substrate. The diffusion barrier layer also prevents the diffusion of phosphorus sources from externally diffusing and affecting the doping of the silicon substrate. If the buffer layer (USG layer) 123 is too thick, subsequent phosphorus diffusion will have difficulty penetrating the buffer layer (USG layer) 123, resulting in insufficient phosphorus surface doping of the silicon substrate 10. If the buffer layer (USG layer) 123 is too thin, subsequent phosphorus diffusion will easily penetrate the buffer layer (USG layer) 123, resulting in excessive phosphorus surface doping of the silicon substrate 10. Therefore, the thickness of the buffer layer (USG layer) 123 is critical. In step S2, the thickness of the deposited buffer layer (USG layer) 123 is preferably 20 nm to 50 nm.

[0042] Step S4 is not limited to boron diffusion. In other embodiments, for example, Figure 3 As shown, step S4 includes: sequentially depositing a boron-doped silicon glass (BSG) layer 111 and a second diffusion barrier layer 112 on the boron diffusion surface.

[0043] After step S4, high temperature annealing is performed, and the annealing temperature is controlled to be 900°C-1100°C.

[0044] The purpose of forming the BSG layer 111 by boron diffusion is to form a boron source layer on the boron diffusion surface. In other embodiments, the BSG layer 111 can be formed on the boron diffusion surface using APCVD technology, i.e., using atmospheric pressure chemical vapor deposition equipment to form the BSG layer 111, using a boron source, a silicon source, and an oxygen source. The boron source can be at least one of gaseous B2H6, BCl3, BBr3, trimethylboron (TMB), or liquid triethyl borate (TEB). The silicon source can be at least one of gaseous SiH4, SiH2Cl2, SiHCl3, SiCl4, or liquid tetraethyl orthosilicate (TEOS). The oxygen source can be at least one of O2 and ozone. The thickness of the BSG layer 111 is 50nm-70nm.

[0045] In this embodiment, second diffusion barrier layer 112 is a USG layer, which can be deposited on the surface of BSG layer 111 using APCVD technology. Boron diffusion deposition of second diffusion barrier layer 112 is intended to prevent the loss of boron source due to outward diffusion during subsequent high-temperature annealing, which could affect silicon substrate doping, and outward diffusion of phosphorus. The thickness of second diffusion barrier layer 112 is 50nm-60nm.

[0046] High-temperature annealing is performed to simultaneously diffuse and dope the boron source for boron expansion and the phosphorus source for phosphorus expansion into the silicon substrate, thereby completing the process. In the embodiment of the present application, the maximum annealing temperature is based on the temperature required for boron doping (900°C-1100°C), which is higher than the temperature required for traditional phosphorus diffusion doping (800°C-900°C). In addition, during the high-temperature annealing process, oxygen is required for oxidation (for example, an oxygen flow rate of 300sccm-3000sccm). When the boron oxide diffuses to form a boron-rich layer in the silicon substrate, the buffer layer 123 can inhibit the diffusion of phosphorus oxide on the surface of the silicon substrate from excessive phosphorus doping.

[0047] The above steps S2 to S4 can all be performed in APCVD equipment. Figure 4 The APCVD device 200 is a chain-type online transport deposition system, comprising a chain-type transport platform 210 and a plurality of process chambers arranged in sequence on the chain-type transport platform 210. The plurality of process chambers comprises a first USG deposition chamber 221, a PSG deposition chamber 222, a second USG deposition chamber 223, a BSG deposition chamber 224, and a third USG deposition chamber 225, which are arranged in sequence. A buffer layer 123 is deposited on a silicon substrate in the first USG deposition chamber 221, a PSG layer 124 is deposited in the PSG deposition chamber 222, a diffusion barrier layer 125 is deposited in the second USG deposition chamber 223, a BSG layer 111 is deposited in the BSG deposition chamber 224, and a diffusion barrier layer 112 is deposited in the third USG deposition chamber 225.

[0048] It is understandable that the order of steps S2, S3 and S4 can be interchanged, that is, step S4 can be completed first, and then steps S2 and S3 are completed. The obtained semi-finished product is subjected to high-temperature annealing, and the annealing temperature is controlled at 900°C-1100°C, which has the same effect.

[0049] In addition, the APCVD equipment can be provided with a preheating chamber in the loading area of the silicon substrate, a cooling and unloading chamber in the unloading area, a nitrogen isolation chamber connecting each process chamber, and a flipping device (not shown) is provided after the second USG deposition chamber 223, which can flip the silicon substrate.

[0050] It is understood that after the boron-phosphorus co-diffusion is completed, other process steps may be performed on the silicon substrate to complete the preparation of the solar cell, for example, including: S5: depositing a front passivation film and an anti-reflection film in sequence on the side of the single crystal silicon substrate where the front surface is located.

[0051] In step S5, in some embodiments, a front passivation film is first deposited on the front surface using atomic layer deposition (ALD). The front passivation film is made of aluminum oxide and has a thickness of 5nm-7nm. A large amount of fixed negative charge is generated at the interface between the aluminum oxide and the P-type emitter, which provides a strong field passivation effect.

[0052] In step S5, in some embodiments, the anti-reflection film is deposited by plasma enhanced chemical vapor deposition (PECVD) technology. The material of the anti-reflection film can be SiN x 、SiON x and SiO x The anti-reflection film provides anti-reflection and passivation effects, and also protects against photovoltaic induced degradation (PID) and UV radiation.

[0053] S6: depositing a back passivation film on the back side of the single crystal silicon substrate.

[0054] In step S6, in some embodiments, SiN is deposited on the back side using PECVD technology. x The back passivation film of the material has a thickness of 70nm-100nm and a comprehensive refractive index of 1.9-2.1. This step S6 provides hydrogen passivation on the back side and helps to increase the light reflection of the back side transmitted light, which is beneficial to the re-absorption of the transmitted light.

[0055] In some embodiments, when the front anti-reflection film in step S5 and the back passivation film in step S6 are both SiN x The anti-reflection film on the front surface in step S5 and the passivation film on the back surface in step S6 can be completed in the same process.

[0056] S7: forming electrodes on the single crystal silicon substrate.

[0057] Step S7 includes forming electrodes on both the front side and the back side of the single crystal silicon. In some embodiments, step S7 includes printing a conductive metal paste on both the front anti-reflection film and the back passivation film, and solidifying the conductive metal paste by sintering to form metal electrodes, so that metal atoms in the conductive metal paste contact the silicon substrate.

[0058] It is understood that the conductive metal paste can be solidified by sintering to form a metal electrode bonded to the silicon substrate. The conductive metal paste is printed on the anti-reflection layer. During the sintering process, the metal atoms in the conductive metal paste will pass through the passivation layer and the anti-reflection layer and contact the silicon substrate. The conductive metal paste can be silver paste, copper paste, etc., but is not limited to this. In some embodiments, the conductive metal paste contains a mixture of multiple conductive metals. The conductive metal paste can be printed by screen printing or laser pattern transfer, etc., but is not limited to this.

[0059] Sintering can be performed in a sintering furnace. Generally, the front electrode requires a higher sintering temperature than the back electrode. In this step, the sintering furnace temperature is set to the required sintering temperature for the back electrode, so that the back electrode is completely sintered while the front electrode is not. Therefore, auxiliary sintering is required using the LECO technology in the subsequent step.

[0060] In some embodiments, screen printing technology is used to form an N+ electrode on the back side of a single-crystal silicon substrate using a conductive metal paste, and a P+ electrode is formed on the front side. Laser-enhanced contact optimization (LECO) is then used to sinter the front-side electrode of the silicon substrate. Using LECO, the silicon substrate is processed by scanning the electrode region on the surface of the silicon substrate with a laser while maintaining a reverse bias voltage on the single-crystal silicon substrate.

[0061] In some embodiments, the laser power is 30W-50W, and the reverse bias voltage is 10V-20V. Step S8 enables the electrodes to form good ohmic contacts on the front and back surfaces. The addition of LECO technology not only further reduces the contact resistance on the back surface, but also improves the passivation effect of the metal area.

[0062] LECO technology uses high-intensity laser irradiation on the cell to stimulate charge carriers, while simultaneously applying a reverse bias voltage of 10V or more to the cell to generate a local current of several amperes. This in turn causes sintering at the laser-irradiated location on the cell, triggering interdiffusion between the metal conductive paste and silicon. LECO technology assists in the sintering of the conductive metal paste, causing it to solidify and form a metal electrode. Through the laser-assisted sintering of the conductive metal paste, LECO technology can directly form a low-resistance ohmic contact between metal and silicon without damaging the silicon substrate passivation layer, thereby reducing the contact resistance between the metal gate line and silicon without the need for additional doping steps.

[0063] The present application also provides a solar cell prepared by the above preparation method, which is a TOPCon cell. Figure 5As shown, the solar cell 100 includes a single crystal silicon substrate 10 , which includes a front surface 11 and a back surface 12 opposite to each other, and the front surface 11 is a pyramid-shaped velvet surface.

[0064] like Figure 5 As shown, the solar cell 100 further includes a P-type emitter 20, a front passivation film 30, and an anti-reflection film 40 sequentially stacked on the front surface 11. The solar cell 100 further includes a tunneling oxide layer 121, a doped polysilicon layer 60, and a back passivation film 70 sequentially stacked on the back surface 12. The P-type emitter 20 may be a boron diffusion layer formed by doping boron into the single crystal silicon substrate 10. The doped polysilicon layer 60 may be formed by doping a phosphorus source into the polysilicon layer 122.

[0065] like Figure 5 As shown, the solar cell 100 also includes a front electrode 81 and a back electrode 82. The front electrode 81 is located on the anti-reflection film 40 on the front surface 11 and passes through the front passivation film 30 and the anti-reflection film 40 to form an ohmic contact with the P-type emitter 20. The back electrode 82 is located on the back passivation film 70 on the back surface 12 and passes through the back passivation film 70 to form an ohmic contact with the doped polysilicon layer 60.

[0066] The solar cell preparation method of the present application provides a buffer layer, a phosphorus-doped silicon glass (phosphorus source layer), and a diffusion barrier layer stacked in sequence on the phosphorus diffusion surface of a single-crystal silicon substrate, so that boron and phosphorus co-diffusion can be completed simultaneously at the same annealing temperature (boron diffusion temperature). The provision of the buffer layer and the diffusion barrier layer can avoid excessive phosphorus diffusion doping at the high temperature of boron diffusion, and excessive oxidation of the phosphorus-doped area when boron diffusion oxidizes the boron-rich layer.

[0067] The above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that modifications or equivalent replacements of the technical solutions of the present application should not depart from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for preparing a solar cell, characterized in that: include: Pre-processing a single crystal silicon substrate, wherein the single crystal silicon substrate includes a front surface and a back surface opposite to each other, wherein the pre-processing includes texturing the single crystal silicon substrate and forming a tunneling oxide layer and a polysilicon layer stacked in sequence on the back surface of the single crystal silicon substrate; forming a buffer layer on the phosphorus-expanded surface of the single crystal silicon substrate, wherein the buffer layer is undoped silicon glass, and one of the front surface and the surface of the polysilicon layer facing away from the single crystal silicon substrate is the phosphorus-expanded surface, and the other is the boron-expanded surface; forming a phosphorus-doped silicate glass layer and a first diffusion barrier layer in sequence on the buffer layer, wherein the first diffusion barrier layer comprises undoped silicate glass; as well as Performing boron diffusion on the boron diffusion surface, controlling the diffusion temperature to be 900° C.-1100° C., or forming a boron-doped silica glass layer and a second diffusion barrier layer stacked in sequence on the boron diffusion surface, wherein the second diffusion barrier layer is undoped silica glass; Annealing treatment, the annealing temperature is 900℃-1100℃.

2. The method for preparing a solar cell according to claim 1, wherein: The step of forming a buffer layer on the phosphorus surface of the single crystal silicon substrate is implemented using atmospheric pressure chemical vapor deposition equipment, and a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment. The silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and ethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

3. The method for preparing a solar cell according to claim 1, wherein: The thickness of the buffer layer is 20 nm-50 nm.

4. The method for preparing a solar cell according to claim 1, wherein: The step of forming a phosphorus-doped silicon glass layer on the buffer layer is implemented using atmospheric pressure chemical vapor deposition equipment, and a phosphorus source, a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment. The phosphorus source is at least one of PH3, trishydroxymethylphosphine oxide, trimethyl phosphate, and tributyl phosphate. The silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and tetraethyl orthosilicate. The oxygen source is at least one of O2 and ozone.

5. The method for preparing a solar cell according to claim 1, wherein: The step of forming a first diffusion barrier layer on the buffer layer is implemented using atmospheric pressure chemical vapor deposition equipment, and a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment. The silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4, and ethyl orthosilicate, and the oxygen source is at least one of O2 and ozone.

6. The method for preparing a solar cell according to claim 1, wherein: The thickness of the phosphorus-doped silicate glass layer is 30 nm to 50 nm, and the thickness of the first diffusion barrier layer is 20 nm to 30 nm.

7. The method for preparing a solar cell according to claim 1, wherein: The step of diffusing boron on the boron expansion surface is carried out using a diffusion furnace, into which a boron source, nitrogen and oxygen are introduced.

8. The method for preparing a solar cell according to claim 1, wherein: The step of forming a boron-doped silicon glass layer on the boron expansion surface is implemented using atmospheric pressure chemical vapor deposition equipment, and a boron source, a silicon source and an oxygen source are introduced into the atmospheric pressure chemical vapor deposition equipment. The boron source is at least one of B2H6, BCl3, BBr3, trimethylboron and triethyl borate; the silicon source is at least one of SiH4, SiH2Cl2, SiHCl3, SiCl4 and ethyl orthosilicate; and the oxygen source is at least one of O2 and ozone.

9. The method for preparing a solar cell according to claim 8, wherein: The thickness of the boron-doped silicate glass layer is 50 nm to 70 nm; the thickness of the second diffusion barrier layer is 50 nm to 60 nm.

10. The method for preparing a solar cell according to claim 1, wherein: After completing the boron diffusion in the boron expansion process, the preparation method further comprises: forming a front passivation film and an anti-reflection film in sequence on the side of the single crystal silicon substrate where the front surface is located; forming a back passivation film on the back side of the single crystal silicon substrate; and An electrode is formed on the single crystal silicon substrate.

11. A solar cell, characterized in that: It is prepared by the preparation method according to any one of claims 1 to 10.

Images