Solar cell and photovoltaic module

Abstract

The embodiment of the present application relates to the field of photovoltaics, and provides a solar cell and a photovoltaic module, the solar cell comprising: a substrate having a first surface and a second surface opposite along a first direction; a dielectric layer on at least one of the first surface and the second surface, the dielectric layer comprising a plurality of pores, and at least a part of the pores penetrating through the dielectric layer along the first direction; a doped layer on a side of the dielectric layer away from the substrate; wherein a transmission path of a carrier along the first direction via the substrate, the dielectric layer and the doped layer is a reference transmission path, and a transmission resistance corresponding to the reference transmission path in at least a part of the solar cell increases with an increase of a temperature at which the solar cell is located. The embodiment of the present application is at least beneficial to enable the carrier to have a higher transmission efficiency at a lower temperature, and is beneficial to reduce a risk of thermal runaway of the solar cell by means of a characteristic that the transmission efficiency of the carrier is inhibited at a higher temperature.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photovoltaics, and in particular to a solar cell and a photovoltaic module. BACKGROUND

[0002] Solar cells are increasingly used as a sustainable clean energy source. A solar cell is a device that uses the photovoltaic principle to generate carriers to convert the light energy of the sun into electrical energy. Grid lines are usually used in solar cells to extract carriers, so that the electrical energy can be effectively utilized. The mainstream types of current solar cells include Back Contact (BC) cells, Tunnel Oxide Passivated Contact (TOPCON) cells, Passivated emitter and real cell (PERC) cells, and heterojunction cells.

[0003] However, in the passivation contact structure containing a tunnel layer in the current solar cell, the transport mechanism of the carriers in the tunnel layer is mainly quantum tunneling transport, so the thickness and uniformity of the tunnel layer are required to be extremely high when the tunnel layer is prepared, which has great challenges to the process and equipment. SUMMARY

[0004] The embodiments of the present application provide a solar cell and a photovoltaic module, which at least have the advantages of enabling carriers to have a high transport efficiency at a low temperature, and reducing the risk of thermal runaway of the solar cell by taking advantage of the characteristic that the transport efficiency of the carriers is inhibited at a high temperature.

[0005] According to some embodiments of the present application, the embodiments of the present application provide a solar cell, comprising: a substrate, the substrate having a first surface and a second surface opposite along a first direction; a dielectric layer located on at least one of the first surface and the second surface, the dielectric layer comprising a plurality of pores, at least a portion of the pores penetrating through the dielectric layer along the first direction; a doped layer located on a side of the dielectric layer away from the substrate; wherein a transport path of carriers along the first direction through the substrate, the dielectric layer and the doped layer is a reference transport path, and the transport resistance corresponding to the reference transport path in at least a portion of the solar cell increases with the increase of the temperature of the solar cell.

[0006] In some embodiments, the medium layer includes a first medium layer, and the doped layer includes a first doped layer located on a side of the first medium layer away from the substrate; the first doped layer and the substrate have doped elements of different conductive types; and the carrier transport path in the substrate, the first medium layer, and the first doped layer in the first direction is one of the reference transport paths.

[0007] In some embodiments, the medium layer includes a second medium layer, and the doped layer includes a second doped layer located on a side of the second medium layer away from the substrate; the second doped layer and the substrate have doped elements of the same conductive type; and the carrier transport path in the substrate, the second medium layer, and the second doped layer in the first direction is one of the reference transport paths.

[0008] In some embodiments, at least one of the first side and the second side of the substrate has first regions and second regions arranged alternately in a second direction; the second medium layer and the second doped layer are located in the first regions; or, the second medium layer and the second doped layer are located in both the first regions and the second regions.

[0009] In some embodiments, a diffusion layer is further provided between the substrate and the medium layer, and the diffusion layer and the doped layer have doped elements of the same conductive type.

[0010] In some embodiments, a doping concentration of the doped elements in the diffusion layer is 1×10 18 atom / cm 3 ~1×10 19 atom / cm 3 .

[0011] In some embodiments, the first side or the second side is a back side having first field regions and second field regions arranged alternately in the second direction; wherein the medium layer includes a third medium layer located on the first field regions, the doped layer includes a third doped layer located on the first field regions, the third doped layer and the substrate have doped elements of the same conductive type, and the carrier transport path in the substrate, the third medium layer, and the third doped layer in the first direction is one of the reference transport paths; and / or, the medium layer includes a fourth medium layer located on the second field regions, the doped layer includes a fourth doped layer located on the second field regions, the fourth doped layer and the substrate have doped elements of different conductive types, and the carrier transport path in the substrate, the fourth medium layer, and the fourth doped layer in the first direction is one of the reference transport paths.

[0012] In some embodiments, an isolation region is arranged between the first field region and the second field region.

[0013] In some embodiments, the material of the medium layer comprises one or more of silicon oxide, silicon carbide, silicon nitride, silicon oxynitride; and / or, the material of the medium layer comprises one or more of amorphous silicon, microcrystalline silicon, nanocrystalline silicon.

[0014] In some embodiments, the pores in the medium layer are formed via a heat treatment, a process temperature of the heat treatment is 800-1100℃, and a processing time of the heat treatment is 20-60min.

[0015] In some embodiments, the medium layer comprises first portions and second portions arranged alternately and irregularly in a direction perpendicular to the first direction, the pores are located in the first portions, and a current density in the first portions is greater than a current density in the second portions.

[0016] In some embodiments, a ratio of the current density in the first portions to the current density in the second portions is greater than or equal to 10.

[0017] In some embodiments, an arrangement density of the pores in the medium layer is 1x10 6 cm 2 -1x10 8 cm 2 .

[0018] In some embodiments, the reference transmission path comprises a first reference transmission path and a second reference transmission path, wherein a transmission path of the carriers via the substrate, the first portions and the doped layer is the first reference transmission path; and / or, a transmission path of the carriers via the substrate, the second portions and the doped layer is the second reference transmission path.

[0019] In some embodiments, a transmission resistance corresponding to the first reference transmission path increases with an increase of a temperature at which the solar cell is located; and / or, a transmission resistance corresponding to the second reference transmission path decreases with an increase of the temperature at which the solar cell is located.

[0020] In some embodiments, an impedance corresponding to the reference transmission path is 0.05mΩ·cm 2 -1.4mΩ·cm 2 .

[0021] In some embodiments, the substrate and / or the doped layer are contained in at least part of the pores; and / or, an air gap is provided in at least part of the pores.

[0022] In some embodiments, the medium layer is at a temperature range of -50°C to 150°C.

[0023] According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a solar cell, comprising: a substrate having a first surface and a second surface opposite to each other along a first direction; a medium layer on at least one of the first surface and the second surface, the medium layer comprising a plurality of pores, at least a portion of the pores penetrating through the medium layer along the first direction; and a doped layer on a side of the medium layer away from the substrate; wherein carriers are transmitted to the doped layer via the substrate and the medium layer along the first direction, and the transmission efficiency of the carriers in at least a portion of the medium layer decreases with the increase of the temperature of the medium layer.

[0024] In some embodiments, the medium layer comprises a first medium layer, and the doped layer comprises a first doped layer on a side of the first medium layer away from the substrate; the first doped layer and the substrate have different doped elements of conductive type; and a minority of the carriers is transmitted to the first doped layer via the substrate and the first medium layer along the first direction.

[0025] In some embodiments, the medium layer comprises a second medium layer; and the doped layer comprises a second doped layer on a side of the second medium layer away from the substrate, the second doped layer and the substrate having the same doped elements of conductive type; and a majority of the carriers is transmitted to the second doped layer via the substrate and the second medium layer along the first direction.

[0026] In some embodiments, at least one of the first surface and the second surface has a first region and a second region arranged alternately along a second direction; the second medium layer and the second doped layer are on the first region; or the second medium layer and the second doped layer are on the first region and the second region simultaneously.

[0027] In some embodiments, a diffusion layer is further arranged between the substrate and the medium layer, the diffusion layer and the doped layer having the same doped elements of conductive type.

[0028] In some embodiments, the doped elements in the diffusion layer have a doped concentration of 1×10 18 atom / cm 3 ~1×10 19 atom / cm 3 .

[0029] In some embodiments, the first surface or the second surface is a back surface, the back surface has first field regions and second field regions arranged alternately along the second direction; wherein the dielectric layer includes a third dielectric layer on the first field regions, the doped layer includes a third doped layer on the first field regions, the third doped layer and the substrate have the same type of doped elements, and the majority carriers in the carriers are transmitted to the third doped layer via the substrate and the third dielectric layer along the first direction; and / or, the dielectric layer includes a fourth dielectric layer on the second field regions, the doped layer includes a fourth doped layer on the second field regions, the fourth doped layer and the substrate have different types of doped elements, and the minority carriers in the carriers are transmitted to the fourth doped layer via the substrate and the fourth dielectric layer along the first direction.

[0030] In some embodiments, an isolation region is arranged between the first field regions and the second field regions.

[0031] In some embodiments, the material of the dielectric layer includes one or more of silicon oxide, silicon carbide, silicon nitride, and silicon oxynitride; and / or, the material of the dielectric layer includes one or more of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon.

[0032] In some embodiments, the pores in the dielectric layer are formed via a heat treatment, a process temperature of the heat treatment is 800-1100°C, and a processing time of the heat treatment is 20-60 minutes.

[0033] In some embodiments, the dielectric layer includes first portions and second portions arranged alternately and irregularly along a direction perpendicular to the first direction, the pores are in the first portions, and a current density in the first portions is greater than a current density in the second portions.

[0034] In some embodiments, a ratio of the current density in the first portions to the current density in the second portions is greater than or equal to 10.

[0035] In some embodiments, an arrangement density of the pores in the dielectric layer is 1x10 6 cm 2 -1x10 8 cm 2 .

[0036] In some embodiments, a transmission path of the carriers via the substrate, the dielectric layer, and the doped layer along the first direction is a reference transmission path, and an impedance corresponding to the reference transmission path is 0.05-1.4 mΩ·cm 2 . 2 .

[0037] In some embodiments, the transmission path of the carriers along the first direction through the substrate, the medium layer and the doped layer is a reference transmission path, the reference transmission path includes a first reference transmission path and a second reference transmission path, wherein the transmission path of the carriers through the substrate, the first part and the doped layer is the first reference transmission path; and / or the transmission path of the carriers through the substrate, the second part and the doped layer is the second reference transmission path.

[0038] In some embodiments, the transmission resistance corresponding to the first reference transmission path increases with the increase of the temperature at which the solar cell is located; and / or the transmission resistance corresponding to the second reference transmission path decreases with the increase of the temperature at which the solar cell is located.

[0039] In some embodiments, the substrate and / or the doped layer are contained in at least part of the number of the pores; and / or the air gap is in at least part of the number of the pores.

[0040] In some embodiments, at least one of the first surface and the second surface has first regions and second regions arranged alternately along a second direction; the medium layer and the doped layer are located on the first regions.

[0041] In some embodiments, the temperature range of the medium layer is -50℃-150℃.

[0042] According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a photovoltaic module, comprising: a cell string connected by a plurality of solar cells as described in any one of the above; an encapsulation adhesive film used for covering the surface of the cell string; and a cover plate used for covering the surface of the encapsulation adhesive film away from the cell string.

[0043] The technical solutions provided by the embodiments of the present application have at least the following advantages:

[0044] The medium layer includes a plurality of pores, and at least part of the number of the pores penetrates the medium layer along the first direction. In this way, the transmission mechanism of the carriers in the medium layer can be improved, so that the transmission mechanism of the carriers in the medium layer is mainly to realize transmission by means of the pores, which is conducive to reducing the dependence of the carriers on the quantum tunneling effect when transmitting in the medium layer, so as to facilitate reducing the requirement for the thickness of the medium layer, thereby facilitating increasing the thickness fluctuation range of the medium layer, and meanwhile, most of the parts of the medium layer which do not form pores can ensure that the medium layer has good passivation performance on the substrate.

[0045] Further, the transmission resistance corresponding to the reference transmission path in at least part of the solar cell increases with the increase of the temperature at which the solar cell is located. In this way, on the one hand, even if the temperature at which the medium layer is located is relatively low, the transmission resistance corresponding to the reference transmission path is also relatively low, that is, the carrier also has a relatively high transmission efficiency in the medium layer, which is conducive to ensuring that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature. On the other hand, if the temperature at which the medium layer is located increases, the transmission resistance corresponding to the reference transmission path increases, that is, the transmission efficiency of the carrier at a relatively high temperature is inhibited, which can reduce the current in the local area of the solar cell, thereby reducing the risk of thermal runaway of the solar cell. On the other hand, if the temperature in the local area of the solar cell increases, the transmission resistance corresponding to the reference transmission path in the local area increases, that is, the transmission efficiency of the carrier in the local area decreases, the carrier in the local area will tend to be horizontally transmitted to other areas with a lower temperature, and then transmitted to the doped layer through the medium layer. In this way, it is conducive to reducing the number of carriers gathered in the local high-temperature area of the solar cell, and promoting the uniform distribution of the current in the solar cell by means of the temperature difference and the characteristic that the transmission resistance corresponding to the reference transmission path in the high-temperature area of the solar cell increases, so as to further reduce the risk of thermal runaway of the solar cell. BRIEF DESCRIPTION OF DRAWINGS

[0046] One or more embodiments are illustrated by way of example in the figures that form a part of this disclosure and which are shown by way of illustration in the drawings. These embodiments are described in enough detail to enable those skilled in the art to practice the embodiments and it is understood that the drawings are not necessarily to scale. Wherever possible, the same reference numbers will be used throughout the drawings to depict the same or similar components. This disclosure can also include other embodiments obtained from performing a construction analogous to those from the previous embodiments, as well as other embodiments obtained from performing a construction analogous to those from the previous embodiments.

[0047] Figure 1 A first cross-sectional schematic diagram of a solar cell according to an embodiment of the present application is provided.

[0048] Figure 2 A partial enlarged cross-sectional schematic diagram of a solar cell according to an embodiment of the present application is provided.

[0049] Figure 3 A top view schematic diagram of a medium layer in a solar cell according to an embodiment of the present application is provided.

[0050] Figure 4 A comparison diagram of medium layer related characteristics in three different solar cells according to an embodiment of the present application is provided.

[0051] Figure 5A second cross-sectional view of a solar cell according to an embodiment of the present application;

[0052] Figure 6 Another enlarged partial cross-sectional view of a solar cell according to an embodiment of the present application;

[0053] Figure 7 Still another enlarged partial cross-sectional view of a solar cell according to an embodiment of the present application;

[0054] Figure 8 A third cross-sectional view of a solar cell according to an embodiment of the present application;

[0055] Figure 9 A fourth cross-sectional view of a solar cell according to an embodiment of the present application;

[0056] Figure 10 A fifth cross-sectional view of a solar cell according to an embodiment of the present application;

[0057] Figure 11 A partial top view of a test structure cut from a solar cell according to an embodiment of the present application;

[0058] Figure 12 A sixth cross-sectional view of a solar cell according to an embodiment of the present application;

[0059] Figure 13 A seventh cross-sectional view of a solar cell according to an embodiment of the present application;

[0060] Figure 14 A plot of the temperature dependence of the transport resistance in two different solar cells according to embodiments of the present application;

[0061] Figure 15 An eighth cross-sectional view of a solar cell according to an embodiment of the present application;

[0062] Figure 16 A ninth cross-sectional view of a solar cell according to an embodiment of the present application;

[0063] Figure 17 A cross-sectional view of a substrate in a method of manufacturing a solar cell according to another embodiment of the present application;

[0064] Figure 18 An enlarged cross-sectional view of a substrate after forming an initial dielectric layer and an initial doped layer on a first surface in a method of manufacturing a solar cell according to another embodiment of the present application;

[0065] Figure 19Another amplification profile diagram of a solar cell after forming an initial medium layer and an initial doping layer on a first surface in a manufacturing method of a solar cell according to another embodiment of the present application is provided;

[0066] Figure 20 A partial perspective diagram of a cell string in a photovoltaic module according to yet another embodiment of the present application is provided;

[0067] Figure 21 A partial profile diagram of a photovoltaic module according to yet another embodiment of the present application is provided.

[0068] Legend of reference signs:

[0069] 100, substrate; 100a, first surface; 100b, second surface; 110, first part; 120, second part; 130, first metal region; 140, first non-metal region; 150, second metal region; 160, second non-metal region; 35, first region; 46, second region; 101, medium layer; 111, aperture; 121, initial medium layer; 102, doping layer; 112, initial doping layer; 103, diffusion layer; 104, electrode; 40, solar cell; 41, encapsulating adhesive film; 42, cover plate; 43, conductive strip. DETAILED DESCRIPTION

[0070] As known from the background, the transmission mechanism of the carriers in the medium layer needs to be improved.

[0071] It is found through analysis that the thickness of the medium layer greatly influences the transmission efficiency of the carriers in the medium layer on the basis of the quantum tunneling transmission mechanism of the carriers in the medium layer. Specifically, a too thick thickness of the medium layer easily leads to a reduced tunneling probability of the carriers in the medium layer, resulting in a poor contact performance of the medium layer and the substrate; a too thin thickness of the medium layer easily leads to an imperfect passivation of the interface between the medium layer and the substrate, i.e., a poor passivation performance of the medium layer. Generally, to achieve a relatively optimal passivation contact performance of the medium layer, the thickness fluctuation range of the medium layer needs to be controlled within 0.2 nm, which is a great challenge to the process and equipment.

[0072] In addition, on the basis of the quantum tunneling transmission mechanism of the carriers in the medium layer, the tunneling probability of the carriers in the medium layer increases with the increase of the temperature of the medium layer. In other words, the transmission resistance corresponding to the transmission of the carriers in the medium layer decreases with the increase of the temperature of the medium layer. When the temperature of the medium layer increases, the transmission resistance corresponding to the transmission of the carriers in the medium layer decreases, and the carriers are more likely to pass through the medium layer to other film layers by quantum tunneling.

[0073] It can be understood that, with the increase of the temperature at which the medium layer is located, the number of carriers transported through the medium layer by the quantum tunneling transport mechanism per unit time increases, which increases the current of the local region of the solar cell, and with the synchronous increase of the temperature and the current, the risk of thermal runaway of the solar cell increases.

[0074] The embodiments of the present application provide a solar cell and a photovoltaic module. In the solar cell, a plurality of pores are included in the medium layer, and at least part of the pores penetrate the medium layer along a first direction. In this way, the transport mechanism of the carriers in the medium layer is improved, so that the transport mechanism of the carriers in the medium layer is mainly achieved by the pores, which is beneficial to reduce the dependence of the transport of the carriers in the medium layer on the quantum tunneling effect, so as to facilitate reducing the requirement for the thickness of the medium layer, thereby facilitating increasing the thickness fluctuation range of the medium layer. Meanwhile, the part of the medium layer in which most of the pores are not formed can ensure that the medium layer has good passivation performance on the substrate. Further, the transport resistance corresponding to the reference transport path in at least part of the solar cells increases with the increase of the temperature at which the solar cell is located. In this way, on the one hand, even if the temperature at which the medium layer is located is relatively low, the transport resistance corresponding to the reference transport path is also relatively low, that is, the transport efficiency of the carriers in the medium layer is also relatively high, which is beneficial to ensure that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature. On the other hand, if the temperature at which the medium layer is located increases, the transport resistance corresponding to the reference transport path increases, that is, the transport efficiency of the carriers at a relatively high temperature is inhibited, which can reduce the current of the local region of the solar cell, thereby facilitating reducing the risk of thermal runaway of the solar cell. On the other hand, if the temperature of the local region of the solar cell increases, the transport resistance corresponding to the reference transport path of the local region increases, that is, the transport efficiency of the carriers of the local region decreases, and the carriers in the local region tend to be transported laterally to other regions with a lower temperature, and then transported to the doped layer through the medium layer. In this way, it is beneficial to reduce the number of carriers collected in the local high-temperature region of the solar cell, and to promote the uniform distribution of the current in the solar cell by means of the temperature difference and the characteristic that the transport resistance corresponding to the reference transport path of the high-temperature region of the solar cell increases, so as to further reduce the risk of thermal runaway of the solar cell.

[0075] In the description of the embodiments of the present application, the technical terms "first", "second", and the like are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified.

[0076] Reference to“an embodiment” herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase“in an embodiment” in various places in the specification are not necessarily referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. As will be apparent to those of ordinary skill in the art, embodiments described herein can be combined with other embodiments.

[0077] In the description of the embodiments of the application, the term“and / or” only means an association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can mean that A exists, A and B exist, and B exists. In addition, the character“ / ” herein generally means that the front and rear associated objects are in an“or” relationship.

[0078] In the description of the embodiments of the application, the term“a plurality of” refers to two or more (including two), and similarly, “a plurality of groups” refers to two or more groups (including two groups), and “a plurality of pieces” refers to two or more pieces (including two pieces).

[0079] In the description of the embodiments of the application, the technical terms“center”,“longitudinal”,“transverse”,“length”,“width”,“thickness”,“upper”,“lower”,“front”,“rear”,“left”,“right”,“vertical”,“horizontal”,“top”,“bottom”,“inner”,“outer”,“clockwise”,“counterclockwise”,“axial”,“radial”,“circumferential” and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the embodiments of the application.

[0080] In the description of the embodiments of the application, unless otherwise explicitly specified and limited, the technical terms“mounting”,“connection”,“connection”,“fixing” and the like should be understood broadly, for example, can be fixedly connected, or can be detachably connected, or can be integrated; can be mechanically connected, or can be electrically connected; can be directly connected, or can be indirectly connected through an intermediate medium; can be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the application can be understood according to the specific circumstances.

[0081] In the drawings corresponding to the embodiments of the present application, the thickness and area of a layer are exaggerated for clarity. When a component (such as a layer, film, region, or substrate) is described as being "on" or "at" another component, it can be "directly on" the other component (i.e., in the absence of intervening medium) or intervening components can also be present. In contrast, when a component is described as being "directly on" or "directly at" another component, it indicates that there are no intervening components present. In addition, when a component is described as being "formed on" another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a partial edge of the entire surface.

[0082] In the description of the embodiments of the present application, when a component "comprises" another component, unless otherwise specified, other components are not excluded, and other components can also be further included. In addition, when a layer, film, region, or plate, and the like, is referred to as "on / over" another component, it can be "directly on" the other component (i.e., between the other component and another component, no other component is present), or another component can be present therebetween. In addition, when a layer, film, region, plate, and the like, is "directly on" another component, or when a layer, film, region, plate, and the like, is on the surface of another component, it is indicated that no other component is present therebetween.

[0083] The terms used in the description of various described embodiments herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used in the description of various embodiments and the appended claims herein, the phrase "the component" is intended to encompass a plurality of components unless the context clearly dictates otherwise. In this regard, the component includes a layer, film, region, or plate, and the like.

[0084] The embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that, in the embodiments of the present application, many technical details are presented in order to enable the reader to better understand the embodiments of the present application. However, the technical solutions claimed by the embodiments of the present application can be implemented even without these technical details and based on various changes and modifications of the following embodiments.

[0085] An embodiment of the present application provides a solar cell, which will be described in detail below with reference to the accompanying drawings.

[0086] Reference Figures 1 to 3The solar cell comprises a substrate 100, the substrate 100 has a first surface 100a and a second surface 100b opposite to each other along a first direction X; a dielectric layer 101 is located on at least one of the first surface 100a and the second surface 100b, the dielectric layer 101 comprises a plurality of pores 111, and at least part of the pores 111 penetrate the dielectric layer 101 along the first direction X; a doped layer 102 is located on a side of the dielectric layer 101 away from the substrate 100; wherein a transmission path of a carrier along the first direction X through the substrate 100, the dielectric layer 101 and the doped layer 102 is a reference transmission path, and a transmission resistance corresponding to the reference transmission path in at least part of the solar cells increases with the increase of a temperature at which the solar cell is located.

[0087] wherein, Figure 1 A first cross-sectional schematic view of a solar cell provided by an embodiment of the present application; Figure 2 A partial enlarged cross-sectional schematic view of a solar cell provided by an embodiment of the present application; Figure 3 A top view schematic view of a dielectric layer in a solar cell provided by an embodiment of the present application.

[0088] It should be noted that, Figure 1 In the above embodiment, the dielectric layer 101 is located on both the first surface 100a and the second surface 100b. In actual applications, the dielectric layer can be located on only the first surface or only the second surface, and various cases will be described in detail later. In addition, Figure 3 In the above embodiment, the first part 110 and the second part 120 in the dielectric layer 101 are divided by different shapes of dashed lines.

[0089] It should be noted that, first, the dielectric layer 101 comprises a plurality of pores 111, and at least part of the pores 111 penetrate the dielectric layer 101 along the first direction X. In this way, the transmission mechanism of the carriers in the dielectric layer can be improved, specifically, the transmission mechanism of the carriers in the dielectric layer 101 is mainly to transmit by means of the pores 111. In other words, most of the carriers will be transmitted to the doped layer 102 through the substrate 100 and the part of the dielectric layer 101 having the pores 111, for example, the carriers can be directly transmitted to the doped layer 102 through the pores 111, and part of the carriers will be transmitted to the doped layer 102 by quantum tunneling through the part of the dielectric layer 101 without the pores 111. Wherein, the part of the dielectric layer 101 having the pores 111 is the first part 110 which will be described in detail later.

[0090] Further, the transmission resistance corresponding to the reference transmission path in at least part of the solar cell increases with the increase of the temperature at which the solar cell is located, which can reduce the transmission efficiency of the carriers in the dielectric layer 101 with the increase of the temperature at which the dielectric layer 101 is located. On the one hand, even if the temperature at which the dielectric layer 101 is located is relatively low, the transmission resistance corresponding to the reference transmission path is also relatively low, that is, the carriers in the dielectric layer 101 also have a relatively high transmission efficiency, which is beneficial to ensure that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature. On the other hand, if the temperature at which the dielectric layer 101 is located increases, the transmission resistance corresponding to the reference transmission path increases, that is, the transmission efficiency of the carriers at a relatively high temperature is inhibited, which can reduce the number of carriers transmitted to the doped layer 102 through the dielectric layer 101 per unit time, so as to reduce the current in part of the solar cell, thereby reducing the risk of thermal runaway of the solar cell. On the other hand, if the temperature of the local area of the solar cell increases, the transmission resistance corresponding to the reference transmission path in the local area increases, that is, the transmission efficiency of the carriers in the local area decreases, and the carriers in the local area tend to be transmitted laterally to other areas with a lower temperature, and then transmitted to the doped layer 102 through the dielectric layer 101. This is beneficial to reduce the number of carriers gathered in the local high-temperature area of the solar cell, and promote the uniform distribution of the current in the solar cell by means of the temperature difference and the increase of the transmission resistance corresponding to the reference transmission path in the high-temperature area of the solar cell, so as to further reduce the risk of thermal runaway of the solar cell. Therefore, it is beneficial to ensure that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature, while reducing the risk of thermal runaway of the solar cell, so as to avoid the performance degradation of the solar cell caused by local overheating.

[0091] In addition, since the transmission mechanism of the carriers in the dielectric layer 101 is mainly realized by means of the pores 111, the dependence of the carriers on the quantum tunneling effect when transmitting in the dielectric layer 101 is reduced, which is beneficial to reduce the requirement for the thickness of the dielectric layer 101. In other words, the change of the transmission resistance corresponding to the reference transmission path is less affected by the quantum tunneling effect, that is, the transmission efficiency of the carriers in the dielectric layer 101 is less affected by the quantum tunneling effect, and the sensitivity to the thickness of the dielectric layer 101 is reduced. Even if the thickness of the dielectric layer 101 is relatively large, the carriers can also make the transmission resistance corresponding to the reference transmission path relatively small by means of the pores 111, that is, the carriers have a good transmission efficiency in the dielectric layer 101, thereby increasing the thickness fluctuation range of the dielectric layer 101, that is, increasing the process window when preparing the dielectric layer 101. Moreover, the part of the dielectric layer 101 in which most of the pores 111 are not formed, that is, the second part 120 which will be described in detail later, can ensure that the dielectric layer 101 has good passivation performance on the substrate 100.

[0092] It should be noted that, in actual application, the temperature of the solar cell is the temperature of the medium layer 101 in the solar cell. In addition, the transport mechanism of the carriers in the medium layer 101 will be described in detail in the subsequent description, mainly by means of the pores 111 to realize the transport, and the transport resistance corresponding to the reference transport path in at least part of the solar cell increases with the increase of the temperature of the solar cell, that is, the transport efficiency of the carriers in the medium layer 101 decreases with the increase of the temperature of the medium layer 101.

[0093] It should be noted that, with reference to Figures 1 to 3 , the transport path of the carriers along the first direction X through the substrate 100, the medium layer 101 and the doped layer 102 is the reference transport path, and among the transport path of the carriers along the first direction X through the substrate 100, the medium layer 101 and the doped layer 102, based on the insulating property of the medium layer 101, the main transport obstacle of the carriers comes from the medium layer 101. On this basis, the transport efficiency of the carriers in the medium layer 101 decreases with the increase of the temperature of the medium layer 101, so that the carriers in the reference transport path will be subjected to greater obstacles with the increase of the temperature, so that the transport resistance corresponding to the reference transport path is greater, thereby the transport resistance corresponding to the reference transport path increases with the increase of the temperature of the solar cell. In other words, the transport efficiency of the carriers in the medium layer 101 decreases with the increase of the temperature of the medium layer 101, and the transport resistance corresponding to the reference transport path increases with the increase of the temperature of the solar cell; on the contrary, the transport efficiency of the carriers in the medium layer 101 increases with the decrease of the temperature of the medium layer 101, and the transport resistance corresponding to the reference transport path decreases with the decrease of the temperature of the solar cell.

[0094] In some embodiments, the temperature range of the medium layer 101, that is, the temperature of the solar cell, can be -50°C to 150°C, for example, can be -45°C, -40°C, -35°C, -30°C, -25°C, -20°C, -15°C, -10°C, -5°C, 0°C, 5°C, 10°C, 15°C, 20°C, 25°C, 30°C, 35°C, 40°C, 45°C, 50°C, 55°C, 60°C, 65°C, 70°C, 75°C, 80°C, 85°C, 90°C, 95°C, 100°C, 105°C, 110°C, 115°C, 120°C, 125°C, 130°C, 135°C, 140°C or 145°C, etc.

[0095] The positional relationship between the pores 111 and the substrate 100 and the doped layer 102 will be described in detail below.

[0096] In some embodiments, with reference to Figure 6 or Figure 7At least part of the holes 111 contain the substrate 100 and / or the doped layer 102.

[0097] Wherein, Figure 6 Another partial enlarged sectional view of the solar cell according to an embodiment of the present application is provided. Figure 7 Another partial enlarged sectional view of the solar cell according to an embodiment of the present application is provided. In some examples, reference is made to Figure 6 Or Figure 7 One hole 111 can contain the substrate 100 and be filled with the substrate 100; another hole 111 can contain the doped layer 102 and be filled with the doped layer 102; and another hole 111 can be filled with both the substrate 100 and the doped layer 102. Based on this, the doped layer 102 in the area where the holes 111 are located can be in contact with the substrate 100, and therefore, the carriers are more likely to gather in the area where the holes 111 are located, which has a relatively small impedance, compared with the area with the dielectric layer 101. That is to say, the holes 111 provide a new transmission path for the carriers in addition to the quantum tunneling transmission.

[0098] It should be noted that the filling of the substrate 100 and the doped layer 102 in different holes 111 in the same dielectric layer 101 can be the same or different.

[0099] In other embodiments, reference is made to Figure 2 , Figure 6 Or Figure 7 At least part of the holes 111 can also have air gaps. In other words, at least part of the holes 111 have spaces that are not filled with the substrate 100 or the doped layer 102.

[0100] In some embodiments, reference is made to Figure 3 The dielectric layer 101 includes first parts 110 and second parts 120 arranged alternately and irregularly along a direction perpendicular to the first direction X, the holes 111 are located in the first parts 110, and the current density in the first parts 110 is greater than that in the second parts 120 when the carriers are transmitted. In other words, the dielectric layer 101 includes a plurality of first parts 110 arranged at intervals, the second part 120 wraps the outer wall of each first part 110 extending along the first direction X, and the plurality of first parts 110 can be arranged irregularly and randomly at intervals along a direction perpendicular to the first direction X.

[0101] It should be noted that Figure 3 The first parts 110 and the second parts 120 in the dielectric layer 101 are divided by a dashed line in

[0102] It is worth noting that for the hole 111 penetrating the dielectric layer 101 in the first direction X and filled with the substrate 100 and / or the doped layer 102, the carrier can directly transmit from the substrate 100 through the hole 111 in the first part 110 to the doped layer 102 without the help of the quantum tunneling effect; for the hole 111 not penetrating the dielectric layer 101 in the first direction X, the hole 111 is usually filled with the substrate 100 or the doped layer 102, and the part of the dielectric layer 101 opposite to the hole 111 in the first direction X is thinner than other parts of the dielectric layer 101, so the carrier is more likely to transmit from the part of the dielectric layer 101 with thinner thickness based on the quantum tunneling effect and finally transmit to the doped layer 102, and based on the thinning of the thickness, the part of the dielectric layer 101 near the hole 111 has a higher electric field strength, which has a stronger driving effect on the tunneling of the carrier. Therefore, based on the cooperation of various aspects, the part of the first part 110 near the hole 111 has a smaller hindering effect on the transmission of the carrier in the first direction X than the part of the dielectric layer 101 without the hole 111, i.e. the second part 120, which can improve the efficiency of the carrier transmitting through the dielectric layer 101, i.e. more carriers can transmit through the dielectric layer 101 in a unit of time, so as to facilitate more carriers to gather to the substrate 100 to transmit through the dielectric layer 101 by means of the hole 111.

[0103] Based on this, in the solar cell, the reference transmission path includes a first reference transmission path and a second reference transmission path. Wherein, the transmission path of the carrier via the substrate 100, the first part 110 and the doped layer 102 is the first reference transmission path, and the transmission path of the carrier via the substrate 100, the second part 120 and the doped layer 102 is the second reference transmission path. Since the aperture 111 is located in the first part 110 of the medium layer 101, most of the carriers directly pass through the medium layer 101 through the aperture 111 penetrating the medium layer 101. In other words, since the aperture 111 penetrating the medium layer 101 is filled with the substrate 100 and / or the doped layer 102, the carrier can be directly transmitted between the substrate 100 and the doped layer 102 without quantum tunneling through the medium layer 101. Of course, for the aperture 111 that does not penetrate the medium layer 101, due to its thin thickness, the carrier can still be transmitted by quantum tunneling effect. That is to say, the first reference transmission path mainly transmits the carrier through the aperture 111, but due to the structural difference of different apertures 111, the first reference transmission path at least includes two carrier transmission modes. Compared with the quantum tunneling effect transmission mode, the main transmission mode of the carrier is still the transmission mode through the aperture 111 penetrating the medium layer 101, so the transmission resistance corresponding to the first reference transmission path will increase with the increase of the temperature of the solar cell. Correspondingly, the second part 120 does not have an aperture, although a large number of carriers will gather in the first part 110, a part of the carriers will pass through the medium layer 101 by quantum tunneling effect. That is to say, the carrier transmission mode of the second reference transmission path is quantum tunneling effect transmission, so the transmission resistance corresponding to the second reference transmission path will decrease with the increase of the temperature of the solar cell. Since the carriers are mostly gathered in the first part, the influence of the aperture transmission mode on the carrier is greater than that of the quantum tunneling effect.

[0104] In some cases, the ratio of the current density in the first part 110 to the current density in the second part 120 can be greater than or equal to 10.

[0105] It is worth noting that based on the efficiency of the aperture 111 in the medium layer 101 in improving the transmission of the carrier through the medium layer 101, not only the photo-generated carriers located in the region corresponding to the first part 110 will gather at the aperture 111, but also the photo-generated carriers located in the region corresponding to the second part 120 and close to the first part 110 will first be transmitted in the second direction Y to the region corresponding to the first part 110, and finally be transmitted by the aperture 111. A part of the carriers will still gather in the region corresponding to the second part 120, and pass through the medium layer 101 by quantum tunneling effect, so that the current density in the first part 110 and the current density in the second part 120 have a large difference, and the ratio of the two is generally greater than or equal to 10.

[0106] In some embodiments, referring to Figures 1 to 3 , the arrangement density of the pores 111 in the medium layer 101 can be 1 x 10 6 ~1 x 10 2 ~1 x 10 8 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 6 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 ~1 x 10 7 ~1 x 10 2 , etc.

[0107] It is worth noting that in combination with the reference Figure 4 and Table 1, if the arrangement density of the pores 111 in the medium layer 101 is less than 1 x 10 6 ~1 x 10 2 , the number of pores 111 arranged per unit area in the medium layer 101 is small, and the effect of improving the transmission efficiency of the carriers in the medium layer 101 is general, for example, based on the sparse arrangement of the pores 111, there are still a large number of carriers that pass through the medium layer 101 by means of the quantum tunneling effect, thereby easily leading to a decrease in the fill factor of the solar cell; if the arrangement density of the pores 111 in the medium layer 101 is greater than 1 x 10 8 ~1 x 10 2 , etc.The number of pores 111 arranged in the unit area of the medium layer 101 is large, which can reduce the passivation effect of the medium layer 101 on the substrate 100, although the fill factor of the solar cell is improved, but the open circuit voltage of the solar cell is reduced. Therefore, the arrangement density of the pores 111 in the medium layer 101 is designed to be 1x10 6 cm-2 2 1x10 8 cm-2 2 Not only is it beneficial to improve the transmission efficiency of the carriers in the medium layer 101 by means of the appropriate arrangement density of the pores 111 to improve the fill factor of the solar cell, but also to ensure that the medium layer 101 has a good passivation effect on the substrate 100, to reduce the defect state density at the contact between the substrate 100 and the medium layer 101, to ensure that the solar cell has a higher open circuit voltage, so that the photoelectric conversion efficiency of the solar cell is maintained at a high level.

[0108] Table 1: Fill factor of three different solar cells respectively

[0109]

[0110] It should be noted that, Figure 4 the comparison chart of the medium layer related characteristics of the three different solar cells provided by an embodiment of the present application, Figure 4 The three pictures in correspond to the etching pit traces caused by the pores in the medium layer in the three different solar cells, Figure 4 The box plots respectively located below the three pictures in correspond to the impedance values of the reference transmission paths in the three different solar cells. Specifically, Figure 4 The three pictures in can illustrate that when the three different solar cells are etched and etched to the medium layer 101, the etching pit traces caused by the pores 111 can be used to represent the arrangement density of the pores 111 in the medium layer 101; Figure 4 The three box plots in the three different solar cells can illustrate the size of the impedance values of the reference transmission paths, and then the transmission efficiency of the carriers in the medium layer 101 can be represented. In addition, Table 1 is the fill factor of the three different solar cells respectively.

[0111] In some cases, the solar cell can be etched with acid first, for example, using hydrofluoric acid to remove other medium layers on the surface of the medium layer 101, such as a silicon nitride layer; then the solar cell is etched with alkali to expose the pores 111 in the medium layer 101, and finally the etching pit traces caused by the pores 111 are observed under a microscope as shown in Figure 3 Or Figure 4 .

[0112] In some embodiments, the reference Figures 1 to 3 The transmission path of the carriers along the first direction X through the substrate 100, the dielectric layer 101 and the doped layer 102 in sequence is the reference transmission path, and the corresponding impedance of the reference transmission path can be 0.05 mΩ·cm 2 ~1.4 mΩ·cm 2 Further preferably, 0.1 mΩ·cm 2 ~1.3 mΩ·cm 2 For example, 0.05 mΩ·cm 2 , 0.1 mΩ·cm 2 , 0.15 mΩ·cm 2 , 0.2 mΩ·cm 2 , 0.25 mΩ·cm 2 , 0.3 mΩ·cm 2 , 0.35 mΩ·cm 2 , 0.4 mΩ·cm 2 , 0.45 mΩ·cm 2 , 0.5 mΩ·cm 2 , 0.55 mΩ·cm 2 , 0.6 mΩ·cm 2 , 0.65 mΩ·cm 2 , 0.7 mΩ·cm 2 , 0.75 mΩ·cm 2 , 0.8 mΩ·cm 2 , 0.85 mΩ·cm 2 , 0.9 mΩ·cm 2 , 0.95 mΩ·cm 2 , 1 mΩ·cm 2 , 1.05 mΩ·cm 2 , 1.1 mΩ·cm 2 , 1.15 mΩ·cm 2 , 1.2 mΩ·cm 2 , 1.25 mΩ·cm 2 , 1.3 mΩ·cm 2 , 1.35 mΩ·cm 2 Or 1.4 mΩ·cm 2 , etc.

[0113] It is worth noting that the arrangement density of the pores 111 in the dielectric layer 101 also affects the size of the corresponding impedance of the reference transmission path. If the corresponding impedance of the reference transmission path is less than 0.05 mΩ·cm 2, the number of pores 111 arranged in the medium layer 101 per unit area needs to be large, although the fill factor of the solar cell is improved, but the passivation effect of the medium layer 101 on the substrate 100 is reduced, and the open circuit voltage of the solar cell is reduced; if the impedance corresponding to the reference transmission path is greater than 1.4 mΩ·cm 2 , the number of pores 111 arranged in the medium layer 101 per unit area needs to be small, and the medium layer 101 has a general effect on improving the transmission efficiency of the carriers in the medium layer 101. Therefore, the impedance corresponding to the reference transmission path is designed to be 0.05 mΩ·cm 2 ~1.4 mΩ·cm 2 , not only is conducive to improving the transmission efficiency of the carriers in the medium layer 101 by relying on the low impedance corresponding to the reference transmission path to improve the fill factor of the solar cell, but also is conducive to ensuring that the medium layer 101 has a good passivation effect on the substrate 100, thereby reducing the defect state density at the contact between the substrate 100 and the medium layer 101, and ensuring that the solar cell has a higher open circuit voltage, thereby maintaining the photoelectric conversion efficiency of the solar cell at a high level.

[0114] The transmission mechanism of the carriers in the medium layer 101 is mainly described in detail by mainly relying on the pores 111 to achieve transmission.

[0115] Reference Figure 4 , compared with the three kinds of solar cells corresponding to Group 1, Group 2 and Group 3, the greater the arrangement density of the pores 111 in the medium layer 101, the smaller the impedance corresponding to the reference transmission path, the smaller the hindrance to the transmission of the carriers in the reference transmission path, and the more conducive to improving the transmission efficiency of the carriers in the medium layer 101, thereby indirectly explaining that the transmission mechanism of the carriers in the medium layer 101 is mainly to rely on the pores 111 to achieve transmission.

[0116] In some embodiments, reference Figure 5 , Figure 5 The second cross-sectional schematic diagram of the solar cell provided by an embodiment of the present application can also include a diffusion layer 103 located between the substrate 100 and the medium layer 101, and the diffusion layer 103 and the doped layer 102 are doped with the same type of doped elements. It is worth noting that the intervention of the doped elements in the diffusion layer 103 can saturate the dangling bonds on the side of the medium layer 101 away from the doped layer 102, and reduce the transmission resistance of the diffusion layer 103 itself, thereby facilitating the reduction of the hindrance to the lateral transmission of the carriers in the second direction Y, making the carriers more easily gather at the pores 111, improving the current density in the first part 110, and enabling more carriers to pass through the medium layer 101 per unit time.

[0117] It should be noted that the morphology of the diffusion layer 103 at least includes the following two cases:

[0118] In some cases, continuing to refer to Figure 5 After the medium layer 101 with the pores 111 is formed on the substrate 100, a small amount of the doping element in the doping layer 102 will diffuse into the substrate 100 through the pores 111 (refer to Figure 3 ) in the process of preparing the doping layer 102, so that the part of the substrate 100 in contact with the medium layer 101 is converted into the diffusion layer 103 doped with the doping element, in other words, the diffusion layer 103 can be regarded as the substrate doped with the doping element.

[0119] In other cases, the doping layer is first formed on the substrate, and then the medium layer with pores and the doping layer are sequentially formed on the side of the doping layer away from the substrate, in other words, the doping layer is not converted from the substrate doped with the doping element.

[0120] In some examples, the doping concentration of the doping element in the diffusion layer 103 can be 1×10 18 atom / cm 3 ~1×10 19 atom / cm 3 , for example, can be 2×10 18 atom / cm 3 , 3×10 18 atom / cm 3 , 4×10 18 atom / cm 3 , 5×10 18 atom / cm 3 , 6×10 18 atom / cm 3 , 7×10 18 atom / cm 3 , 8×10 18 atom / cm 3 or 9×10 18 atom / cm 3 , etc.

[0121] It is worth noting that if the doping concentration of the doping element in the diffusion layer 103 is less than 1×10 18 atom / cm 3 , the effect of reducing the transmission resistance of the diffusion layer 103 itself is limited; if the doping concentration of the doping element in the diffusion layer 103 is greater than 1×10 19 atom / cm 3, the excessive doping elements in the diffusion layer 103 will cause more defect states inside the diffusion layer 103, which will increase the probability of carrier recombination in the diffusion layer 103. Therefore, the doping concentration of the doping elements in the diffusion layer 103 is designed to be 1 x 1018 atom / cm3. 18 atom / cm 3 ~1 x 1018 atom / cm3 19 atom / cm 3 , which is conducive to reducing the resistance of the carrier along the second direction Y by means of the smaller transmission resistance of the diffusion layer 103, while avoiding the diffusion layer 103 having more defect states inside to avoid the carrier recombining in the diffusion layer 103 in advance, so as to ensure the carrier converging to the pore 111.

[0122] The following will be described in detail in combination with the type of the solar cell.

[0123] In some embodiments, referring to Figure 1 , Figure 5 or Figure 8 , the medium layer 101 comprises a first medium layer, and the doping layer 102 comprises a first doping layer located on the side of the first medium layer away from the substrate 100; the first doping layer and the substrate 100 have doping elements of different conductive types; the minority carriers in the carriers are transmitted to the first doping layer along the first direction X via the substrate 100 and the first medium layer, and relatively, the majority carriers in the carriers are transmitted to the substrate 100 along the first direction X via the first doping layer and the first medium layer. Based on this, it can be known that the transmission path of the carriers along the first direction X in the substrate 100, the first medium layer and the first doping layer is one of the reference transmission paths.

[0124] In other embodiments, referring to Figure 1 , Figure 5 or Figure 9 , the medium layer 101 comprises a second medium layer; the doping layer 102 comprises a second doping layer located on the side of the second medium layer away from the substrate 100, and the second doping layer and the substrate 100 have doping elements of the same conductive type; the majority carriers in the carriers are transmitted to the second doping layer along the first direction X via the substrate 100 and the second medium layer; relatively, the minority carriers in the carriers are transmitted to the substrate along the first direction X via the second doping layer and the second medium layer. Based on this, it can be known that the transmission path of the carriers along the first direction X in the substrate 100, the first medium layer and the first doping layer is one of the reference transmission paths.

[0125] It should be noted that Figure 1 , Figure 5 or Figure 9The second surface 100b shown can be regarded as the back surface of the solar cell. In addition, the first dielectric layer and the second dielectric layer can exist simultaneously in one solar cell, or can exist alternatively in one solar cell, and the first dielectric layer is provided with a first doped layer on the side away from the substrate, and the second dielectric layer is provided with a second doped layer on the side away from the substrate. Further, the first dielectric layer and / or the second dielectric layer can fully cover the surface of one of the first surface and the second surface of the solar cell, or can partially cover the surface of one of the first surface and the second surface of the solar cell.

[0126] It should be noted that in different types and different structures of solar cells, the transmission path of the carriers will be slightly different, so the carrier transmission direction and the transmission path of the carriers shown in an embodiment of the present application are only one or more examples, and are not limited thereto.

[0127] In yet some embodiments, with reference to Figure 8 or Figure 9 , the first surface 100a or the second surface 100b is the back surface, and the back surface has the first field region and the second field region arranged alternately along the second direction Y, and the first field region and the second field region can be provided with an isolation region or can not be provided with an isolation region.

[0128] In some cases, the dielectric layer 101 includes a third dielectric layer located on the first field region, the doped layer 102 includes a third doped layer located on the first field region, the third doped layer and the substrate 100 are doped with doped elements of the same conductivity type, and the majority carriers among the carriers are transmitted to the third doped layer via the substrate 100 and the third dielectric layer along the first direction X; the minority carriers among the carriers are transmitted to the substrate 100 via the third doped layer and the third dielectric layer along the first direction X. In other words, the transmission path of the carriers in the substrate 100, the third dielectric layer and the third doped layer along the first direction X is one of the reference transmission paths.

[0129] In some cases, the dielectric layer 101 includes a fourth dielectric layer located on the second field region, the doped layer 102 includes a fourth doped layer located on the second field region, the fourth doped layer and the substrate 100 have doped elements of different conductivity types, and the minority carriers among the carriers are transmitted to the fourth doped layer via the substrate 100 and the fourth dielectric layer along the first direction X; the minority carriers among the carriers are transmitted to the substrate 100 via the fourth doped layer and the fourth dielectric layer along the first direction X. In other words, the transmission path of the carriers in the substrate 100, the fourth dielectric layer and the fourth doped layer along the first direction X is one of the reference transmission paths.

[0130] It should be noted that the above two cases can exist simultaneously in one solar cell, or can exist alternatively in one solar cell.

[0131] In the above two embodiments, the doped element in the substrate 100 can be a first doped element, and a doped element different from the first doped element is a second doped element; one of the first doped element and the second doped element is an N-type doped element, and the other is a P-type doped element.

[0132] In some examples, the N-type doped element can be at least one of a phosphorus (P) element, a bismuth (Bi) element, an antimony (Sb) element, or an arsenic (As) element, etc. a group V element; the P-type semiconductor substrate is doped with a P-type element, and the P-type doped element can be at least one of a boron (B) element, an aluminum (Al) element, a gallium (Ga) element, or an indium (In) element, etc. a group III element.

[0133] The distribution of the regions on the first surface 100a or the second surface 100b is described in detail below.

[0134] In some embodiments, referring to Figure 5 , Figure 8 or Figure 9 , at least one of the first surface 100a and the second surface 100b has the first region 35 and the second region 46 arranged alternately along the second direction Y; the dielectric layer 101 and the doped layer 102 can be located only on the first region 35. In other embodiments, referring to Figure 1 , the second dielectric layer and the second doped layer can also be located on the first region 35 and the second region 46 at the same time.

[0135] In some cases, the solar cell is a single-sided or double-sided solar cell with electrodes, for example, it can be a single-sided or double-sided TOPCON cell. On this basis, referring to Figure 1 , Figure 5 , Figure 8 or Figure 9 , the first surface 100a of the substrate 100 can be a front surface, and the first surface 100a has the first metal region 130 and the first non-metal region 140 arranged alternately along the second direction Y; the second surface 100b of the substrate 100 can be a back surface, and the second surface 100b has the second metal region 150 and the second non-metal region 160 arranged alternately along the second direction Y.

[0136] In some examples, referring to Figure 1 or Figure 5 , both the first surface 100a and the second surface 100b have the first region 35 and the second region 46 arranged alternately along the second direction Y. Among them, the first region 35 includes the first metal region 130 and the second metal region 150, and the second region 46 includes the first non-metal region 140 and the second non-metal region 160. On this basis, the stack structure formed by the dielectric layer 101 and the doped layer 102 can be located only on the first metal region 130 or the second metal region 150, or can be located on the first metal region 130 and the second metal region 150 at the same time.

[0137] In other examples, refer to Figure 8 , Figure 8 This is a third cross-sectional view of a solar cell provided in an embodiment of this application, where only the first surface 100a has a first region 35 and a second region 46 arranged alternately along the second direction Y. The first region 35 includes a first metal region 130, and the second region 46 includes a first non-metal region 140. Based on this, the stacked structure composed of the dielectric layer 101 and the doped layer 102 can be located only on the first metal region 130. In practical applications, the stacked structure composed of the dielectric layer and the doped layer can also be located on both the first metal region and the first non-metal region.

[0138] In yet another example, refer to Figure 9 , Figure 9 This is a fourth cross-sectional view of a solar cell provided in an embodiment of this application, where only the second surface 100b has a first region 35 and a second region 46 arranged alternately along the second direction Y. The first region 35 includes a second metal region 150, and the second region 46 includes a second non-metal region 160. Based on this, the stacked structure composed of the dielectric layer 101 and the doped layer 102 can be located only on the second metal region 150. In practical applications, the stacked structure composed of the dielectric layer and the doped layer can also be located simultaneously on the second metal region and the second non-metal region.

[0139] In other cases, the solar cell is a single-sided solar cell with electrodes, such as a BC cell. Based on this, refer to... Figure 8 or Figure 9 The first surface 100a or the second surface 100b of the substrate 100 can be the back surface, with only the back surface having a first region 35 and a second region 46 alternately arranged along the second direction Y. The first region 35 can include a first field region and a second field region, which are alternately arranged along the second direction Y. The doped layer 102 on the first field region is a third doped layer, and the doped layer 102 on the second field region is a fourth doped layer. The third doped layer and the substrate 100 are doped with dopants of the same conductivity type, and the fourth doped layer is doped with a second doped element of a different conductivity type than the first doped element. Furthermore, the second region 46 can be considered as an isolation region between adjacent first and second field regions. In practical applications, an isolation region may not be provided between the first and second field regions.

[0140] It is worth noting that the dielectric layer 101 and the doped layer 102 are only located on the first region 35, and the doped layer 102 is not covered on the second region 46. This helps to avoid the parasitic absorption of light by the doped layer 102 on the second region 46, so that more light can be incident on the second region 46 and absorbed and utilized by the substrate 100.

[0141] In some embodiments, the reference Figure 10 , Figure 10 A fifth cross-sectional schematic view of a solar cell is provided in an embodiment of the present application. The solar cell further comprises an electrode 104 in contact with the doped layer 102, and the electrode 104 is located at least on the side of the doped layer 102 away from the substrate 100. It is worth noting that after the carriers in the substrate 100 are transmitted to the doped layer 102 through the dielectric layer 101 with pores 111, the carriers are further transmitted to the electrode 104 in contact with the doped layer 102 to be collected by the electrode 104.

[0142] The following describes in detail the transmission efficiency of the carriers in the dielectric layer 101 decreasing with the increase of the temperature at which the dielectric layer 101 is located, that is, the transmission resistance of the reference transmission path of the carriers in at least part of the solar cell increasing with the increase of the temperature at which the solar cell is located, in combination with a specific solar cell.

[0143] In combination with the reference Figure 5 , Figure 8 and Figure 11 , Figure 5 For a bifacial cell, the dielectric layer 101 and the doped layer 102 are arranged only in the first region 35, i.e., the metal region, on the front side and the back side; Figure 8 For a single-sided cell, the dielectric layer 101 and the doped layer 102 are also arranged only in the first region 35, i.e., the metal region, on the front side or the back side. Figure 11 A partial top view schematic diagram of a test structure cut from a solar cell is provided in an embodiment of the present application. The transmission resistance corresponding to the reference transmission path is measured by the method of a transmission line model (TLM). The reference transmission path is the transmission path of the carriers along the first direction X through the substrate 100, the dielectric layer 101, and the doped layer 102. In other words, the reference transmission path is the transmission path of the carriers along the first direction X through the substrate 100 and the dielectric layer 101 to the doped layer 102.

[0144] In combination with the reference Figure 11 A typical TLM structure is cut from the solar cell. The single TLM structure includes a plurality of electrodes 104 arranged at intervals along the second direction Y. The transmission resistance can be fitted by measuring the resistance values between different electrodes 104. The transmission resistance is the transmission resistance of the reference transmission path described above, which can represent the transmission resistance of the carriers moving in the doped layer 102 (reference Figure 1 ), the dielectric layer, and the substrate 100 along the first direction X.

[0145] It is worth noting that Figure 11 Four examples of testing the resistance values between different electrodes 104 are illustrated in the reference Figure 11, along the second direction Y, the plurality of electrodes 104 are sequentially taken as a first electrode, a second electrode, a third electrode, a fourth electrode and a fifth electrode, based on Figure 11 the two probes shown in case 1 measure the resistance value between the first electrode and the second electrode, based on Figure 11 the two probes shown in case 2 measure the resistance value between the first electrode and the third electrode, based on Figure 11 the two probes shown in case 3 measure the resistance value between the first electrode and the fourth electrode, and based on Figure 11 the two probes shown in case 4 measure the resistance value between the first electrode and the fifth electrode. Wherein, the test mode shown in case 1, case 2, case 3 and case 4 can obtain an IV curve (current-voltage curve) respectively, and the slope of each curve corresponds to the resistance value between two different electrodes 104.

[0146] In some cases, the resistance value between two electrodes 104 and the resistance value between another two electrodes 104, for example, Figure 12 the resistance value between the first electrode and the second electrode corresponding to case 1 shown in Figure 13 the resistance value between the first electrode and the third electrode corresponding to case 2 shown in , the carrier will be transmitted to the doped layer 102 via the substrate 100 and the dielectric layer 101 in the first direction X in sequence, and further transmitted to the electrode 104 in contact with the doped layer 102 to be collected by the electrode 104, then the difference between the resistance value between two electrodes 104 and the resistance value between another two electrodes 104 mainly reflects the length of the transmission path of the carrier in the second direction Y in the substrate 100.

[0147] In other words, referring to Figure 12 and Figure 13 , the transmission path of the carrier in the first direction X from the substrate 100 and the dielectric layer 101 to the doped layer 102 is taken as a reference transmission path, and the transmission resistance corresponding to the reference transmission path can be regarded as a first longitudinal resistance R1; the transmission path of the carrier in the second direction Y from the part opposite to one electrode 104 to the part opposite to another electrode 104 in the substrate 100 is taken as a first lateral transmission path, and the transmission resistance corresponding to the first lateral transmission path is a first lateral resistance R2. Based on Figure 12 and Figure 13The measured resistance between any two electrodes 104 in the shown example mainly includes the first longitudinal resistance R1 and the first lateral resistance R2, the first longitudinal resistance R1 is consistent, i.e. the difference is very small and almost negligible, between the resistance value between two electrodes 104 and the resistance value between another two electrodes 104, the first lateral resistance R2 linearly increases with the increase of the distance between two electrodes 104 in the second direction Y, thus the first longitudinal resistance R1 can be fitted by the change of the resistance value between multiple different electrodes 104, for example, based on the change of the measured resistance value corresponding to the case 1, the case 2, the case 3 and the case 4.

[0148] It can be understood that the difference of the first longitudinal resistance R1 corresponding to the reference transmission path between the resistance value between two electrodes 104 and the resistance value between another two electrodes 104 is very small and almost negligible, the length of the first lateral transmission path has a significant difference, thus the first lateral resistance R2 corresponding to the two kinds of first lateral transmission paths respectively has a significant difference, thereby causing the difference between the resistance value between two electrodes 104 and the resistance value between another two electrodes 104.

[0149] In one example, compared with the reference Figure 12 and Figure 13 the transmission path of the carrier along the second direction Y in the substrate 100 from the part opposite to the first electrode to the part opposite to the second electrode is regarded as the first sub-lateral transmission path, the transmission path of the carrier along the second direction Y in the substrate 100 from the part opposite to the first electrode to the part opposite to the third electrode is regarded as the second sub-lateral transmission path, the length of the second sub-lateral transmission path is significantly longer than the length of the first sub-lateral transmission path, the reference transmission path corresponding to the first electrode, the second electrode and the third electrode has no significant difference, the difference between the resistance value between the first electrode and the second electrode and the resistance value between the first electrode and the third electrode is mainly caused by the length difference between the first sub-lateral transmission path and the second sub-lateral transmission path. Based on this, the transmission resistance corresponding to the reference transmission path is a stable value, and the transmission resistance can be fitted by measuring the resistance value between different electrodes 104.

[0150] It should be noted that, Figure 12 the sixth cross-sectional schematic diagram of the solar cell provided by an embodiment of the present application; Figure 13 the seventh cross-sectional schematic diagram of the solar cell provided by an embodiment of the present application. In addition, Figure 12 and Figure 13 in the above-mentioned

[0151] Further, with reference toFigure 14 , Figure 14 The two different solar cells provided by an embodiment of the present application are shown in the following two different temperature-varying transmission resistance graphs. By changing the temperature of the solar cell, i.e. Figure 14 the test temperature shown in the figure, and using the Transmission Line Model (TLM) method, the transmission resistance of the reference transmission path in the solar cell at different temperatures is measured, so that the transmission resistance of the reference transmission path shown in the following graph rises with the rise of the temperature of the solar cell. Figure 14 It is worth noting that the size of the transmission resistance of the reference transmission path in the solar cell at different temperatures can reflect the transmission efficiency of the carrier in the medium layer 101 (reference Figure 1 ). The rise of the transmission resistance of the reference transmission path can reflect the decrease of the transmission efficiency of the carrier in the medium layer 101. Based on this, Figure 14 the rise of the transmission resistance of the reference transmission path with the rise of the temperature of the solar cell can reflect the decrease of the transmission efficiency of the carrier in the medium layer 101 with the rise of the temperature of the medium layer 101.

[0152] It should be noted that Figure 14 the orange line in the graph, i.e. Cell-1, corresponds to a TBC cell (TOPCon BackContact, which refers to a cross-passivation back contact cell), and the dark blue line, i.e. Cell-2, corresponds to a TOPCON cell.

[0153] It is worth noting that in the actual situation, Figure 12 and Figure 13 The first longitudinal resistance R1 shown in the figures includes not only the transmission resistance of the reference transmission path, but also the contact resistance at the contact between the electrode 104 and the doped layer 102. In addition, like the transmission resistance of the reference transmission path, for the contact resistance at the contact between the electrode 104 and the doped layer 102, the resistance value of the contact resistance between the two electrodes 104 is consistent with the resistance value of the contact resistance between the other two electrodes 104, i.e. the difference is very small and almost negligible.

[0154] To further improve the accuracy of the fitted transmission resistance of the reference transmission path, the following method can be used to obtain the resistance value of the contact resistance at the contact between the electrode 104 and the doped layer 102, and then subtract the contact resistance from the first longitudinal resistance R1 which can be regarded as the transmission resistance of the reference transmission path based on the method described above.

[0155] Referring to Figure 15 and Figure 16The transport path of charge carriers along the first direction X from the doped layer 102 to the electrode 104 is taken as the longitudinal transport path, and the transport resistance corresponding to the longitudinal transport path is the second longitudinal resistance R3; the transport path of charge carriers along the second direction Y in the doped layer 102 from the portion opposite one electrode 104 to the portion opposite another electrode 104 is taken as the second lateral transport path, and the transport resistance corresponding to the second lateral transport path is the second lateral resistance R4. Based on Figure 15 and Figure 16 The resistance measured between any two electrodes 104 in the example shown mainly includes the second longitudinal resistance R3 and the second lateral resistance R4. The second longitudinal resistance R3 is consistent with the resistance values ​​between two other electrodes 104, meaning the difference is very small and almost negligible. The second lateral resistance R4 increases linearly with the increase of the distance between the two electrodes 104 in the second direction Y. Therefore, the second longitudinal resistance R3 can be fitted by the changes in resistance values ​​between multiple different electrodes 104, for example, based on... Figure 11 The changes in the measured resistance values ​​corresponding to scenarios 1, 2, 3, and 4 are used to fit the second longitudinal resistance R3. The second longitudinal resistance R3 can be considered as the contact resistance at the contact point between electrode 104 and doped layer 102.

[0156] It should be noted that, Figure 15 An eighth cross-sectional schematic diagram of a solar cell provided in an embodiment of this application; Figure 16 This is a ninth cross-sectional schematic diagram of a solar cell provided in one embodiment of this application. Furthermore, Figure 15 and Figure 16 The second longitudinal resistor R3 and the second transverse resistor R4 are roughly indicated by thick dashed boxes, and the positional relationship between the probe and the electrode 104 is indicated by white-filled arrows.

[0157] Furthermore, the carrier transport path along the first direction X via the substrate 100, dielectric layer 101, and doped layer 102 is used as a reference transport path for measurement. Figure 15 , Figure 16 and Figure 1 The reference transmission resistance in the solar cell shown is not the transmission resistance corresponding to the transmission path. Figure 15 and Figure 16 The second longitudinal resistor R3 shown can be extracted Figure 15 , Figure 16 and Figure 1 The solar cell sample shown was first subjected to selective etching to remove the dielectric and doped layers located in the second region, leaving only the dielectric and doped layers located in the first region. In other words, the sample was then etched... Figure 15 , Figure 16 and Figure 1The etching process of the solar cell is shown as Figure 12 or Figure 13 . Then, a typical TLM structure shown as Figure 11 is cut from the sample after the selective etching process, and the transmission resistance of the reference transmission path in the solar cell shown as Figure 12 , Figure 13 is obtained based on the method described above for fitting the transmission resistance of the reference transmission path by measuring the resistance between different electrodes 104, and the fitting test of the transmission resistance will not be described here. Figure 15 , Figure 16 and Figure 1 . The fitting test of the transmission resistance will not be described here.

[0158] Moreover, the contact resistance between the electrode 104 and the doped layer 102 can be obtained first based on the solar cell shown as Figure 15 , Figure 16 and Figure 1 , and then the selective etching process is performed on the solar cell shown as Figure 15 , Figure 16 and Figure 1 to fit the transmission resistance of the reference transmission path, and the contact resistance can be subtracted from the fitted transmission resistance.

[0159] In some embodiments, referring to Figures 1 to 10 , the material of the dielectric layer 101 can include one or more of silicon oxide, silicon carbide, silicon nitride, and silicon oxynitride; in other embodiments, referring to Figures 1 to 10 , the material of the dielectric layer 101 can include one or more of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon.

[0160] In some embodiments, referring to Figures 1 to 10 , the material of the doped layer 102 can include polysilicon doped with a doping element.

[0161] In some embodiments, referring to Figures 1 to 10 , the doping concentration of the doping element in different regions of the doped layer 102 can be substantially uniform, i.e., the doping element is uniformly doped in the doped layer 102; in other embodiments, the doping concentration of the doping element in the doped layer 102 can gradually change, e.g., gradually increase or gradually decrease, along the direction of the dielectric layer 101 pointing to the doped layer 102. It should be noted that the doped layer 102 can be a single-film layer structure or a multi-film layer structure.

[0162] In some embodiments, referring to Figures 1 to 10 , the pores 111 in the dielectric layer 101 can be formed by heat treatment, and the process temperature of the heat treatment can be 800-1100°C, and the processing time of the heat treatment can be 20-60 min.

[0163] It is worth noting that the heat treatment creates pores 111 in the dielectric layer 101, thus diversifying the transport paths of charge carriers within it. Charge carriers can be transported through the dielectric layer 101 via quantum tunneling or through the pores 111, thereby improving the transport efficiency of charge carriers in the dielectric layer 101. Compared to existing technologies that rely solely on quantum tunneling, the presence of pores 111 causes charge carriers to preferentially accumulate in the pore region, resulting in a longer transport path from the substrate to the electrode in the solar cell, further enhancing the transport efficiency.

[0164] In some cases, the process temperature used for heat treatment can be 800℃~890℃, for example, 805℃, 815℃, 820℃, 825℃, 830℃, 835℃, 840℃, 845℃, 850℃, 855℃, 860℃, 865℃, 870℃, 875℃, 880℃ or 885℃, etc.

[0165] In other cases, the process temperature used for heat treatment can be 900℃~950℃ or 890℃~930℃, for example, 890℃, 895℃, 900℃, 905℃, 910℃, 915℃, 920℃, 925℃, 930℃, 935℃, 940℃ or 945℃, etc.

[0166] It is worth noting that, reference Figure 4 Compared to Figure 4 The arrangement density of pores 111 in the dielectric layer 101 of the solar cell corresponding to Group 3 shown will be greater if the heat treatment process temperature is higher than 930℃ or 950℃. Therefore, the impedance corresponding to the reference transmission path will be more easily compared to 0.1mΩ·cm. 2 It's even lower, for example, than 0.05 mΩ·cm 2 It is still low, but requires a greater number of pores per unit area in the dielectric layer. Although the fill factor of the solar cell is improved, it will reduce the passivation effect of the dielectric layer on the substrate and reduce the open circuit voltage of the solar cell.

[0167] Compared to Figure 4 The arrangement density of pores 111 in the dielectric layer 101 of the solar cell corresponding to Group 1 shown will be even lower if the heat treatment process temperature is less than 900℃ or 890℃, or the arrangement density of pores in the dielectric layer of the final solar cell will be smaller. Figure 4The Group 1 shown corresponds to the same sparse arrangement of pores 111 in the solar cell, and the impedance corresponding to the reference transmission path is easily 1.4 mΩ·cm 2 is also high, for example, equal to Figure 4 The 1.46 mΩ·cm shown 2 , so as to reduce the promotion effect of the dielectric layer 101 on the transmission efficiency of the carriers in the dielectric layer 101.

[0168] In this way, the process temperature of the heat treatment is designed to be 900-950°C or 890-930°C, which is conducive to controlling the moderate arrangement density of the pores 111 in the dielectric layer 101, and further controlling the impedance corresponding to the reference transmission path to be in the range of 0.1-1.3 mΩ·cm, so as to improve the transmission efficiency of the carriers in the dielectric layer 101 while ensuring that the dielectric layer 101 has good passivation effect on the substrate 100. 2 2 In this way, the process temperature of the heat treatment is designed to be 900-950°C or 890-930°C, which is conducive to controlling the moderate arrangement density of the pores 111 in the dielectric layer 101, and further controlling the impedance corresponding to the reference transmission path to be in the range of 0.1-1.3 mΩ·cm, so as to improve the transmission efficiency of the carriers in the dielectric layer 101 while ensuring that the dielectric layer 101 has good passivation effect on the substrate 100.

[0169] In yet other cases, the process temperature of the heat treatment can be 950-1100°C, for example, can be 955°C, 960°C, 965°C, 970°C, 975°C, 980°C, 985°C, 990°C, 995°C, 1000°C, 1005°C, 1010°C, 1015°C, 1020°C, 1025°C, 1030°C, 1035°C, 1040°C, 1045°C, 1050°C, 1055°C, 1060°C, 1065°C, 1070°C, 1075°C, 1080°C, 1085°C, 1090°C or 1095°C, etc.

[0170] In summary, the dielectric layer 101 includes a plurality of pores 111, and at least part of the number of pores 111 penetrates the dielectric layer 101 along the first direction X. In this way, the transmission mechanism of the carriers in the dielectric layer can be improved, specifically, the transmission mechanism of the carriers in the dielectric layer 101 is mainly realized by means of the pores 111, which is conducive to reducing the dependence of the carriers on the quantum tunneling effect when transmitting in the dielectric layer 101, and reducing the requirement for the thickness of the dielectric layer 101, thereby increasing the thickness fluctuation range of the dielectric layer 101, i.e. increasing the process window when preparing the dielectric layer 101, while most of the part of the dielectric layer 101 which does not form pores 111 can ensure that the dielectric layer 101 has good passivation performance on the substrate 100.

[0171] ​Further, the transmission resistance corresponding to the reference transmission path in at least part of the solar cell increases with the increase of the temperature at which the solar cell is located, i.e., the transmission efficiency of the carriers in the dielectric layer 101 decreases with the increase of the temperature at which the dielectric layer 101 is located. In this way, on the one hand, even if the temperature at which the dielectric layer 101 is located is relatively low, the transmission resistance corresponding to the reference transmission path is also relatively low, i.e., the transmission efficiency of the carriers in the dielectric layer 101 is relatively high, which is beneficial to ensure that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature; on the other hand, if the temperature at which the dielectric layer 101 is located increases, the transmission resistance corresponding to the reference transmission path increases, i.e., by virtue of the characteristic that the transmission efficiency of the carriers is inhibited at a relatively high temperature, the current in the local region of the solar cell can be reduced, thereby being beneficial to reduce the risk of thermal runaway of the solar cell; on the other hand, if the temperature in the local region of the solar cell increases, causing the transmission resistance corresponding to the reference transmission path in the local region to increase, i.e., causing the transmission efficiency of the carriers in the local region to decrease, the carriers in the local region will tend to be laterally transmitted to other regions with a lower temperature, and then transmitted to the doped layer 102 through the dielectric layer 101, which is beneficial to reduce the number of carriers gathered in the local high-temperature region of the solar cell, and by virtue of the characteristic that the transmission resistance corresponding to the reference transmission path in the high-temperature region of the solar cell increases, or in other words, by virtue of the characteristic that the transmission efficiency of the carriers in the high-temperature region of the solar cell decreases, the uniform distribution of the current in the solar cell is promoted, so as to further reduce the risk of thermal runaway of the solar cell.

[0172] Another embodiment of the present application also provides a manufacturing method of a solar cell, which is used to form the solar cell provided in the foregoing embodiments. The manufacturing method of the solar cell provided in another embodiment of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the same or corresponding parts as those in the foregoing embodiments will not be described herein.

[0173] Reference Figures 17 to 19 , and Figure 2 , Figure 3 , Figure 5 and Figure 6 , the manufacturing method of the solar cell at least includes the following steps: Figure 17 providing a substrate 100, the substrate 100 has a first surface 100a and a second surface 100b opposite to each other along a first direction X; in combination with reference Figures 17 to 19 , and Figure 2 , Figure 3 , Figure 5 and Figure 6forming a medium layer 101 and a doped layer 102 on at least one of the first surface 100a and the second surface 100b in sequence; wherein the medium layer 101 comprises a plurality of pores 111, and at least part of the pores 111 penetrate the medium layer 101 along the first direction X, and the carriers in the substrate 100 are transmitted to the doped layer 102 through the medium layer 101 along the first direction X, and the transmission efficiency of the carriers in the medium layer 101 decreases with the increase of the temperature of the medium layer 101.

[0174] wherein, Figure 17 a cross-sectional view of a substrate in a method for manufacturing a solar cell according to another embodiment of the present application; Figure 18 a cross-sectional view of a substrate in a method for manufacturing a solar cell according to another embodiment of the present application; Figure 19 a cross-sectional view of a substrate in a method for manufacturing a solar cell according to another embodiment of the present application.

[0175] It is worth noting that in the solar cell formed by the method for manufacturing a solar cell according to another embodiment of the present application, the medium layer 101 comprises a plurality of pores 111, and at least part of the pores 111 penetrate the medium layer 101 along the first direction X, so that the transmission mechanism of the carriers in the medium layer 101 is mainly to realize transmission by means of the pores 111, which is conducive to increasing the thickness fluctuation range of the medium layer 101, i.e. increasing the process window when the medium layer 101 is prepared, and at the same time, most of the part of the medium layer 101 which does not form pores 111 can ensure that the medium layer 101 has good passivation performance on the substrate 100. Further, the transmission resistance corresponding to the reference transmission path in at least part of the solar cells increases with the increase of the temperature of the solar cell, i.e. the transmission efficiency of the carriers in the medium layer 101 decreases with the increase of the temperature of the medium layer 101, so that on the one hand, it is conducive to ensuring that the solar cell has a relatively high photoelectric conversion efficiency at a relatively low temperature; on the other hand, if the temperature of the medium layer 101 increases, the transmission resistance corresponding to the reference transmission path increases, i.e. the transmission efficiency of the carriers is inhibited at a relatively high temperature, which can reduce the current in the local area of the solar cell, thereby reducing the risk of thermal runaway of the solar cell; on the other hand, by means of the characteristics that the transmission resistance corresponding to the reference transmission path in the high-temperature area of the solar cell increases due to the temperature difference, or in other words, by means of the characteristics that the transmission efficiency of the carriers in the high-temperature area of the solar cell decreases, the uniform distribution of the current in the solar cell can be promoted, so as to further reduce the risk of thermal runaway of the solar cell.

[0176] In some embodiments, the step of forming the medium layer 101 and the doped layer 102 comprises: Figure 18 orFigure 19 An initial medium layer 121 is formed on at least one of the first surface 100a and the second surface 100b; refer to Figure 18 Or Figure 19 An initial doping layer 112 is formed on the side of the initial medium layer 121 away from the substrate 100, and the initial doping layer 112 can be amorphous silicon doped with a doping element; refer to Figure 18 、 Figure 19 、 Figure 2 And Figure 3 Or refer to Figure 18 、 Figure 19 、 Figure 5 And Figure 6 The semi-finished solar cell with the initial doping layer 112 is subjected to a heat treatment to crystallize the initial doping layer 112, so that the initial doping layer 112 is converted into polycrystalline silicon doped with the doping element, i.e., the doping layer 102; and in the step of the heat treatment, the initial medium layer 121 is also subjected to a treatment to form pores 111, so that the initial medium layer 121 is converted into the medium layer 101 with a plurality of pores 111.

[0177] It should be noted that in actual applications, the medium layer with pores can be first formed on the substrate, and then the doping layer is directly formed on the medium layer.

[0178] In some cases, the process temperature for the heat treatment is 800-1100℃. Preferably, the process temperature for the heat treatment can be 900-950℃ or 890-930℃, for example, 895℃, 900℃, 905℃, 910℃, 915℃, 920℃, 925℃, 930℃, 935℃, 940℃ or 945℃, etc.

[0179] It should be noted that refer to Figure 4 Compared with the arrangement density of the pores 111 in the medium layer 101 in the solar cell corresponding to Group 3 shown in Figure 4 If the process temperature for the heat treatment is greater than 930℃ or 950℃, the arrangement density of the pores in the medium layer in the finally formed solar cell will be greater, and the impedance corresponding to the transmission path is more likely to be lower than 0.1 mΩ·cm 2 For example, lower than 0.05 mΩ·cm 2 However, the number of pores arranged in a unit area in the medium layer needs to be greater, although the fill factor of the solar cell is improved, the passivation effect of the medium layer on the substrate is reduced, and the open circuit voltage of the solar cell is reduced.

[0180] Compared with Figure 4The Group 1 shown corresponds to the arrangement density of the pores 111 in the solar cell in the medium layer 101. If the process temperature of the heat treatment is less than 900℃ or 890℃, the arrangement density of the pores in the medium layer in the finally formed solar cell will be smaller, or Figure 4 The Group 1 shown corresponds to the arrangement of the pores 111 in the solar cell, which is as sparse as the reference transmission path. The impedance corresponding to the reference transmission path is prone to be 1.4mΩ·cm 2 or higher, for example, equal to Figure 4 1.46mΩ·cm 2 , so as to reduce the promotion effect of the medium layer 101 on the transmission efficiency of the carriers in the medium layer 101.

[0181] Therefore, the process temperature of the heat treatment is designed to be 900℃-950℃ or 890℃-930℃, which is beneficial to control the arrangement density of the pores 111 in the medium layer 101 to be moderate, and further control the impedance corresponding to the reference transmission path to be in the range of 0.1mΩ·cm 2 -1.3mΩ·cm 2 , so as to promote the transmission efficiency of the carriers in the medium layer 101 by relying on the low impedance of the reference transmission path, while ensuring that the medium layer 101 has a good passivation effect on the substrate 100.

[0182] In some cases, the processing time of the heat treatment can be 20min-60min, for example, it can be 21min, 22min, 23min, 24min, 25min, 26min, 27min, 28min, 29min, 30min, 31min, 32min, 33min, 34min, 35min, 36min, 37min, 38min, 39min, 40min, 41min, 42min, 43min, 44min, 45min, 46min, 47min, 48min, 49min, 50min, 51min, 52min, 53min, 54min, 55min, 56min, 57min, 58min or 59min, etc.

[0183] In some cases, the initial dielectric layer 121 can be formed by a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. In some examples, the thickness of the initial dielectric layer 121 along the first direction X can be 1 nm to 3 nm, for example, can be 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, 2.5 nm, 2.6 nm, 2.7 nm, 2.8 nm, or 2.9 nm, etc.

[0184] In some cases, the initial doped layer 112 can be formed by a deposition process.

[0185] In some examples, the deposition process for forming the initial doped layer 112 can be a PECVD process, a LPCVD (Low Pressure Chemical Vapor Deposition) process, or an ALD (Atomic Layer Deposition) process, etc.

[0186] In some examples, the thickness of the initial doped layer 112 along the first direction X can be less than or equal to 150 nm. Preferably, the thickness of the initial doped layer 112 can be 60 nm to 100 nm, for example, can be 62 nm, 65 nm, 67 nm, 70 nm, 72 nm, 75 nm, 78 nm, 80 nm, 83 nm, 85 nm, 88 nm, 90 nm, 93 nm, 95 nm, or 98 nm, etc.

[0187] The preparation method of the dielectric layer 101 and the doped layer 102 is described in detail below, taking the finally formed solar cell as a TOPCON cell.

[0188] On this basis, combined with reference Figure 9 and Figure 17The second surface 100b has the first regions 35 and the second regions 46 arranged alternately along the second direction Y. The medium layer 101 includes a second medium layer on the second surface 100b. The doped layer 102 includes a second doped layer on the second surface 100b. For example, the second medium layer and the second doped layer are formed by the following steps: forming a second medium film covering the second surface 100b; forming a second doped semiconductor film on a side of the second medium film away from the second surface 100b; forming a first mask film on a side of the second doped semiconductor film away from the second surface 100b; performing heat treatment to convert the second doped semiconductor film into an initial second doped layer; performing laser processing on the first mask film to remove the first mask film on the second regions 46; performing single-sided edge around plating of the first mask film on the first surface 100a by using a chain hydrogen fluoride acid etching process; removing the initial second doped layer on the second regions 46 and not protected by the first mask film by using an alkali etching process; and removing the first mask film remaining on the first regions 35 and removing the second medium film exposed on the second regions 46 by using a hydrogen fluoride acid etching solution. The second medium layer is the second medium film remaining on the first regions 35. The second doped layer is the initial second doped layer remaining on the first regions 35. It should be noted that the heat treatment is the heat treatment described above.

[0189] In some cases, the laser processing uses the following parameters: the laser power can be 40w-60w, for example, 45w, 50w, or 55w, etc.; the laser scanning speed can be 50000mm / s-55000mm / s, for example, 51000mm / s, 52000mm / s, 53000mm / s, or 54000mm / s, etc.; and the laser frequency can be 400KHz-600KHz, for example, 450KHz, 500KHz, or 550KHz, etc.

[0190] In some embodiments, before the medium layer 101 and the doped layer 102 are formed, the substrate 100 can be provided by the following steps:

[0191] An initial substrate is provided, and the initial substrate is doped with a first doped element. In some examples, the initial substrate has a resistivity of 0.3Ω·cm-7Ω·cm.

[0192] The initial substrate is double-side textured to form a pyramid texture. In some examples, the size of the pyramid can be 0.5μm-3μm.

[0193] An emitter is formed on the front surface of the initial substrate. In some examples, the initial substrate is doped with an N-type doped element, and the emitter is a P+ emitter, i.e., a boron-doped emitter. The doping concentration of the boron element in the P+ emitter can be 1×1019atom / cm 18 atom / cm 31x10 19 atom / cm 3 The sheet resistance of the P+ emitter can be 300Ω / sq~500Ω / sq, preferably, the sheet resistance of the P+ emitter can be 350Ω / sq~450Ω / sq.

[0194] The back surface of the initial substrate is polished. In some examples, the back surface of the initial substrate is formed with silicon oxide in the foregoing process, the back surface silicon oxide is removed by using hydrofluoric acid by adopting a single-sided chain device, and then the back surface is subjected to alkali polishing to remove edge junctions and back surface plating, and finally cleaning treatment is performed.

[0195] In some embodiments, before forming the medium layer 101 and the doped layer 102, the method for manufacturing the solar cell can further include the following steps:

[0196] In a single insertion manner, an aluminum oxide passivation layer is deposited on the first surface 100a and the second surface 100b by adopting an ALD process, wherein the aluminum oxide passivation layer on the second surface 100b is not only located on the side of the second doped layer away from the substrate 100, but also located on the second region 46 to passivate the substrate 100 on the second region 46. In some examples, the thickness of the aluminum oxide passivation layer can be 2nm~7nm, preferably, 3nm~6nm.

[0197] A PECVD process is adopted to deposit an anti-reflection layer on the first surface 100a and the second surface 100b. In some examples, the anti-reflection layer can be a single-layer film or a laminated film including one or more of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the anti-reflection layer can be 60nm~130nm.

[0198] An electrode paste is formed on the first region 35 of the first surface 100a and the second surface 100b by adopting a screen printing process, and then the electrode paste is subjected to sintering treatment and photo injection treatment or electrical injection treatment to form an electrode in ohmic contact with the doped layer 102.

[0199] Finally, the manufactured solar cell is tested, sorted, and warehoused.

[0200] Another embodiment of the present application further provides a photovoltaic module for converting received light energy into electrical energy. The photovoltaic module provided by another embodiment of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the same or corresponding parts as the foregoing embodiments will not be described herein.

[0201] In combination with reference Figure 20 and Figure 21 , and Figures 1 to 19The photovoltaic module includes: a cell string formed by connecting a plurality of the solar cells 40 provided in the above embodiments or formed by connecting a plurality of the solar cells 40 formed by the manufacturing method of the solar cells provided in the above embodiments; an encapsulant film 41 for covering a surface of the cell string; and a cover plate 42 for covering a surface of the encapsulant film 41 away from the cell string.

[0202] wherein, Figure 20 A partial perspective view of a cell string in a photovoltaic module according to another embodiment of the present application; Figure 21 A partial cross-sectional view of a photovoltaic module according to another embodiment of the present application.

[0203] In some embodiments, the solar cells 40 are electrically connected in a whole piece or multiple pieces to form a plurality of cell strings, and the plurality of cell strings are electrically connected in series and / or in parallel. The solar cells 40 can be whole piece cells or sliced cells, where a sliced cell refers to a cell formed by slicing a whole piece cell.

[0204] In some embodiments, in combination with reference to Figure 20 and Figure 21 The plurality of solar cells 40 can be electrically connected by the conductive ribbons 43. Figure 20 and Figure 21 Only a positional relationship between two solar cells 40 is schematically shown, i.e., the arrangement direction of the grid lines with the same polarity of the solar cells 40 is the same or each solar cell 40 has the grid lines with the positive polarity arranged toward the same side, so that the conductive ribbons 43 are connected to different sides of two adjacent solar cells 40, respectively. In other embodiments, the solar cells can also be arranged such that the electrodes with different polarities are arranged toward the same side, i.e., the electrodes of the plurality of adjacent solar cells are sequentially arranged in the order of the first polarity, the second polarity, and the first polarity, and then the conductive ribbons are connected to two adjacent solar cells on the same side.

[0205] In some embodiments, the encapsulating film 41 includes a first encapsulating layer and a second encapsulating layer. The first encapsulating layer covers one of the front or back sides of the solar cell 40, and the second encapsulating layer covers the other of the front or back sides of the solar cell 40. Specifically, at least one of the first or second encapsulating layer can be an organic encapsulating film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene elastomer (POE) film, or polyethylene terephthalate (PET) film. Alternatively, at least one of the first or second encapsulating layer can also be an EP film, an EPE film, or a PVP film. Here, EP film refers to a co-extruded film composed of stacked EVA film and POE film; EPE film refers to a co-extruded film formed by sequentially stacking EVA film + POE film + EVA film; and PVP film refers to a co-extruded film formed by stacking POE film + EVA film + POE film. Co-extruded films can be prepared by sequentially extruding one or more raw materials onto another pre-made film during the film processing, or by bonding different types of pre-made films together.

[0206] In some cases, the first encapsulation layer and the second encapsulation layer still have a boundary line before lamination. After lamination, the photovoltaic module will no longer have the concept of a first encapsulation layer and a second encapsulation layer. That is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 41.

[0207] In some embodiments, the cover plate 42 can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function. Specifically, the surface of the cover plate 42 facing the encapsulating film 41 can be an uneven surface or a textured surface containing multiple raised structures, thereby increasing the utilization rate of incident light. The cover plate 42 includes a first cover plate and a second cover plate, the first cover plate being opposite to the first encapsulation layer, and the second cover plate being opposite to the second encapsulation layer.

[0208] Those skilled in the art will understand that the above-described embodiments are specific examples of implementing this application, and in practical applications, various changes can be made in form and detail without departing from the spirit and scope of the embodiments of this application. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the embodiments of this application; therefore, the scope of protection of the embodiments of this application should be determined by the scope defined in the claims.

Claims

1. A solar cell, characterized by, The solar cell comprises: a substrate having a first surface and a second surface opposite to each other in a first direction; a medium layer on at least one of the first surface and the second surface, the medium layer comprising a plurality of pores, at least a part of the plurality of pores penetrating through the medium layer in the first direction; In the first direction, the thickness of the medium layer is 1 nm to 3 nm; the arrangement density of the pores in the medium layer is 1×10 6 0 / cm 2 2 to 1×10 8 0 / cm 2 ; the pores in the medium layer are formed by a heat treatment, the heat treatment is performed at a process temperature of 800°C to 1100°C, and the heat treatment is performed for a process time of 20 min to 60 min; the medium layer comprises a first part and a second part, the pores are located in the first part, a portion of the first part that is opposite to the pores not penetrating through the medium layer is thinner than other portions of the medium layer, and the ratio of the current density in the first part to the current density in the second part is greater than or equal to 10. a doped layer on a side of the medium layer away from the substrate; wherein a transmission path of a carrier in the first direction through the substrate, the medium layer and the doped layer is a reference transmission path, and a transmission resistance corresponding to the reference transmission path in the solar cell increases with an increase of a temperature at which the solar cell is located.

2. The solar cell according to claim 1, characterized in that, The medium layer comprises a first medium layer, and the doped layer comprises a first doped layer on a side of the first medium layer away from the substrate; the first doped layer and the substrate have different doped elements of a conductive type; and a transmission path of the carrier in the first direction through the substrate, the first medium layer and the first doped layer is one of the reference transmission paths.

3. The solar cell of claim 1, wherein The medium layer comprises a second medium layer; the doped layer comprises a second doped layer on a side of the second medium layer away from the substrate; the second doped layer and the substrate have the same doped elements of the conductive type; and a transmission path of the carrier in the first direction through the substrate, the second medium layer and the second doped layer is one of the reference transmission paths.

4. The solar cell according to claim 3, characterized in that, At least one of the first surface and the second surface of the substrate has first regions and second regions arranged alternately in a second direction; the second medium layer and the second doped layer are located in the first regions; or the second medium layer and the second doped layer are located in the first regions and the second regions simultaneously.

5. The solar cell of claim 1, wherein A diffusion layer is further arranged between the substrate and the medium layer, and the diffusion layer and the doped layer have the same doped elements of the conductive type.

6. The solar cell according to claim 5, characterized in that, The doping concentration of the doping element in the diffusion layer is 1 x 10 18 atom / cm 3 ~1 x 10 19 atom / cm 3 .

7. The solar cell of claim 1, wherein The first surface or the second surface is a back surface, and the back surface has first field regions and second field regions arranged alternately in the second direction; wherein the medium layer comprises a third medium layer on the first field regions, the doped layer comprises a third doped layer on the first field regions, the third doped layer and the substrate have the same doped elements of the conductive type, and a transmission path of the carrier in the first direction through the substrate, the third medium layer and the third doped layer is one of the reference transmission paths; and / or the medium layer comprises a fourth medium layer on the second field regions, the doped layer comprises a fourth doped layer on the second field regions, the fourth doped layer and the substrate have different doped elements of the conductive type, and a transmission path of the carrier in the first direction through the substrate, the fourth medium layer and the fourth doped layer is one of the reference transmission paths.

8. The solar cell of claim 7, wherein, An isolation region is arranged between the first field regions and the second field regions.

9. The solar cell of claim 1, wherein, The material of the medium layer comprises one or more of silicon oxide, silicon carbide, silicon nitride and silicon oxynitride; and / or the material of the medium layer comprises one or more of amorphous silicon, microcrystalline silicon and nanocrystalline silicon.

10. The solar cell of claim 1, wherein, The reference transmission path includes a first reference transmission path and a second reference transmission path, wherein the transmission path of the carrier via the substrate, the first part and the doped layer is the first reference transmission path; and / or the transmission path of the carrier via the substrate, the second part and the doped layer is the second reference transmission path.

11. The solar cell of claim 10, wherein, The transmission resistance corresponding to the first reference transmission path increases with the increase of the temperature at which the solar cell is located; and / or the transmission resistance corresponding to the second reference transmission path decreases with the increase of the temperature at which the solar cell is located.

12. The solar cell of claim 1, wherein, The impedance corresponding to the reference transmission path is 0.05 mΩ·cm 2 1.4 mΩ·cm 2 .

13. The solar cell of claim 1, wherein, At least part of the number of the pores contains the substrate and / or the doped layer; and / or at least part of the number of the pores has an air gap.

14. The solar cell of claim 1, wherein, The temperature range of the medium layer is -50℃~150℃.

15. A solar cell, characterized by, Comprise: a substrate, the substrate has a first surface and a second surface opposite along a first direction; a medium layer located on at least one of the first surface and the second surface, the medium layer includes a plurality of pores, at least part of the number of the pores penetrates the medium layer along the first direction; In the first direction, the thickness of the medium layer is 1 nm to 3 nm; the arrangement density of the pores in the medium layer is 1×10 6 cm 2 -1×10 8 cm 2 ; the pores in the medium layer are formed by a heat treatment, the heat treatment uses a process temperature of 800°C to 1100°C, and the heat treatment has a processing time of 20 min to 60 min; the medium layer includes a first part and a second part, the pores are located in the first part, a portion of the first part that is opposite to the pores that do not penetrate the medium layer is thinner than other portions of the medium layer, and the ratio of the current density in the first part to the current density in the second part is greater than or equal to 10. a doped layer located on the side of the medium layer away from the substrate; wherein the carrier is transmitted to the doped layer along the first direction via the substrate and the medium layer, and the transmission efficiency of the carrier in at least part of the region of the medium layer decreases with the increase of the temperature at which the medium layer is located.

16. The solar cell of claim 15, wherein, The medium layer includes a first medium layer, and the doped layer includes a first doped layer located on the side of the first medium layer away from the substrate; the first doped layer and the substrate have different doped elements of conductive type; the minority carrier in the carrier is transmitted to the first doped layer along the first direction via the substrate and the first medium layer.

17. The solar cell of claim 15, wherein, The medium layer includes a second medium layer; the doped layer includes a second doped layer located on the side of the second medium layer away from the substrate, and the second doped layer and the substrate have the same doped elements of conductive type; the majority carrier in the carrier is transmitted to the second doped layer along the first direction via the substrate and the second medium layer.

18. The solar cell of claim 17, wherein, At least one of the first surface and the second surface has a first area and a second area arranged alternately along a second direction; the second medium layer and the second doped layer are located on the first area; or the second medium layer and the second doped layer are located on the first area and the second area at the same time.

19. The solar cell of claim 15, wherein, The diffusion layer and the doped layer have the same doped elements of conductive type.

20. The solar cell of claim 19, wherein, The doping concentration of the doping element in the diffusion layer is 1 x 10 18 atom / cm 3 ~1 x 10 19 atom / cm 3 .

21. The solar cell of claim 15, wherein, The first surface or the second surface is a back surface, and the back surface has a first field area and a second field area arranged alternately along a second direction; wherein, the medium layer includes a third medium layer located on the first field area, the doped layer includes a third doped layer located on the first field area, the third doped layer and the substrate have the same doped elements of conductive type, and the majority carrier in the carrier is transmitted to the third doped layer along the first direction via the substrate and the third medium layer; and / or, The medium layer comprises a fourth medium layer located on the second field region, the doped layer comprises a fourth doped layer located on the second field region, the fourth doped layer and the substrate have different conductive types of doped elements, and the minority carriers in the carriers are transmitted to the fourth doped layer through the substrate and the fourth medium layer in the first direction.

22. The solar cell of claim 21, wherein, An isolation region is arranged between the first field region and the second field region.

23. The solar cell of claim 15, wherein, The material of the medium layer comprises one or more of silicon oxide, silicon carbide, silicon nitride, and silicon oxynitride; and / or, the material of the medium layer comprises one or more of amorphous silicon, microcrystalline silicon, and nanocrystalline silicon.

24. The solar cell of claim 15, wherein, The transmission path of the carriers along the first direction via the substrate, the medium layer and the doped layer is a reference transmission path, and the impedance corresponding to the reference transmission path is 0.05 mΩ·cm 2 1.4 mΩ·cm 2 .

25. The solar cell of claim 15, wherein, The transmission path of the carriers in the first direction through the substrate, the medium layer, and the doped layer is a reference transmission path, the reference transmission path comprises a first reference transmission path and a second reference transmission path, wherein the transmission path of the carriers through the substrate, the first part, and the doped layer is the first reference transmission path; and / or, the transmission path of the carriers through the substrate, the second part, and the doped layer is the second reference transmission path.

26. The solar cell of claim 25, wherein, The transmission resistance corresponding to the first reference transmission path increases with the increase of the temperature at which the solar cell is located; and / or, the transmission resistance corresponding to the second reference transmission path decreases with the increase of the temperature at which the solar cell is located.

27. The solar cell of claim 15, wherein, At least part of the number of the pores contain the substrate and / or the doped layer; and / or, at least part of the number of the pores have air gaps.

28. The solar cell of claim 15, wherein, The temperature range of the medium layer is -50℃~150℃.

29. A photovoltaic module, characterized by, Comprise: A battery string connected by a plurality of solar cells as claimed in any one of claims 1 to 14, or connected by a plurality of solar cells as claimed in any one of claims 15 to 28; An encapsulation film for covering the surface of the battery string; A cover plate for covering the surface of the encapsulation film away from the battery string.

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