DC fault current limiter test device and test method

Abstract

The invention discloses a direct current fault current limiter test device and a test method corresponding to the direct current fault current limiter test device, and the direct current fault current limiter test device designs C0 and L0 according to an actual converter station, and pre-charges the C0 with a system rated voltage to simulate a fault current generated by a bipolar short circuit fault. The rapid current limiting test can be carried out on the current limiter, important parameters such as the current limiting speed, the current limiting depth, the response speed and the absorption energy of the current limiter can be obtained, and the parameters of the current limiter are improved according to test results. Meanwhile, the energy storage capacitor can be used for carrying out a static voltage withstanding test on the direct-current fault current limiter to test the voltage withstanding performance of the direct-current fault current limiter. The test device has the advantages of being simple in structure, reusable, adjustable in current waveform and the like, and the energy release grounding unit is arranged in the device, so that the safety of test personnel is guaranteed. The charging speed of the test device is greatly improved, and the test efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of high-voltage power electronics, and in particular to a DC fault current limiter test device and a test method. Background Art

[0002] Due to the large-scale access of new energy power sources and the increasing demand for their application in various scenarios of new power systems. The DC regional power grid has the characteristic of "low inertia" and faces severe challenges in short-circuit fault protection. Specifically, the fault current rises quickly, has a high amplitude and no zero crossing point. Relay protection and circuit breakers are required to interrupt high-amplitude DC currents of several kA or even more than ten kA within hundreds of microseconds, which is far beyond the technical level of existing relay protection and circuit breakers. Therefore, it is necessary to increase the fault current limiting device to limit the short-circuit fault current. Fault Current Limiter (FCL), also known as short-circuit current limiter or simply current limiter, is an impedance conversion device or a fast-breaking device with current limiting function that is connected in series in an electrical circuit and can effectively limit the fault current including its first peak value.

[0003] Fault current limiting technology has been developed for decades, with numerous current limiting methods emerging, including superconducting, resonant, solid-state, saturated iron core, liquid metal, and hybrid approaches. These different current limiting technologies rely on various materials or power electronic components to achieve basic current limiting functions, each with its own advantages and disadvantages in terms of current limiting performance, cost-effectiveness, and reliability. The current limiting performance of a fault current limiter (FCL) determines its effectiveness and is a key parameter. However, a device capable of testing the performance of these devices has been lacking during the development process. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a DC fault current limiter test device, which can design C0 and L0 according to the actual converter station, and pre-charge the system rated voltage for C0 to simulate the fault current generated by a bipolar short-circuit fault. By performing a rapid current limiting test and a static withstand voltage test on the current limiter, important parameters such as the current limiting speed, current limiting depth, response speed, and absorbed energy of the current limiter can be obtained, and the current limiter parameters can be improved based on the test results. At the same time, the test device has the ability to test DC fault current limiters with different parameters and can generate fault current waveforms with different parameters. This test device has the advantages of simple structure, reusability, and adjustable current waveform. An energy dissipation grounding unit is provided in the device to ensure the safety of the test personnel.

[0005] The present invention also provides an experimental method corresponding to the above-mentioned experimental device.

[0006] The DC fault current limiter test device according to the first embodiment of the present invention is characterized by comprising:

[0007] A DC charging circuit comprises a DC power supply (DC), a charging switch (K1), an energy dissipation switch (K2), an energy dissipation resistor (R1) and an energy storage capacitor (C1); wherein the positive electrode of the DC power supply (DC) is connected to the positive electrode of the energy storage capacitor (C1) through the charging switch (K1), and the negative electrode of the energy storage capacitor (C1) is connected to the negative electrode of the DC power supply (DC) and a ground wire; one end of the energy dissipation switch (K2) is connected to the positive electrode of the energy storage capacitor (C1), and the other end is grounded through the energy dissipation resistor (R1);

[0008] A performance test circuit comprises a controllable discharge switch (K3), a test object (C2), a large-capacity adjustable inductor (L0), and a monitoring unit; wherein the positive electrode of the energy storage capacitor (C1) is connected to the positive electrode of the test object (C2) via the controllable discharge switch (K3), the negative electrode of the test object (C2) is connected to one end of the large-capacity adjustable inductor (L0), and the other end of the large-capacity adjustable inductor (L0) is connected to the negative electrode of the energy storage capacitor (C1) and a ground wire; the monitoring unit comprises a Rogowski coil (A) for collecting current waveforms and a high-voltage differential probe (V2) for collecting voltage waveforms;

[0009] A control module is used to control the on and off of the charging switch (K1), the energy release switch (K2) and the controllable discharge switch (K3), and receive feedback signals from the monitoring unit;

[0010] The DC charging circuit and the performance test circuit are coupled via an energy storage capacitor (C1), and the charging switch (K1) and the controllable discharge switch (K3) are not turned on at the same time.

[0011] The DC fault current limiter test device according to an embodiment of the present invention has at least the following beneficial effects: C0 and L0 are designed based on the actual converter station, and C0 is pre-charged with the system rated voltage to simulate the fault current generated by a bipolar short-circuit fault. A rapid current limiting test can be performed on the current limiter, and important parameters such as the current limiting speed, current limiting depth, response speed, and absorbed energy of the current limiter can be obtained. Based on the test results, the current limiter parameters can be improved. At the same time, a static withstand voltage test can be performed on the DC fault current limiter using an energy storage capacitor to test its withstand voltage performance. This achieves the advantages of simple structure, reusability, and adjustable current waveform. Furthermore, an energy dissipation grounding unit is provided in the device to ensure the safety of test personnel. The charging speed of the test device is greatly improved, thereby enhancing test efficiency.

[0012] According to some embodiments of the present invention, the DC power supply (DC) is a constant current charging power supply, and a high-precision voltmeter (V1) is connected to both ends of the energy storage capacitor (C1), and the measurement value of the high-precision voltmeter (V1) is fed back to the DC power supply (DC) to control the charging cut-off voltage.

[0013] According to some embodiments of the present invention, the inductance value of the large-capacity adjustable inductor (L0) is adjusted according to the capacitance value of the energy storage capacitor (C1) and target fault current waveform parameters, wherein the parameters include peak current (i0) and peak time (t0), which satisfy the following relationship:

[0014]

[0015] Where U0 is the rated voltage of the energy storage capacitor (C1).

[0016] According to some embodiments of the present invention, the performance test loop further includes a short-circuit switch (S1) for short-circuiting two ends of the test product (C2) to perform a loop discharge test.

[0017] The DC fault current limiter test method according to the second embodiment of the present invention is characterized by using any of the test devices described above, including a fast current limiting performance test and a static voltage withstand performance test, wherein:

[0018] The fast current limiting performance test includes:

[0019] a. Determine the capacitance value of the energy storage capacitor (C1) and the inductance value of the large-capacity adjustable inductor (L0) to meet the target fault current waveform peak value (i0) and peak time (t0);

[0020] b. Set the test product (C2) to the on state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to a preset voltage, and then disconnect the charging switch (K1);

[0021] c. Turn on the controllable discharge switch (K3) and record the reference current waveform and voltage waveform when the current limit is not triggered;

[0022] d. Set the product under test (C2) to the current limit trigger state, repeat the charge and discharge operations, and record the current waveform and voltage waveform when the current limit is triggered;

[0023] e. Compare the waveform data of step c and step d to analyze the current limiting speed, current limiting depth and response time of the test product (C2);

[0024] Static pressure resistance test includes:

[0025] f. Determine the withstand voltage test voltage (U1) of the product to be tested (C2);

[0026] g. Set the DUT (C2) to the disconnected state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to U1, and then disconnect the charging switch (K1);

[0027] h. Turn on the controllable discharge switch (K3) and keep it on for a preset time, record the voltage change across the test object (C2), and evaluate its withstand voltage performance.

[0028] The DC fault current limiter test method according to an embodiment of the present invention has at least the following beneficial effects: the test method provided by the present invention can effectively determine the fast current limiting performance of the DC fault current limiter, and the measured waveform data can provide a reference for optimizing the parameters of the DC fault current limiter.

[0029] According to some embodiments of the present invention, in step a, the inductance value of the large-capacity adjustable inductor (L0) is adjusted to achieve simulation of different fault current waveforms.

[0030] According to some embodiments of the present invention, in step c and step d, the energy dissipation switch (K2) is turned on immediately after the discharge is completed, and the residual energy of the energy storage capacitor (C1) is released through the energy dissipation resistor (R1).

[0031] According to some embodiments of the present invention, the product under test (C2) is a solid-state or hybrid DC fault current limiter based on power electronic devices.

[0032] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0034] Figure 1 This is a structural diagram of a DC fault current limiter test device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0036] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.

[0037] In the description of the present invention, "several" means one or more, "many" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" in the description is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0038] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0039] Example 1

[0040] like Figure 1 As shown in the figure, DC is a DC power supply, K1 is a charging switch, K2 is an energy dissipation switch, R1 is an energy dissipation resistor, C1 is an energy storage capacitor bank, K3 is a controllable discharge switch, C2 is a test capacitor, L0 is an adjustable inductor, V1 is a high-precision voltmeter, V2 is a voltage sensor, which is a high-voltage differential probe in this case, A is a current sensor, which uses a Rogowski coil in this case, S1 is a high-precision oscilloscope, and the product to be tested is a DC fault current limiter.

[0041] The test device's main circuit consists of a DC charging circuit and a performance test circuit, which are interconnected. The test device also has a control module to control the main circuit.

[0042] The DC charging circuit can realize the charging and discharging functions of the energy storage capacitor; the performance test circuit can simulate the short-circuit current and evaluate the performance of the DC fault current limiter;

[0043] The main components of the DC charging circuit include a DC power supply, a charging switch, a grounding switch, and an energy dissipation resistor; the performance test circuit includes an energy storage capacitor, a large-capacity adjustable inductor, a controllable discharge switch, and the product to be tested.

[0044] In the DC charging circuit, the positive pole of the DC power supply is connected to one end of the charging switch, the other end of the charging switch is connected to the positive pole of the energy storage capacitor, the negative pole of the energy storage capacitor is connected to the negative pole of the DC power supply, and the negative pole of the energy storage capacitor and the negative pole of the DC power supply are both connected to the ground wire. At the same time, the positive pole of the energy storage capacitor is connected to one end of the energy discharge switch, and the other end of the energy discharge switch is connected to the energy discharge resistor and connected to the ground wire.

[0045] When the test personnel connect the test circuit, they must ensure that the charging switch is disconnected. At this time, the DC power supply cannot work. When the charging switch is turned on, the DC power supply is allowed to charge the energy storage capacitor. The energy storage capacitor stores energy. The charging energy stored in the energy storage capacitor is the energy of the test product at the rated voltage.

[0046] In the DC charging circuit, the DC power supply uses a controllable constant current charging power supply. After setting the target charging voltage before charging, the control power supply starts working. The DC power supply automatically stops charging after reaching the target voltage.

[0047] In the test circuit, a high-precision voltmeter is installed in the DC charging circuit and connected across the energy storage capacitor. The measured value of the high-precision voltmeter is then fed back to the DC power supply.

[0048] When the energy dissipation switch is turned on, the energy stored in the energy storage capacitor can be released through the energy dissipation resistor.

[0049] In the DC charging circuit, a DC power supply is connected in series with an energy storage capacitor. The reading of a voltmeter connected across the capacitor controls whether the DC power supply charges the capacitor, thereby controlling the energy stored within the capacitor. If a fault or abnormality occurs in the overall test circuit, the energy discharge switch is closed, and the energy stored in the capacitor is released through the discharge resistor, ensuring the safety of the test personnel.

[0050] The charging switch in the DC charging circuit of the test circuit and the controllable discharge switch in the performance test circuit are not turned on at the same time. By adjusting the stored energy in the energy storage capacitor, the waveform generated by the performance test circuit can be controlled to meet the test requirements under different conditions.

[0051] The performance test circuit uses an energy storage capacitor as the circuit power supply. The positive electrode of the energy storage capacitor is connected to the high-voltage terminal of the controllable discharge switch, the low-voltage terminal of the controllable discharge switch is connected to the positive electrode of the test sample, and the negative electrode of the test sample is connected to one end of a large-capacity adjustable inductor. The other end of the large-capacity adjustable inductor is connected to the negative electrode of the energy storage capacitor and the ground wire.

[0052] In the performance test circuit, a short-circuit switch can be used to short-circuit the two ends of the test object to discharge the circuit. The resistance of the short-circuit switch is negligible compared to the circuit resistance.

[0053] In the performance test circuit, a Rogowski coil is placed between the controllable discharge switch and the positive electrode of the test sample, and a high-voltage differential probe is placed at both ends of the test sample. Both the Rogowski coil and the high-voltage probe are connected to the waveform acquisition device. The Rogowski coil collects the discharge current waveform of the performance test circuit, and the high-voltage probe collects the voltage waveform across the test sample.

[0054] In the performance test circuit, the inductance value of the large-capacity adjustable inductor is calculated and selected based on the capacitance of the energy storage capacitor to ensure that the discharge waveform meets the requirements of the test method.

[0055] Example 2

[0056] Based on the DC fault current limiter test device provided in the embodiment, another embodiment of the present application provides a DC fault current limiter test method, which includes a rapid current limiting performance test and a static voltage withstand performance test. The specific steps of the rapid current limiting performance test include:

[0057] A100, determining the capacitance value of the energy storage capacitor (C1) and the inductance value of the large-capacity adjustable inductor (L0) to meet the peak value (i0) and peak time (t0) of the target fault current waveform;

[0058] Before the test, according to the test requirements of the product to be tested, the peak value of the loop current waveform is 10kA and the peak time of the loop current is 10ms, so as to determine the specific parameters of the energy storage capacitor and large-capacity adjustable inductor of the test device.

[0059] Without considering the loop resistance, the peak time t0 of the loop current can be expressed as:

[0060]

[0061] The peak value of the loop current i0 can be expressed as:

[0062]

[0063] Where L0 represents the inductance of the high-capacity adjustable inductor, C0 represents the capacitance of the energy storage capacitor, and U0 represents the rated voltage of the energy storage capacitor. Select appropriate C0 and L0 values based on the peak value of the loop current waveform and the peak duration of the loop current, taking into account the actual equipment conditions.

[0064] A200. Set the test product (C2) to the on state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to a preset voltage, and then disconnect the charging switch (K1);

[0065] Build the test circuit according to the test circuit diagram. The DUT must be secured to prevent movement during the test. To reduce stray parameters in the circuit, connections within the circuit should be as compact and short as possible. Connect the DUT with a copper braid to minimize connection inductance.

[0066] A300. Turn on the controllable discharge switch (K3) and record the reference current waveform and voltage waveform when the current limit is not triggered;

[0067] Keep the DUT in the on state and control the discharge switch to the off state. Charge the energy storage capacitor with a DC power supply. Once the voltage reaches the preset value, disconnect the DC power supply. Turn on the discharge switch to discharge the capacitor and record the baseline discharge current waveform and the voltage waveform across the DUT. After recording the baseline discharge current waveform and the voltage waveform across the DUT, turn on the energy dissipation switch to ensure worker safety.

[0068] A400. Set the product under test (C2) to the current limit trigger state, repeat the charge and discharge operations, and record the current waveform and voltage waveform when the current limit is triggered;

[0069] Maintain the DUT in normal operating conditions (i.e., remain on when no significant current is flowing, and disconnect when significant current is flowing). Ensure the test circuit is no longer energized, then disconnect the controllable discharge switch. Charge the energy storage capacitor with a DC power supply until the preset voltage is reached, then disconnect the DC power supply. Turn on the controllable discharge switch, allowing the DUT to operate automatically. Record the discharge current waveform and the voltage waveform across the DUT. After recording these waveforms, turn on the energy discharge switch to ensure worker safety.

[0070] A500. Compare the waveform data of step A400 and step A500, and analyze the current limiting speed, current limiting depth and response time of the product to be tested (C2).

[0071] By analyzing and comparing the differences in the waveforms obtained in the above steps, the fast current limiting performance of the product under test can be obtained.

[0072] Furthermore, the steps of the static pressure withstand performance test include:

[0073] Step B100, determining the withstand voltage test voltage (U1) of the product to be tested (C2);

[0074] Before the test, according to the test requirements of the DUT, determine that the voltage to be applied across the DUT is 1.5kV.

[0075] Step B200: Set the product under test (C2) to a disconnected state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to U1, and then disconnect the charging switch (K1);

[0076] Build the test circuit according to the test circuit diagram. The DUT must be secured to prevent movement during the test. To reduce stray parameters in the circuit, connections within the circuit should be as compact and short as possible. Connect the DUT with a copper braid to minimize connection inductance.

[0077] Step B300: Turn on the controllable discharge switch (K3) and keep it on for a preset time, record the voltage change across the test object (C2), and evaluate its withstand voltage performance.

[0078] The DUT is kept in the disconnected state, and the discharge switch can be controlled to initially be in the off state. A DC power supply is used to charge the energy storage capacitor. Once the preset voltage is reached, the DC power supply is disconnected. The conduction control switches the discharge switch on for a set period of time, then turns on the energy dissipation switch and records the voltage across the DUT to ensure worker safety. Analyzing the voltage across the DUT reveals its static withstand voltage performance.

[0079] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0080] Those skilled in the art will appreciate that all or some of the steps and systems in the method disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include computer storage media (or non-transitory media) and communication media (or temporary media). As known to those skilled in the art, the term computer storage media is included in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data) and is volatile and non-volatile, removable, and non-removable. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory, or other memory technology, CD-ROM, digital versatile disks (DVD), or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage, or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0081] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Technical personnel familiar with the field can also make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A DC fault current limiter test device, characterized in that: include: A DC charging circuit comprises a DC power supply (DC), a charging switch (K1), an energy dissipation switch (K2), an energy dissipation resistor (R1) and an energy storage capacitor (C1); wherein the positive electrode of the DC power supply (DC) is connected to the positive electrode of the energy storage capacitor (C1) through the charging switch (K1), and the negative electrode of the energy storage capacitor (C1) is connected to the negative electrode of the DC power supply (DC) and a ground wire; one end of the energy dissipation switch (K2) is connected to the positive electrode of the energy storage capacitor (C1), and the other end is grounded through the energy dissipation resistor (R1); A performance test circuit comprises a controllable discharge switch (K3), a test object (C2), a large-capacity adjustable inductor (L0), and a monitoring unit; wherein the positive electrode of the energy storage capacitor (C1) is connected to the positive electrode of the test object (C2) via the controllable discharge switch (K3), the negative electrode of the test object (C2) is connected to one end of the large-capacity adjustable inductor (L0), and the other end of the large-capacity adjustable inductor (L0) is connected to the negative electrode of the energy storage capacitor (C1) and a ground wire; the monitoring unit comprises a Rogowski coil (A) for collecting current waveforms and a high-voltage differential probe (V2) for collecting voltage waveforms; A control module is used to control the on and off of the charging switch (K1), the energy release switch (K2) and the controllable discharge switch (K3), and receive feedback signals from the monitoring unit; The DC charging circuit and the performance test circuit are coupled via an energy storage capacitor (C1), and the charging switch (K1) and the controllable discharge switch (K3) are not turned on at the same time.

2. The test device according to claim 1, characterized in that The DC power supply (DC) is a constant current charging power supply, and a high-precision voltmeter (V1) is connected to both ends of the energy storage capacitor (C1). The measured value of the high-precision voltmeter (V1) is fed back to the DC power supply (DC) to control the charging cut-off voltage.

3. The test device according to claim 1, characterized in that The inductance value of the large-capacity adjustable inductor (L0) is adjusted according to the capacitance value of the energy storage capacitor (C1) and target fault current waveform parameters, wherein the parameters include peak current (i0) and peak time (t0), which satisfy the following relationship: Where U0 is the rated voltage of the energy storage capacitor (C1).

4. The test device according to claim 1, characterized in that The performance test loop further comprises a short-circuit switch (S1) for short-circuiting the two ends of the test object (C2) to perform a circuit discharge test.

5. A DC fault current limiter test method, characterized in that: The test device according to any one of claims 1 to 4 is used, including a rapid current limiting performance test and a static pressure withstand performance test, wherein: The fast current limiting performance test includes: a. Determine the capacitance value of the energy storage capacitor (C1) and the inductance value of the large-capacity adjustable inductor (L0) to meet the target fault current waveform peak value (i0) and peak time (t0); b. Set the test product (C2) to the on state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to a preset voltage, and then disconnect the charging switch (K1); c. Turn on the controllable discharge switch (K3) and record the reference current waveform and voltage waveform when the current limit is not triggered; d. Set the product under test (C2) to the current limit trigger state, repeat the charge and discharge operations, and record the current waveform and voltage waveform when the current limit is triggered; e. Compare the waveform data of step c and step d to analyze the current limiting speed, current limiting depth and response time of the test product (C2); Static pressure resistance test includes: f. Determine the withstand voltage test voltage (U1) of the product to be tested (C2); g. Set the DUT (C2) to the disconnected state, control the DC power supply (DC) to charge the energy storage capacitor (C1) to U1, and then disconnect the charging switch (K1); h. Turn on the controllable discharge switch (K3) and keep it on for a preset time, record the voltage change across the test object (C2), and evaluate its withstand voltage performance.

6. The test method according to claim 5, characterized in that In step a, the inductance value of the large-capacity adjustable inductor (Li) is adjusted to achieve simulation of different fault current waveforms.

7. The test method according to claim 5, characterized in that In the step c and the step d, the energy dissipation switch (K2) is immediately turned on after the discharge is completed, and the residual energy of the energy storage capacitor (C1) is released through the energy dissipation resistor (R1).

8. The test method according to claim 5, characterized in that The product to be tested (C2) is a solid-state or hybrid DC fault current limiter based on power electronic devices.

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