A process scheduling method, device, storage medium and computer program product

Abstract

The application discloses a process scheduling method and device, a storage medium and a computer program product, and relates to the technical field of computers. The method comprises the following steps: counting resource demand indexes of processes; wherein the resource demand indexes comprise any one or a combination of several of the following: processor peak usage, memory growth rate, and input / output burst coefficient; performing behavior mode analysis on the processes to determine behavior mode indexes of the processes; wherein the behavior mode indexes comprise lock contention time and / or non-uniform memory access penalty value; generating dynamic priorities of the processes according to the resource demand indexes and the behavior mode indexes of the processes; and scheduling based on the dynamic priorities of the processes. The application improves the real-time performance and flexibility of process scheduling.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and more particularly to a process scheduling method, device, storage medium and computer program product. Background Art

[0002] In related technologies, process scheduling algorithms based on static priorities are unable to adapt to dynamic load fluctuations. High-priority processes may occupy resources for long periods of time, leading to starvation of lower-priority processes. They also ignore resource coordination issues such as memory bandwidth and cache locality. While machine learning-based scheduling algorithms incorporate multi-dimensional feature analysis, they rely on offline training and GPU (Graphics Processing Unit) acceleration, resulting in poor real-time performance and high decision latency, making it difficult to meet the low-latency requirements of real-time operating systems and edge computing.

[0003] Therefore, how to improve the real-time performance and flexibility of process scheduling is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The object of the present invention is to provide a process scheduling method, apparatus and device, storage medium and computer program product, which improve the real-time performance and flexibility of process scheduling.

[0005] To achieve the above-mentioned purpose, the present invention provides a memory allocation method, comprising: collecting statistics on the resource demand indicators of a process; wherein the resource demand indicators include any one or a combination of several of the following: processor peak usage rate, memory growth rate, and input / output burst coefficient; performing behavioral pattern analysis on the process to determine the behavioral pattern indicators of the process; wherein the behavioral pattern indicators include lock contention time and / or non-uniform memory access penalty value; generating a dynamic priority of the process based on the resource demand indicators and behavioral pattern indicators of the process; and scheduling based on the dynamic priority of each process.

[0006] To achieve the above-mentioned purpose, the present invention provides a memory allocation device, comprising: a statistical module, used to count the resource demand indicators of a process; wherein the resource demand indicators include any one or a combination of several of the processor peak usage rate, memory growth rate, and input / output burst coefficient; a determination module, used to perform behavioral pattern analysis on the process to determine the behavioral pattern indicators of the process; wherein the behavioral pattern indicators include lock contention time and / or non-uniform memory access penalty value; a generation module, used to generate the dynamic priority of the process based on the resource demand indicators and behavioral pattern indicators of the process; and a scheduling module, used to schedule based on the dynamic priority of each process.

[0007] To achieve the above object, the present invention provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of the above memory allocation method when executing the computer program.

[0008] To achieve the above objectives, the present invention provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the above memory allocation method are implemented.

[0009] To achieve the above object, the present invention provides a computer program product, including a computer program, which implements the steps of the above memory allocation method when executed by a processor.

[0010] The beneficial effects of the present invention lie in dynamically generating and scheduling process priorities by collecting real-time statistics on process resource demand and behavior pattern indicators. This method can perceive process resource requirements and behavior patterns in real time and dynamically adjust process priorities, thereby addressing the inability to flexibly adjust resource allocation under dynamic load changes, insufficient real-time performance, and strong hardware dependence in related technologies. Specifically, by real-time monitoring and dynamic priority adjustment, the present invention effectively prevents high-priority processes from long-term resource occupation by low-priority processes. It also optimizes lock contention and memory access efficiency in the NUMA (Non-Uniform Memory Access) architecture, reducing cross-node access latency. Furthermore, the present invention does not rely on offline training and external hardware acceleration, reducing deployment complexity and decision latency, significantly improving the real-time and flexibility of process scheduling, meeting the low-latency requirements of real-time operating systems and edge computing, and enhancing overall system performance and resource utilization efficiency. The present invention also discloses a process scheduling device, an electronic device, a computer-readable storage medium, and a computer program product, all of which achieve the aforementioned technical effects.

[0011] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 The figure is a flowchart of a process scheduling method according to an exemplary embodiment.

[0014] Figure 2This is a structural diagram of a dynamic priority scheduling system in an application embodiment provided by the present invention.

[0015] Figure 3 This is a core processing flow chart of a dynamic priority scheduling system in an application embodiment provided by the present invention.

[0016] Figure 4 The figure is a structural diagram of a process scheduling device according to an exemplary embodiment.

[0017] Figure 5 The figure is a structural diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0019] It should be noted that, in the description of the present invention, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. The terms "first," "second," etc., in the present invention are used to distinguish similar objects, and are not used to describe a particular order or precedence.

[0020] In order to enable those skilled in the art to better understand the solutions of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0021] The embodiment of the present invention provides a process scheduling method, and the method is described in detail in conjunction with the execution flow of the process scheduling method. Figure 1 , a flowchart of a process scheduling method according to an exemplary embodiment.

[0022] S101: Collecting resource demand indicators of a statistical process; wherein the resource demand indicators include any one or a combination of several of the following: processor peak usage rate, memory growth rate, and input / output burst coefficient.

[0023] In this step, sampling points are set in the operating system kernel to collect process resource usage data in real time and construct resource demand indicators. These indicators can include peak processor usage, memory growth rate, and input / output burst coefficient. The input / output burst coefficient refers to the frequency and intensity of a large number of input / output operations initiated by a process in a short period of time, reflecting the fluctuations in the process's demand for I / O (Input / Output) resources.

[0024] As a feasible implementation method, the processor peak utilization rate of the process is counted, including: collecting the user-state execution time and kernel-state execution time of the process, and calculating the processor peak utilization rate based on the increment of the user-state execution time and the kernel-state execution time collected at adjacent sampling points and the time interval between adjacent sampling points.

[0025] In specific implementations, a timed sampling mechanism is implemented within the operating system kernel to periodically collect the time a process spends in user mode and kernel mode, i.e., the user-mode execution time and kernel-mode execution time. For example, the Linux kernel's scheduler_tick interrupt is used as a sampling trigger. The user-mode and kernel-mode execution times of a process are recorded at each interrupt. By comparing the time difference and execution time difference between adjacent sampling points, the CPU usage of the process within the sampling period is calculated.

[0026] For example, suppose that between two consecutive sampling points (with a one-second interval), a process's user-mode execution time increases from 100 milliseconds to 150 milliseconds, and its kernel-mode execution time increases from 50 milliseconds to 100 milliseconds. Therefore, the process's CPU utilization during that second is: (150 - 100) + (100 - 50) / 1000 = 10%. If the process's CPU utilization reaches 80% during a sampling period, this is recorded as the process's peak processor utilization.

[0027] By monitoring the user-mode and kernel-mode execution time of a process in real time, we can accurately calculate the peak processor usage of the process. This helps identify processes with high CPU usage and provides an important resource requirement indicator for dynamic priority calculation, thereby optimizing CPU resource allocation.

[0028] As a feasible implementation method, the user-state execution time and kernel-state execution time of the process are collected, and the peak usage rate of the processor is calculated based on the increment of the user-state execution time, the increment of the kernel-state execution time, and the time interval between adjacent sampling points. This includes: collecting the user-state execution time and kernel-state execution time of the process according to a preset sampling period, and calculating the peak usage rate of the processor based on the increment of the user-state execution time, the increment of the kernel-state execution time, and the time interval of the preset sampling period.

[0029] In specific implementations, a timer is set in the operating system kernel to periodically trigger sampling operations at a preset sampling interval (e.g., 10 milliseconds or 100 milliseconds). During each sampling period, the user-mode and kernel-mode execution times of the process are obtained through kernel-provided interfaces (e.g., the utime and stime fields in the task_struct structure). The CPU usage of the process is calculated by calculating the execution time delta between adjacent sampling points and the interval between the sampling periods.

[0030] As a feasible implementation method, counting the memory growth rate of a process includes: collecting the memory usage of the process, and calculating the memory growth rate based on the increment of memory usage collected at adjacent sampling points and the time interval between adjacent sampling points.

[0031] In practice, monitoring points are set up in the operating system kernel to periodically collect a process's memory usage. For example, the Linux kernel's memory management module (such as the page fault handling path) is used to record the memory usage of a process whenever it accesses memory. By comparing the difference in memory usage between adjacent sampling points with the sampling interval, the process's memory growth rate is calculated.

[0032] For example, suppose a process's memory usage increases from 100MB to 110MB between two consecutive sampling points (with a one-second interval). Then, the process's memory growth rate is: (110-100) / 1 = 10MB / s. This method allows you to monitor a process's memory usage in real time and calculate its memory growth rate.

[0033] By monitoring the changes in process memory usage in real time, we can accurately calculate the memory growth rate. This helps identify processes with rapidly increasing memory usage, providing important resource demand indicators for dynamic priority calculations, thereby optimizing memory resource allocation and avoiding memory leaks or excessive usage.

[0034] As a feasible implementation, collecting the memory usage of the process includes: injecting sampling points into the page fault processing path to collect the memory usage of the process when the page fault processing occurs.

[0035] In practice, we inject sampling points into the page fault handling path of the operating system kernel. When a process triggers a page fault, its current memory usage is recorded. For example, we add sampling logic to the handle_page_fault function in the Linux kernel to record the process's memory usage every time a page fault is handled.

[0036] By injecting sampling points into the page fault handling path, memory usage is collected in real time as a process accesses a new page, avoiding changes in memory usage that might be missed by traditional sampling methods. This helps more accurately calculate memory growth rates, providing a reliable basis for dynamic priority adjustments and thus optimizing memory resource allocation.

[0037] As a feasible implementation method, counting the input and output burst coefficient of the process includes counting the number of input and output operations completed by the process within a unit time as the input and output burst coefficient.

[0038] In specific implementations, monitoring points are set up in the operating system kernel to periodically count the number of input and output operations of a process. For example, the Linux kernel's block device layer (such as the block_rq_complete callback function) is used to record the number of I / O operations of a process. By calculating the number of I / O operations per unit time, the input and output burst coefficient is obtained.

[0039] For example, if a process completes 50 disk I / O operations in 1 second, the input / output burst coefficient of the process is 50. In this way, the I / O activity of the process can be monitored in real time and the input / output burst coefficient can be calculated.

[0040] By counting the input and output burst coefficients of processes, we can identify I / O-intensive processes and provide important resource requirement indicators for dynamic priority calculation. This helps optimize I / O resource allocation, improve system I / O throughput, and avoid system delays caused by frequent I / O operations.

[0041] As can be seen, by collecting resource demand indicators, we can understand the system resource demands of processes in real time, providing basic data for subsequent dynamic priority calculations. This helps optimize resource allocation, avoid resource waste and excessive competition, and improve overall system performance and resource utilization.

[0042] S102: Analyze the behavior pattern of the process to determine the behavior pattern index of the process; wherein the behavior pattern index includes lock contention time and / or non-uniform memory access penalty value.

[0043] In this step, performance probes are implanted in the operating system kernel to monitor process behavior patterns in real time and construct behavioral pattern metrics. These metrics can include lock contention time and non-uniform memory access penalty values. Lock contention time describes the time a process is blocked when attempting to acquire a lock, while non-uniform memory access penalty values ​​describe the latency penalty incurred when a process accesses non-local memory. For example, atomic counters are added to lock implementations (such as mutexes and spin locks) to measure the time a process holds a lock and waits for a lock. For NUMA architectures, the penalty for accessing remote memory is calculated by analyzing the process's memory access path and the physical memory topology.

[0044] As can be seen, behavioral pattern analysis can identify potential issues during process execution, such as blocking caused by lock contention and latency caused by cross-node memory access, and provide a basis for subsequent dynamic priority adjustments. This helps optimize process scheduling strategies, reduce context switching and memory access latency, and improve system responsiveness and efficiency.

[0045] As a feasible implementation method, determining the lock contention time of a process includes: calculating a cumulative value of a time span of a process resource holding time as the lock contention time.

[0046] In practice, we embed performance probes into the operating system kernel's lock implementation mechanism to monitor the lock holding and waiting times of processes in real time. For example, we add an atomic counter to the Linux kernel's lock state machine. Each time a process attempts to acquire a lock, we record the current timestamp. When the lock is released, we record the timestamp again. By calculating the difference between the two timestamps, we can determine the lock holding time of the process. By summing up the lock holding times for all locks, we can determine the lock contention time of the process.

[0047] For example, suppose a process attempts to acquire three locks while running and is blocked for 0.1 seconds, 0.2 seconds, and 0.15 seconds, respectively. The lock contention time for this process is 0.1 + 0.2 + 0.15 = 0.45 seconds. This method allows you to monitor the lock contention of a process in real time.

[0048] By counting the lock contention time of a process, we can identify blocking issues caused by lock contention and provide important behavioral pattern indicators for dynamic priority adjustment. This helps optimize process scheduling strategies, reduce context switching overhead, and improve system concurrency performance.

[0049] As a feasible implementation method, determining the non-uniform memory access penalty value of a process includes: determining a set of virtual memory areas of the process and a main node for memory access; traversing the virtual address of each virtual memory area in the set of virtual memory areas according to the memory page granularity, obtaining the corresponding physical page and the node corresponding to the physical page, if the node corresponding to the physical page is consistent with the main node, then determining the penalty factor corresponding to the virtual address to be zero; if the node corresponding to the physical page is inconsistent with the main node, then determining the penalty factor corresponding to the virtual address according to the distance between the node corresponding to the physical page and the main node; wherein, the penalty factor corresponding to the virtual address is positively correlated with the distance between the node corresponding to the physical page and the main node; weighting the penalty factors of all virtual addresses to obtain the non-uniform memory access penalty value of the process; wherein, the weight of the penalty factor of the virtual address is positively correlated with the access frequency of the virtual address.

[0050] In its implementation, the process first analyzes the set of virtual memory regions (e.g., the mm_struct structure in the Linux kernel) to determine the primary node for its memory accesses (i.e., the process's NUMA primary node). Next, the virtual addresses of each virtual memory region are traversed at the memory page granularity, and the corresponding physical page and node information is retrieved through the kernel's page table management mechanism. For each virtual address, if the corresponding physical page node matches the primary node, the penalty factor is zero. If the physical page node does not match the primary node, a penalty factor is calculated based on the topological distance matrix between nodes (e.g., the node_distance interface in the Linux kernel). The penalty factor is positively correlated with the distance between nodes. Finally, the penalty factor is weighted according to the access frequency of the virtual address to obtain the non-uniform memory access penalty value for the process.

[0051] For example, suppose a process's home node is node 0. Its virtual memory area contains three virtual addresses corresponding to physical pages located at nodes 0, 1, and 2, respectively. The distance between node 1 and node 0 is 10, and the distance between node 2 and node 0 is 20. Assume the access frequencies are 5, 3, and 2, respectively, and the penalty factors are 0, 10, and 20, respectively. Therefore, the non-uniform memory access penalty for this process is: 0 × 5 + 10 × 3 + 20 × 2 = 70. This approach allows us to quantify the memory access locality problem of a process.

[0052] By determining the non-uniform memory access penalty for a process, we can identify latency issues caused by cross-node memory access, providing important behavioral pattern indicators for dynamic priority adjustment. This helps optimize process scheduling strategies, reduce latency caused by cross-node memory access, and improve overall system performance.

[0053] S103: Generate a dynamic priority of the process according to the resource demand index and behavior pattern index of the process.

[0054] In this step, the resource demand and behavior pattern indicators of a process are integrated to generate a dynamic priority for the process. For example, an exponential smoothing algorithm can be used to process peak CPU usage, combined with a linear regression model for memory growth rate and a sliding variance calculation for the I / O burst coefficient. This algorithm also considers the reciprocal suppression effects of lock contention time and NUMA penalty values. This ultimately generates a dynamic priority that is used to update the process's scheduling weight.

[0055] As a feasible implementation method, the dynamic priority of a process is generated based on the resource demand index and behavior pattern index of the process, including: determining the default priority of the process and nonlinearly mapping the default priority to a static priority base value; adjusting the static priority base value of the process based on the resource demand index and behavior pattern index of the process to obtain the dynamic priority of the process.

[0056] In practice, the user or system can pre-set a default priority for a process, such as the nice value in Linux, which typically ranges from -20 to 19. The default priority of a process is converted to a static priority base value using a nonlinear mapping function (such as an exponential or logarithmic function). This static priority base value is then adjusted based on the process's resource requirements (such as peak processor usage, memory growth rate, and input / output burst coefficient) and behavioral pattern indicators (such as lock contention time and non-uniform memory access penalty value), ultimately generating a dynamic priority. This approach allows the priority of a process to be dynamically adjusted based on its actual operating status, thereby optimizing system resource allocation and improving overall system performance and responsiveness.

[0057] As a feasible implementation, nonlinearly mapping the default priority to a static priority base value includes: mapping the default priority to a static priority base value according to a static priority base value determination formula; wherein the static priority base value determination formula is: ;in, is the default priority, 、 is the mapping parameter, e is a natural constant, The static priority base value.

[0058] As a feasible implementation method, the static priority base value of the process is adjusted according to the resource demand index and behavior pattern index of the process to obtain the dynamic priority of the process, including: counting the maximum value of the processor peak utilization rate of all processes, normalizing the processor peak utilization rate of the process according to the maximum value of the processor peak utilization rate, and obtaining the normalized processor peak utilization rate; calculating the first ratio between the memory growth rate of the process and the preset value; counting the average value of the input and output burst coefficients of all processes, and calculating the second ratio between the input and output burst coefficient of the process and the average value of the input and output burst coefficients; adjusting the static priority base value of the process according to the normalized processor peak utilization rate of the process, the first ratio, the second ratio, the lock contention time, and the non-uniform memory access penalty value to obtain the dynamic priority of the process.

[0059] In a specific implementation, the maximum peak processor usage of all processes is first calculated, and then the peak processor usage of each process is divided by this maximum value to obtain the normalized peak processor usage. Next, a first ratio between the memory growth rate of each process and a preset value, as well as a second ratio between the input / output burst coefficient and the average input / output burst coefficient of all processes, is calculated. Finally, these ratios are combined with the lock contention time and the non-uniform memory access penalty value to adjust the static priority base value of the process to obtain the dynamic priority. In this way, the resource requirements and behavior patterns of the process can be comprehensively considered, and the priority of the process can be dynamically adjusted, thereby optimizing system resource allocation and improving the overall performance and response speed of the system.

[0060] As a feasible implementation method, the static priority base value of the process is adjusted according to the resource demand index and behavior pattern index of the process to obtain the dynamic priority of the process, including: determining the dynamic priority of the process according to the dynamic priority determination formula; wherein the dynamic priority determination formula is: ;in, For dynamic priority, is the static priority base value, is the peak processor usage, is the maximum peak processor usage of all processes, is the memory growth rate, is the default value, is the input-output burst coefficient, is the mean value of the input and output burst coefficients of all processes, The lock contention time, is the non-uniform memory access penalty value, 、 、 、 、 is the attenuation coefficient.

[0061] The attenuation parameters are pre-configured by the user-mode hypervisor. Control the attenuation strength of CPU utilization on priority, reduce the priority of CPU-intensive processes under high load, and prevent a single process from monopolizing resources; Adjust the impact of memory growth rate on priority, and suppress the process preemption capability caused by memory leaks or sudden memory inventions; Amplify the positive impact of I / O burstiness on priorities, improving the responsiveness of interactive processes (such as database transactions). Enhance the suppression effect of lock contention on priority, reduce the scheduling frequency of processes with high lock contention, and alleviate thread blocking; Quantify the cost of NUMA non-uniform memory access, optimize memory locality, and reduce latency losses caused by cross-node access.

[0062] S104: Scheduling is performed based on the dynamic priority of each process.

[0063] In this step, the operating system scheduler sorts and schedules processes according to dynamic priorities.

[0064] The embodiment of the present invention dynamically generates the priority of the process and schedules it by real-time statistics of the resource demand indicators and behavior pattern indicators of the process. This method can perceive the resource demand and behavior pattern of the process in real time and dynamically adjust the process priority, thereby solving the problems in the related technology such as the inability to flexibly adjust resource allocation under dynamic load changes, insufficient real-time performance, and strong hardware dependence. Specifically, through real-time monitoring and dynamic adjustment of priorities, the embodiment of the present invention can effectively avoid the long-term resource occupation of low-priority processes by high-priority processes, while optimizing lock contention and memory access efficiency under the NUMA architecture, and reducing cross-node access delays. In addition, the embodiment of the present invention does not rely on offline training and external hardware acceleration, reduces deployment complexity and decision delays, significantly improves the real-time performance and flexibility of process scheduling, meets the low-latency requirements of real-time operating systems and edge computing, and improves the overall performance and resource utilization efficiency of the system.

[0065] Based on the above embodiment, as a preferred implementation, a process energy efficiency factor can be introduced as a supplementary indicator for dynamic priority adjustment. The process's CPU energy consumption data and corresponding CPU utilization data are collected to calculate the process's energy efficiency factor, which is the ratio of the amount of computing tasks completed by the process per unit time to the energy consumed. This factor reflects the process's energy efficiency level. The dynamic priority of the process is further adjusted based on the energy efficiency factor.

[0066] In specific implementations, the process's CPU energy consumption data is first collected through hardware performance monitoring interfaces (such as Intel's Rapl interface or AMD's power consumption monitoring interface). Simultaneously, the process's CPU utilization data is collected through the operating system kernel's scheduler interface (such as scheduler_tick). Next, the process's energy efficiency factor (EEF) is calculated—the ratio of CPU utilization to energy consumption. Finally, the process's dynamic priority is adjusted based on the EEF factor. For processes with higher EEF factors, their dynamic priority is appropriately increased to encourage more efficient processes to obtain more resources. For processes with lower EEF factors, their dynamic priority is appropriately decreased to limit the excessive resource usage of inefficient processes.

[0067] For example, if process A consumes 10 watts of CPU power and has a CPU utilization rate of 80%, its energy efficiency factor is 80 / 10 = 8. If process B consumes 15 watts of CPU power and has a CPU utilization rate of 60%, its energy efficiency factor is 60 / 15 = 4. Based on the energy efficiency factors, the dynamic priority of process A can be appropriately increased, while that of process B can be lowered.

[0068] By introducing the energy efficiency factor as a supplementary indicator for dynamic priority adjustment, we can further optimize process scheduling strategies by comprehensively considering the resource requirements, behavior patterns, and energy efficiency of processes. This not only helps improve overall system performance and responsiveness, but also reduces system energy consumption and improves energy efficiency. This is particularly suitable for energy-sensitive applications such as mobile devices and data centers.

[0069] The following describes an application embodiment provided by the present invention. The structural diagram of the dynamic priority scheduling system is as follows: Figure 2 As shown, a user-mode and kernel-mode layered architecture is employed. The user-mode hypervisor issues two parameters through the sysctl (System Control) interface or the procfs (Process File System) interface: the feature collection period and a configurable decay parameter. The kernel-mode functional modules include a dynamic scheduling layer and a native scheduling framework. The dynamic scheduling layer's multidimensional feature extraction module collects CPU, memory, I / O, lock, and NUMA metrics at a configured period. The priority calculation module fuses multidimensional features based on the decay parameter to generate dynamic priorities.

[0070] The core processing flow chart of the dynamic priority scheduling system is as follows: Figure 3As shown, the process begins with the creation / wake-up of a new process, followed by multi-dimensional feature collection and normalization. This includes real-time collection of metrics such as CPU utilization, memory growth rate, I / O burst frequency, lock contention time, and NUMA cross-node access. Based on this feature data, the system performs dynamic priority calculations. A weighted formula is used to fuse multi-dimensional metrics to generate a dynamic priority. The calculation results are used to update the process priority, including modifying the CFS scheduler weight or adjusting the nice value of a real-time process. The updated priority directly affects the CPU time slice allocation during the process execution phase until the process terminates. The entire process forms a closed-loop feedback loop, enabling dynamic adjustment of the priority level as the system load changes.

[0071] The following is an introduction to a process scheduling device provided by an embodiment of the present invention. The process scheduling device described below and the process scheduling method described above can be referenced to each other. Figure 4 , a structural diagram of a process scheduling device according to an exemplary embodiment.

[0072] The statistics module 100 is used to collect statistics on resource demand indicators of a process; wherein the resource demand indicators include any one or a combination of processor peak usage, memory growth rate, and input / output burst coefficient.

[0073] The determination module 200 is configured to perform a behavior pattern analysis on a process to determine a behavior pattern indicator of the process; wherein the behavior pattern indicator includes a lock contention time and / or a non-uniform memory access penalty value.

[0074] The generating module 300 is used to generate the dynamic priority of a process according to the resource demand index and the behavior pattern index of the process.

[0075] The scheduling module 400 is used to perform scheduling based on the dynamic priority of each process.

[0076] The embodiment of the present invention dynamically generates the priority of the process and schedules it by real-time statistics of the resource demand indicators and behavior pattern indicators of the process. This method can perceive the resource demand and behavior pattern of the process in real time and dynamically adjust the process priority, thereby solving the problems in the related technology such as the inability to flexibly adjust resource allocation under dynamic load changes, insufficient real-time performance, and strong hardware dependence. Specifically, through real-time monitoring and dynamic adjustment of priorities, the embodiment of the present invention can effectively avoid the long-term resource occupation of low-priority processes by high-priority processes, while optimizing lock contention and memory access efficiency under the NUMA architecture, and reducing cross-node access delays. In addition, the embodiment of the present invention does not rely on offline training and external hardware acceleration, reduces deployment complexity and decision delays, significantly improves the real-time performance and flexibility of process scheduling, meets the low-latency requirements of real-time operating systems and edge computing, and improves the overall performance and resource utilization efficiency of the system.

[0077] Based on the above embodiment, as a preferred implementation, the statistical module 100 includes: a first calculation unit, which is used to collect the user-state execution time and kernel-state execution time of the process, and calculate the processor peak usage based on the increment of the user-state execution time, the increment of the kernel-state execution time and the time interval between adjacent sampling points.

[0078] Based on the above embodiments, as a preferred implementation mode, the first calculation unit is specifically used to: collect the user state execution time and kernel state execution time of the process according to the preset sampling period, and calculate the peak utilization rate of the processor based on the increment of the user state execution time, the increment of the kernel state execution time and the time interval of the preset sampling period.

[0079] Based on the above embodiment, as a preferred implementation, the statistics module 100 includes: a second calculation unit, which is used to collect the memory usage of the process and calculate the memory growth rate based on the increment of memory usage collected at adjacent sampling points and the time interval between adjacent sampling points.

[0080] Based on the above embodiment, as a preferred implementation, the second calculation unit is specifically configured to: inject sampling points into the page fault processing path to collect the memory usage of the process when the page fault processing occurs.

[0081] Based on the above embodiment, as a preferred implementation, the statistical module 100 includes: a first statistical unit, configured to count the number of input and output operations completed by the process within a unit time as an input and output burst coefficient.

[0082] Based on the above embodiment, as a preferred implementation, the determination module 200 includes: a second statistical unit, configured to count the cumulative value of the time span of the process resource holding time as the lock contention time.

[0083] Based on the above embodiments, as a preferred implementation, the determination module 200 includes: a determination unit, used to determine the virtual memory area set of the process and the main node for memory access; traversing the virtual address of each virtual memory area in the virtual memory area set according to the memory page granularity, obtaining the corresponding physical page and the node corresponding to the physical page, if the node corresponding to the physical page is consistent with the main node, then the penalty factor corresponding to the virtual address is determined to be zero; if the node corresponding to the physical page is inconsistent with the main node, then the penalty factor corresponding to the virtual address is determined according to the distance between the node corresponding to the physical page and the main node; wherein, the penalty factor corresponding to the virtual address is positively correlated with the distance between the node corresponding to the physical page and the main node; the penalty factors of all virtual addresses are weighted to obtain the non-uniform memory access penalty value of the process; wherein, the weight of the penalty factor of the virtual address is positively correlated with the access frequency of the virtual address.

[0084] Based on the above embodiments, as a preferred implementation mode, the generation module 300 includes: a mapping unit for determining the default priority of the process and nonlinearly mapping the default priority to a static priority base value; an adjustment unit for adjusting the static priority base value of the process according to the resource demand index and behavior pattern index of the process to obtain the dynamic priority of the process.

[0085] Based on the above embodiment, as a preferred implementation, the mapping unit is specifically configured to: map the default priority to the static priority base value according to a static priority base value determination formula; wherein the static priority base value determination formula is: ;in, is the default priority, 、 is the mapping parameter, e is a natural constant, The static priority base value.

[0086] Based on the above embodiments, as a preferred implementation mode, the adjustment unit is specifically used to: count the maximum value of the processor peak utilization rate of all processes, normalize the processor peak utilization rate of the process according to the maximum value of the processor peak utilization rate, and obtain the normalized processor peak utilization rate; calculate the first ratio between the memory growth rate of the process and the preset value; count the average value of the input and output burst coefficients of all processes, and calculate the second ratio between the input and output burst coefficient of the process and the average value of the input and output burst coefficients; adjust the static priority base value of the process according to the normalized processor peak utilization rate, the first ratio, the second ratio, the lock contention time, and the non-uniform memory access penalty value of the process to obtain the dynamic priority of the process.

[0087] Based on the above embodiment, as a preferred implementation, the adjustment unit is specifically configured to: determine the dynamic priority of the process according to a dynamic priority determination formula; wherein the dynamic priority determination formula is: ;in, For dynamic priority, is the static priority base value, is the peak processor usage, is the maximum peak processor usage of all processes, is the memory growth rate, is the default value, is the input-output burst coefficient, is the mean value of the input and output burst coefficients of all processes, The lock contention time, is the non-uniform memory access penalty value, 、 、 、 、 is the attenuation coefficient.

[0088] Regarding the apparatus in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0089] An embodiment of the present invention further provides an electronic device, see Figure 5 , Figure 5 The figure is a structural diagram of an electronic device according to an exemplary embodiment.

[0090] Communication interface 1 can exchange information with other devices such as network devices.

[0091] The processor 2 is connected to the communication interface 1 to implement information exchange with other devices and is used to execute the process scheduling method provided by one or more of the above technical solutions when running a computer program. The computer program is stored in the memory 3.

[0092] Of course, in actual application, the various components in the electronic device are coupled together through the bus system 4. It can be understood that the bus system 4 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 4 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 5 Various buses are labeled as bus system 4.

[0093] The memory 3 in the embodiment of the present invention is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.

[0094] It is understood that the memory 3 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a magnetic disk or a magnetic tape. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM).The memory 3 described in the embodiments of the present invention is intended to include but is not limited to these and any other suitable types of memories.

[0095] The method disclosed in the above embodiment of the present invention can be applied to processor 2 or implemented by processor 2. Processor 2 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by the hardware integrated logic circuit in processor 2 or by instructions in software form. The above processor 2 can be a general-purpose processor, a DSP, or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc. Processor 2 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present invention. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiment of the present invention can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium, which is located in memory 3. Processor 2 reads the program in memory 3 and completes the steps of the above method in combination with its hardware.

[0096] When the processor 2 executes the program, the corresponding processes in the various methods of the embodiments of the present invention are implemented, which will not be described here for the sake of brevity.

[0097] An embodiment of the present invention further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above process scheduling method embodiments when running.

[0098] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0099] An embodiment of the present invention further provides a computer program product, which includes a computer program. When the computer program is executed by the processor 2, the steps of any of the above process scheduling method embodiments are implemented.

[0100] An embodiment of the present invention further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by the processor 2, the steps of any of the above-mentioned process scheduling method embodiments are implemented.

[0101] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0102] The above is a detailed introduction to the process scheduling system, method, device and equipment, medium and product provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core ideas of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, the present invention can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A process scheduling method, characterized in that: include: Statistical process resource demand indicators; wherein the resource demand indicators include any one or a combination of processor peak usage, memory growth rate, input and output burst coefficient; Performing a behavior pattern analysis on the process to determine a behavior pattern indicator of the process; wherein the behavior pattern indicator includes a lock contention time and / or a non-uniform memory access penalty value; Generate dynamic priority of a process based on its resource demand index and behavior pattern index; Scheduling based on the dynamic priority of each process; Among them, determining the lock contention time of the process includes: The cumulative value of the time span of the resource holding time of the statistical process is used as the lock contention time; Determining the non-uniform memory access penalty value of a process includes: Determine the set of virtual memory regions of the process and the primary node for memory access; Traversing the virtual address of each virtual memory area in the virtual memory area set according to the memory page granularity, obtaining the corresponding physical page and the node corresponding to the physical page, if the node corresponding to the physical page is consistent with the main node, then determining the penalty factor corresponding to the virtual address to be zero; if the node corresponding to the physical page is inconsistent with the main node, then determining the penalty factor corresponding to the virtual address according to the distance between the node corresponding to the physical page and the main node; wherein the penalty factor corresponding to the virtual address is positively correlated with the distance between the node corresponding to the physical page and the main node; Weighting the penalty factors of all the virtual addresses to obtain a non-uniform memory access penalty value of the process; wherein the weight of the penalty factor of the virtual address is positively correlated with the access frequency of the virtual address; The dynamic priority of a process is generated based on the resource demand index and behavior pattern index of the process, including: Counting the maximum value of the processor peak usage of all processes, and normalizing the processor peak usage of each process according to the maximum value of the processor peak usage to obtain a normalized processor peak usage; Calculating a first ratio between a memory growth rate of a process and a preset value; Counting the average values ​​of input and output burst coefficients of all processes, and calculating a second ratio between the input and output burst coefficient of the process and the average value of the input and output burst coefficient; The dynamic priority of the process is obtained by adjusting the static priority base value of the process according to the normalized processor peak usage rate, the first ratio, the second ratio, the lock contention time, and the non-uniform memory access penalty value of the process.

2. The process scheduling method according to claim 1, characterized in that: Statistics on the peak processor usage of the process, including: The user-state execution time and kernel-state execution time of the collected process are used to calculate the peak usage of the processor based on the increment of the user-state execution time and kernel-state execution time collected at adjacent sampling points and the time interval between adjacent sampling points.

3. The process scheduling method according to claim 2, characterized in that: Collect the user-state execution time and kernel-state execution time of the process, and calculate the peak processor usage based on the increment of user-state execution time and kernel-state execution time collected at adjacent sampling points and the time interval between adjacent sampling points, including: The user state execution time and kernel state execution time of the process are collected according to a preset sampling period, and the peak usage rate of the processor is calculated according to the increment of the user state execution time, the increment of the kernel state execution time and the time interval of the preset sampling period.

4. The process scheduling method according to claim 1, characterized in that: Statistics on the memory growth rate of the process, including: The memory usage of the collection process is calculated based on the memory usage increment of adjacent sampling points and the time interval between adjacent sampling points.

5. The process scheduling method according to claim 4, characterized in that: Memory usage of the collection process, including: Inject sampling points into the page fault handling path to capture the memory usage of the process when a page fault occurs.

6. The process scheduling method according to claim 1, characterized in that: Statistics on the input and output burst coefficients of the process, including: The number of input and output operations completed by the statistical process in unit time is taken as the input and output burst coefficient.

7. The process scheduling method according to claim 1, characterized in that: Before adjusting the static priority base value of the process to obtain the dynamic priority of the process according to the normalized processor peak usage rate, the first ratio, the second ratio, the lock contention time, and the non-uniform memory access penalty value of the process, the method further includes: A default priority of a process is determined, and the default priority is non-linearly mapped to a static priority base value.

8. The process scheduling method according to claim 7, characterized in that: Non-linearly mapping the default priority to a static priority base value includes: The default priority is mapped to a static priority base value according to a static priority base value determination formula; wherein the static priority base value determination formula is: ； in, is the default priority, 、 is the mapping parameter, e is a natural constant, is the static priority base value.

9. The process scheduling method according to claim 1, characterized in that: Generate dynamic priorities for processes based on their resource requirements and behavior patterns, including: The dynamic priority of the process is determined according to a dynamic priority determination formula; wherein the dynamic priority determination formula is: ； in, is the dynamic priority, is the static priority base value, is the peak usage of the processor, is the maximum peak processor usage of all processes, is the memory growth rate, is the default value, is the input-output burst coefficient, is the mean value of the input and output burst coefficients of all processes, The lock contention time, is the non-uniform memory access penalty value, 、 、 、 、 is the attenuation coefficient.

10. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the process scheduling method according to any one of claims 1 to 9 when executing the computer program.

11. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed, implements the steps of the process scheduling method according to any one of claims 1 to 9.

12. A computer program product, characterized in that The method comprises a computer program, which, when executed, implements the steps of the process scheduling method according to any one of claims 1 to 9.

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