Display device and image data compensation method

Abstract

The invention provides a display device and an image data compensation method. The image data compensation method includes: calculating a polarity accumulation time of a positive polarity and a negative polarity of image data; and determining whether to compensate the voltage polarity of the image data according to the polarity accumulation time.

Description

Technical Field

[0001] The present invention relates to an electronic device and a compensation method, and more particularly to a display device and a compensation method for image data. Background Art

[0002] In normal display, each pixel of a liquid crystal display (LCD) panel should switch between positive and negative frames. However, if the LCD panel remains in a single polarity for a long time, impurity ions in the LCD panel may interfere with the electric field under the influence of direct current (DC) bias, causing flicker.

[0003] The LCD device's timing is defined by the front-end system. The timing controller is part of the receiver. During normal display, the timing controller receives timing information from the front-end system. If even frames are longer than odd frames, the LCD device will produce more flicker, and vice versa. Summary of the Invention

[0004] The present invention relates to a display device and an image data compensation method, which can improve display quality.

[0005] An embodiment of the present invention provides a method for compensating image data, comprising: calculating polarity accumulation time of positive and negative polarities of image data; and determining whether to compensate for the voltage polarity of the image data according to the polarity accumulation time.

[0006] An embodiment of the present invention provides a display device including a display panel and a driver circuit. The display panel is configured to display an image based on image data. The driver circuit is coupled to the display panel. The driver circuit is configured to output the image data to drive the display panel to display the image. The driver circuit is further configured to calculate the polarity accumulation time of the positive and negative polarities of the image data and determine whether to compensate for the voltage polarity of the image data based on the polarity accumulation time.

[0007] In order to make the foregoing content more easily understood, several embodiments are described in detail below with accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the embodiments, serve to explain the principles of the present disclosure.

[0009] Figure 1 is a schematic block diagram of a display device according to an embodiment of the present invention.

[0010] Figure 2 is a waveform diagram of image data according to an embodiment of the present invention.

[0011] Figure 3is a flowchart of the steps of a method for compensating image data according to an embodiment of the present invention.

[0012] Figure 4 FIG. 4 is a schematic diagram showing how polarity accumulation time varies with image frames according to an embodiment of the present invention.

[0013] Explanation of Figure Numbers

[0014] 100: Display device

[0015] 110: Driver circuit

[0016] 120: Display Panel

[0017] 401, 402, 403, 404: Point

[0018] 410, 420: First polarity pattern

[0019] F1~F16: Image frame

[0020] S100, S110, S120, S130: Methods and Steps

[0021] t_TH1: first threshold

[0022] t_TH2: second threshold

[0023] VA: Validity Period

[0024] VB: Blanking period

[0025] VD: Image Data DETAILED DESCRIPTION

[0026] The following examples are provided to describe the present invention in detail. The present invention is not limited to the provided examples, and the provided examples may be combined as appropriate. The terms "couple" or "connect" or "connected" as used in this specification (including the claims) may refer to any direct or indirect connection method. For example, "a first device is coupled to a second device" should be interpreted as "the first device is directly connected to the second device" or "the first device is indirectly connected to the second device via another device or connection method." Furthermore, the term "signal" may refer to current, voltage, charge, temperature, data, electromagnetic waves, or any one or more signals.

[0027] Figure 1 is a schematic block diagram of a display device according to an embodiment of the present invention. Figure 2 is a waveform diagram of image data according to an embodiment of the present invention. Figure 1 and Figure 2The display device 100 includes a driver circuit 110 and a display panel 120. The display panel 120 is configured to display an image according to image data VD. The driver circuit 110 is coupled to the display panel 120. The driver circuit 110 is configured to output image data VD to drive the display panel 120 to display images in a plurality of image frames F1 to F6. The waveform of the image data VD is shown in FIG. Figure 2 The image data VD is image data for driving a specific pixel of the display panel 120 .

[0028] Each of image frames F1 to F6 includes an active period VA and a blanking period VB. Image data VD has a positive voltage in image frames F1, F3, and F5. Image data VD has a negative voltage in image frames F2, F4, and F6. The polarity of the voltages alternates among image frames F1 to F6. In this embodiment, image frames F1, F3, and F5 with positive polarity are shorter than image frames F2, F4, and F6 with negative polarity, but the present invention is not limited to this. In other embodiments, image frames F1, F3, and F5 with positive polarity may be longer than or equal to image frames F2, F4, and F6 with negative polarity.

[0029] In this embodiment, the driver circuit 110 may be a display driver integrated circuit (DDIC) including a timing controller and a source driver integrated into a single circuit chip, but the present invention is not limited thereto. In other embodiments, the timing controller and the source driver may be provided in separate driver circuits. Regarding the hardware structure of the driver circuit 110 and the display panel 120, sufficient guidance, suggestions, and implementation instructions can be obtained by referring to common knowledge in the relevant technical field, and will not be elaborated upon here.

[0030] In an embodiment of the present invention, the driver circuit 110 may perform image compensation on the image data VD to prevent the display panel 120 from flickering. Specifically, Figure 3 is a flowchart of the steps of a method for compensating image data according to an embodiment of the present invention. Figure 4 FIG. 4 is a schematic diagram showing how polarity accumulation time varies with image frames according to an embodiment of the present invention.

[0031] Reference Figure 3 and Figure 4Image frames F1, F3, F5, F7, F10, F13, and F15 marked with a plus sign (+) indicate that these image frames have positive polarity (hereinafter referred to as "positive frames"). Image frames F2, F4, F6, F8, F9, F11, F12, F14, and F16 marked with a minus sign (-) indicate that these image frames have negative polarity (hereinafter referred to as "negative frames"). Before compensation, the duration of positive frames F1, F3, F5, and F7 is 16.6 milliseconds, and the duration of negative frames F2, F4, F6, and F8 is 8.3 milliseconds. The above frame durations are for illustration only and are not intended to limit the present invention.

[0032] In step S100, the driver circuit 110 calculates the polarity accumulation time t_ACC of the positive polarity and the negative polarity of the image data VD every even frame before compensation. Figure 4 In the embodiment shown in FIG4 , driver circuit 110 calculates polarity accumulation time t_ACC once every four frames before compensation, but the present invention is not limited thereto. For example, positive frames F1 and F3 each have a duration of 16.6 milliseconds, and negative frames F2 and F4 each have a duration of 8.3 milliseconds. For the accumulation calculation, the durations of negative frames F2 and F4 are considered negative values, so at point 401, polarity accumulation time t_ACC can be calculated as 16.6 milliseconds. Therefore, polarity accumulation time t_ACC represents the time difference between the positive and negative polarities of image data VD.

[0033] In step S110, the driver circuit 110 determines whether to compensate for the voltage polarity of the image data VD based on the polarity accumulation time t_ACC. When the polarity accumulation time t_ACC is less than or equal to a first threshold t_TH1, the driver circuit 110 does not compensate for the voltage polarity of the image data VD. Alternatively, when the polarity accumulation time t_ACC is greater than or equal to a second threshold t_TH2, the driver circuit 110 also does not compensate for the voltage polarity of the image data VD, where the second threshold t_TH2 is less than the first threshold t_TH1. In this embodiment, the first threshold t_TH1 is set to 20 milliseconds, and the second threshold t_TH2 is set to -20 milliseconds, but the present invention is not limited to this.

[0034] At point 401, because the polarity accumulation time t_ACC is 16.6 milliseconds, which is less than the first threshold t_TH1 (i.e., 16.6 milliseconds < 20 milliseconds), the driver circuit 110 decides not to compensate for the voltage polarity of the image data VD. The driver circuit 110 returns to step S100 and continues to calculate the polarity accumulation time t_ACC every four frames. The polarity accumulation time t_ACC is not reset.

[0035] Next, at point 402, the polarity accumulation time t_ACC is 33.2 milliseconds, which is greater than the first threshold t_TH1. When the polarity accumulation time t_ACC is greater than the first threshold t_TH1, the driver circuit 110 compensates the voltage polarity of the image data VD using the first polarity pattern. Alternatively, when the polarity accumulation time t_ACC is less than the second threshold t_TH2, the driver circuit 110 compensates the voltage polarity of the image data VD using the second polarity pattern.

[0036] Table 1 lists the polarity distribution of the first polarity pattern and the second polarity pattern:

[0037]

[0038] Table 1

[0039] The inequality t_ACC > t_TH1 indicates that the polarity accumulation time t_ACC of the positive frame is too long, so negative polarity compensation is required. The first polarity pattern is used for negative polarity compensation. The first polarity pattern includes at least two negative polarity frames.

[0040] The inequality t_ACC < t_TH2 indicates that the polarity accumulation time t_ACC of the negative frame is too long, so positive polarity compensation is required. The second polarity pattern is used for positive polarity compensation. The second polarity pattern includes at least two positive polarity frames.

[0041] In an embodiment of the present invention, the first polarity pattern and the second polarity pattern each have a time length of an odd number of frames. Table 1 lists the first polarity pattern and the second polarity pattern each having a time length of three frames as an example, but the present invention is not limited thereto.

[0042] At point 402, since the polarity accumulation time t_ACC is 33.2 milliseconds, which is greater than the first threshold t_TH1 (i.e., 33.2 milliseconds > 20 milliseconds), the driver circuit 110 determines to compensate the voltage polarity of the image data VD. The driver circuit 110 executes step S120 and compensates the voltage polarity of the image data VD using the first polarity pattern.

[0043] In step S120, the driver circuit 110 selects the polarity distribution "-+-" of the first polarity pattern 410 to compensate for the voltage polarity of the image data VD. Figure 4 As shown, starting from point 402, the voltage polarity of the image data VD is compensated using a first polarity pattern 410. Frames F9, F10, and F11 are negative, positive, and negative frames, respectively, and have the same time length of 8.3 milliseconds, but the present invention is not limited thereto.

[0044] After compensation, the driver circuit 110 proceeds to step S130 and calculates the polarity accumulation time t_ACC every odd-numbered frame, or in this case, every three frames. At point 403, since the polarity accumulation time t_ACC is calculated to be 24.9 milliseconds, which is still greater than the first threshold t_TH1 (i.e., 24.9 milliseconds > 20 milliseconds), the driver circuit 110 executes step S120 again and compensates the voltage polarity of the image data VD using the first polarity pattern 420.

[0045] Next, at point 404, the polarity accumulation time t_ACC is 16.6 milliseconds, which is less than the first threshold t_TH1 (i.e., 16.6 milliseconds < 20 milliseconds). The driver circuit 110 stops compensating the voltage polarity of the image data VD and returns from step S110 to step S100. Specifically, when the polarity accumulation time t_ACC is between the first threshold t_TH1 and the second threshold t_TH2, the driver circuit 110 stops compensating the voltage polarity of the image data VD. Furthermore, after compensation, the polarity accumulation time t_ACC is calculated every odd-numbered frame until compensation is complete.

[0046] In summary, in an embodiment of the present invention, the driver circuit calculates the polarity accumulation time every even-numbered frame and sets a compensation threshold. When polarity compensation is required, the driver circuit compensates the voltage polarity of the image data using a specified polarity pattern and calculates the polarity accumulation time every odd-numbered frame until compensation is complete. This allows the voltage polarity of the image data to be compensated, preventing flicker on the display panel. This enables the display device to provide excellent display quality.

[0047] It will be appreciated by those skilled in the art that various modifications and variations may be made without departing from the scope or spirit of the present disclosure. In view of the foregoing, it is intended that the present disclosure encompasses modifications and variations provided that the modifications and variations fall within the scope of the appended claims and their equivalents.

Claims

1. A method for compensating image data, comprising: calculating the polarity accumulation time of the positive polarity and the negative polarity of the image data; as well as Whether to compensate for the voltage polarity of the image data is determined according to the polarity accumulation time.

2. The image data compensation method according to claim 1, wherein: The step of determining whether to compensate the voltage polarity of the image data according to the polarity accumulation time includes: When the polarity accumulation time is greater than a first threshold, compensating the voltage polarity of the image data using a first polarity pattern; and When the polarity accumulation time is less than a second threshold, the voltage polarity of the image data is compensated with a second polarity pattern, wherein the second threshold is less than the first threshold. 3 . The image data compensation method according to claim 2 , wherein the first polarity pattern and the second polarity pattern each have a time length of an odd-numbered frame. 4 . The method for compensating image data according to claim 3 , wherein the first polarity pattern comprises at least two negative polarity frames. 5 . The method of compensating image data according to claim 3 , wherein the second polarity pattern comprises at least two positive polarity frames.

6. The image data compensation method according to claim 2, further comprising: When the polarity accumulation time is between the first threshold and the second threshold, compensating the voltage polarity of the image data is stopped. 7 . The method of compensating image data according to claim 1 , wherein before compensation, polarity accumulation times of positive and negative polarities of the image data are calculated every even-numbered frames. 8 . The method of claim 1 , wherein after compensation, polarity accumulation times of positive and negative polarities of the image data are calculated every odd-numbered frames until compensation is completed.

9. The image data compensation method according to claim 1 , wherein the step of determining whether to compensate the voltage polarity of the image data according to the polarity accumulation time comprises: When the polarity accumulation time is less than or equal to the first threshold, not compensating the voltage polarity of the image data; as well as When the polarity accumulation time is greater than or equal to the second threshold, the voltage polarity of the image data is not compensated. 10 . The image data compensation method according to claim 1 , wherein the polarity accumulation time represents a time difference between positive polarity and negative polarity of the image data.

11. A display device comprising: a display panel configured to display an image based on the image data; as well as A driver circuit is coupled to the display panel and configured to output the image data to drive the display panel to display the image, wherein the driver circuit is further configured to calculate the polarity accumulation time of the positive polarity and the negative polarity of the image data and determine whether to compensate the voltage polarity of the image data based on the polarity accumulation time.

12. The display device according to claim 11, wherein When the polarity accumulation time is greater than a first threshold, the driver circuit compensates for the voltage polarity of the image data in a first polarity pattern; and The driver circuit compensates for the voltage polarity of the image data in a second polarity pattern when the polarity accumulation time is less than a second threshold value, wherein the second threshold value is less than the first threshold value. 13 . The display device of claim 12 , wherein the first polarity pattern and the second polarity pattern each have a time length of an odd-numbered frame. The display device of claim 13 , wherein the first polarity pattern includes at least two negative polarity frames. The display device of claim 13 , wherein the second polarity pattern includes at least two positive polarity frames.

16. The display device according to claim 12, wherein When the polarity accumulation time is between the first threshold and the second threshold, the driver circuit stops compensating for the voltage polarity of the image data. 17 . The display device according to claim 11 , wherein the driver circuit calculates polarity accumulation times of positive and negative polarities of the image data every even-numbered frames before compensation. 18 . The display device according to claim 11 , wherein the driver circuit calculates polarity accumulation times of positive and negative polarities of the image data every odd-numbered frames after compensation until compensation ends.

19. The display device according to claim 11, wherein When the polarity accumulation time is less than or equal to the first threshold, the driver circuit does not compensate for the voltage polarity of the image data; and When the polarity accumulation time is greater than or equal to the second threshold, the driver circuit does not compensate for the voltage polarity of the image data.

20. The display device according to claim 11, wherein the polarity accumulation time represents a time difference between positive polarity and negative polarity of the image data.

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