Downclocking processing method and device, electronic equipment and storage medium

Abstract

The invention provides a frequency reduction processing method and device, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the steps of determining current first calculation performance data of a processor; determining whether the processor has underclocking according to the first calculation performance data; when frequency reduction of the processor is determined, determining a target frequency reduction level according to the first calculation performance data; and closing at least one service corresponding to the target frequency reduction level. According to the method and the device, whether the processor has underclocking or not can be detected based on the first calculation performance data, and corresponding service closing can be realized according to the current underclocking level when underclocking occurs, so that the influence of underclocking of the processor on AI core service operation can be reduced, stable operation of a system can be effectively guaranteed, and the service quality of the AI core service is improved. And user experience is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a frequency reduction processing method, device, electronic device, and storage medium. Background Art

[0002] With the continuous advancement of computer technology, various AI (Artificial Intelligence) services are being developed and applied. Currently, a large number of AI services are deployed in terminal devices such as mobile phones and in-vehicle computers. When a large number of AI services are running simultaneously or the external temperature is too high, the processors in these terminal devices are prone to frequency throttling, which can seriously impact the operation of AI services that require high computing power.

[0003] Therefore, there is an urgent need for a frequency reduction processing method to reduce the impact of processor frequency reduction on AI business operations, ensure the stable operation of the system, and improve user experience.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field. Summary of the Invention

[0005] To overcome the problems existing in the related art, the present disclosure provides a frequency reduction processing method, device, electronic device and storage medium.

[0006] According to a first aspect of an embodiment of the present disclosure, a frequency reduction processing method is provided, comprising:

[0007] determining current first computing performance data of the processor;

[0008] determining whether the processor is frequency-reduced according to the first computing performance data;

[0009] When it is determined that the processor frequency reduction occurs, determining a target frequency reduction level according to the first computing performance data;

[0010] At least one service corresponding to the target frequency reduction level is disabled.

[0011] In some embodiments of the present disclosure, the first computing performance data includes at least one of a real-time rate corresponding to a currently running service and an operating frequency of a target chip.

[0012] In some embodiments of the present disclosure, determining whether the processor is frequency-reduced according to the first computing performance data includes:

[0013] When the first computing performance data satisfies a preset frequency reduction condition, it is determined that the processor has undergone frequency reduction, wherein the preset frequency reduction condition is used to describe that at least one item of the first computing performance data falls within a corresponding preset value range.

[0014] In some embodiments of the present disclosure, when the first computing performance data includes a real-time rate corresponding to a currently running service, determining the current first computing performance data of the processor includes:

[0015] When it is detected that the current preset time period has arrived, the real-time rate corresponding to the currently running service is calculated according to the processing time and the amount of processed data of the currently running service.

[0016] In some embodiments of the present disclosure, the frequency reduction processing method provided by the embodiments of the present disclosure further includes:

[0017] Determine the operating priority of each service, where the operating priority is used to describe the importance of the service. The operating priority of any service is inversely proportional to the frequency reduction level corresponding to the service;

[0018] The shutting down at least one service corresponding to the target frequency reduction level includes:

[0019] Determining at least one service corresponding to the target degradation level according to the operation priority of each service;

[0020] At least one service corresponding to the target frequency reduction level is shut down.

[0021] In some embodiments of the present disclosure, after shutting down at least one service corresponding to the target frequency reduction level, the frequency reduction processing method provided by the embodiment of the present disclosure further includes:

[0022] When the detection reaches the next preset time period, determining the second computing performance data of the processor;

[0023] Determining whether the processor is recovered from frequency reduction according to the second computing performance data;

[0024] When it is determined that the processor frequency reduction is recovered, at least one service corresponding to the target frequency reduction level is restarted.

[0025] According to a second aspect of an embodiment of the present disclosure, a frequency reduction processing device is provided, including:

[0026] A computing performance data determining module, configured to determine current first computing performance data of the processor;

[0027] a frequency reduction determination module, configured to determine whether the processor has undergone frequency reduction according to the first computing performance data;

[0028] a target frequency reduction level determination module, configured to determine a target frequency reduction level according to the first computing performance data when frequency reduction occurs on the processor;

[0029] The service closing module is used to close at least one service corresponding to the target frequency reduction level.

[0030] In some embodiments of the present disclosure, the first computing performance data includes at least one of a real-time rate corresponding to a currently running service and an operating frequency of a target chip.

[0031] In some embodiments of the present disclosure, a frequency reduction determination module is used to determine that the processor has undergone frequency reduction when the first computing performance data meets a preset frequency reduction condition, wherein the preset frequency reduction condition is used to describe that at least one item in the first computing performance data falls within a corresponding preset value range.

[0032] In some embodiments of the present disclosure, when the first computing performance data includes the real-time rate corresponding to the currently running business, the computing performance data determination module is used to calculate the real-time rate corresponding to the currently running business based on the processing time and processing data volume of the currently running business when detecting that the current preset time period has been reached.

[0033] In some embodiments of the present disclosure, the frequency reduction processing device provided by the embodiments of the present disclosure further includes:

[0034] An operation priority determination module is used to determine the operation priority of each service. The operation priority is used to describe the importance of the service. The operation priority of any service is inversely proportional to the frequency reduction level corresponding to the service.

[0035] The service shut-down module is configured to determine at least one service corresponding to the target downgrade level according to the operation priority of each service; and shut down the at least one service corresponding to the target downgrade level.

[0036] In some embodiments of the present disclosure, the computing performance data determining module is further configured to determine second computing performance data of the processor when detecting that a next preset time period has arrived;

[0037] a frequency reduction determination module, further configured to determine whether the processor has recovered from frequency reduction based on the second computing performance data;

[0038] The frequency reduction processing device provided in the embodiment of the present disclosure further includes:

[0039] The service restart module is used to restart at least one service corresponding to the target frequency reduction level when determining that the processor frequency reduction is recovered.

[0040] According to a third aspect of an embodiment of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform any one of the above-mentioned frequency reduction processing methods by executing the executable instructions.

[0041] According to a fourth aspect of an embodiment of the present disclosure, a non-temporary computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the frequency reduction processing method described above is implemented.

[0042] According to a fifth aspect of an embodiment of the present disclosure, a computer program product is provided, comprising: a computer program or instructions, which implement any of the above-mentioned frequency reduction processing methods when executed by a processor.

[0043] The technical solutions provided by the embodiments of the present disclosure may have the following beneficial effects:

[0044] The present disclosure can detect whether the processor has experienced frequency reduction based on the first computing performance data, and when frequency reduction occurs, corresponding services can be shut down according to the current frequency reduction level. Therefore, the embodiments of the present disclosure can reduce the impact of processor frequency reduction on the operation of AI core services, and can effectively ensure the stable operation of the system and improve user experience.

[0045] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0047] Figure 1 This is a flowchart illustrating a frequency reduction processing method according to some embodiments of the present disclosure.

[0048] Figure 2 This is a flowchart illustrating a frequency reduction processing method according to some embodiments of the present disclosure.

[0049] Figure 3 This is a schematic diagram of a frequency reduction process according to some embodiments of the present disclosure.

[0050] Figure 4 This is a block diagram of a frequency reduction processing device according to some embodiments of the present disclosure.

[0051] Figure 5 is a block diagram of an electronic device according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0052] Some embodiments of the present disclosure will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. Various changes, modifications and equivalents of the methods, devices and / or systems described herein will become apparent after understanding the present disclosure. For example, the order of operations described herein is merely an example and is not limited to those orders set forth herein, but may be changed as becomes apparent after understanding the present disclosure, except for operations that must be performed in a specific order. In addition, for the sake of clarity and brevity, descriptions of features known in the art may be omitted.

[0053] The embodiments described in the following examples of the present disclosure do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0054] Figure 1 is a flowchart of a frequency reduction processing method according to some embodiments of the present disclosure. Figure 1 As shown, the frequency reduction processing method can be applied to a terminal, which can be various electronic devices capable of implementing video calls, including but not limited to smartphones, tablet computers, laptop computers, desktop computers, augmented reality devices, virtual reality devices, etc. The frequency reduction processing method provided in the embodiment of the present disclosure can include the following steps S102 to S108.

[0055] In step S102 , the current first computing performance data of the processor is determined.

[0056] It should be noted that the embodiments of the present disclosure do not limit the type of processor. For example, the processor may be a single chip, or the processor may be composed of multiple chips. The processor may be used to process data and run at least one business by performing calculations, control flow operations, etc.

[0057] In some embodiments, the processor may be a CPU (Central Processing Unit), an NPU (Neural Processing Unit), or the like.

[0058] In some embodiments of the present disclosure, the first computing performance data may include at least one of a real-time rate corresponding to a currently running service and an operating frequency of a target chip.

[0059] In some exemplary embodiments, the real-time rate corresponding to the currently running service can be represented by an RTF (Real-Time Factor). For example, the real-time rate corresponding to the currently running service can reflect the efficiency of the current service processing. The higher the real-time rate corresponding to the currently running service, the lower the efficiency of the current service processing.

[0060] In some embodiments of the present disclosure, when the first computing performance data includes the real-time rate corresponding to the currently running business, determining the current first computing performance data of the processor may include: when detecting that the current preset time period has been reached, calculating the real-time rate corresponding to the currently running business based on the processing time and the amount of processed data of the currently running business.

[0061] For example, the currently running service is to process audio based on an embedded voice model. In this case, the processing time of the currently running service is the processing time of the audio, and the amount of processed data can be the length of the processed audio. Therefore, the real-time rate of audio processing based on the embedded voice model can be obtained by the ratio of the audio processing time to the length of the audio. For example, if the audio processing time is 30 seconds and the audio length is 1 minute, the real-time rate of audio processing based on the embedded voice model is 0.5.

[0062] In some possible implementations, for any service, a timestamp recording the start time of processing and a timestamp recording the end time of processing may be included, so that the processing time corresponding to the service can be calculated based on the above two timestamps.

[0063] In an exemplary embodiment, the real-time rate corresponding to the currently running service may be calculated once every preset time period. The length of the preset time period may be determined based on experience or application scenarios, for example, the preset time period may be 30 seconds, 1 minute, etc. The embodiment of the present disclosure does not limit the length of the preset time period.

[0064] In some exemplary embodiments, the target chip may be a heterogeneous computing chip, such as a CDSP (Custom Digital Signal Processor), an ADSP (Analog Digital Signal Processor), or the like.

[0065] In addition, the embodiments of the present disclosure do not limit the implementation method for obtaining the operating frequency of the target chip. In some possible implementations, the target chip can record the current operating frequency in a hardware register, so the hardware register can be read through the corresponding low-level access interface, thereby achieving real-time detection of the operating frequency of the target chip. Alternatively, the operating frequency can be read through an SDK (Software Development Kit) or API (Application Programming Interface) used for chip status detection.

[0066] It should be noted that the embodiment of the present disclosure detects whether the processor is frequency-reduced based on the first computing performance data, which can avoid the problem of being unable to determine whether the processor is frequency-reduced when the underlying chip or system does not provide a corresponding API.

[0067] In step S104, it is determined whether the processor frequency is reduced according to the first computing performance data.

[0068] In some embodiments of the present disclosure, determining whether the processor is frequency-reduced is performed based on the first computing performance data, including: when the first computing performance data satisfies a preset frequency-reduction condition, determining that the processor is frequency-reduced, wherein the preset frequency-reduction condition is used to describe that at least one item in the first computing performance data falls within a corresponding preset value range.

[0069] In an exemplary embodiment, the first computing performance data includes the real-time rate corresponding to the currently running service and the operating frequency of the target chip. Therefore, the preset frequency reduction condition may include a preset real-time rate value range corresponding to the real-time rate and a preset frequency value range corresponding to the operating frequency of the target chip.

[0070] In some embodiments, the preset real-time rate value range may be a real-time rate greater than 0.6, or a real-time rate greater than 0.8, etc. Taking 0.8 as an example, if the real-time rate corresponding to the currently running service is greater than 0.8, it can be determined that the real-time rate falls within the corresponding preset value range.

[0071] In an exemplary embodiment, the preset frequency value range can be set according to the model of the target chip. For example, for a CDSP chip, the preset frequency value range can be less than 800 MHz, or the preset frequency value range can be less than 1000 MHz. Taking 1000 MHz as an example, if the operating frequency of the target chip is greater than 1000 MHz, it can be determined that the operating frequency falls within the corresponding preset value range.

[0072] It should be noted that the preset real-time rate value range and the preset frequency value range can be set according to the application scenario or experience, and different services in the same scenario can also correspond to the same or different value ranges, which is not limited in this embodiment of the present disclosure.

[0073] In one possible implementation, if the first computing performance data includes a real-time rate corresponding to a currently running service, then when the real-time rate falls within a corresponding preset value range, it can be determined that the processor has experienced frequency reduction. Similarly, if the first computing performance data includes an operating frequency of a target chip, then when the operating frequency falls within a corresponding preset value range, it can be determined that the processor has experienced frequency reduction.

[0074] In the case where the first computing performance data includes the real-time rate corresponding to the currently running service and the operating frequency of the target chip, in one embodiment, if the real-time rate corresponding to the currently running service or the operating frequency of the target chip falls within the corresponding preset value range, it can be determined that the processor has been frequency-reduced. Alternatively, if the real-time rate corresponding to the currently running service and the operating frequency of the target chip both fall within the corresponding preset value range, it can be determined that the processor has been frequency-reduced.

[0075] It should be noted that the disclosed embodiments take real-time rate into account when determining frequency reduction. This is because real-time rate reflects the efficiency of an algorithm in processing data, and therefore demonstrates how a specific algorithm performs on a given hardware platform. Monitoring the operating frequency of the target chip reveals the actual operating status of the hardware. If the current actual frequency is significantly lower than the nominal frequency, the processor may be experiencing frequency reduction.

[0076] Therefore, the embodiment of the present disclosure provides a method for determining whether the processor is frequency-reduced based on the real-time rate corresponding to the currently running business and the operating frequency of the target chip, which can improve the accuracy and reliability of frequency reduction detection, thereby achieving flexible frequency reduction processing.

[0077] In step S106, when it is determined that the processor frequency reduction occurs, a target frequency reduction level is determined according to the first computing performance data.

[0078] For example, after determining that a frequency reduction has occurred, a target frequency reduction level can be determined based on the first computing performance data. For example, multiple frequency reduction levels can be pre-set, and a value range of the computing performance data corresponding to each frequency reduction can be set. After determining that a frequency reduction has occurred, the target frequency reduction level can be determined by determining the value range of the first computing performance data.

[0079] In step S108, at least one service corresponding to the target frequency reduction level is shut down.

[0080] In some embodiments of the present disclosure, the frequency reduction processing method provided by the embodiments of the present disclosure may also include: determining the operating priority of each business, where the operating priority is used to describe the importance of the business. Optionally, the operating priority of any business is inversely proportional to the frequency reduction level corresponding to the business.

[0081] In this case, shutting down at least one service corresponding to the target frequency reduction level may include: determining at least one service corresponding to the target frequency reduction level according to the operation priority of each service; and shutting down at least one service corresponding to the target frequency reduction level.

[0082] In exemplary embodiments, the disclosed embodiments do not restrict the operating priority of each service. The operating priority can be set based on the application scenario or experience. For example, in an intelligent driving scenario, the operating priority of the real-time voice wake-up service can be lower than that of the online request processing service.

[0083] It should be noted that for multiple businesses of the same importance, their operating priorities can be sorted according to the computing power requirements. The higher the computing power requirements, the lower the operating priority.

[0084] In an exemplary embodiment, the frequency reduction level may include level one, level two, and level three, with level one being the highest level. Businesses include business A, business B, business C, and business D, wherein the operating priorities of business A, business B, business C, and business D decrease in sequence. For example, business A may be a core business, and when frequency reduction occurs, it is necessary to ensure the normal operation of business A, so business D, business C, and business B may be shut down in sequence according to the target frequency reduction level. For example, if the target frequency reduction level is level one, business B, business C, and business D may be shut down; if the target frequency reduction level is level two, business C and business D may be shut down; and if the target frequency reduction level is level three, business D may be shut down.

[0085] It should be noted that the embodiment of the present disclosure can set the running priority of each business in advance, so that when frequency reduction occurs, the business with lower running priority can be shut down first to ensure that the core business can run normally.

[0086] The method provided by the embodiment of the present disclosure can detect whether the processor has experienced frequency reduction based on the first computing performance data, and when frequency reduction occurs, corresponding services can be shut down according to the current frequency reduction level. Therefore, the embodiment of the present disclosure can reduce the impact of processor frequency reduction on the operation of AI core services, and can effectively ensure the stable operation of the system and improve user experience.

[0087] Figure 2 is a flowchart of a frequency reduction processing method according to some embodiments of the present disclosure. Figure 2As shown, after shutting down at least one service corresponding to the target frequency reduction level, the frequency reduction processing method provided by the embodiment of the present disclosure further includes the following steps S202 to S206.

[0088] In step S202 , when the detection reaches the next preset time period, second computing performance data of the processor is determined.

[0089] In step S204, it is determined whether the processor is recovered from frequency reduction according to the second computing performance data.

[0090] In step S206, when it is determined that the processor frequency reduction is recovered, at least one service corresponding to the target frequency reduction level is restarted.

[0091] In some exemplary embodiments, embodiments of the present disclosure may periodically determine processor computing performance data to detect processor frequency increases and decreases in real time. Furthermore, embodiments of the present disclosure do not limit the implementation method for determining whether the processor has recovered from frequency reduction. For example, a preset frequency reduction recovery condition may be set for the computing performance data, and when second computing performance data meets the preset frequency reduction recovery condition, the processor is determined to have recovered from frequency reduction.

[0092] It should be noted that the method provided by the embodiment of the present disclosure can realize the periodic detection of the processor's frequency increase and frequency decrease, so that the corresponding business can be closed and restarted in time, thereby effectively improving the flexibility of the frequency reduction processing, further ensuring the stable operation of the system and improving the user experience.

[0093] In an exemplary embodiment, a frequency reduction process diagram provided by the embodiment of the present disclosure can be as follows: Figure 3 shown.

[0094] In this Figure 3 In the example, the monitoring unit can periodically calculate the RTF value of the algorithm and monitor the operating frequency of the CDSP chip in real time. The judgment unit can determine whether frequency reduction has occurred based on the RTF value determined by the monitoring unit and the operating frequency of the CDSP chip, and determine a target frequency reduction level if frequency reduction has occurred. Finally, the execution unit can shut down at least one service corresponding to the target frequency reduction level.

[0095] For example, Figure 3 As shown, the execution unit can, for example, turn off FlexASR (Flexibility Automatic Speech Recognition) and other external functions and only process online requests.

[0096] Figure 4 FIG. 1 is a block diagram of a frequency reduction processing device according to some embodiments of the present disclosure. Figure 4The device includes a computing performance data determination module 401, a frequency reduction determination module 402, a target frequency reduction level determination module 403, and a conversion module service closing module 404.

[0097] The computing performance data determining module 401 is configured to determine the current first computing performance data of the processor;

[0098] A frequency reduction determination module 402 is configured to determine whether a frequency reduction occurs on the processor according to the first computing performance data;

[0099] A target frequency reduction level determination module 403 is configured to determine a target frequency reduction level according to first computing performance data when frequency reduction of the processor occurs;

[0100] The service closing module 404 is configured to close at least one service corresponding to the target frequency reduction level.

[0101] In some embodiments of the present disclosure, the first computing performance data includes at least one of a real-time rate corresponding to a currently running service and an operating frequency of a target chip.

[0102] In some embodiments of the present disclosure, the frequency reduction determination module 402 is used to determine whether the processor has undergone frequency reduction when the first computing performance data meets a preset frequency reduction condition, wherein the preset frequency reduction condition is used to describe that at least one item in the first computing performance data falls within a corresponding preset value range.

[0103] In some embodiments of the present disclosure, when the first computing performance data includes the real-time rate corresponding to the currently running business, the computing performance data determination module 401 is used to calculate the real-time rate corresponding to the currently running business based on the processing time and processing data volume of the currently running business when detecting that the current preset time period has been reached.

[0104] In some embodiments of the present disclosure, the frequency reduction processing device provided by the embodiments of the present disclosure further includes:

[0105] The operation priority determination module is used to determine the operation priority of each business. The operation priority is used to describe the importance of the business. The operation priority of any business is inversely proportional to the frequency reduction level corresponding to the business;

[0106] The service shut down module 404 is configured to determine at least one service corresponding to a target downgrade level according to the operation priorities of the services, and shut down the at least one service corresponding to the target downgrade level.

[0107] In some embodiments of the present disclosure, the computing performance data determining module 401 is further configured to determine the second computing performance data of the processor when detecting that the next preset time period has arrived;

[0108] The frequency reduction determination module 402 is further configured to determine whether the processor frequency reduction is recovered based on the second computing performance data;

[0109] The frequency reduction processing device provided in the embodiment of the present disclosure further includes:

[0110] The service restart module is used to restart at least one service corresponding to the target frequency reduction level when determining that the processor frequency reduction is recovered.

[0111] The device provided by the embodiment of the present disclosure can detect whether the processor has experienced frequency reduction based on the first computing performance data, and when frequency reduction occurs, can implement corresponding business shutdown according to the current frequency reduction level. Therefore, the embodiment of the present disclosure can reduce the impact of processor frequency reduction on the operation of AI core business, and can effectively ensure the stable operation of the system and improve user experience.

[0112] Regarding the apparatus in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0113] Figure 5 is a block diagram illustrating an apparatus 500 for frequency reduction processing according to some embodiments of the present disclosure. For example, apparatus 500 may be an electronic device, such as a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0114] Reference Figure 5 , apparatus 500 may include one or more of the following components: a processing component 502 , a memory 504 , a power component 506 , a multimedia component 508 , an audio component 510 , an input / output (I / O) interface 512 , a sensor component 514 , and a communication component 516 .

[0115] The processing component 502 generally controls the overall operation of the device 500, such as operations associated with display, phone calls, data communications, camera operation, and recording operations. The processing component 502 may include one or more processors 820 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 502 may include one or more modules to facilitate interaction between the processing component 502 and other components. For example, the processing component 502 may include a multimedia module to facilitate interaction between the multimedia component 508 and the processing component 502.

[0116] The memory 504 is configured to store various types of data to support operations on the device 500. Examples of such data include instructions for any application or method operating on the device 500, contact data, phone book data, messages, pictures, videos, etc. The memory 504 can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0117] The power supply component 506 provides power to the various components of the device 500. The power supply component 506 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device 500.

[0118] The multimedia component 508 includes a screen that provides an output interface between the device 500 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor can not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 508 includes a front camera and / or a rear camera. When the device 500 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0119] The audio component 510 is configured to output and / or input audio signals. For example, the audio component 510 includes a microphone (MIC), which is configured to receive external audio signals when the device 500 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 504 or transmitted via the communication component 516. In some embodiments, the audio component 510 also includes a speaker for outputting audio signals.

[0120] I / O interface 512 provides an interface between processing component 502 and peripheral interface modules, such as a keyboard, click wheel, buttons, etc. These buttons may include but are not limited to: a home button, volume buttons, a start button, and a lock button.

[0121] The sensor assembly 514 includes one or more sensors for providing various aspects of the status assessment of the device 500. For example, the sensor assembly 514 can detect the open / closed state of the device 500, the relative positioning of components, such as the display and keypad of the device 500. The sensor assembly 514 can also detect changes in the position of the device 500 or a component of the device 500, the presence or absence of user contact with the device 500, the orientation or acceleration / deceleration of the device 500, and temperature changes of the device 500. The sensor assembly 514 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 514 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 514 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0122] The communication component 516 is configured to facilitate wired or wireless communication between the apparatus 500 and other devices. The apparatus 500 can access a wireless network based on a communication standard, such as WiFi, 3G, 4G, 5G, other communication standards, or a combination thereof. In some embodiments of the present disclosure, the communication component 516 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In some embodiments of the present disclosure, the communication component 516 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0123] In some embodiments of the present disclosure, the apparatus 500 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above-described methods.

[0124] In some embodiments of the present disclosure, a non-transitory computer-readable storage medium including instructions is further provided, such as a memory 504 including instructions, and the instructions can be executed by the processor 820 of the apparatus 500 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0125] A non-temporary computer-readable storage medium, when instructions in the storage medium are executed by a processor of a mobile terminal, enables the mobile terminal to perform a frequency reduction processing method, the method comprising: determining the current first computing performance data of the processor; determining whether the processor has undergone frequency reduction based on the first computing performance data; when it is determined that the processor has undergone frequency reduction, determining a target frequency reduction level based on the first computing performance data; and shutting down at least one service corresponding to the target frequency reduction level.

[0126] Based on the same inventive concept, embodiments of the present disclosure further provide a computer program product, including a computer program or instructions, which, when executed by a processor, implements the frequency reduction processing method of any one of the above-mentioned method embodiments. Since the principles for solving the problem in this computer program product embodiment are similar to those in the above-mentioned method embodiment, the implementation of this computer program product embodiment can refer to the implementation of the above-mentioned method embodiment, and the repeated parts will not be repeated here.

[0127] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0128] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A frequency reduction processing method, characterized in that: include: determining current first computing performance data of the processor; determining whether the processor is frequency-reduced according to the first computing performance data; When it is determined that the processor frequency reduction occurs, determining a target frequency reduction level according to the first computing performance data; At least one service corresponding to the target frequency reduction level is disabled.

2. The frequency reduction processing method according to claim 1, characterized in that: The first computing performance data includes at least one of a real-time rate corresponding to a currently running service and an operating frequency of a target chip.

3. The frequency reduction processing method according to claim 1 or 2, characterized in that: The determining, according to the first computing performance data, whether the processor frequency is reduced includes: When the first computing performance data satisfies a preset frequency reduction condition, it is determined that the processor has undergone frequency reduction, wherein the preset frequency reduction condition is used to describe that at least one item of the first computing performance data falls within a corresponding preset value range.

4. The frequency reduction processing method according to claim 2, wherein: When the first computing performance data includes a real-time rate corresponding to a currently running service, determining the current first computing performance data of the processor includes: When it is detected that the current preset time period has arrived, the real-time rate corresponding to the currently running service is calculated according to the processing time and the amount of processed data of the currently running service.

5. The frequency reduction processing method according to claim 1 or 2, characterized in that: The method further comprises: Determine the operating priority of each service, where the operating priority is used to describe the importance of the service. The operating priority of any service is inversely proportional to the frequency reduction level corresponding to the service; The shutting down at least one service corresponding to the target frequency reduction level includes: Determining at least one service corresponding to the target degradation level according to the operation priority of each service; At least one service corresponding to the target frequency reduction level is shut down.

6. The frequency reduction processing method according to claim 1 or 2, characterized in that: After shutting down at least one service corresponding to the target frequency reduction level, the method further includes: When the detection reaches the next preset time period, determining the second computing performance data of the processor; Determining whether the processor is recovered from frequency reduction according to the second computing performance data; When it is determined that the processor frequency reduction is recovered, at least one service corresponding to the target frequency reduction level is restarted.

7. A frequency reduction processing device, characterized in that: include: A computing performance data determining module, configured to determine current first computing performance data of the processor; a frequency reduction determination module, configured to determine whether the processor has undergone frequency reduction according to the first computing performance data; a target frequency reduction level determination module, configured to determine a target frequency reduction level according to the first computing performance data when frequency reduction occurs on the processor; The service closing module is used to close at least one service corresponding to the target frequency reduction level.

8. An electronic device, characterized in that: include: processor; as well as a memory for storing executable instructions of the processor; The processor is configured to execute the frequency reduction method according to any one of claims 1 to 6 by executing the executable instructions.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the frequency reduction processing method according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that The computer program product includes computer instructions, which are stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the electronic device performs the frequency reduction processing method according to any one of claims 1 to 6.

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