A data transmission method, system, product, equipment, medium, and apparatus

By setting polling priorities and polling weights for accelerator channels and dynamically scheduling data transmission, the problem that polling strategies cannot adapt to differentiated needs is solved, thus improving system performance and flexibility.

CN120567801BActive Publication Date: 2025-11-14LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Patent Information

Application Number
CN202511063229.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-07-31
Publication Date
2025-11-14
Estimated Expiration
2045-07-31

AI Technical Summary

Technical Problem

In existing technologies, polling strategies cannot flexibly respond to the differentiated bandwidth or real-time requirements of different accelerator applications, resulting in reduced system efficiency and flexibility.

Method used

Each channel is assigned a polling priority and polling weight for different applications. During the dynamic scheduling process, the channel reading order is determined based on the polling priority, and the number of descriptors read in a single session is precisely controlled by the polling weight, adapting to the real-time and bandwidth differences required by different applications.

Benefits of technology

It enables refined resource allocation, improves system performance, meets the real-time requirements of differentiated services, and reduces hardware overhead.

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Abstract

This application discloses a data transmission method, system, product, device, medium, and apparatus, relating to the field of data transmission technology. By setting polling priorities and polling weights for each channel under different applications, where the polling weight represents the first number of descriptors read from the readable channel each time, the channel reading order can be dynamically determined according to the polling priority during the scheduling process, and the number of descriptors read in a single time can be precisely controlled according to the polling weight. This flexibly adapts to the differentiated requirements of real-time performance and bandwidth for different applications, solving the problem that polling strategies in related technologies cannot adapt to differentiated requirements, and achieving the beneficial effects of refined resource allocation and improved system performance.
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Description

Technical Field

[0001] This application relates to the field of data transmission technology, and in particular to a data transmission method, system, product, equipment, medium and apparatus. Background Technology

[0002] In data center scenarios, leveraging DMA (Direct Memory Access) technology for high-speed data transfer between accelerators and hosts is crucial. To meet the demands of multiple applications running simultaneously, related technologies typically bind each DMA channel to an independent CPU (Central Processing Unit), configuring a dedicated FIFO (First In First Out) memory descriptor for each DMA channel, and executing tasks sequentially through a polling approach. However, this polling strategy cannot flexibly respond to the varying bandwidth or real-time requirements of different applications, reducing system efficiency and flexibility.

[0003] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] This application provides a data transmission method, system, product, equipment, medium, and apparatus to at least solve the problem that polling strategies in related technologies cannot adapt to differentiated needs.

[0005] This application provides a data transmission method, comprising: when at least one readable channel exists among multiple channels, determining the polling priority and polling weight of the readable channel under the current application; the channel occupies the corresponding address space in a first storage medium to store descriptors issued by a host computer; reading the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one of the readable channels; the polling weight representing a first number of descriptors read from the readable channel each time; and performing data transmission operations based on the read descriptors that satisfy the execution conditions for direct memory access.

[0006] This application also provides a data transmission system, comprising: a first determining module configured to determine the polling priority and polling weight of the readable channel under the current application when at least one readable channel exists among multiple channels; the channel occupies the corresponding address space in a first storage medium to store descriptors issued by a host computer; a reading module configured to read the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one of the readable channels; the polling weight representing a first number of descriptors read from the readable channel each time; and an execution module configured to perform data transmission operations based on the read descriptors that satisfy the execution conditions for direct memory access.

[0007] This application also provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the data transmission method described above.

[0008] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the data transmission method described above.

[0009] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the data transmission method described above.

[0010] This application also provides a data transmission apparatus, comprising: a control register configured to store polling priorities and polling weights corresponding to each channel; a first storage medium, wherein the channels occupy corresponding address spaces in the first storage medium to store descriptors issued by a host computer; a write control component configured to write descriptors issued by the host computer into corresponding channels; a read control component configured to read descriptors stored in multiple channels according to the polling priorities and polling weights; a splitting component configured to output descriptors that satisfy the execution conditions for direct memory access; and an execution component configured to perform data transmission operations based on the read descriptors that satisfy the execution conditions for direct memory access.

[0011] This application sets polling priorities and weights for each channel under different applications. The polling weight represents the first number of descriptors read from the readable channel each time. During scheduling, the channel reading order can be dynamically determined according to the polling priority, and the number of descriptors read in a single time can be precisely controlled according to the polling weight. This allows for flexible adaptation to the differentiated real-time and bandwidth requirements of different applications, solving the problem that polling strategies in related technologies cannot adapt to differentiated requirements. This achieves the beneficial effects of refined resource allocation and improved system performance. Attached Figure Description

[0012] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a flowchart illustrating the steps of a data transmission method provided in an embodiment of this application.

[0014] Figure 2 This is a schematic diagram of descriptor writing provided in an embodiment of this application.

[0015] Figure 3 This is a schematic diagram of descriptor retrieval provided in an embodiment of this application.

[0016] Figure 4 A flowchart illustrating the steps of another data transmission method provided in this application embodiment.

[0017] Figure 5 This is a schematic diagram of a data transmission device for a first transmission scenario provided in an embodiment of this application.

[0018] Figure 6 This is a schematic diagram of a data transmission device for a second transmission scenario provided in an embodiment of this application.

[0019] Figure 7 This is a schematic diagram of a data transmission system provided in an embodiment of this application. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0021] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0022] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0023] Embodiments of this application provide a data transmission method, combined with, for example... Figure 1 The execution flow of the data transmission method shown is described in detail.

[0024] S101: When there is at least one readable channel among multiple channels, determine the polling priority and polling weight of the readable channel under the current application; the channel occupies the corresponding address space in the first storage medium to store the descriptor issued by the host computer.

[0025] In this embodiment, the first storage medium can be a RAM (Random Access Memory) memory. The RAM memory is divided into address spaces of a preset size, with multiple channels occupying different address spaces to store the descriptors of each channel. For example, taking 16 channels as an example, with each channel supporting 128 descriptors, the required depth of the RAM memory is 16 × 128, or 2048. The RAM memory can be divided into 16 address spaces, with each of the 16 channels corresponding to one of the 16 address spaces in the RAM memory, so that the descriptors of each channel can be stored separately. Since there may be simultaneous read and write operations to the RAM memory, the RAM memory in this embodiment can be selected as a dual-port RAM.

[0026] This embodiment pre-assigns polling priorities and weights to each channel for different applications. The polling priority determines the reading order of each channel; it can be understood that the polling priority is set based on whether latency and timely response are important for the current application. As an optional embodiment, the polling priority can be divided into three levels: medium, low, and high. Channels with higher priority will be polled first. The polling weight represents the initial number of descriptors read from the readable channel each time. The polling weight can be seen as a supplement to the polling priority. With the same amount of data, a channel with a higher polling weight will execute faster and finish earlier within the same polling priority. The polling weight can be set from 1 to 128.

[0027] Assume that the FPGA (Field-Programmable Gate Array) accelerator is deployed with encryption and decryption applications such as SM2 (Elliptic Curve Public Key Cryptographic Algorithm), SM3 (Cryptographic Hash Algorithm), SM4 (Block Cipher Algorithm), 3DES (Triple Data Encryption Algorithm), AES (Advanced Encryption Standard), and SHA (Secure Hash Algorithm), as well as image compression and decompression applications and network data transmission and reception applications. These applications correspond to channels L0 to L8 respectively, and their polling priority and polling weight configurations are shown in Table 1.

[0028] Table 1. Correspondence between application, channel, polling priority, and polling weight.

[0029]

[0030] As can be understood, in Table 1, channel L8 corresponds to network data transmission and reception applications, which require timely response, so this channel can be set to high priority. Channels L7 and L6 correspond to image compression and decompression applications, which require a large amount of data processing and do not care about latency, so they can be set to low priority. The remaining channels correspond to encryption and decryption applications (SM2, SM3, SM4, 3DES, AES, SHA), and can be set to medium priority. Since network data transmission and reception is a high priority application and there is only one such application, the polling weight can be set to 1. Image compression and decompression are low priority applications, and there are only two such applications, so they are unlikely to occur simultaneously, so the polling weight can also be set to 1. Channels L0-L5 are encryption and decryption applications with the same polling priority. Users need to set the polling weight according to their needs. Considering that the data volume of SM2, SM3, and SHA applications is relatively small, and it is desirable to complete all data processing directly when polling them, the polling weight can be set to a value greater than the number of descriptors (maximum data volume / descriptor size). SM4, 3DES, AES, etc., have a larger data volume and longer processing time, so the polling weight can be set to 1.

[0031] Of course, the above and Table 1 are just examples. The polling priority and polling weight of each channel can be adjusted according to the application corresponding to that channel. This embodiment does not make specific limitations here.

[0032] In this embodiment, a readable channel is a channel among multiple channels that meets the reading conditions. The reading conditions are adjusted according to different transmission scenarios. For example, in scenarios where a large amount of data is transmitted at once, such as multimedia video streams or audio streams, the reading conditions may include all descriptors allocated to a certain channel being written to that channel. In scenarios where a small amount of data is transmitted at once, such as text information transmission, the reading conditions may include a certain channel not being empty. The specific criteria for determining a readable channel can be set according to actual engineering needs. This embodiment does not specifically limit the criteria for determining a readable channel.

[0033] Before this step, the process includes monitoring each channel to determine if there are readable channels that meet the reading conditions of the current transmission scenario. If readable channels exist, the polling priority and weight for each readable channel are determined so that identifiers can be read from each readable channel according to the polling priority and weight. If no readable channels meet the reading conditions of the current transmission scenario, monitoring continues.

[0034] By dynamically allocating polling priorities and weights across multiple channels, adaptive data scheduling optimization is achieved for application scenarios. Polling priorities ensure low-latency data response, while polling weights can finely adjust the throughput ratio of each channel. This improves the overall throughput efficiency of the system while meeting the real-time requirements of differentiated businesses. Furthermore, optimized access to the storage address space reduces hardware overhead, offering both deployment flexibility and energy efficiency advantages.

[0035] S102: Read the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel; the polling weight represents the first number of descriptors read from the readable channel each time.

[0036] In this embodiment, the polling weight corresponding to each channel represents the first number of descriptors that can be read from that readable channel each time. Assuming a polling weight of 5 for a certain channel, it means that at most 5 descriptors can be read from that channel each time it is polled. Specifically, if the number of descriptors to be read in that channel is less than 5 when it is polled, all descriptors in that channel are read. If the number of descriptors to be read in that channel is greater than or equal to 5 when it is polled, 5 descriptors in that channel are read. It can be understood that different readable channels can have the same polling priority or different polling priorities; correspondingly, different readable channels can also have the same polling weight or different polling weights. When there are readable channels among multiple channels, polling is triggered. First, all readable channels are sorted according to their polling priority. Then, descriptors are read from each readable channel sequentially according to their polling weight. After reading, operations to update the channel status (such as updating the number of descriptors to be read) may also be included.

[0037] By controlling the number of descriptors read in each polling iteration using polling weights, data can be processed in batches, reducing the overhead of frequent polling and improving system throughput. Combining polling priority and polling weights prevents low-priority channels from consuming resources for extended periods while ensuring timely responses from high-priority channels. Although high-priority channels are processed first, proper allocation of polling weights ensures that low-priority channels are also processed fairly, preventing complete blocking.

[0038] As an optional embodiment, the polling priority of each channel in this embodiment can also be adjusted according to the status of the channel within a first preset time period. For example, if a channel is set to a high polling priority, but there is no data within the first preset time period up to the current moment, the polling priority of that channel can be reduced. After maintaining the reduced polling priority for a second preset time period, the polling priority of that channel can be adjusted back to its original polling priority. Alternatively, when data reappears in the channel, the polling priority of that channel can be adjusted back to its original polling priority. The polling priority and the number of polls can be dynamically adjusted according to actual needs; this embodiment does not impose specific limitations on this.

[0039] S103: Perform a data transfer operation based on the descriptor read that satisfies the execution conditions for direct memory access.

[0040] Direct Memory Access (DMA) is a technology that allows peripherals (such as network interface cards, disk controllers, etc.) to interact directly with memory without CPU intervention in data transfer, thereby improving data transfer efficiency. In this embodiment, DMA is used to efficiently transfer data pointed to by a descriptor, such as moving data from memory to a device, or moving data from a device to memory.

[0041] As can be understood, a descriptor is a data structure that includes, but is not limited to, source address, destination address, data length, status / control bits, and other information. In this embodiment, the descriptor is used to describe the data to be transmitted. After the descriptor is read, it is submitted to the DMA controller so that the DMA controller can perform the data transmission operation corresponding to the descriptor, that is, move the data block at the source address of the descriptor to the destination address.

[0042] In this embodiment, the descriptor to be executed needs to meet the execution conditions of direct memory access. These execution conditions are determined based on the max_payload_size supported by the DMA controller and the 4k address boundary. That is, the data block size specified by the descriptor to be executed in this embodiment does not exceed the max_payload_size supported by the DMA controller (e.g., the max_payload_size of PCIe (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) devices, including but not limited to 128B / 256B, etc.). The start address and destination address of the data block are both aligned with the 4k boundary, and the data block does not cross the 4k address boundary to avoid paging overhead.

[0043] DMA (Direct Memory Access) automatically moves data, reducing CPU interrupts and copy operations, thus improving overall system performance. DMA supports batch descriptor processing, controlling the number of descriptors read from a channel at a time through a polling weight mechanism. The DMA controller can process these descriptors in batches, reducing the overhead of frequent DMA start-stop operations and maximizing I / O (Input / Output) throughput. Priority scheduling ensures that critical data (such as real-time audio and video streams) is transmitted first, reducing jitter. Utilizing DMA hardware capabilities, zero-copy data transfer is achieved, making it suitable for high-performance computing, network packet processing, and other scenarios.

[0044] This application sets polling priorities and weights for each channel under different applications. The polling weight represents the first number of descriptors read from the readable channel each time. During scheduling, the channel reading order can be dynamically determined according to the polling priority, and the number of descriptors read in a single time can be precisely controlled according to the polling weight. This allows for flexible adaptation to the differentiated real-time and bandwidth requirements of different applications, solving the problem that polling strategies in related technologies cannot adapt to differentiated requirements. This achieves the beneficial effects of refined resource allocation and improved system performance.

[0045] In one exemplary embodiment, the readable channel includes a first readable channel; the data transmission method further includes: updating a second number of descriptors written in the channel when writing a descriptor to the corresponding channel; and for each channel, determining that a first readable channel exists among the multiple channels when the second number is equal to the number of writes completed for the corresponding channel.

[0046] In this embodiment, each descriptor is written into the address space of the corresponding RAM memory according to the channel ID (Identification) number. It can be understood that there is a one-to-one correspondence between the channel ID number and the address space of the RAM memory. Assuming there are 4 channels and the RAM memory depth is 512, the address space of the RAM memory 0-127 is allocated to the first channel, 128-255 is allocated to the second channel, and so on. The received descriptor is written starting from the corresponding starting address.

[0047] When writing descriptors to the corresponding channels, the second count of descriptors written to that channel is updated after each descriptor is written. The second count records the number of descriptors currently written to each channel, initially set to 0 and incrementing by 1 for each descriptor written. Taking a single channel as an example, if the first descriptor is written to that channel, the second count is updated to 1; if the second descriptor is written, the second count is updated to 2, and so on. The write completion count refers to the total number of descriptors to be written to each channel as specified by the host computer, used to determine if the channel is readable. A first readable channel is one that has reached its write completion count, meaning all descriptors in that channel have been written and it can be read through polling. For example, if channel A has a write completion count of 10, then channel A becomes a first readable channel when the second count is 10. In this transmission scenario, the read condition is that the second count of the channel has been updated to reflect the corresponding write completion count. At this point, if at least one first readable channel exists among multiple channels, polling can be triggered. After determining the polling priority and weight of each first readable channel, subsequent polling operations are executed.

[0048] For example, assume there are four channels: A, B, C, and D. A occupies address space 0-127 of the RAM memory, B occupies address space 128-255, and so on. The number of writes completed for A is 3, for B it is 5, for C it is 2, and for D it is 4. During the descriptor write phase, A writes 3 descriptors (addresses 0→1→2), and the second count of A is updated to 3. At this point, A is determined to be the first readable channel. B writes 5 descriptors (addresses 128→129→130→131→132), and the second count of B is updated to 5. At this point, B is also determined to be the first readable channel. C writes 2 descriptors (addresses 256→257), and the second count of C is updated to 2. C is also determined to be the first readable channel. D writes 4 descriptors (addresses 384→385→386→387), and the second count of D is updated to 4. D is also determined to be the first readable channel. It is understandable that if the second number of a certain channel is less than its corresponding write completion number, it should be skipped during polling. For example, when D is determined to be the first readable channel, the second number of B may not have reached its corresponding second number yet, so B should be skipped during polling.

[0049] In this embodiment, the readability of a channel is accurately determined by comparing the second quantity with the number of write completions, thus avoiding invalid polling. Moreover, polling is triggered immediately once a channel meets the readability conditions, reducing the delay from data readiness to processing. Each channel is counted independently, and the address space is also independent. A single channel error (such as overflow) does not affect the operation of other channels.

[0050] In one exemplary embodiment, updating the second number of descriptors written in the channel when writing a descriptor to the corresponding channel includes: controlling the value of the write counter corresponding to the channel to increment when writing a descriptor to the corresponding channel, so as to update the second number of descriptors written in the channel; the data transmission method further includes: when the value of the write counter is equal to the number of writes completed corresponding to the channel, setting the read flag of the channel to a first preset value, so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

[0051] In this embodiment, refer to Figure 2As shown, each of the n+1 channels (L0~Ln) is independently configured with a write counter to record the number of descriptors currently written to that channel (i.e., the second count). The initial value of the write counter is 0. The write counter increments by 1 for each descriptor written to accurately track the channel's writing progress and determine whether the channel has reached the readable condition. This embodiment also independently configures a read flag for each channel. The read flag is a status flag for each channel, indicating whether the channel is readable. The read flag includes two values: a first preset value and a second preset value. The first preset value can be 1, and the second preset value can be 0. When the value of the write counter for any channel equals the number of written descriptors, the read flag can be set to 1. If the read flag of any channel is detected to be 1, it can be determined that at least one first readable channel exists among the multiple channels, thus triggering polling.

[0052] For example, suppose there are three channels, A, B, and C. A occupies RAM address space 0-127, B occupies RAM address space 128-255, and C occupies RAM address space 256-383. The number of writes completed for A is 3, for B it is 2, and for C it is 4.

[0053] Descriptor write and counter update: For A, writing the first descriptor (address 0) → the write counter count is 1; writing the second descriptor (address 1) → the write counter count is 2; writing the third descriptor (address 2) → the write counter count is 3. For B, writing the first descriptor (address 128) → the write counter count is 1; writing the second descriptor (address 129) → the write counter count is 2. For C, writing the first descriptor (address 256) → the write counter count is 1 (not yet reached the write completion count of 4, temporarily unreadable).

[0054] Read flag update: For A: The write counter count is 3, which is equal to the number of writes completed for A (3), and the read flag is set to 1 (readable); For B: The write counter count is 2, which is equal to the number of writes completed for B (2), and the read flag is set to 1 (readable); For C: The write counter count is 1, which is less than the number of writes completed for C (4), and the read flag remains 0 (unreadable).

[0055] If the read flags of A and B are set to 1, it is determined that A and B are the first readable channels. Descriptors are read according to the polling priority (e.g., A>B) and polling weight (e.g., the polling weight of A is 2 and the polling weight of B is 1). Two descriptors are read from A (addresses 0-1), and the remaining one (address 2) is reserved for the next poll. One descriptor is read from B (address 128).

[0056] In this embodiment, the write counter and read flag can be implemented through registers or memory mapping, allowing for efficient hardware access and reducing software decision-making overhead. The update and write operations of the read flag are completed synchronously, ensuring that the readable state can be detected immediately, reducing latency. Each channel maintains its own write counter and read flag, avoiding multi-channel contention and enhancing system stability. Polling is triggered only when the read flag is 1, reducing power consumption from invalid channel scans.

[0057] In one exemplary embodiment, reading the descriptor stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel includes: when there is one first readable channel, performing a read operation on the first readable channel; when there are multiple first readable channels, performing read operations on the multiple first readable channels in descending order of polling priority; wherein the read operation includes reading the descriptor stored in the first readable channel according to the polling weight corresponding to the first readable channel.

[0058] For example, since the total number of descriptors sent by the host computer to each channel may be different, and the timing of these sending may also be different, the time when each channel becomes the first readable channel may also be different. There can be one or more first readable channels at any given time. If there is only one first readable channel, after polling is triggered, only that first readable channel needs to be read; that is, at most the first number of descriptors are read from that first readable channel according to its polling weight. If there are multiple first readable channels, the read operations are performed sequentially on the multiple first readable channels according to their polling priority from high to low.

[0059] For example, suppose there are three primary readable channels, A, B, and C. A has a high polling priority and a polling weight of 3, B has a medium polling priority and a polling weight of 2, and C has a low polling priority and a polling weight of 1. Assume A has currently written 3 descriptors, B has written 2 descriptors, and C has written 1 descriptor. The current polling is performed in descending order of polling priority: first, a read operation is performed on A, reading 3 descriptors; then a read operation is performed on B, reading 2 descriptors; and finally, a read operation is performed on C, reading 1 descriptor.

[0060] It is understandable that if the number of remaining descriptors in the first readable channel is less than the first number represented by the polling weight (e.g., if there is only one descriptor left in the first readable channel, then only one descriptor will be read when the polling weight is equal to 2). Furthermore, if there are no readable descriptors in the first readable channel, they will be automatically skipped during polling.

[0061] This embodiment prioritizes high-priority channels (such as real-time audio and video streams) for processing, ensuring low latency. Throughput allocation for each channel is controlled by polling weights, preventing starvation of low-priority channels. Batch reading (by weight) reduces the number of DMA initiations, improving data transmission efficiency.

[0062] In an exemplary embodiment, read operations are performed on a plurality of first readable channels in descending order of polling priority, including: determining the first readable channel with the highest polling priority among all first readable channels that have not undergone read operations, performing read operations on the first readable channel with the highest polling priority, and repeating this step until all descriptors in all first readable channels have been retrieved.

[0063] In this embodiment, among all first readable channels, the first readable channel with the highest priority is processed first. Here, a first readable channel that has not undergone a read operation refers to a channel that has been marked as readable (meets the write completion condition) but has not yet been polled, or has only been partially read (still has remaining descriptors). Among the unprocessed channels, the channel with the highest polling priority is selected to ensure that critical data is processed first.

[0064] In this embodiment, it is assumed that there are four first readable channels, namely A, B, C, and D, where A and C are high priority, B is low priority, and D is medium priority. Following a preset order or a random method, a channel is selected from A and C to perform a reading operation first. For example, A is selected first for reading. After reading A, if a new first readable channel E with a higher polling priority than A exists, E is read. If no new first readable channel with a higher polling priority than A exists, C, which has the same polling priority as A, is read. After reading C, if no new first readable channel with a higher polling priority than C exists, and there are still unread descriptors in A and / or C, the polling continues between A and C until all descriptors between A and C are retrieved. The reading process for B and D is similar.

[0065] In this embodiment, it can be ensured that the descriptor of the highest priority channel is processed first to meet the requirements of the real-time system, and that the low priority channel will not preempt the resources of the high priority channel to avoid service interference.

[0066] In one exemplary embodiment, among all first readable channels that have not undergone read operations, the first readable channel with the highest polling priority is determined, and a read operation is performed on the first readable channel with the highest polling priority. This step is repeated until descriptors in all first readable channels are retrieved. This includes: among all first readable channels that have not undergone read operations, determining the current readable channel with the highest polling priority; performing a read operation on the current readable channel, and determining whether there is a first target readable channel among all first readable channels with a higher polling priority than the current readable channel; if there is a first target readable channel, the first target readable channel is used as the new current readable channel, and a read operation is performed on the current readable channel. The process involves determining whether there exists a first target readable channel with a higher polling priority than the current readable channel among all first readable channels. If no first target readable channel exists, the process involves determining whether there exists a second target readable channel with the same polling priority as the current readable channel. If a second target readable channel exists, it is used as the new current readable channel, and a read operation is performed on the current readable channel. The process also involves determining whether there exists a first target readable channel with a higher polling priority than the current readable channel among all first readable channels. If no second target readable channel exists, the process involves determining the current readable channel with the highest polling priority among all first readable channels that have not yet performed a read operation.

[0067] In this embodiment, the currently readable channel refers to the channel that is currently being processed, and a read operation (reading the descriptor according to the polling weight) will be performed on it. The first target readable channel is the channel with a higher polling priority than the currently readable channel among the unprocessed channels. The second target readable channel is the channel with the same polling priority as the currently readable channel among the unprocessed channels. First, from multiple first readable channels, determine the current readable channel with the highest polling priority. After completing the read operation on the current readable channel, determine if there is a first target readable channel with a higher polling priority than the current readable channel. If there is, use the first target readable channel as the new current readable channel and perform the read operation on the new current readable channel. If there is no first target readable channel, determine if there is a second target readable channel with the same polling priority as the current readable channel. If there is, use the second target readable channel as the new current readable channel and perform the read operation on the new current readable channel. If there is no second target readable channel, determine the current readable channel with the highest polling priority from all first readable channels that have not yet performed the read operation. If the current readable channel has not been completely read, continue reading the descriptor of the current readable channel. If the current readable channel is retrieved, determine the current readable channel from other first readable channels.

[0068] For example, assume channels include A (high polling priority, polling weight 2, 4 readable descriptors), B (medium polling priority, polling weight 3, 6 readable descriptors), C (medium polling priority, polling weight 1, 2 readable descriptors), and D (low polling priority, polling weight 1, 3 readable descriptors). Initially, unprocessed channels include A, B, C, and D. Channel A (currently readable channel) with the highest priority is selected, and 2 descriptors are read, leaving 2 descriptors remaining. First round: Check if there is a higher priority channel (whether a first target readable channel exists): No (A is already the highest priority). Check channels of the same priority (whether a second target readable channel exists): No (A has the only priority). Continue selecting A, read 2 descriptors, and retrieve all descriptors from A. Round 2: Unprocessed channels include B, C, and D. Select B, read 3 descriptors, B has 3 descriptors remaining. Check if there is a higher polling priority channel (whether a first target readable channel exists): No (B currently has the highest priority). Check channels with the same polling priority (whether a second target readable channel exists): C. Switch to C, read 1 descriptor, C has 1 descriptor remaining. Check if there is a higher priority channel (whether a first target readable channel exists): No. Check channels with the same polling priority (whether a second target readable channel exists): B. Switch back to B, read 3 descriptors, all descriptors in B are retrieved. Unprocessed channels include C and D. Select C with the highest polling priority, read one descriptor, C is retrieved, only D remains. Read in 3 steps, 1 descriptor each time. The above example is based on the assumption that there are no additional first readable channels besides A, B, C, and D. If, during the reading of A, B, C, or D, a new first readable channel with a higher polling priority than A, B, C, or D is found, switch directly to the higher priority first readable channel after executing A, B, C, or D.

[0069] In this embodiment, if a higher priority channel is added during runtime, it can immediately preempt the current processing to meet the hard real-time requirements and avoid the same priority channels from being starved due to order issues (such as channels B and C being processed alternately, rather than B monopolizing resources).

[0070] If a second target readable channel exists, the second target readable channel is used as the new current readable channel. This includes: if there is a second target readable channel and there are multiple second target readable channels, a new current readable channel is selected from the multiple second target readable channels in a preset order.

[0071] In this embodiment, if multiple second target readable channels exist, a new currently readable channel can be selected from among these channels according to a preset order. The preset order is a fixed scheduling order among channels of the same priority, including but not limited to ascending channel ID (channel 0 > channel 1 > channel 2); round-robin order (the last processed channel + 1); and weight ratio (channels with higher weights are prioritized). By forcing round-robin processing through the preset order, it is ensured that channels of the same priority can be processed.

[0072] In an exemplary embodiment, the data transmission method further includes: after performing a read operation on the current readable channel, updating the number of times the read operation is performed on the current readable channel; when the number of executions matches the second number, setting the read flag of the current readable channel to a second preset value, so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

[0073] In this embodiment, refer to Figure 3 and Figure 4 Each of the n+1 channels (L0~Ln) is independently configured with a read counter. The initial value of the read counter is 0. Each time a descriptor is read from the channel, the count value of the read counter is incremented by 1 (the read counter is used to record the position, i.e., which descriptor is read). When the count values ​​of the read counter and the write counter match, it means that all descriptors written in that channel have been retrieved. When the count values ​​of the read counter and the write counter match, the read flag of that channel is set to 0, that is, the state of that channel is adjusted to an unreadable state.

[0074] Specifically, first, determine whether there is a first readable channel with a read flag of 1 among multiple channels. If not, maintain the idle state. If it exists, select the channel with the highest priority and read m descriptors in that channel (m is the polling weight of that channel). Increment the read counter by 1 for each read. Check whether the count values ​​of the read counter and write counter of that channel match. If they match, clear the read counter and write counter, set the read flag to 0, and proceed to check whether there is a channel with a read flag of 1. If they do not match, check whether there is a channel with a read flag of 1. If so, check whether there is a higher priority channel. If there is no higher priority channel, poll the channels with the same priority. If there is a higher priority channel, select the higher priority channel. If there is no channel with a read flag of 1, return to the idle state.

[0075] In one exemplary embodiment, performing a read operation on a currently readable channel includes: determining a third number of descriptors stored in the currently readable channel; when the third number is less than or equal to a first number corresponding to the currently readable channel, reading all descriptors in the currently readable channel; when the third number is greater than the first number corresponding to the currently readable channel, reading the first number of descriptors in the currently readable channel.

[0076] In this embodiment, the third quantity is the number of descriptors actually to be read in the current readable channel, which changes dynamically (decreasing with each read operation). Even if the number of descriptors to be read is less than the polling weight, they are read immediately to avoid waiting and reduce latency.

[0077] In one exemplary embodiment, performing a data transfer operation based on a read descriptor that satisfies the execution conditions for direct memory access includes: performing a data transfer operation based on the read descriptor when the read descriptor satisfies the execution conditions for direct memory access; and performing a data transfer operation based on the sub-descriptors when the read descriptor does not satisfy the execution conditions for direct memory access.

[0078] In this embodiment, since the descriptor actually executed by the DMA controller is limited by Max_Payload_Size and the 4k address boundary, the descriptor needs to be split into multiple descriptors that meet the length requirements and the starting address requirements. That is, a large descriptor is split into small sub-descriptors. The sub-descriptors cannot cross the 4K address boundary, and their length cannot exceed Max_Payload_Size.

[0079] In an exemplary embodiment, the readable channel includes a second readable channel; the data transmission method further includes: for each channel, determining whether the descriptor stored in the channel satisfies the execution conditions for direct memory access; if so, writing the descriptor into the sub-channel corresponding to the channel; if not, splitting the descriptor into sub-descriptors that satisfy the execution conditions for direct memory access, and writing the sub-descriptors into the sub-channel corresponding to the channel; the sub-channel is located in the second storage medium; if any sub-channel is not empty, it is determined that a second readable channel exists among the multiple channels.

[0080] In this embodiment, the polling weight is applied to the sub-descriptors after splitting, rather than the descriptors before splitting. As an optional embodiment, the polling weight corresponding to each sub-descriptor is 1. Before and after descriptor splitting, a FIFO (sub-channel) with a depth of 4 is added for caching (this FIFO uses a register design and does not occupy RAM memory) to ensure pipeline efficiency.

[0081] In one exemplary embodiment, reading the descriptor stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel includes: when there is one second readable channel, performing a read operation on the second readable channel; when there are multiple second readable channels, performing read operations on the multiple second readable channels in descending order of polling priority; wherein the read operation includes reading the descriptor stored in the second readable channel according to the polling weight corresponding to the second readable channel.

[0082] In this embodiment, each channel's sub-channels (output FIFOs) are polled sequentially. m (weighted) descriptors are read from each FIFO, and then the next channel is polled. If, during polling of a channel, the output FIFO of that channel is empty (less than m data points), that channel is abandoned, and the next channel is polled. When the output FIFO is empty, it means that all descriptors in that channel have been executed. As an optional embodiment, the polling weights and priorities are configured by the host computer through the PCIe base address space. The address space offset and register descriptions are shown in Table 2.

[0083] Table 2. Polling Weight and Polling Priority Configuration Table

[0084]

[0085] The above are just examples; choose according to the actual project requirements.

[0086] In summary, this application saves significant storage resources and reduces costs by using a single dual-port RAM to store multiple channel descriptors. Increasing channel weights improves the flexibility of the host computer in scheduling each channel, allowing for more efficient bandwidth allocation and thus improving application acceleration. Two descriptor polling implementation methods are provided, allowing users to flexibly choose the mode based on application characteristics. By adding three priority levels (high, medium, and low), transmission can be optimized for specific applications, reducing latency.

[0087] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0088] This application also provides a data transmission apparatus, including: a control register configured to store polling priorities and polling weights corresponding to each channel; a first storage configured with multiple channels; a write control component configured to write descriptors issued by the host into the corresponding channels; a read control component configured to read descriptors stored in the multiple channels according to polling priorities and polling weights; a splitting component configured to output descriptors that satisfy the execution conditions for direct memory access; and an execution component configured to perform data transmission operations based on the read descriptors that satisfy the execution conditions for direct memory access.

[0089] Specifically, the control register communicates with the host computer via the Advanced Peripheral Interface Bus.

[0090] Please refer to Figure 5 , Figure 5This is a schematic diagram of a data transmission device in the first transmission scenario provided in this application. In this scenario, the splitting component includes at least one FIFO (with a depth of 2). The splitting component judges whether the descriptor read from the channel in a polling manner meets the execution conditions for direct memory access. If it does not meet the conditions, the descriptor needs to be split and written into the FIFO, waiting for the execution component to execute. If it meets the conditions, the descriptor is directly written into the FIFO. When writing to the FIFO, it is also necessary to consider whether there is currently any write space in the FIFO. If there is write space, it is written directly; if there is no write space, it waits.

[0091] Please refer to Figure 6 , Figure 6 This is a schematic diagram of the data transmission device in the second transmission scenario provided in this application. In this scenario, the splitting component determines whether the descriptor in the write channel meets the execution conditions for direct memory access before the polling module polls. The splitting component includes multiple sub-channels (output FIFOs) that correspond one-to-one with the channel. If the conditions are not met, the descriptor needs to be split and written to the sub-channel, waiting for polling. If the conditions are met, the descriptor is directly written to the corresponding sub-channel, waiting for polling. When writing to the sub-channel, it is also necessary to consider whether the sub-channel currently has write space. If there is write space, it is written directly; if there is no write space, it waits. Figure 6 C0~Cn are the sub-descriptors stored in the sub-channels corresponding to channels L0~Ln, which are either sub-descriptors split from large descriptors that do not meet the direct memory access conditions or descriptors that meet the execution conditions for direct memory access.

[0092] Please refer to Figure 7 The embodiments of this application also provide a data transmission system, including: a first determining module 01, configured to determine the polling priority and polling weight of a readable channel in the current application when at least one readable channel exists among multiple channels; the channel occupies the corresponding address space in a first storage medium to store descriptors issued by a host computer; a reading module 02, configured to read the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel; the polling weight represents the first number of descriptors read from the readable channel each time; and an execution module 03, configured to perform data transmission operations based on the read descriptors that meet the execution conditions for direct memory access.

[0093] In one exemplary embodiment, the readable channel includes a first readable channel; the data transmission system further includes: a first update module, configured to update a second number of descriptors written in the channel when writing descriptors to the corresponding channel; and a first processing module, configured to determine, for each channel, that a first readable channel exists among the multiple channels when the second number is equal to the number of writes completed for the corresponding channel.

[0094] In one exemplary embodiment, updating the second number of descriptors written in the channel when writing a descriptor to the corresponding channel includes: controlling the value of the write counter corresponding to the channel to increment when writing a descriptor to the corresponding channel, so as to update the second number of descriptors written in the channel; the data transmission system further includes a setting module, used to set the read flag of the channel to a first preset value when the value of the write counter is equal to the number of writes completed corresponding to the channel, so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

[0095] In one exemplary embodiment, reading the descriptor stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel includes: when there is one first readable channel, performing a read operation on the first readable channel; when there are multiple first readable channels, performing read operations on the multiple first readable channels in descending order of polling priority; wherein the read operation includes reading the descriptor stored in the first readable channel according to the polling weight corresponding to the first readable channel.

[0096] In an exemplary embodiment, read operations are performed on a plurality of first readable channels in descending order of polling priority, including: determining the first readable channel with the highest polling priority among all first readable channels that have not undergone read operations, performing read operations on the first readable channel with the highest polling priority, and repeating this step until all descriptors in all first readable channels have been retrieved.

[0097] In one exemplary embodiment, among all first readable channels that have not undergone read operations, the first readable channel with the highest polling priority is determined, and a read operation is performed on the first readable channel with the highest polling priority. This step is repeated until descriptors in all first readable channels are retrieved. This includes: among all first readable channels that have not undergone read operations, determining the current readable channel with the highest polling priority; performing a read operation on the current readable channel, and determining whether there is a first target readable channel among all first readable channels with a higher polling priority than the current readable channel; if there is a first target readable channel, the first target readable channel is used as the new current readable channel, and a read operation is performed on the current readable channel. The process involves determining whether there exists a first target readable channel with a higher polling priority than the current readable channel among all first readable channels. If no first target readable channel exists, the process involves determining whether there exists a second target readable channel with the same polling priority as the current readable channel. If a second target readable channel exists, it is used as the new current readable channel, and a read operation is performed on the current readable channel. The process also involves determining whether there exists a first target readable channel with a higher polling priority than the current readable channel among all first readable channels. If no second target readable channel exists, the process involves determining the current readable channel with the highest polling priority among all first readable channels that have not yet performed a read operation.

[0098] In one exemplary embodiment, if a second target readable channel exists, the second target readable channel is used as a new current readable channel, which includes: if a second target readable channel exists and there are multiple second target readable channels, a new current readable channel is selected from the multiple second target readable channels in a preset order.

[0099] In an exemplary embodiment, the data transmission system further includes: a second update module, configured to update the number of times the read operation is executed on the current readable channel after performing a read operation on the current readable channel; when the number of executions matches the second number, the read flag of the current readable channel is set to a second preset value, so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

[0100] In one exemplary embodiment, performing a read operation on a currently readable channel includes: determining a third number of descriptors stored in the currently readable channel; when the third number is less than or equal to a first number corresponding to the currently readable channel, reading all descriptors in the currently readable channel; when the third number is greater than the first number corresponding to the currently readable channel, reading the first number of descriptors in the currently readable channel.

[0101] In one exemplary embodiment, performing a data transfer operation based on a read descriptor that satisfies the execution conditions for direct memory access includes: performing a data transfer operation based on the read descriptor when the read descriptor satisfies the execution conditions for direct memory access; and performing a data transfer operation based on the sub-descriptors when the read descriptor does not satisfy the execution conditions for direct memory access.

[0102] In one exemplary embodiment, the execution conditions for direct memory access are determined based on the maximum payload size and the 4k address boundary.

[0103] In one exemplary embodiment, the readable channel includes a second readable channel; the data transmission system further includes: a splitting module, configured to, for each channel, determine whether the descriptor stored in the channel satisfies the execution conditions for direct memory access; if so, write the descriptor into the sub-channel corresponding to the channel; if not, split the descriptor into sub-descriptors that satisfy the execution conditions for direct memory access, and write the sub-descriptors into the sub-channel corresponding to the channel; the sub-channel is located in a second storage medium; and a second processing module, configured to, if any sub-channel is not empty, determine that a second readable channel exists among the multiple channels.

[0104] In one exemplary embodiment, reading the descriptor stored in the readable channel according to the polling priority and polling weight corresponding to at least one readable channel includes: when there is one second readable channel, performing a read operation on the second readable channel; when there are multiple second readable channels, performing read operations on the multiple second readable channels in descending order of polling priority; wherein the read operation includes reading the descriptor stored in the second readable channel according to the polling weight corresponding to the second readable channel.

[0105] In one exemplary embodiment, the second readable channel has the same polling weight.

[0106] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described data transmission method embodiments.

[0107] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described data transmission method embodiments when it is run.

[0108] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0109] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described data transmission method embodiments.

[0110] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data transmission method embodiments.

[0111] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0112] The foregoing has provided a detailed description of a data transmission method, system, product, device, medium, and apparatus provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A data transmission method, characterized in that, include: When there is at least one readable channel among multiple channels, determine the polling priority and polling weight of the readable channel under the current application; The channel occupies the corresponding address space in the first storage medium to store the descriptor issued by the host computer; wherein, the readable channel is the channel among the multiple channels that meets the reading conditions, the reading conditions are adjusted according to different transmission scenarios, and the first storage medium is a dual-port RAM; Descriptors stored in the readable channel are read according to a polling priority and polling weight corresponding to at least one of the readable channels; the polling weight represents a first number of descriptors read from the readable channel each time; The data transfer operation is performed based on the descriptor read that meets the execution conditions for direct memory access.

2. The data transmission method according to claim 1, characterized in that, The readable channel includes a first readable channel; The data transmission method further includes: When writing a descriptor to the corresponding channel, update the second number of descriptors written in the channel; For each of the channels, when the second quantity is equal to the number of writes completed for the corresponding channel, it is determined that the first readable channel exists among the multiple channels.

3. The data transmission method according to claim 2, characterized in that, When writing a descriptor to the corresponding channel, update the second number of descriptors written to the channel, including: When writing a descriptor to the corresponding channel, the value of the write counter corresponding to the channel is incremented to update the second number of descriptors written in the channel; The data transmission method further includes: When the value of the write counter is equal to the number of writes completed for the corresponding channel, the read flag of the channel is set to a first preset value so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

4. The data transmission method according to claim 2, characterized in that, Read the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one of the readable channels, including: When there is only one first readable channel, perform a read operation on the first readable channel; When there are multiple first readable channels, read operations are performed on the multiple first readable channels in descending order of polling priority; The read operation includes reading the descriptors stored in the first readable channel according to the polling weight corresponding to the first readable channel.

5. The data transmission method according to claim 4, characterized in that, Read operations are performed sequentially on multiple first readable channels according to the polling priority from high to low, including: Among all the first readable channels that have not performed a read operation, determine the first readable channel with the highest polling priority, perform a read operation on the first readable channel with the highest polling priority, and repeat this step until all descriptors in the first readable channels have been retrieved.

6. The data transmission method according to claim 5, characterized in that, Among all first readable channels that have not undergone read operations, determine the first readable channel with the highest polling priority, perform a read operation on the first readable channel with the highest polling priority, and repeat this step until descriptors in all first readable channels have been retrieved, including: Among all the first readable channels that have not performed a read operation, determine the current readable channel with the highest polling priority; Perform the read operation on the currently readable channel, and determine whether there is a first target readable channel among all the first readable channels with a higher polling priority than the currently readable channel; If the first target readable channel exists, the first target readable channel is used as the new current readable channel, the read operation is performed on the current readable channel, and it is determined whether there is an operation of a first target readable channel with a higher polling priority than the current readable channel among all the first readable channels; If the first target readable channel does not exist, determine whether there is a second target readable channel with the same polling priority as the current readable channel; If a second target readable channel exists, the second target readable channel is used as the new current readable channel, the read operation is performed on the current readable channel, and it is determined whether there is an operation of a first target readable channel with a higher polling priority than the current readable channel among all the first readable channels; If the second target readable channel does not exist, perform the operation of determining the current readable channel with the highest polling priority among all first readable channels that have not performed read operations.

7. The data transmission method according to claim 6, characterized in that, If a second target readable channel exists, the second target readable channel is used as the new current readable channel, including: If a second target readable channel exists, and there are multiple second target readable channels, a new current readable channel is selected from the multiple second target readable channels in a preset order.

8. The data transmission method according to claim 6, characterized in that, The data transmission method further includes: After performing the read operation on the currently readable channel, update the number of times the read operation was performed on the currently readable channel; When the number of executions matches the second quantity, the read flag of the current readable channel is set to a second preset value so as to determine whether there is at least one first readable channel among the multiple channels based on the read flag.

9. The data transmission method according to claim 6, characterized in that, Performing the read operation on the currently readable channel includes: Determine a third number of descriptors stored in the currently readable channel; When the third quantity is less than or equal to the first quantity corresponding to the current readable channel, read all the descriptors in the current readable channel; When the third quantity is greater than the first quantity corresponding to the current readable channel, the first quantity of descriptors in the current readable channel is read.

10. The data transmission method according to any one of claims 2-9, characterized in that, Perform data transfer operations based on the descriptor read that satisfies the execution conditions for direct memory access, including: When the read descriptor meets the execution conditions for direct memory access, the data transfer operation is performed based on the read descriptor; If the read descriptor does not meet the execution conditions of direct memory access, the descriptor is split into sub-descriptors that meet the execution conditions of direct memory access, and data transfer operation is performed based on the sub-descriptors.

11. The data transmission method according to claim 10, characterized in that, The execution conditions for the direct memory access are determined based on the maximum payload size and the 4k address boundary.

12. The data transmission method according to claim 1, characterized in that, The readable channel includes a second readable channel; The data transmission method further includes: For each channel, it is determined whether the descriptor stored in the channel meets the execution conditions for direct memory access. If yes, the descriptor is written into the sub-channel corresponding to the channel; if no, the descriptor is split into sub-descriptors that meet the execution conditions for direct memory access, and the sub-descriptors are written into the sub-channel corresponding to the channel; the sub-channel is located in the second storage medium. If any of the sub-channels is not empty, then it is determined that the second readable channel exists among the multiple channels.

13. The data transmission method according to claim 12, characterized in that, Read the descriptors stored in the readable channel according to the polling priority and polling weight corresponding to at least one of the readable channels, including: When there is only one second readable channel, perform a read operation on the second readable channel; When there are multiple second readable channels, read operations are performed on the multiple second readable channels in descending order of polling priority; The read operation includes reading the descriptors stored in the second readable channel according to the polling weight corresponding to the second readable channel.

14. The data transmission method according to claim 12, characterized in that, The second readable channel has the same polling weight.

15. A data transmission system, characterized in that, include: The first determining module is configured to determine the polling priority and polling weight of the readable channel in the current application when there is at least one readable channel among multiple channels. The channel occupies the corresponding address space in the first storage medium to store the descriptor issued by the host computer; wherein, the readable channel is the channel among the multiple channels that meets the reading conditions, the reading conditions are adjusted according to different transmission scenarios, and the first storage medium is a dual-port RAM; The reading module is configured to read descriptors stored in the readable channel according to a polling priority and a polling weight corresponding to at least one of the readable channels; the polling weight represents a first number of descriptors read from the readable channel each time; The execution module is configured to perform data transfer operations based on the descriptors read that meet the execution conditions for direct memory access.

16. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the data transmission method according to any one of claims 1 to 14.

17. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the data transmission method as described in any one of claims 1-14 when executing the computer program.

18. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the data transmission method as described in any one of claims 1-14.

19. A data transmission device, characterized in that, include: The control register is configured to store the polling priority and polling weight for each channel. The first storage medium, wherein the channel occupies the corresponding address space in the first storage medium to store the descriptor issued by the host computer; Write the control component to write the descriptor sent by the host to the corresponding channel; A read control component is configured to read descriptors stored in multiple channels according to the polling priority and the polling weight; Split the components and configure them to output descriptors that satisfy the execution conditions for direct memory access; The execution component is configured to perform data transfer operations based on the descriptor read that satisfies the execution conditions for direct memory access.

20. The data transmission apparatus according to claim 19, characterized in that, include: The splitting component includes: The sub-channels corresponding to the main channel are configured to store descriptors that satisfy the execution conditions for direct memory access.

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