A timing synchronization method based on frequency division multiplexing communication and application
The synchronization preamble is designed by using the CAZAC sequence in frequency division multiplexing communication, which solves the problem of poor timing synchronization under low signal-to-noise ratio in OFDM system. It achieves reliable synchronization under low signal-to-noise ratio and overcomes the influence of DC bias and carrier frequency offset, reducing hardware resource consumption.
Patent Information
- Application Number
- CN202511094118.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-06
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-08-06
AI Technical Summary
In existing OFDM communication systems, timing synchronization methods perform poorly under low signal-to-noise ratios, are easily affected by DC offset and carrier frequency offset, and consume a lot of hardware resources.
A timing synchronization method based on frequency division multiplexing communication is adopted, and the CAZAC sequence is used to design the synchronization preamble. Correlation operation and accumulation are performed at the receiving end, and the frame header position is determined by detecting the correlation peak.
Achieve reliable timing synchronization under low signal-to-noise ratio, overcome the influence of DC offset and carrier frequency deviation, and reduce hardware resource consumption.
Smart Images

Figure CN120602290B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of radio communication technology, in particular to a timing synchronization method and device based on frequency division multiplexing communication, electronic equipment and computer readable storage medium. BACKGROUND
[0002] In the wireless communication system based on OFDM system, it is difficult to reliably recover the transmitted data without accurate timing synchronization, and the timing synchronization plays a vital role in system design.
[0003] At present, the timing synchronization method in OFDM system mainly includes the timing synchronization method based on cyclic prefix and the method of realizing timing synchronization by adding preamble signal. The synchronization method based on cyclic prefix has correlation peak ambiguity, and has high requirements for the length of cyclic prefix and signal-to-noise ratio, and is sensitive to signal size. The method of realizing timing synchronization by adding preamble signal mainly includes Moose algorithm, Schmidl & Cox algorithm, Minn algorithm and Park algorithm, and these methods have poor performance under low signal-to-noise ratio, or have correlation peak ambiguity, or are affected by direct current bias and carrier frequency offset, or have large processing delay and complex operation, and consume more hardware resources.
[0004] Therefore, it is a current urgent problem to provide a timing synchronization method suitable for OFDM communication system and overcoming the high requirement of signal-to-noise ratio, correlation peak ambiguity, direct current bias and carrier frequency offset of the existing synchronization method. SUMMARY
[0005] In order to overcome the defects of the prior art, the embodiment of the present application provides a timing synchronization method and application based on frequency division multiplexing communication, which can not only reliably synchronize under low signal-to-noise ratio, but also overcome the influence of direct current bias and carrier frequency offset on synchronization.
[0006] In one aspect, the embodiment of the present application provides a timing synchronization method based on frequency division multiplexing communication, comprising: designing a preamble composed of m ZC sequences with a length of N The length of the preamble is equal to the length of OFDM symbol; adding the preamble to the frame header of each frame of transmission data, and inputting the transmission data into a correlator to perform correlation operation with the ZC sequence to obtain a correlation value signal; accumulating m correlation value signals with an interval of N to obtain a cumulative value sequence; detecting the continuous correlation peak value of the cumulative value sequence, and calculating the frame header synchronization position of receiving the transmission data according to the detection result.
[0007] In one embodiment of the present application, each data frame is composed of a preamble, m OFDM symbols and a cyclic prefix CP, the preamble is composed of m ZC sequences with a length of x , and the cyclic prefix CP is composed of m ZC sequences with a length ofm a same ZC sequence with length N , m and N satisfy wherein is the length of OFDM symbol.
[0008] In one embodiment of the present application, the first n samples of the transmitted data are represented as: ; wherein, L is the number of channel paths, is the delay of the l th channel path, d is an integer timing offset, f is a normalized frequency offset, is the sample of AWGN.
[0009] In one embodiment of the present application, the ZC sequence is represented as: ; wherein, N is the length of ZC sequence, is an integer and , q is an arbitrary integer, u is a positive integer coprime with N .
[0010] In one embodiment of the present application, the result of correlating the transmitted data r ( n ) with the ZC sequence is represented as: ; wherein, represents the th sample, N is the length of ZC sequence, is an integer and , represents the conjugate of ZC sequence .
[0011] In one embodiment of the present application, the calculation formula of the accumulated value sequence is represented as: ; wherein, , represents the number of ZC sequences, the interval between the correlation peaks is same, and equal to the length of ZC sequence N .
[0012] In one embodiment of the present application, the calculation of the frame header synchronization position of receiving the transmitted data according to the detection result comprises: setting a correlation window with a period of N , and recording the position of the relative window starting point of the correlation peak in each correlation window MaxPosand the peak value of the previous correlation window PeakValue and the peak value of the previous correlation window PeakValueBefore ; if the current correlation window MaxPos is the same as the previous correlation window MaxPosBefore , the parameter MaxPosTimes is added by 1, otherwise it is set to 0; if MaxPosTimes is greater than a threshold value of the detected correlation peak Threshold , and PeakValue is less than PeakValueBefore , then the signal synchronization is successful, and the distance between the synchronization point and the frame header is calculated as .
[0013] In another aspect, the embodiment of the present application also provides a timing synchronization device based on frequency division multiplexing communication, comprising: a preamble design module, used for designing a preamble composed of m ZC sequences with a length of N , wherein the length of the preamble is equal to the length of an OFDM symbol; a correlation operation module, used for adding the preamble to a frame header of each frame of transmission data, and performing a correlation operation on the transmission data inputted into a correlator and the ZC sequence to obtain a correlation value signal; a signal accumulation module, used for accumulating m correlation value signals with an interval of N to obtain a cumulative value sequence; and a synchronization position calculation module, used for detecting a continuous correlation peak of the cumulative value sequence, and calculating a frame header synchronization position of the transmission data according to a detection result.
[0014] In another aspect, the embodiment of the present application also provides an electronic device, comprising: a memory and one or more processors connected to the memory, wherein the memory stores a computer program, and the processor is used for executing the computer program to realize the timing synchronization method based on frequency division multiplexing communication according to any one of the above embodiments.
[0015] In another aspect, the embodiment of the present application also provides a computer readable storage medium, wherein the computer readable storage medium stores computer executable instructions, and the computer executable instructions are used for executing the timing synchronization method based on frequency division multiplexing communication according to any one of the above embodiments.
[0016] From the above, the above embodiments of the present application can have at least one or more of the following beneficial effects compared with the prior art:
[0017] The timing synchronization method based on frequency division multiplexing communication provided by the application adopts CAZAC sequence to design a synchronization preamble, performs correlation operation on the received signal and the local sequence at the receiving end, and determines the accurate position of the frame header by detecting the correlation peak value, so as to realize timing synchronization, and solve the problem of limited hardware operation resources, which can not only realize reliable synchronization under low signal-to-noise ratio, but also overcome the influence of direct current bias and carrier frequency offset on synchronization. BRIEF DESCRIPTION OF DRAWINGS
[0018] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:
[0019] Figure 1 A flow chart of a timing synchronization method based on frequency division multiplexing communication provided by the embodiment of the application;
[0020] Figure 2 A general model schematic diagram of an OFDM system provided by the embodiment of the application;
[0021] Figure 3 A new preamble structure schematic diagram based on ZC sequence provided by the embodiment of the application;
[0022] Figure 4 A timing synchronization logic schematic diagram provided by the embodiment of the application;
[0023] Figure 5 A magnitude change schematic diagram of provided by the embodiment of the application;
[0024] Figure 6 A synchronization algorithm flow chart provided by the embodiment of the application;
[0025] Figure 7 A correct timing probability schematic diagram of the synchronization algorithm provided by the embodiment of the application under different m and N ;
[0026] Figure 8 A structure schematic diagram of a timing synchronization device based on frequency division multiplexing communication provided by the embodiment of the application;
[0027] Figure 9 A structure schematic diagram of an electronic device provided by the embodiment of the application;
[0028] Figure 10 A structure schematic diagram of a computer readable storage medium provided by the embodiment of the application. DETAILED DESCRIPTION
[0029] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other in the case of no conflict. The present application will be described below with reference to the accompanying drawings and in combination with the embodiments.
[0030] In order for those skilled in the art to better understand the technical solutions of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments, and should all belong to the protection scope of the present application.
[0031] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the above-mentioned drawings are applicable to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the terms thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.
[0032] It should also be noted that the division of the plurality of embodiments in the present application is only for the convenience of description, and should not constitute a special limitation. The features in the various embodiments can be combined with each other in the case of no conflict, and can be mutually quoted.
[0033] As shown in Figure 1 , the first embodiment of the present application proposes a timing synchronization method based on frequency division multiplexing communication, for example, comprising: step S1, designing a preamble composed of m ZC sequences with a length of N , the length of the preamble being equal to the OFDM symbol length; step S2, adding the preamble to the frame header of each frame of transmission data, and inputting the transmission data into a correlator to perform correlation operation with the ZC sequence, to obtain a correlation value signal; step S3, accumulating m the correlation value signals with an interval of N , to obtain a cumulative value sequence; step S4, detecting the continuous correlation peak value of the cumulative value sequence, and calculating the frame header synchronization position of receiving the transmission data according to the detection result.
[0034] Specifically, in step S1, considering a general model of an OFDM system, as shown in Figure 2 , the n th sample of the baseband signal transmitted in the time domain can be described as:
[0035] (1)
[0036] wherein is the inverse fast Fourier transform (IFFT) point number, also denoting the total number of subcarriers, is the number of effective subcarriers, , is the modulation data sample on the v th subcarrier, v is an integer and .
[0037] To prevent ISI from destroying the orthogonality between subcarriers, we usually place a copy of the last length samples of the OFDM symbol at the head of the time-domain symbol as a cyclic prefix (CP).
[0038] In one embodiment, the n th sample of the received signal at the receiving end is:
[0039] (2)
[0040] wherein, L is the number of channel paths, is the delay of the l th channel path, d is an integer timing offset, f is a normalized frequency offset, is a sample of AWGN, denotes the th sample of the transmitted baseband signal in the time domain, denotes the impulse response of the l th channel path.
[0041] CAZAC sequences have many excellent properties, including constant amplitude, ideal periodic autocorrelation and good cross-correlation characteristics, and low PMEPR. In addition, they are still CAZAC sequences after Fourier transform and inverse Fourier transform. Therefore, CAZAC sequences are usually used as training sequences for timing synchronization.
[0042] The most commonly used CAZAC sequences include ZC sequences, Frank sequences, Golomb polyphase sequences, and GCL (generalized chirp-like) sequences. Among them, ZC sequences are the most widely used.
[0043] In one embodiment, the ZC sequence can be described as:
[0044] (3)
[0045] wherein, N is the length of the ZC sequence, is an integer and , q is an arbitrary integer, u is a positive integer coprime with N .
[0046] Let be a ZC sequence with length as defined in equation (3), wherein t and y are arbitrary positive integers, then the GCL sequence is defined as:
[0047] (4)
[0048] wherein, let z denote , then is a sequence containing y complex numbers with absolute value equal to 1, ( k ) mod y denotes the modulo operation of index k on y . Here, when and , the ZC sequence is exactly the GCL sequence.
[0049] CAZAC sequences have better autocorrelation and cross-correlation properties than traditional PN sequences. In an embodiment, the autocorrelation function (ACF) of a CAZAC sequence can be represented as:
[0050] (5)
[0051] wherein, is a CAZAC sequence with period N , denotes the conjugate operation.
[0052] In actual communication systems, a preamble is usually added before each frame of data. At the receiving end, the received signal is correlated with a local sequence, and the accurate position of the frame header is determined by detecting the correlation peak. PN sequences are usually used as preambles. CAZAC sequences have better autocorrelation and cross-correlation properties than traditional PN sequences. As can be seen from equation (5), the correlation peak is proportional to the length of the CAZAC sequence; therefore, a longer preamble is easier to detect the frame header. On the other hand, the presence of CFO will affect the performance of correlation peak detection. The longer the preamble, the greater the impact of CFO; therefore, the shorter the preamble, the better.
[0053] In order to reduce the influence of CFO while ensuring the performance of correlation peak detection, a new preamble based on ZC sequence is proposed. The structure of the new preamble is shown in Figure 3 .
[0054] As can be seen from Figure 3 , a data frame is composed of a preamble and x OFDM symbols (including CP). The preamble is composed of m identical ZC sequences with length N , m and N satisfy , where is the length of OFDM symbol.
[0055] Based on the new synchronization preamble, a new timing synchronization method is proposed, which takes advantage of the ideal correlation characteristics of ZC sequence. As shown in Figure 4 , the proposed method consists of two stages. In the first stage, the ZC sequence that constitutes the preamble is used as the coefficient of the correlator, and then the received signal is input into the correlator, correlated with the ZC sequence, and finally the correlation value signal is output. In the second stage, the correlation value signal is used for synchronization detection.
[0056] In step S2, the correlator output signal is the result of the correlation of the received signal and the ZC sequence, which can be described as:
[0057] (6)
[0058] where the received signal , the ZC sequence , as shown in equation (2), represents the sample, N is the length of the ZC sequence, is an integer and , represents the conjugate of the ZC sequence .
[0059] Then, in step S3, the m correlation values are accumulated at intervals of N , and is obtained, which can be described as:
[0060] (7)
[0061] where , Indicates the number of ZC sequences.
[0062] The operation period of the correlator is the length of the ZC sequence in the preamble N , an operation cycle is called a correlation window. As the correlator continuously outputs signals, it can be detected At the same time, the intervals between these correlation peaks are the same and equal to the ZC sequence length N The positions of these correlation peaks relative to the start of the corresponding correlation window are MaxPos .
[0063] In step S4, by detecting The peak value of the synchrotron is obtained.
[0064] The amplitude changes as Figure 5 As shown. Figure 5 It can be seen that The peak value first increases and then decreases. If the position of the maximum correlation peak can be found, the position of the frame header can be calculated accordingly. The synchronization algorithm process is as follows:
[0065] a. Receiving signal Perform correlation operations with the ZC sequence to obtain correlation values ;
[0066] b. m Correlation values are spaced N Accumulate and get ;
[0067] c. Set a period of N The relevant window of Counter ( ) represents the relative position of each point in the correlation window, and records the relative position of the correlation peak in each correlation window MaxPos and its peak value (denoted as PeakValue ), and the peak value of the previous correlation window (denoted as PeakValueBefore );
[0068] d. If the current related window MaxPos Related to the previous window MaxPosBefore If the parameters are the same, MaxPosTimes Add 1; otherwise, set it to 0;
[0069] e. If MaxPosTimes Greater than Threshold ,and PeakValue Less than PeakValueBefore , the received signal synchronization is successful. Parameters Thresholdis the threshold of the detected correlation peak, and its value varies with the number of ZC sequences. m Then, according to MaxPos Calculate the frame header position of the received signal. The distance between the synchronization point and the frame header can be easily calculated as .
[0070] The flowchart of the synchronization algorithm is as follows Figure 6 shown.
[0071] The present invention is further described in detail below with reference to specific examples, but these examples should not be construed as limiting the present invention. Figure 2 The main system parameters of the OFDM system shown in Table 1 are as follows.
[0072] Table 1 Simulation system parameters
[0073]
[0074] according to Figure 3 Design a synchronous preamble. There are two important parameters in preamble design: the number of ZC sequences contained in the preamble code m and length N ,and m and N satisfy From Table 1 we can see ,make ,So , then the steps of the synchronization algorithm are as follows:
[0075] 1) Initialization
[0076] First, initialize the following variables:
[0077] Counter : Correlation window count value, which is increased by 1 each time a data is received, and the cycle is from 1 to 512, and is initialized to 1;
[0078] PeakValue : Correlation peak, initialized to 0;
[0079] MaxPos : The Counter value corresponding to the correlation peak is initialized to 0;
[0080] MaxPosTimes : The number of times the continuous correlation window obtains the correlation peak at the same position, initialized to 0;
[0081] PeakValueBefore 、 MaxPosBefore : The correlation peak value and its position of the previous correlation window are initialized to 0;
[0082] 2) Take 512 as a segment and calculate each time value, the correlation window position Counter add 1 until Counter equals 512, and calculate the correlation peak value of this correlation window PeakValue and the position of the correlation peak MaxPos ;
[0083] 3) When the correlation window position Counter is counted to 512, if MaxPos = MaxPosBefore then MaxPosTimes = MaxPosTimes + 1, go to step 4; otherwise, MaxPosTimes = 0, MaxPosBefore = MaxPos , PeakValueBefore = PeakValue , return to step 2.
[0084] 4) If MaxPosTimes > 3 and PeakValue < PeakValueBefore , then decide synchronization, and calculate the signal frame header position according to MaxPos ; otherwise, MaxPosBefore = MaxPos , PeakValueBefore = PeakValue , return to step 2.
[0085] The influence of different m and N on the performance of the synchronization algorithm is simulated below. The correct synchronization probability of the synchronization algorithm under different m and N is shown in Figure 7 .
[0086] As can be seen from Figure 7 , in general, the synchronization accuracy of the synchronization algorithm improves with the increase of the signal-to-noise ratio. In the case of low signal-to-noise ratio, the synchronization accuracy decreases with the decrease of N . This is because the amplitude of the correlation peak also decreases with the decrease of N . In the case of low signal-to-noise ratio, the correlation peak is submerged by noise, and therefore it is more difficult to detect. However, when the signal-to-noise ratio increases to above -2 dB, there is no difference in the synchronization accuracy of different m and N , and all the synchronization accuracy values reach 100%. This is because the correlation peak becomes more prominent with the increase of the signal-to-noise ratio. Therefore, in the case of high signal-to-noise ratio, the synchronization accuracy is not affected by the change of m and N .
[0087] In summary, the first embodiment of the present application provides a timing synchronization method based on frequency division multiplexing communication, a CAZAC sequence is used to design a synchronization preamble, a received signal is correlated with a local sequence at a receiving end, and an accurate position of a frame header is determined by detecting a correlation peak value, so that timing synchronization is realized, so as to solve the problem of limited hardware operation resources, and reliable synchronization can be realized under a low signal-to-noise ratio, and the influence of direct current bias and carrier frequency offset on synchronization can be overcome.
[0088] In addition, as shown in Figure 8 the second embodiment of the present application also provides a timing synchronization device 20 based on frequency division multiplexing communication, for example, comprising a preamble design module 201, a correlation operation module 202, a signal accumulation module 203 and a synchronization position calculation module 204.
[0089] The preamble design module 201 is used to design a preamble composed of m ZC sequences with a length of N ZC, and the length of the preamble is equal to the length of an OFDM symbol; the correlation operation module 202 is used to add the preamble to each frame of transmission data, receive the transmission data and input a correlator to perform correlation operation with the ZC sequence, and obtain a correlation value signal; the signal accumulation module 203 is used to accumulate m correlation value signals with an interval of N ZC to obtain a cumulative value sequence; and the synchronization position calculation module 204 is used to detect a continuous correlation peak value of the cumulative value sequence, and calculate a frame header synchronization position of the received transmission data according to a detection result. N N The timing synchronization device based on frequency division multiplexing communication disclosed in the second embodiment of the present application implements the timing synchronization method based on frequency division multiplexing communication as described in the first embodiment, and therefore will not be described in detail here. Alternatively, each module in the second embodiment and the above-mentioned other operations or functions are respectively used to implement the method described in the first embodiment, and the beneficial effects of the timing synchronization device based on frequency division multiplexing communication provided in the present embodiment are the same as the beneficial effects of the timing synchronization method based on frequency division multiplexing communication provided in the first embodiment, and therefore will not be described here for the sake of brevity.
[0090] As shown in the third embodiment of the present application also provides an electronic device 30, for example, comprising at least one processor 31 and at least one memory 32, wherein the memory stores a computer program, and when the computer program is executed by the processing unit, the processing unit executes the method as described in the first embodiment, and the beneficial effects of the electronic device provided in the present embodiment are the same as the beneficial effects of the timing synchronization method based on frequency division multiplexing communication provided in the first embodiment.
[0091] Figure 9 As shown in
[0092] As shown in Figure 10 As shown, the fourth embodiment of the present application also provides a computer readable storage medium 40, which stores a computer program, and the computer program is executed by a processor to implement the steps of the method described above. The computer readable storage medium provided by the embodiment has the same beneficial effects as the timing synchronization method based on frequency division multiplexing communication provided by the first embodiment.
[0093] The computer readable storage medium can include, but is not limited to, any type of disk including floppy disks, optical disks, DVD, CD-ROMs, micro-drives, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nano-systems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.
[0094] It should be noted that, for the foregoing method embodiments, in order to simply describe, they are all described as a series of action combinations, but those skilled in the art should know that the present application is not limited to the order of the actions described, because according to the present application, certain steps can be performed in other order or at the same time. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions and modules involved are not necessarily required by the present application.
[0095] In the above embodiments, the description of each embodiment is focused on, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.
[0096] In several embodiments provided by the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic. The division of the units is only a logical function division. There can be another division manner in actual implementation, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some services interfaces, devices or units, and can be electrical or other forms.
[0097] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. According to actual needs, part or all of the units can be selected to achieve the purpose of the embodiment scheme.
[0098] In addition, each of the function units in the embodiments of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software function unit.
[0099] When the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer readable memory. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a memory and includes several instructions for causing a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned memory includes: a U disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store program codes.
[0100] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be instructed by a program to related hardware, and the program can be stored in a computer readable memory, and the memory can include: a flash disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, etc.
[0101] The above is only exemplary embodiments of the present disclosure, and cannot limit the scope of the present disclosure. That is, any equivalent changes and modifications made according to the teachings of the present disclosure are still within the scope of the present disclosure. Those skilled in the art will easily think of embodiments of the present disclosure after considering the specification and practicing the disclosure herein. The present application is intended to cover any variations, uses or adaptive changes of the present disclosure, which follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field not recorded in the present disclosure. The specification and examples are only considered as exemplary, and the scope and spirit of the present disclosure are defined by the claims.
[0102] The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combinations of the technical features do not exist contradictory, it should be considered that they are within the scope recorded in the present disclosure.
[0103] Those skilled in the art can easily understand that the above description is only the preferred embodiment of the present application, and is not intended to limit the present application. Any modification, equivalent replacement and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A timing synchronization method based on frequency division multiplexing communication, characterized in that: include: The design consists of m pieces of length N A preamble consisting of a ZC sequence, wherein the length of the preamble is equal to the length of the OFDM symbol; Adding the preamble to the frame header of each frame of transmission data, and inputting the transmission data into a correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; The m correlation value signals are spaced N Perform accumulation to obtain a cumulative value sequence; Detecting continuous correlation peaks of the cumulative value sequence, and calculating the frame header synchronization position of the received transmission data based on the detection result; The step of calculating the frame header synchronization position of the received transmission data according to the detection result includes: Set a period of N Correlation window, record the position of the correlation peak relative to the window starting point in each correlation window MaxPos and its peak PeakValue , and the peak value of the previous correlation window PeakValueBefore ; If the current related window MaxPos Related to the previous window MaxPosBefore If the parameters are the same, MaxPosTimes Add 1, otherwise set it to 0; MaxPosBefore Indicates the previous related window MaxPos ; if MaxPosTimes Greater than the threshold for detecting correlation peaks Threshold ,and PeakValue Less than PeakValueBefore , then the received signal is synchronized successfully, and the distance between the synchronization point and the frame header is calculated as .
2. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: Each data frame consists of a preamble and x OFDM symbols and a cyclic prefix CP, the preamble consists of m The length is N The same ZC sequence composition, m and N satisfy ,in is the length of the OFDM symbol.
3. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The transmission data n A sample is represented as: ; in, L is the number of channel paths, It is l The delay of the channel path, d is the integer timing offset, f is the normalized frequency deviation, is a sample of AWGN, Indicates the l The impulse response of the channel path, Represents the baseband signal transmitted in the time domain samples.
4. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The ZC sequence is expressed as: ; in, N is the length of the ZC sequence, is an integer and , q is any integer, u is with N Coprime positive integers.
5. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The transmission data r ( n ) is correlated with the ZC sequence as follows: ; in, Indicates the samples, N is the length of the ZC sequence, is an integer and , Represents a ZC sequence The conjugation of .
6. The timing synchronization method based on frequency division multiplexing communication according to claim 5, characterized in that: The calculation formula of the cumulative value sequence is expressed as: ; in, , represents the number of ZC sequences, The intervals between the correlation peaks are the same and equal to the ZC sequence length N .
7. A timing synchronization device based on frequency division multiplexing communication, characterized in that: A method for implementing a timing synchronization method based on frequency division multiplexing communication as claimed in any one of claims 1 to 6, comprising: The leading design module is used to design a N A preamble consisting of a ZC sequence, wherein the length of the preamble is equal to the length of the OFDM symbol; a correlation operation module, configured to add the preamble to the frame header of each frame of transmission data, and input the transmission data into a correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; Signal accumulation module, used to m The correlation value signals are spaced at intervals of N Perform accumulation to obtain a cumulative value sequence; The synchronization position calculation module is used to detect the continuous correlation peaks of the cumulative value sequence and calculate the frame header synchronization position of the received transmission data according to the detection result.
8. An electronic device, characterized in that: include: A memory and one or more processors connected to the memory, the memory storing a computer program, the processor being configured to execute the computer program to implement the timing synchronization method based on frequency division multiplexing communication according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable commands, and the computer-executable commands are used to execute the timing synchronization method based on frequency division multiplexing communication according to any one of claims 1 to 6.
Citation Information
Patent Citations
Frame timing synchronization method and device in OFDM communication system
CN110224968A
OFDM timing synchronization method based on improved CAZAC sequence
CN116232828A