Infrared detector and preparation method thereof
By introducing a dual-absorption zone structure and Si or GaAs substrate transfer technology, the spectral coverage and cost issues of infrared detectors are solved, and a low-noise, high-efficiency large-scale integrated infrared detector is realized.
Patent Information
- Application Number
- CN202510821137.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-19
- Publication Date
- 2025-09-05
AI Technical Summary
Existing infrared detectors have a limited cutoff wavelength due to the single absorption region material, making it difficult to achieve wide spectral coverage, and the high cost of lattice-matched substrates is not conducive to large-scale integration.
A double absorption zone structure is adopted. By introducing a strain buffer layer between the second absorption zone and the first absorption zone, combined with Si or GaAs substrate transfer technology, a columnar structure is formed and upper and lower electrodes are set to avoid noise introduction.
It expands the response spectrum coverage of infrared detectors, reduces preparation costs, facilitates large-scale integration, and operates at low bias voltage to reduce noise interference.
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Figure CN120603340A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of infrared photoelectric devices and preparation technology, and in particular to an infrared detector and a preparation method thereof. Background Art
[0002] Infrared detectors have broad application potential in night vision, gas detection, optical communications, medical diagnosis, pollution monitoring, mineral exploration, and other fields. With the continuous development of infrared detection technology, the new generation of infrared detectors are required to have technical characteristics such as high responsiveness, low noise level, wide spectrum detection, and large-scale array.
[0003] Introducing internal photoelectric gain in infrared detectors can effectively improve detector responsivity. Currently, the mainstream internal photoelectric gain technology is avalanche photodiode (APD). The APD's avalanche gain mechanism requires it to operate at extremely high bias voltages and introduces excessive noise, limiting detection performance. Infrared detectors based on resonant tunneling (PDRTDs) can avoid these issues thanks to the combination of an interband absorption region and a double-barrier resonant tunneling internal gain structure. However, existing PDRTDs are still limited by the cutoff wavelength of a single absorption region material, making it difficult to achieve broad spectral coverage of the detection band.
[0004] In addition, the above-mentioned infrared detector structure is usually epitaxially grown on lattice-matched InP and GaSb substrates. These substrates are relatively expensive and are limited in size, which is not conducive to large-scale integration. The substrates need to be transferred to lower-cost, large-size Si substrates or GaAs substrates. Summary of the Invention
[0005] In view of the above problems, the present invention provides an infrared detector and a method for preparing the same.
[0006] On the one hand, the present invention provides an infrared detector, comprising: a substrate; a material layer located above the substrate, the material layer comprising a gain region, a second absorption region, and a first absorption region stacked in sequence from bottom to top, wherein the gain region is composed of a potential well layer and barrier layers located on both sides of the potential well layer, and is used to regulate the signal gain of the infrared signal in the infrared detector, and the second absorption region and the first absorption region use different absorption materials to absorb infrared light of different wavelengths.
[0007] According to an embodiment of the present invention, the substrate is a Si material or a semi-insulating GaAs material. According to an embodiment of the present invention, the absorption material is a combination of at least two of GaAs, GaSb, InAs, InGaAs, InAsSb, and InGaAsSb, and the cutoff wavelength of the first absorption region is greater than the cutoff wavelength of the second absorption region.
[0008] According to an embodiment of the present invention, when the lattices of the second absorption region and the first absorption region are not matched, a buffer layer is arranged between the second absorption region and the first absorption region, wherein the heterojunction between the buffer layer and the second absorption region and the first absorption region is a type I band gap.
[0009] According to an embodiment of the present invention, the material layer further includes: a lower contact layer located between the substrate and the gain region, wherein the middle region of the upper surface of the lower contact layer is protruding; and an upper contact layer located above the first absorption region.
[0010] According to an embodiment of the present invention, the middle area of the upper surface of the lower contact layer and the outer edges of the gain region, the second absorption region, the buffer layer, the first absorption region, and the upper contact layer have the same size.
[0011] According to an embodiment of the present invention, an optical window is provided in the middle area of the upper surface of the upper contact layer, upper electrode windows are provided in the areas on both sides of the upper surface of the upper contact layer, lower electrode windows are provided in the areas on both sides of the upper surface of the lower contact layer, an upper electrode is provided in the upper electrode window, and a lower electrode is provided in the lower electrode window.
[0012] According to an embodiment of the present invention, the upper electrode and the lower electrode are ring-shaped metals, the upper electrode surrounds the side of the optical window, and the lower electrode surrounds the middle area of the upper surface of the lower contact layer.
[0013] According to an embodiment of the present invention, the infrared detector further includes: a passivation layer covering the surface of the material layer.
[0014] On the other hand, the present invention provides a method for preparing an infrared detector, comprising: growing a material layer on an initial substrate, flip-chip bonding the grown initial substrate to the substrate, the material layer comprising a lower contact layer, a gain region, a second absorption region, a buffer layer, a first absorption region, an upper contact layer and an optical window formed in sequence; thinning the grown initial substrate and etching it, stopping etching after etching to the optical window to complete substrate transfer; etching the material layer and stopping etching after etching to the middle of the lower contact layer to form a columnar structure; preparing a passivation layer on the surface of the material layer, etching the passivation layer to expose the optical window, the lower electrode window and the upper electrode window; arranging a lower electrode in the lower electrode window, and arranging an upper electrode in the upper electrode window.
[0015] The infrared detector and the manufacturing method thereof provided by the embodiments of the present invention can achieve the following beneficial effects:
[0016] (1) By introducing a strain buffer layer between the first absorption region and the second absorption region, a resonant tunneling infrared detector with dual absorption regions is realized. The introduction of dual absorption regions with different cutoff wavelengths can effectively expand the response spectrum coverage of the infrared detector;
[0017] (2) Through substrate transfer technology, the infrared detector is heterogeneously integrated onto a Si substrate or a GaAs substrate. Thanks to the low cost and large size of the heterogeneous substrate, the preparation cost of the infrared detector unit device can be reduced, which is conducive to large-scale integration;
[0018] (3) Compared with existing high-responsivity infrared detectors, it avoids the introduction of excessive noise and achieves operation at a lower bias voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
[0020] Figure 1 A schematic diagram of the structure of an infrared detector according to an embodiment of the present invention is shown;
[0021] Figure 2 The flowchart of the method for preparing an infrared detector according to an embodiment of the present invention is schematically shown.
[0022] Description of reference numerals:
[0023] 10-substrate; 20-material layer; 201-lower contact layer; 202-gain region; 203-second absorption region; 204-cache layer; 205-first absorption region; 206-upper contact layer; 207 optical window; 30-upper electrode; 40-lower electrode; 50-passivation layer. DETAILED DESCRIPTION
[0024] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.
[0025] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the presence of the features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.
[0026] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.
[0027] When expressions such as “at least one of A, B, and C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, and C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc. When expressions such as “at least one of A, B, or C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, or C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc.
[0028] It should also be noted that directional terms such as "upper," "lower," "front," "back," "left," and "right" mentioned in the embodiments are merely references to the directions in the accompanying drawings and are not intended to limit the scope of protection of this disclosure. Throughout the drawings, identical elements are represented by identical or similar reference numerals. Conventional structures or configurations will be omitted where they may cause confusion in understanding this disclosure.
[0029] Before describing specific embodiments of the present invention in detail, technical terms are first explained to facilitate a better understanding of the present invention.
[0030] Potential well layer: a thin layer composed of materials with different energy band structures, which limits the movement of electrons, holes or photons within a certain spatial range by forming a local potential energy trough.
[0031] Barrier layer: Made of wide-bandgap material, it is sandwiched between the quantum well and the cladding or other conductive layers. It forms a potential energy well for electrons and holes through band discontinuity, preventing the free diffusion of carriers. By adjusting the thickness and material composition of the barrier layer, fine control of the laser wavelength and beam quality can be achieved.
[0032] Cut-off wavelength: refers to the maximum wavelength that a specific mode can propagate in a waveguide or optical fiber. When this wavelength is exceeded, the mode will not be able to be transmitted.
[0033] Lattice: refers to the periodic structure formed by the arrangement of atoms, ions or molecules in a crystal.
[0034] Band gap: refers to the energy difference between the valence band and the conduction band in the band structure of the semiconductor material used in the detector, which directly affects the material's absorption and emission characteristics of infrared light.
[0035] Figure 1 The schematic diagram shows a principle diagram of an infrared detector according to an embodiment of the present invention.
[0036] like Figure 1 As shown, the infrared detector according to the disclosed embodiment includes: a substrate 10 , a material layer 20 , an upper electrode 30 , a lower electrode 40 and a passivation layer 50 .
[0037] In an embodiment of the present invention, the material layer 20 is located above the substrate 10, and the material layer 20 includes a lower contact layer 201, a gain region 202, a second absorption region 203, a buffer layer 204, a first absorption region 205, an upper contact layer 206 and an optical window 207 stacked in sequence from bottom to top, wherein the gain region 202 is used to regulate the signal gain of the infrared signal in the infrared detector, the cutoff wavelength of the second absorption region 203 is shorter than the cutoff wavelength of the first absorption region 205, and the two absorption regions are used to absorb infrared light of different wavelengths.
[0038] In an embodiment of the present invention, the middle area of the upper surface of the lower contact layer 201 is protruding, and the protruding area and the outer edges of the gain zone 202, the second absorption zone 203, the buffer layer 204, the first absorption zone 205, and the upper contact layer 206 are the same size, together forming a columnar structure. The lower contact layer 201 and the upper contact layer 206 are used to collect and transmit infrared signals.
[0039] In an embodiment of the present invention, when the lattice of the second absorption zone 203 and the first absorption zone 205 do not match, a buffer layer 204 needs to be provided between the second absorption zone 203 and the first absorption zone 205. When the lattice of the second absorption zone 203 and the first absorption zone 205 matches, the buffer layer 204 may not be provided. A type I heterojunction energy band should be formed between the buffer layer 204 and the second absorption zone 203 and the first absorption zone 205. The buffer layer 204 is used to transition the lattice mismatch between the first absorption zone 205 and the second absorption zone 203.
[0040] In an embodiment of the present invention, the optical window 207 is provided in the middle region of the upper surface of the upper contact layer 206 , and the material of the optical window 207 is transparent to the response bands of the first absorption region 205 and the second absorption region 203 .
[0041] In an embodiment of the present invention, upper electrode windows are provided on both sides of the upper surface of the upper contact layer 206, and lower electrode windows are provided on both sides of the upper surface of the lower contact layer 201. An upper electrode 30 is provided in the upper electrode window, and a lower electrode 40 is provided in the lower electrode window. The upper electrode 30 surrounds the side of the optical window 207, and the lower electrode 40 surrounds the middle area of the upper surface of the lower contact layer 201. The upper electrode 30 and the lower electrode 40 are annular metals for reducing noise introduction.
[0042] In an embodiment of the present invention, the passivation layer 50 covers the surface of the material layer 20 and is used to physically isolate or chemically modify the surface of the material layer 20 to suppress surface defects of the material layer 20 and prevent environmental corrosion.
[0043] For example, the substrate 10 may be made of Si material or semi-insulating GaAs material.
[0044] For example, the lower contact layer 201 and the second absorption region 203 are made of the same material, and are made of at least one of GaAs, GaSb, InAs, InGaAs, InAsSb, and InGaAsSb.
[0045] For example, the upper contact layer 206 and the first absorption region 205 are made of the same material, and are made of at least one of GaAs, GaSb, InAs, InGaAs, InAsSb, and InGaAsSb.
[0046] For example, the lower contact layer 201 and the upper contact layer 206 are made of different materials, such as a combination of at least two of GaAs, GaSb, InAs, InGaAs, InAsSb, and InGaAsSb.
[0047] For example, the gain region 202 is composed of a potential well layer and barrier layers located on both sides of the potential well layer, and is made of AlSb / GaSb / AlSb or AlAs / InGaAs / AlAs or AlAs / GaAs / AlAs materials.
[0048] For example, the buffer layer 204 is made of a step-by-step graded composition InGaAs material, where the In composition of the step-by-step graded composition InGaAs material increases step by step to achieve a lattice constant transition between InGaAs and GaAs.
[0049] For example, the optical window 207 is made of AlAs material or AlGaSb material.
[0050] For example, the upper electrode 30 and the lower electrode 40 are made of one of Ti / Pt / Au, Ti / Pd / Au, Pd / Pt / Au, and AuGeNi / Au.
[0051] For example, the passivation layer is made of SiO2 material or Si3N4 material.
[0052] Through the infrared detector provided by the embodiment of the present invention, a strain buffer layer between the first absorption zone and the second absorption zone is introduced to realize a resonant tunneling infrared detector with dual absorption zones. The introduction of dual absorption zones with different cutoff wavelengths can effectively expand the response spectrum coverage of the infrared detector, solve the problem of limited polarization of absorbed light, and the setting of the upper and lower electrodes avoids the introduction of excessive noise.
[0053] The present invention also provides a method for preparing an infrared detector, which can be used to prepare the infrared detector provided in the above embodiment. Figure 2 The method is described in detail.
[0054] Figure 2 The flowchart of the method for preparing an infrared detector according to an embodiment of the present invention is schematically shown.
[0055] like Figure 2 As shown, in this embodiment, the method for preparing the infrared detector specifically includes steps S1 to S5.
[0056] In step S1 , a material layer 20 is grown on an initial substrate, and the grown initial substrate is flip-chip bonded onto a substrate.
[0057] The material layer 20 of the infrared detector is grown on a lattice-matched GaAs semi-insulating substrate by molecular beam epitaxy, which includes an optical window 207 (serving as a substrate buffer layer and etch stop layer), an upper contact layer 206, a first absorption region 205, a buffer layer 204, a second absorption region 203, a gain region 202, and a lower contact layer 201. The GaAs semi-insulating substrate with an epitaxial structure is flip-chip bonded face-down to the Si substrate 10 by low-temperature direct bonding technology.
[0058] For example, the lower contact layer 201 may be an N-type In doped Si element. 0.53 Ga 0.47 As, Si doping concentration is 2×e 18 cm -3 , with a thickness of 500nm.
[0059] For example, the gain region 202 may be AlAs / In 0.53 Ga 0.47 As / AlAs double barrier, the AlAs (aluminum arsenide) barrier thickness can be 2nm, and the InGaAs potential well thickness can be 4.5nm.
[0060] For example, the second absorption region 203 may be undoped In 0.53 Ga 0.47 As, thickness is 500nm.
[0061] For example, the buffer layer 204 may be a graded composition In x Ga 1-x As material, thickness is 300nm.
[0062] For example, the first absorption region 205 may be undoped GaAs with a thickness of 500 nm.
[0063] For example, the upper contact layer 206 may be Si-doped N-type GaAs with a Si doping concentration of 2×e 18 cm -3 , with a thickness of 300nm.
[0064] For example, the optical window 207 may be AlAs with a thickness of 300 nm.
[0065] In step S2, the grown substrate is thinned and then etched. The etching is stopped after etching reaches the optical window 207 to complete the substrate transfer.
[0066] After the GaAs substrate is thinned to 10um by CMP polishing, SiC l4 The GaAs substrate is dry-etched to the AlAs optical window 207 by the GaAs / SF6 mixed gas through ICP (Inductively Coupled Plasma Etcher). The non-volatile product AlF3 (aluminum fluoride) produced during the etching of AlAs enables the AlAs layer to stop the etching, thereby completing the substrate transfer.
[0067] In step S3 , the material layer 20 is etched, and the etching is stopped after the etching reaches the middle of the lower contact layer 201 , thereby forming a columnar structure.
[0068] The detector material layer 20 is etched using positive resist photolithography and etching processes to a depth reaching the middle of the N-type InGaAs lower contact layer 201 to form a cylindrical mesa structure. Hot acetone is used to remove the positive resist attached to the upper surface of the optical window 207.
[0069] For example, the etching process can be wet etching, inductively coupled plasma etching, or a combination of the two. The gases used in inductively coupled plasma etching can be a combination of Cl2, BCl3 (boron trichloride), and Ar, and the etching solution used in wet etching can be a citric acid-based etching solution with a volume ratio of C6H8O7:H3PO4:H2O2:H2O of 1:1:2:20.
[0070] In step S4 , a passivation layer 50 is prepared on the surface of the material layer 20 , and the passivation layer 50 is etched to expose the optical window, the lower electrode window, and the upper electrode window.
[0071] A 200nm thick SiO2 passivation layer 50 is deposited by PECVD (Plasma-Enhanced Chemical Vapor Deposition), and the SiO2 passivation layer 50 on the surface of the upper contact layer 206 and the lower contact layer 201 is etched by positive photolithography and RIE (Reactive Ion Etching) to expose the optical window and the lower electrode window. Positive photolithography and ICP etching are then used to form the upper electrode window by etching the optical window 207.
[0072] In step S5, a lower electrode is disposed in the lower electrode window, and an upper electrode is disposed in the upper electrode window.
[0073] By using negative resist photolithography, metal film deposition and lift-off processes, the lower electrode 40 is formed in the lower electrode window on the lower contact layer 201 , and the upper electrode 30 is formed in the upper electrode window on the upper contact layer 206 .
[0074] For example, the metal thin film deposition process can be magnetron sputtering, the lower electrode 40 can be Ti / Pd / Au with a thickness of 25nm / 55nm / 500nm, and the metal upper electrode 30 can be AuGeNi / Au with a thickness of 100nm / 100nm, wherein the Ti layer can enable the metal electrode and the contact layer material to form a good ohmic contact, the Au layer can maintain good stability and bonding in the package, and Ni is used as a wetting agent. Its low surface tension helps prevent "balling" during the AuGe alloying process, thereby improving the contact quality.
[0075] In order to more clearly illustrate the implementation features of the present invention, the technical solution of the present invention is further described below in conjunction with a specific embodiment.
[0076] For example, the infrared detector can be prepared according to the following operations (1) to (11).
[0077] (1) A 300 nm thick AlAs optical window 207 was grown on a 2-inch GaAs semi-insulating substrate using molecular beam epitaxy at a growth temperature of 670°C, a growth rate of 0.5 ML / s, and a V / III beam ratio of 23;
[0078] (2) A 300 nm thick N-type heavily doped GaAs upper contact layer 206 was grown on the AlAs optical window 207 at a growth temperature of 670°C, a growth rate of 0.5 ML / s, and a V / III beam ratio of 15;
[0079] (3) growing an undoped GaAs first absorption layer 205 on the GaAs upper contact layer 206 under the same growth conditions as those for the GaAs upper contact layer 206;
[0080] (4) Then grow 450nm In x Ga 1-x As graded composition buffer layer 204, the In composition increases step by step from 0.06 to 0.53 (the difference in each step composition is 0.06), and the V / III beam ratio is 10;
[0081] (5) The thickness of the undoped InGaAs second absorption layer 203 is 500 nm, the growth temperature is 590°C, the growth rate is 0.5 ML / s, and the V / III beam ratio is 10;
[0082] (6) AlAs / In 0.53 Ga 0.47The thickness of the As / AlAs double barrier structure 202 is 2nm / 4.5nm / 2nm, the AlAs growth temperature is 670℃, the growth rate is 0.5ML / s, the As / Al beam ratio is 23, and the In 0.53 Ga 0.47 The As growth temperature was 590°C and the As / In beam ratio was 10;
[0083] (7) N-type heavily doped In 0.53 Ga 0.47 The thickness of the As lower contact layer 201 is 500nm, the growth temperature is 590℃, the growth rate is 0.5ML / s, and the V / III beam ratio is 12; the temperature of the Si source furnace used for N-type heavy doping is 1280℃;
[0084] (8) The GaAs semi-insulating substrate with epitaxial structure is flip-chip bonded to the Si substrate 10 by surface activated direct bonding technology; the GaAs substrate is thinned to a thickness of 10 by CMP polishing. Later SiC l4 ICP dry etching of the GaAs substrate to the AlAs layer 207 using a mixture of SF6 and MgO;
[0085] (9) After the rectangular mesa pattern is formed by positive photolithography, the detector material layer 20 is wet-etched by a citric acid etching solution with a ratio of C6H8O7:H3PO4:H2O2:H2O of 1:1:2:20 to a depth of 2.3 , reaching the middle of the lower contact layer 201;
[0086] (10) Using PECVD to deposit a 200 nm thick SiO2 passivation layer 50; using positive photoresist lithography and RIE to etch the SiO2 passivation layer 50 on the upper and lower surfaces to expose the optical window and the lower electrode window; using positive photoresist lithography and ICP etching to form the upper electrode window on the upper surface of the optical window 207;
[0087] (11) Using negative photolithography, magnetron sputtering, and lift-off processes, a ring-shaped metal lower electrode 40 was formed on the lower contact layer 201, and a ring-shaped metal upper electrode 30 was formed on the upper contact layer 206. The metal lower electrode 40 was made of Ti / Pd / Au with a thickness of 25nm / 55nm / 500nm, and the metal upper electrode 30 was made of AuGeNi / Au with a thickness of 100nm / 100nm. The metal electrodes were subjected to a rapid thermal annealing treatment at 420°C for 60s to improve the ohmic contact of GaAs.
[0088] In summary, the present invention provides an infrared detector and a preparation method thereof, which realizes a resonant tunneling infrared detector with dual absorption zones by introducing a strain buffer layer between a first absorption zone and a second absorption zone. The introduction of dual absorption zones with different cutoff wavelengths can effectively expand the response spectrum coverage of the infrared detector; through substrate transfer technology, the infrared detector is heterogeneously integrated onto a Si substrate or a GaAs substrate. Thanks to the low cost and large size of the heterogeneous substrate, the preparation cost of the infrared detector unit device can be reduced, which is conducive to large-scale integration; compared with existing high-responsivity infrared detectors, the introduction of excessive noise and the limitation of the polarization of the absorbed light are avoided.
[0089] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. An infrared detector, characterized in that: include: substrate (10); A material layer (20) is located above the substrate (10), and the material layer comprises a gain region (202), a second absorption region (203), and a first absorption region (205) stacked sequentially from bottom to top. The gain region (202) is composed of a potential well layer and potential barrier layers located on both sides of the potential well layer, and is used to regulate the signal gain of the infrared signal in the infrared detector. The second absorption region (203) and the first absorption region (205) use different absorption materials and are used to absorb infrared light of different wavelengths.
2. The infrared detector according to claim 1, characterized in that: The substrate (10) is made of Si material or semi-insulating GaAs material.
3. The infrared detector according to claim 1, characterized in that: The absorption material is a combination of at least two of GaAs, GaSb, InAs, InGaAs, InAsSb, and InGaAsSb, and the cutoff wavelength of the first absorption region (205) is greater than the cutoff wavelength of the second absorption region (203).
4. The infrared detector according to claim 1, characterized in that: When the lattices of the second absorption region (203) and the first absorption region (205) are not matched, the infrared detector further comprises a buffer layer (204) arranged between the second absorption region (203) and the first absorption region (205), wherein the heterojunction between the buffer layer (204) and the second absorption region (203) and the first absorption region (205) is a type I band gap.
5. The infrared detector according to claim 4, characterized in that: The material layer (20) further comprises: a lower contact layer (201) located between the substrate (10) and the gain region (202), wherein a middle region of an upper surface of the lower contact layer (201) is protruding; An upper contact layer (206) is located above the first absorption region (205).
6. The infrared detector according to claim 5, characterized in that: The middle area of the upper surface of the lower contact layer (201) and the outer edges of the gain region (202), the second absorption region (203), the buffer layer (204), the first absorption region (205), and the upper contact layer (206) have the same size.
7. The infrared detector according to claim 5, characterized in that: An optical window (207) is provided in the middle region of the upper surface of the upper contact layer (206), upper electrode windows are provided in regions on both sides of the upper surface of the upper contact layer (206), lower electrode windows are provided in regions on both sides of the upper surface of the lower contact layer (201), an upper electrode (30) is provided in the upper electrode window, and a lower electrode (40) is provided in the lower electrode window.
8. The infrared detector according to claim 7, characterized in that: The upper electrode (30) and the lower electrode (40) are annular metals; the upper electrode (30) surrounds the side of the optical window (207); and the lower electrode (40) surrounds the middle area of the upper surface of the lower contact layer (201).
9. The infrared detector according to claim 1, characterized in that: The infrared detector also includes: A passivation layer (50) covers the surface of the material layer (20).
10. A method for preparing an infrared detector, characterized in that: The following steps are involved: Growing a material layer (20) on an initial substrate, and flip-chip bonding the grown initial substrate to a substrate (10), wherein the material layer (20) includes a lower contact layer (201), a gain region (202), a second absorption region (203), a buffer layer (204), a first absorption region (205), an upper contact layer (206), and an optical window (207) formed in sequence; After thinning the initial substrate after growth, etching is performed, and etching is stopped after etching reaches the optical window (207) to complete the substrate transfer; Etching the material layer (20), stopping etching after etching reaches the middle of the lower contact layer (201), to form a columnar structure; Preparing a passivation layer (50) on the surface of the material layer (20), and etching the passivation layer (50) to expose the optical window (207), the lower electrode window, and the upper electrode window; A lower electrode (40) is arranged in the lower electrode window, and an upper electrode (30) is arranged in the upper electrode window.