Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a substrate layer and a pixel unit layer arranged on one side of the substrate layer, the pixel unit layer comprises a plurality of sub-pixel units, an isolation area is arranged between every two adjacent sub-pixel units, each isolation area comprises a pixel definition layer and a stacking structure which are sequentially arranged in the first direction, and each stacking structure comprises a hole injection layer and a hole transmission layer; the isolation columns penetrate through the stacking structure and are in contact with the pixel definition layer, and the isolation columns are made of insulating materials. According to the technical scheme, the transverse crosstalk current in the organic film layer in the isolation region can be isolated, so that the crosstalk current between different sub-pixel units is improved, and the low-gray-scale image quality of the display device is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a display panel and a display device. Background Art

[0002] With the continuous advancement of display technology, flat panel displays have become the mainstream of applications due to their light and thin features. Among various flat panel displays, organic light emitting diode (OLED) displays are the most widely used.

[0003] As OLED product image quality requirements continue to rise, so too does the need for fine detail in low-grayscale images. However, current OLED products experience a certain amount of crosstalk current when displaying low grayscale images. This can lead to unstable low-grayscale color coordinates and high grayscales for single-color displays. Therefore, improving current crosstalk in OLED products is a pressing technical issue. Summary of the Invention

[0004] In view of the above problems, the present application provides a display panel and a display device, wherein the structure in the display panel can improve the crosstalk current between different sub-pixel units and improve the low grayscale image quality of the display device.

[0005] In a first aspect, a display panel is provided, comprising: a substrate layer and a pixel unit layer arranged on one side of the substrate layer, the pixel unit layer comprising a plurality of sub-pixel units, an isolation region being arranged between adjacent sub-pixel units, the isolation region comprising a pixel definition layer and a stacking structure arranged in sequence along a first direction, the stacking structure comprising a hole injection layer and a hole transport layer; an isolation column, the isolation column passing through the stacking structure and contacting the pixel definition layer, the isolation column being an insulating material.

[0006] In combination with the first aspect, in some implementations of the first aspect, the material of the isolation column includes polyimide.

[0007] In combination with the first aspect, in some implementations of the first aspect, the material of the isolation column includes SiO2.

[0008] In combination with the first aspect, in some implementations of the first aspect, in the first direction, a size of the isolation column is larger than a size of the stack structure.

[0009] In combination with the first aspect, in certain implementations of the first aspect, the display panel further includes an encapsulation layer, the material of the encapsulation layer includes SiO2; the isolation column includes a first bottom edge in contact with the pixel definition layer, and a second bottom edge in contact with the encapsulation layer, in the second direction, the size of the first bottom edge is smaller than the size of the second bottom edge, and the second direction is perpendicular to the first direction.

[0010] In combination with the first aspect, in certain implementations of the first aspect, in the second direction, an angle formed between the second bottom edge and an endpoint of the second bottom edge is 60°-90°.

[0011] In combination with the first aspect, in some implementations of the first aspect, in the second direction, a size of the second bottom side is 6 μm-10 μm, and a size of the first bottom side is 3 μm-5 μm.

[0012] In combination with the first aspect, in some implementations of the first aspect, in the first direction, a size of the isolation pillar is 2 μm-3 μm.

[0013] In a second aspect, a display device is provided, comprising the display panel described in any implementation manner in the first aspect of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the drawings without creative work.

[0015] Figure 1 This is a schematic structural diagram of a display panel according to one embodiment of the present application;

[0016] Figure 2 This is a schematic structural diagram of a display panel according to another embodiment of the present application;

[0017] Figure 3 This is a schematic structural diagram of an isolation column according to an embodiment of the present application;

[0018] Figure 4 This is a flow chart of manufacturing a display panel according to one embodiment of the present application.

[0019] Reference numerals:

[0020] Display panel 100, substrate layer 110, pixel unit layer 120, sub-pixel unit 121, isolation region 130, pixel definition layer 131, stacked structure 132, hole injection layer 1321, hole transport layer 1322, isolation pillar 140, first bottom edge 141, second bottom edge 142, encapsulation layer 150;

[0021] First direction - X, second direction - Y. DETAILED DESCRIPTION

[0022] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0023] The "ranges" disclosed herein are defined in terms of lower and upper limits. A given range is defined by selecting a lower limit and an upper limit, and the selected lower and upper limits define the boundaries of the specific range. Ranges defined in this manner are inclusive of the endpoints and can be combined arbitrarily, meaning that any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60-120 and 80-110 are listed for a particular parameter, it is understood that ranges of 60-110 and 80-120 are also contemplated. Furthermore, if the minimum range values ​​listed are 1 and 2, and if the maximum range values ​​listed are 3, 4, and 5, then the following ranges are all contemplated: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this application, unless otherwise specified, the numerical range "ab" is an abbreviation for any combination of real numbers between a and b, where a and b are both real numbers. For example, the numerical range "0-5" indicates that all real numbers between "0-5" have been listed herein, and "0-5" is simply an abbreviation for these numerical combinations. In addition, when a parameter is expressed as an integer ≥ 2, it is equivalent to disclosing that the parameter is, for example, an integer of 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0024] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0025] Unless otherwise specified, all technical features and optional technical features of this application can be combined with each other to form a new technical solution.

[0026] The terms used in the following embodiments are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the specification of this application and the appended claims, the singular expressions "a", "an", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear contrary indication in the context. It should also be understood that in the following embodiments of the present application, "at least one", "one or more" refer to one, two or more. The term "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist; for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship.

[0027] References to "one embodiment," "some embodiments," "an example," or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0028] In the description of the embodiments of this application, the technical terms "first" and "second" are used only to distinguish different description objects and should not be understood to indicate or imply relative importance or implicitly specify the quantity, specific order, or primary and secondary relationship of the technical features indicated. In the description of the embodiments of this application, the meaning of "plurality" is more than two, unless otherwise clearly and specifically defined.

[0029] The embodiments of the present application will be described in more detail below with reference to the accompanying drawings. In each of the drawings, identical elements are represented by similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, certain well-known parts may not be shown in the drawings.

[0030] In OLED products, the lighting voltages of different color pixels vary, and materials such as the hole injection layer have both lateral and vertical conductivity. When lighting a color pixel with a higher operating voltage, due to current crosstalk or thin-film transistor (TFT) leakage current, the current will conduct laterally through the hole injection layer, causing the color pixel with a lower lighting voltage to also be slightly lit. This causes the OLED panel to have a certain degree of color distortion and impure single color when lighting at low grayscale, i.e., low grayscale color cast, which affects the color accuracy and purity of the picture.

[0031] In view of the above problems, the present application provides a display panel and a display device. The display panel includes sub-pixel units, an isolation region and isolation columns disposed between adjacent sub-pixel units. The isolation region includes a pixel definition layer and a stacked structure. By having the isolation columns pass through the stacked structure and contact the pixel definition layer, the isolation columns can block the current between different sub-pixel units through the hole injection layer and the hole transport layer, thereby improving low-grayscale color shift and enhancing the display quality of the display device.

[0032] The display panel and the display device described in the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0033] Figure 1 FIG. 1 is a schematic diagram of the structure of a display panel according to an embodiment of the present application. Figure 1 As shown, the display panel 100 includes a substrate layer 110 and a pixel unit layer 120 disposed on at least one side of the substrate layer 110 ; the pixel unit layer 120 includes a plurality of sub-pixel units 121 .

[0034] Specifically, the substrate layer 110 is the bottom base layer of the display panel 100, providing support and structural foundation for the display panel 100. This application does not impose any restrictions on the material, thickness, etc. of the substrate layer 110. For example, the substrate layer 110 can be made of a glass substrate or other materials, and can be a single layer or a double layer.

[0035] Specifically, the pixel unit layer 120 is a basic unit layer for displaying an image of the display panel 100 , and is composed of a large number of sub-pixel units 121 .

[0036] Specifically, the sub-pixel unit 121 includes three types of pixel units: a red sub-pixel unit, a blue sub-pixel unit, and a green sub-pixel unit, and the three sub-pixel units are repeatedly arranged in a certain order in the pixel unit layer 120 .

[0037] An isolation region 130 is disposed between adjacent sub-pixel units 121 .

[0038] An isolation region 130 is provided between adjacent sub-pixel units 121 to prevent electrical crosstalk. However, as described above, in related art solutions, current can pass through the hole injection layer and the hole transport layer, through the isolation region 130, and then reach adjacent sub-pixel units 121, causing cross-color.

[0039] The isolation region 130 includes a pixel definition layer 131 and a stacked structure 132 sequentially disposed along a first direction X. The stacked structure 132 includes a hole injection layer 1321 and a hole transport layer 1322 .

[0040] For example, the first direction X is as follows: Figure 1 As shown, the first direction X may also be referred to as a thickness direction of the display panel 100 or the display device.

[0041] Along the first direction X, the pixel definition layer 131 and the stacked structure 132 are sequentially arranged. The stacked structure 132 includes a hole injection layer 1321 and a hole transport layer 1322. Figure 1 It can be described as the substrate layer 110, pixel definition layer 131, hole injection layer 1321 and hole transport layer 1322 are arranged in sequence from bottom to top, or it can also be described as the hole transport layer 1322, hole injection layer 1321, pixel definition layer 131 and substrate layer 110 are arranged in sequence from top to bottom.

[0042] It should be noted that the terms "upper," "lower," "left," and "right" used in the embodiments of this application are relative and do not limit the actual product. Unless otherwise specified, the two sides in the first direction X may be referred to as the upper side and the lower side, or as the upper end and the lower end.

[0043] Of course, the stacked structure 132 also includes conventional film layers such as an electron transport layer and a light extraction layer, which will not be described in detail in this application.

[0044] The isolation column 140 passes through the stacked structure 132 and contacts the pixel definition layer 131 . The isolation column 140 is made of insulating material.

[0045] The spacer 140 passes through the stacked structure 132, meaning that it passes through each film layer in the stacked structure 132 and ultimately contacts the pixel definition layer 131 disposed below the stacked structure 132. Furthermore, the spacer 140 is made of an insulating material. This means that the current between any film layers in the stacked structure 132 is isolated by the spacer 140, including the hole injection layer 1321 and the hole transport layer 1322.

[0046] In the above solution, the display panel 100 includes sub-pixel units 121, an isolation region 130 and a spacer 140 disposed between adjacent sub-pixel units 121. The isolation region 130 includes a pixel definition layer 131 and a stacked structure 132. By allowing the spacer 140 to pass through the stacked structure 132 and contact the pixel definition layer 131, the spacer 140 can block the current passing through the hole injection layer 1321 and the hole transport layer 1322 between different sub-pixel units 121, thereby improving low-grayscale color shift and enhancing the display quality of the display device.

[0047] It should be noted here that the display panel 100 also includes conventional components such as cathodes and anodes. Conventional components can be configured in a conventional manner and will not be described in detail in this application.

[0048] In some embodiments, the material of the isolation pillar 140 includes polyimide.

[0049] In some embodiments, the material of the isolation pillar 140 includes SiO 2 .

[0050] In the above solution, by selecting polyimide or SiO 2 as the material of the isolation column 140 , it not only has a good blocking effect but also can be widely used in industry.

[0051] In some embodiments, in the first direction X, the size of the isolation pillar 140 is larger than the size of the stack structure 132 .

[0052] In the above solution, in the display panel 100, the size of the isolation column 140 in the first direction X is larger than the size of the stacked structure 132. In this way, the isolation column 140 can play a supporting role. When the display panel 100 is working or affected by the outside world, the deformation or pressure generated will not damage the hole injection layer 1321, the hole transport layer 1322 and other mailing film layers or the pixel unit layer 120.

[0053] Figure 2 FIG. 1 is a schematic structural diagram of a display panel according to another embodiment of the present invention. Figure 2 As shown, in some embodiments, the display panel 100 further includes an encapsulation layer 150, and the material of the encapsulation layer 150 includes SiO2; the isolation column 140 includes a first bottom edge 141 in contact with the pixel definition layer 131 and a second bottom edge 142 in contact with the encapsulation layer 150, and in the second direction Y, the size of the first bottom edge 141 is smaller than the size of the second bottom edge 142, and the second direction Y is perpendicular to the first direction X.

[0054] For example, the second direction Y is as follows Figure 2 As shown, the second direction Y may also be referred to as the thickness direction of the display panel 100 or the display device.

[0055] The first bottom edge 141 is used to pass through the stacked structure 132 and contact the pixel definition layer 131 to block current transmission in the hole injection layer 1321 and the hole transport layer 1322 . The second bottom edge 142 is used to contact the encapsulation layer 150 to achieve a supporting function.

[0056] In the second direction Y, the size of the second bottom side 142 is greater than that of the first bottom side 141 , that is, the isolation column 140 is in an “inverted trapezoidal shape”.

[0057] In the above solution, by making the size of the first bottom side 141 in the second direction Y smaller than the size of the second bottom side 142 in the second direction Y, the processing difficulty of the isolation column 140 and the stacking structure 132 can be reduced, and the protection of the isolation column 140 to the organic film layer can be improved.

[0058] Figure 3 This is a schematic diagram of the structure of the isolation column of one embodiment of the present application. Figure 3 As shown, in some embodiments, in the second direction Y, the angle formed between the endpoints of the second bottom edge 142 and the first bottom edge 141 is 60°-90°.

[0059] In the second direction Y, the first bottom side 141 and the second bottom side 142 both have two endpoints. When describing the angle formed by the second bottom side 142 and an endpoint of the first bottom side 141, the principle of proximity should be used for analysis. Figure 3 As shown, when describing the left angle of the second base 142, that is, the angle formed by the straight line where the second base 142 is located and the straight line where the left end points of the second base 142 and the first base 141 are located, that is, the corresponding Figure 3 The same applies to the angle on the right.

[0060] When describing the angle formed between the endpoints of the first bottom edge 141 and the second bottom edge 142, that is, the angle formed between the straight line where the first bottom edge 141 is located and an endpoint of the second bottom edge 142 on the same side, for example Figure 3 α2 in .

[0061] In simple terms, the angle formed by the second bottom edge 142 and the two side edges of the “inverted trapezoidal” isolation column 140 is 60°-90°, that is, α1 is 60°-90°.

[0062] Specifically, in the second direction Y, the angle formed between the endpoints of the second base 142 and the first base 141 can be 60°, 65°, 70°, 75°, 80°, 85°, 90° or any value within the above range.

[0063] In some embodiments, in the second direction Y, the second bottom side 142 has a size of 6 μm-10 μm, and the first bottom side 141 has a size of 3 μm-5 μm.

[0064] Specifically, in the second direction Y, the size of the second bottom edge 142 may be 6 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm, 10 μm or any value within the above range.

[0065] Specifically, in the second direction Y, the size of the first bottom side 141 may be 3 μm, 3.5 μm, 4 μm, 4.5 μm, 5 μm, or any value within the above range.

[0066] In some embodiments, in the first direction X, the size of the isolation pillar 140 is 2 μm-3 μm.

[0067] Specifically, in the first direction X, the size of the isolation pillar 140 may be 2 μm, 2.2 μm, 2.5 μm, 2.6 μm, 2.8 μm, 3 μm, or any value within the above range.

[0068] Figure 4 This is a flow chart of the preparation of a display panel according to an embodiment of the present application. Figure 4 , briefly introduces the preparation process of the display panel described in the embodiment of this application.

[0069] Step 1: Perform conventional processes on the substrate layer, and sequentially set the flat layer, anode and pixel definition layer, such as Figure 4 As shown in (a);

[0070] Step 2: Continue the evaporation process to obtain a stacked structure consisting of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, a cathode layer, etc. Figure 4 As shown in (b);

[0071] Step 3: Prepare the isolation column on the packaging layer and attach the two together, such as Figure 4 As shown in (c);

[0072] Step 4: Assemble the components obtained in step 3 with the components obtained in step 2, that is, press the isolation column into the stacked structure, such as Figure 4 As shown in (d) in .

[0073] It should be noted that the present application is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and within the scope of the technical solution of the present application, embodiments having substantially the same structure as the technical concept and exerting the same effects are all included in the technical scope of the present application. In addition, within the scope of the subject matter of the present application, various modifications that can be conceived by those skilled in the art to the embodiments, and other methods constructed by combining some of the constituent elements in the embodiments are also included in the scope of the present application.

Claims

1. A display panel, characterized in that: include: A substrate layer and a pixel unit layer disposed on one side of the substrate layer, the pixel unit layer including a plurality of sub-pixel units, an isolation region disposed between adjacent sub-pixel units, the isolation region including a pixel definition layer and a stacked structure sequentially disposed along a first direction, the stacked structure including a hole injection layer and a hole transport layer; An isolation column passes through the stacked structure and contacts the pixel definition layer, and the isolation column is made of insulating material.

2. The display panel according to claim 1, wherein: The material of the isolation column includes polyimide.

3. The display panel according to claim 1, wherein: The material of the isolation column includes SiO2.

4. The display panel according to any one of claims 1 to 3, wherein: In the first direction, the size of the isolation column is larger than the size of the stack structure.

5. The display panel according to claim 4, wherein: The display panel further includes an encapsulation layer, and the material of the encapsulation layer includes SiO2; The isolation column includes a first bottom side in contact with the pixel definition layer and a second bottom side in contact with the encapsulation layer. In a second direction, a size of the first bottom side is smaller than a size of the second bottom side, and the second direction is perpendicular to the first direction.

6. The display panel according to claim 5, wherein: In the second direction, an angle formed between the endpoints of the second bottom side and the first bottom side is 60°-90°.

7. The display panel according to claim 6, wherein: In the second direction, the size of the second bottom side is 6 μm-10 μm, and the size of the first bottom side is 3 μm-5 μm. 8 . The display panel according to claim 5 , wherein in the first direction, a size of the spacer is 2 μm-3 μm.

9. A display device, characterized in that: include: a housing forming a receiving cavity; and The display panel according to any one of claims 1 to 8, wherein the display panel is accommodated in the accommodating cavity to provide display content to the display device.

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