Training method and device of time synchronization error prediction model, time synchronization error compensation method and device, equipment and computer program product
By training the time synchronization error prediction model with a dual-branch hybrid neural network, the problem of performance degradation of the time synchronization protocol in wireless communications is solved, high-precision timing error compensation is achieved, and the time synchronization accuracy in wireless environments is improved.
Patent Information
- Application Number
- CN202510733244.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-03
- Publication Date
- 2025-09-09
AI Technical Summary
In wireless communication environments, existing time synchronization protocols such as NTP and PTP experience performance degradation during transmission over wireless networks, making it difficult to achieve high-precision time synchronization. This is especially challenging when establishing end-to-end deterministic networks in cellular systems.
A dual-branch hybrid neural network architecture is used to train the time synchronization error prediction model. By constructing a model consisting of a linear branch network and a convolutional branch network, the time offset data and path delay data are processed respectively to generate the predicted value of the time synchronization error. The loss value is then used to update the model parameters to achieve real-time timing error compensation.
The synchronization accuracy of a two-way measurement-based exchange time synchronization protocol in wireless environments is improved, and cost-effective timing error compensation is achieved without modifying the existing network infrastructure.
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Figure CN120611752A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of time synchronization technology, and in particular to a training method and device for a time synchronization error prediction model, a time synchronization error compensation method and device, equipment, and a computer program product. Background Art
[0002] As fundamental infrastructure for building an intelligent society, time synchronization is crucial for achieving efficient coordination in distributed systems and enabling ubiquitous connectivity. As network technology evolves towards deterministic capabilities, modern communication systems must not only guarantee bandwidth and reliability but also provide strict time determinism. The widespread adoption of time-engineered communication services will necessitate the network's support for time accuracy in data transmission, a fundamental service capability.
[0003] Time-Sensitive Networking (TSN) prioritizes time synchronization as a key feature and is rapidly becoming the standard for deterministic networking in local area networks. In the field of wireless communications, cellular systems have inherent advantages in access flexibility that other systems cannot match. However, establishing end-to-end deterministic networks remains a major challenge for cellular technology, especially in industrial environments. Notably, the Third Generation Partnership Project (3GPP) has driven groundbreaking progress in delay-sensitive service scenarios through ultra-reliable low-latency communication (URLLC) technology. Specifically, in versions 16-17, the 5G standard achieved interoperability with time-sensitive networking (TSN, abbreviated as 5G time-sensitive communication, 5G-TSC), and launched system-level support for deterministic networking (DetNet) in version 18. These advances make determinism a key driver for 6G networks to achieve end-to-end time-critical applications.
[0004] 5G systems are able to provide precise time synchronization to user equipment (UE) over the air interface by periodically transmitting synchronization signal blocks (SSBs) with a specific system frame number (SFN) and using a timing advance (TA) mechanism to calculate channel propagation delay (as proposed in 3GPP TS 38.331 Release 16). However, this approach requires network infrastructure upgrades and lacks widespread deployment verification in real-world environments. In contrast, traditional protocols such as the Network Time Protocol (NTP) and the Precision Time Protocol (PTP, also known as IEEE 1588) suffer from severe performance degradation when transmitted over wireless networks. Summary of the Invention
[0005] Embodiments of the present application provide a training method and apparatus for a time synchronization error prediction model, a time synchronization error compensation method and apparatus, a device, and a computer program product to improve the synchronization accuracy of a measurement-based two-way exchange time synchronization protocol in a wireless environment.
[0006] The embodiments of this application adopt the following technical solutions:
[0007] In a first aspect, an embodiment of the present application provides a method for training a time synchronization error prediction model, characterized in that the method for training the time synchronization error prediction model includes:
[0008] Constructing training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error;
[0009] inputting the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively to obtain branch features output by the different branch networks;
[0010] Generate a predicted value of the time synchronization error according to the branch features output by different branch networks;
[0011] A loss value is calculated according to the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and the parameters of the time synchronization error prediction model are updated using the loss value to obtain a trained time synchronization error prediction model.
[0012] Optionally, the branch network includes a linear branch network and a convolutional branch network, and the time offset data and the path delay data are respectively input into different branch networks of the time synchronization error prediction model to obtain branch features output by different branch networks, including:
[0013] Inputting the time offset data into the linear branching network to obtain output features of the linear branching network;
[0014] The path delay data is input into the convolutional branch network to obtain output features of the convolutional branch network.
[0015] Optionally, the time offset data includes an original time offset sequence and a position code, and inputting the time offset data into the linear branch network to obtain output features of the linear branch network includes:
[0016] splicing the original time offset sequence and the position code to obtain spliced time offset data;
[0017] The spliced time-shifted data is input into the linear branch network to obtain output features of the linear branch network.
[0018] Optionally, the position code is obtained by:
[0019] Based on the set time period, the cosine function is used to generate position codes corresponding to different time periods;
[0020] The position codes corresponding to different time periods are fused to obtain the final position code.
[0021] Optionally, the branch features output by different branch networks include output features of a linear branch network and output features of a convolutional branch network, and generating a predicted value of the time synchronization error according to the branch features output by different branch networks includes:
[0022] Fusing the output features of the linear network branch with the output features of the convolutional network branch to obtain fused features;
[0023] According to the fusion features, a predicted value of the time synchronization error is generated using a residual connection.
[0024] In a second aspect, an embodiment of the present application further provides a time synchronization error compensation method, the time synchronization error compensation method comprising:
[0025] Capture time offset data and path delay data;
[0026] Predicting a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data;
[0027] performing error compensation according to the time synchronization error;
[0028] The time synchronization error prediction model is trained based on any of the aforementioned training methods for the time synchronization error prediction model.
[0029] In a third aspect, an embodiment of the present application further provides a training device for a time synchronization error prediction model, the training device for the time synchronization error prediction model comprising:
[0030] A construction unit, configured to construct training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error;
[0031] a feature extraction unit, configured to input the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively, to obtain branch features output by the different branch networks;
[0032] A generation unit, configured to generate a predicted value of a time synchronization error according to branch features output by different branch networks;
[0033] An updating unit is used to calculate a loss value based on the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and use the loss value to update the parameters of the time synchronization error prediction model to obtain a trained time synchronization error prediction model.
[0034] In a fourth aspect, an embodiment of the present application further provides a time synchronization error compensation device, the time synchronization error compensation device comprising:
[0035] A capture unit, used for capturing time offset data and path delay data;
[0036] a prediction unit, configured to predict a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data;
[0037] a compensation unit, configured to perform error compensation according to the time synchronization error;
[0038] The time synchronization error prediction model is obtained by training based on the aforementioned time synchronization error prediction model training device.
[0039] In a fifth aspect, an embodiment of the present application further provides a device, including:
[0040] A processor; and a memory arranged to store computer-executable instructions, which, when executed, cause the processor to execute any of the aforementioned methods for training the time synchronization error prediction model and the aforementioned method for compensating the time synchronization error.
[0041] In a sixth aspect, an embodiment of the present application also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the training method of any of the aforementioned time synchronization error prediction models, as well as the aforementioned time synchronization error compensation method.
[0042] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: the training method of the time synchronization error prediction model in the embodiment of the present application first constructs the training data of the time synchronization error prediction model, and the training data includes time offset data, path delay data and the corresponding true value of the time synchronization error; then the time offset data and path delay data are respectively input into different branch networks of the time synchronization error prediction model to obtain branch features output by different branch networks; then the predicted value of the time synchronization error is generated according to the branch features output by different branch networks; finally, the loss value is calculated according to the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and the parameters of the time synchronization error prediction model are updated using the loss value to obtain a trained time synchronization error prediction model. The training method of the time synchronization error prediction model in the embodiment of the present application adopts a dual-branch hybrid neural network architecture to train the time synchronization error prediction model. The dual-branch hybrid neural network dynamically captures the nonlinear correlation of the time synchronization sequence data, realizes an end-to-end time synchronization error change prediction network, and thus realizes real-time timing error compensation. This application does not require modification of the existing network infrastructure, and improves the synchronization accuracy of the measurement-based two-way exchange time synchronization protocol in a wireless environment in an economical and efficient manner. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0044] Figure 1 Schematic diagram of a flow chart of a method for training a time synchronization error prediction model in an embodiment of the present application;
[0045] Figure 2 Schematic diagram of the architecture of a time synchronization error prediction model in an embodiment of the present application;
[0046] Figure 3 A schematic flow chart of a time synchronization error compensation method according to an embodiment of the present application;
[0047] Figure 4 Schematic diagram of the structure of a training device for a time synchronization error prediction model in an embodiment of the present application;
[0048] Figure 5 This is a structural diagram of a time synchronization error compensation device in an embodiment of the present application;
[0049] Figure 6 A schematic diagram of a test platform for a time synchronization error compensation solution in an embodiment of the present application;
[0050] Figure 7This is a characteristic diagram of time synchronization data in a test environment in an embodiment of the present application;
[0051] Figure 8 A schematic diagram illustrating the accuracy of predicting timing errors in an embodiment of the present application;
[0052] Figure 9 A schematic diagram of a relative timing error change of a solution proposed in the present application in an embodiment of the present application;
[0053] Figure 10 This is a structural diagram of a device in an embodiment of the present application. DETAILED DESCRIPTION
[0054] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions of this application will be clearly and completely described below in conjunction with the specific embodiments of this application and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0055] The following describes in detail the technical solutions provided by various embodiments of the present application in conjunction with the accompanying drawings.
[0056] The present application embodiment provides a method for training a time synchronization error prediction model, such as Figure 1 As shown, a flow chart of a method for training a time synchronization error prediction model in an embodiment of the present application is provided. The method for training a time synchronization error prediction model includes at least the following steps S110 to S140:
[0057] Step S110 : constructing training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error.
[0058] When training a time synchronization error prediction model, it is necessary to construct training data for the model. First, collect time synchronization data from actual wireless communication environments. This data should include time offset data (i.e., the time difference between the transmitter and receiver), path delay data (i.e., the time required for the signal to travel from the transmitter to the receiver), and the corresponding true time synchronization error value (i.e., the actual time synchronization error obtained using high-precision measurement equipment).
[0059] The collected data is preprocessed, including data cleaning (removing noise and outliers), data normalization (adjusting the data range to a range that is easy for the model to process), and data partitioning (dividing the dataset into training, validation, and test sets). Data preservation ensures that each data item is correctly labeled with the true value of the time synchronization error, allowing the model to learn the mapping relationship from time offset and path delay data to time synchronization error.
[0060] Step S120 : Inputting the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively to obtain branch features output by the different branch networks.
[0061] The time synchronization error prediction model in the embodiment of the present application uses a dual-branch hybrid neural network architecture, which includes two independent branch networks for processing time offset data and path delay data respectively. Each branch network can include a multi-layer neural network structure, such as convolutional layers, pooling layers, and fully connected layers, to extract features from the data.
[0062] The preprocessed time offset and path delay data are fed into their respective branch networks. Each branch network independently processes the input data and extracts features related to time synchronization error. Within each branch network, a series of neural network layers transform the input data and extract features. These layers learn nonlinear relationships in the data, thereby capturing potential factors affecting time synchronization error.
[0063] Step S130 : generating a predicted value of a time synchronization error according to branch features output by different branch networks.
[0064] The branch features output by the two branch networks are fused, for example, by concatenating the outputs of the two branch networks or using other feature fusion methods (such as weighted summation or attention mechanisms). The fused features are input into a fully connected layer or other type of output layer to generate a predicted value for the time synchronization error. This predicted value is a continuous value that represents the model's estimate of the current time synchronization error.
[0065] Step S140 , calculating a loss value based on the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and using the loss value to update the parameters of the time synchronization error prediction model to obtain a trained time synchronization error prediction model.
[0066] Select an appropriate loss function to measure the difference between the predicted value and the true value, such as the mean squared error (MSE) or mean absolute error (MAE). Substitute the predicted value and the corresponding true value of the time synchronization error into the loss function to calculate the loss value. This loss value reflects the prediction performance of the model under the current parameters. Use the backpropagation algorithm and an optimizer (such as stochastic gradient descent or Adam) to update the model parameters. The optimizer adjusts the model weights and biases based on the loss value to reduce the difference between the predicted value and the true value.
[0067] Repeat the above process until the model's performance on the validation set reaches a satisfactory level or the preset number of iterations is reached. At this point, the model has learned the mapping relationship from time offset data and path delay data to time synchronization error, which can be used for real-time time synchronization error prediction and compensation.
[0068] The training method for the time synchronization error prediction model in the embodiment of the present application uses a dual-branch hybrid neural network architecture to train the time synchronization error prediction model. The dual-branch hybrid neural network dynamically captures the nonlinear correlation of time synchronization sequence data, realizing an end-to-end time synchronization error change prediction network, thereby achieving real-time timing error compensation. This application improves the synchronization accuracy of the measurement-based two-way exchange time synchronization protocol in a wireless environment in a cost-effective manner without modifying the existing network infrastructure.
[0069] In some embodiments of the present application, the branch network includes a linear branch network and a convolutional branch network, and the time offset data and the path delay data are respectively input into different branch networks of the time synchronization error prediction model to obtain branch features output by different branch networks, including: inputting the time offset data into the linear branch network to obtain the output features of the linear branch network; inputting the path delay data into the convolutional branch network to obtain the output features of the convolutional branch network.
[0070] like Figure 2 FIG2 is a schematic diagram of the architecture of a time synchronization error prediction model in an embodiment of the present application. The main architecture of the time synchronization error prediction model in the embodiment of the present application is composed of a linear branch network and a convolutional branch network.
[0071] The design of a linear branching network is primarily based on linear transformations and typically consists of one or more fully connected layers. Each neuron in a fully connected layer is connected to all neurons in the previous layer, transforming the input data through a linear combination of weights and biases. For time-shifted data, a linear branching network can capture linear relationships and trends in the data, as time shifts can exhibit linear variations to a certain extent. For example, in some simple communication scenarios, time shifts may increase linearly with increasing signal transmission distance, and a linear branching network can effectively extract this linear feature.
[0072] The preprocessed time-shifted data is fed into a linear branching network, and positional encoding is used to inject positional information into the offset data to capture trend-based temporal features. Multidimensional data is concatenated and layer normalization is performed to eliminate dimensionality differences and ensure training stability. For example, global dependencies can be modeled using the following linear transformation:
[0073]
[0074] Among them, F (i-1) is the feature of the i-1 layer output by the linear branch network, F (i) is the feature of layer i output by the linear branch network, and are learnable weights.
[0075] Through the above process, the linear branching network gradually extracts key features from the time-shifted data. These features reflect the main variations and influencing factors of time shift. Ultimately, the linear branching network outputs the extracted features as the feature representation of the time-shifted data for that branch.
[0076] The convolutional branch network uses convolutional layers to process data, primarily for local feature extraction and dynamic interference suppression. The convolutional layer slides the convolution kernel over the input data to extract features from local regions. The convolution kernel can learn local patterns and structures in the data. For path delay data, it may contain various complex nonlinear features, such as delay variations caused by factors such as multipath effects and interference during signal propagation. The convolutional branch network captures these local features through convolution operations and gradually aggregates them into higher-level feature representations. For example, in a wireless communication environment, signal delays along different paths may have different spatial distribution characteristics. The convolutional branch network can extract these spatial correlations through convolution operations.
[0077] Path delay data is input into the convolutional branch network and processed through convolutional layers and dilated convolutions to achieve multi-level local perception and capture sudden delay jitter. Redundant information is compressed through pooling and translation invariance is enhanced. Subsequently, layer normalization is performed to optimize feature distribution. Finally, the features are flattened into vector form to compensate for the linear branch's sensitivity to dynamic noise.
[0078] For example, the input feature C(0) derived from the path delay sequence is used to extract local spatiotemporal features through layer-wise convolution operations. For the i-th layer:
[0079]
[0080] Among them, C (i-1) Represents the feature vector of the i-1 layer output by the convolutional branch network, Represents the convolution kernel (standard convolution when i=1, dilated convolution when i≥2), spatial compression is achieved through maximum pooling, and finally flattened to the feature vector C of the i-th layer output by the convolution branch network (i) .
[0081] The embodiments of the present application utilize linear and convolutional branch networks to process time offset data and path delay data, respectively, enabling more comprehensive feature extraction from the data. The linear branch network focuses on capturing linear relationships and overall trends in time offset data, while the convolutional branch network excels at mining local patterns and spatial correlations in path delay data. This collaborative feature extraction approach enables the model to capture richer and more comprehensive information, thereby improving the accuracy of time synchronization error prediction.
[0082] Time offset data and path delay data have different characteristics and variations. Linear and convolutional branch networks are designed to address these characteristics, making the model more adaptable to different data types. The linear branch network can handle the linear trends and simple relationships that may exist in time offset data, while the convolutional branch network can handle the complex nonlinearities and spatial variations in path delay data. This adaptability enables the model to effectively extract features and make accurate predictions in diverse communication environments and scenarios.
[0083] Because the two branch networks extract features from different perspectives of time offset and path delay data, and fuse these features to predict time synchronization error, they can more accurately capture the various factors affecting time synchronization error. Compared with a single-type network structure, the dual-branch hybrid neural network architecture comprehensively considers the complex relationship between time offset and path delay, thereby generating more accurate time synchronization error predictions. This is of great significance for achieving real-time timing error compensation and improving the synchronization accuracy of measurement-based bidirectional exchange time synchronization protocols in wireless environments.
[0084] This application improves the model level and adopts a dual-branch hybrid neural network architecture to train the time synchronization error prediction model without modifying the existing network infrastructure. This cost-effective approach makes the technical solution easier to apply and promote in actual systems. It can significantly improve the accuracy of time synchronization without adding additional hardware costs, providing an effective solution to the time synchronization problem in wireless communication systems.
[0085] In some embodiments of the present application, the time offset data includes an original time offset sequence and a position code, and inputting the time offset data into the linear branch network to obtain the output features of the linear branch network includes: splicing the original time offset sequence and the position code to obtain the spliced time offset data; and inputting the spliced time offset data into the linear branch network to obtain the output features of the linear branch network.
[0086] In scenarios involving time synchronization, such as wireless communications, original time offset data can be obtained through specific measurement methods (such as signal transmission time measurement), and these data constitute an original time offset sequence. t , reflects the time difference between different moments or different communication nodes. For example, in the communication between a base station and a mobile terminal, the time offset between the two may be periodically measured to obtain the original time offset sequence.
[0087] Positional encoding is used to introduce positional information into time-shifted data. In many sequence processing tasks, positional information is crucial for models to understand the order and structure of the data. Positional encodings can be generated in a variety of ways, including fixed position encodings based on sine and cosine functions or through learnable positional embeddings. For example, for each time point in a time-shifted sequence, a corresponding positional encoding vector can be generated, which contains the positional information of that time point in the sequence.
[0088] The original time offset sequence O t The generated position code PE(t) is spliced in the appropriate dimension to obtain the spliced time offset data F (0) , as the input of the linear branching network.
[0089] The original time-shifted sequence contains only the numerical information of the time difference, while the position encoding introduces the position of the time point in the sequence. By combining the two, the linear branching network can simultaneously consider the numerical value of the time offset and its position in the sequence, thereby more comprehensively understanding the characteristics of the time-shifted data. For example, in certain time synchronization scenarios, time offsets at different locations may exhibit different patterns. The addition of position encoding helps the model capture these patterns, enhancing the representation of time-shifted data.
[0090] The addition of positional encoding enables the model to better handle sequential data. In many practical applications, time-shifted data exists in the form of sequences, and positional encoding provides the model with a way to understand the order and structure of sequences. This enables linear branching networks to better capture long-term dependencies and local patterns in time-shifted sequences, enhancing the model's adaptability to sequential data and enabling better performance in a variety of time-synchronization scenarios.
[0091] In some embodiments of the present application, the position code is obtained by: based on a set time period, using a cosine function to generate position codes corresponding to different time periods respectively; fusing the position codes corresponding to different time periods to obtain a final position code.
[0092] In time synchronization related application scenarios, two time periods T are set according to actual needs and data characteristics. short and T long The selection of these two time periods is based on the understanding of the variation law of time offset data. For example, in wireless communication networks, the shorter time period T short may correspond to rapid fluctuations or short-term temporal variations in signal transmission, while longer time periods T long It may correspond to a more macro, long-term time change trend, such as the communication traffic change cycle within a day.
[0093] For each set time period, the cosine function can be used to generate the corresponding position code. The application of the cosine function in position coding is based on its periodicity and adjustability. For example, for each time point, the corresponding cosine value is calculated based on its relative position in the short and long periods, thus obtaining position code vectors of two different periods.
[0094] After obtaining the position codes corresponding to different time periods, they can be fused to obtain the final position code. This fusion can be done in a variety of ways. For example, two position code vectors can be directly concatenated to obtain a longer position code vector. Alternatively, a weighted summation approach can be used to assign different weights to the position codes of different time periods based on their importance, and then sum them together to obtain the final position code.
[0095] By setting different time periods and generating corresponding position codes, we can capture the multi-scale temporal features of time-shifted data. Position codes corresponding to short periods can capture short-term fluctuations and rapid changes in the time-shifted data, while position codes corresponding to long periods can capture long-term trends and cyclical changes. By combining these two position codes, the model can simultaneously account for both short-term and long-term features of the time-shifted data, leading to a more comprehensive understanding of the changing patterns of time-shifted data.
[0096] Because the fused position encoding contains richer temporal feature information, the linear branch network can extract more representative features when processing time offset data concatenated with this position encoding. These features more accurately reflect the various factors affecting time synchronization error, including short-term fluctuations and long-term trends. Therefore, in subsequent time synchronization error prediction, the predicted values generated based on these features will be more accurate, helping to improve the accuracy of the entire time synchronization system.
[0097] The introduction of multi-scale position encoding enables the model to better adapt to different types of time-shifted data. In practical applications, time-shifted data may be affected by a variety of factors and exhibit different temporal characteristics. By capturing multi-scale temporal characteristics, the model can better generalize to different data scenarios, improving its performance in various complex environments. For example, the model can still accurately predict time synchronization errors under varying communication loads and network topologies.
[0098] In some embodiments of the present application, the branch features output by different branch networks include the output features of a linear branch network and the output features of a convolutional branch network. The method of generating a predicted value of a time synchronization error based on the branch features output by different branch networks includes: fusing the output features of the linear network branch with the output features of the convolutional network branch to obtain a fused feature; and generating a predicted value of the time synchronization error based on the fused feature using a residual connection.
[0099] The linear branching network extracts features with linear relationships and overall trends by performing linear transformations on the time-shifted data (including the original time-shifted sequence and the concatenated position-encoded data). For example, when processing time-shifted data, the linear branching network uses the weight matrix and bias vector of the fully connected layer to perform weighted summation and nonlinear activation (if any) on the input data to obtain the output features of the linear branching network.
[0100] The convolutional branch network performs operations such as convolution and pooling on the path delay data, extracting features such as local patterns and spatial correlations. The convolution layer slides the convolution kernel over the path delay data, while the pooling layer downsamples the convolved features, gradually extracting high-level features and ultimately generating the output features of the convolutional branch network.
[0101] The output feature F of the linear branch network n The fused feature h0 is then integrated with the output feature c of the convolutional branch network. This fusion can be performed in a variety of ways. For example, the feature vectors of the two branches can be concatenated to obtain a longer feature vector. Alternatively, a weighted summation approach can be used to assign different weights to the features of different branches based on their importance, and then sum them together to obtain the fused feature. Alternatively, the features of the two branches can be integrated through a cross-attention mechanism, and finally the final prediction value is generated through a residual connection transformation. For example, it can be expressed as follows:
[0102]
[0103] Among them, W1, W2, W o is the weight of the fully connected layer.
[0104] Residual connections are used to maintain the integrity of fused features. The basic idea of residual connections is to directly add input features to features that have undergone some transformation to maintain the integrity of the fused features. Specifically, a residual module can be designed to perform a series of linear transformations (such as fully connected layer operations) on the fused features to obtain the transformed features. The fused features are then added to the transformed features to obtain the predicted value of the time synchronization error.
[0105] The linear branch network and the convolutional branch network extract different types of features from the time offset data and path delay data, respectively. By fusing their output features, we can leverage both linear and convolutional features, which reflect the factors influencing time synchronization error from different perspectives. For example, linear features may capture overall trends in time offset, while convolutional features can capture local variations and spatial correlations in path delay. The fused features contain richer information, helping to improve the accuracy of time synchronization error prediction.
[0106] The fused feature combines the features of the linear and convolutional branches and is further processed through residual connections. Residual connections maintain the integrity of the fused features, preventing information loss during feature transformation. They also accelerate model training, making it easier to optimize. This processing method enhances the expressive power of features, enabling the model to better learn the complex relationship between temporal synchronization errors and input features.
[0107] Because the fused features contain more comprehensive and richer information and are effectively processed through residual connections, the time synchronization error prediction values generated based on the fused features are more accurate. In scenarios with high time synchronization accuracy requirements, such as wireless communications, accurate prediction values are crucial for achieving real-time timing error compensation and improving communication system performance. This approach significantly improves the accuracy of time synchronization error prediction, thereby enhancing the reliability and efficiency of the entire system.
[0108] The present application also provides a time synchronization error compensation method, such as Figure 3 As shown, a flow chart of a time synchronization error compensation method in an embodiment of the present application is provided. The time synchronization error compensation method includes the following steps S310 to S330:
[0109] Step S310, capturing time offset data and path delay data;
[0110] Step S320, predicting a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data;
[0111] Step S330, performing error compensation according to the time synchronization error;
[0112] The time synchronization error prediction model is trained based on any of the aforementioned training methods for the time synchronization error prediction model.
[0113] In the time synchronization error compensation scenario, the clock offset and path delay data can be captured during the PTP message interaction process, and then the clock offset and path delay data can be input into the time synchronization error prediction model trained in the aforementioned embodiment to predict the time synchronization error, which can then be used for error compensation.
[0114] By capturing time offset and path delay data and using a trained time synchronization error prediction model, we can accurately estimate the time synchronization error in the current system. Error compensation based on this accurate prediction significantly improves the system's time synchronization accuracy, ensuring highly consistent time between nodes and meeting the application requirements of high-precision time synchronization.
[0115] Because data capture, prediction, and compensation can all be performed online in real time, time synchronization errors in the system can be adjusted and compensated promptly. This is crucial for applications requiring high real-time performance, such as real-time communication and control systems. Timely compensation of time synchronization errors ensures real-time performance and timely data transmission and processing.
[0116] The embodiment of the present application also provides a training device 400 for a time synchronization error prediction model, such as Figure 4 As shown, a structural diagram of a training device for a time synchronization error prediction model in an embodiment of the present application is provided. The training device 400 for the time synchronization error prediction model includes: a construction unit 410, a feature extraction unit 420, a generation unit 430, and an update unit 440, wherein:
[0117] A construction unit 410 is configured to construct training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error;
[0118] A feature extraction unit 420 is configured to input the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively, to obtain branch features output by the different branch networks;
[0119] A generating unit 430, configured to generate a predicted value of a time synchronization error according to branch features output by different branch networks;
[0120] The updating unit 440 is used to calculate the loss value according to the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and use the loss value to update the parameters of the time synchronization error prediction model to obtain a trained time synchronization error prediction model.
[0121] In some embodiments of the present application, the branch network includes a linear branch network and a convolutional branch network, and the feature extraction unit 420 is specifically used to: input the time offset data into the linear branch network to obtain the output features of the linear branch network; input the path delay data into the convolutional branch network to obtain the output features of the convolutional branch network.
[0122] In some embodiments of the present application, the time offset data includes an original time offset sequence and a position code, and the feature extraction unit 420 is specifically used to: splice the original time offset sequence and the position code to obtain the spliced time offset data; and input the spliced time offset data into the linear branch network to obtain the output features of the linear branch network.
[0123] In some embodiments of the present application, the position code is obtained by: based on a set time period, using a cosine function to generate position codes corresponding to different time periods respectively; fusing the position codes corresponding to different time periods to obtain a final position code.
[0124] In some embodiments of the present application, the branch features output by different branch networks include the output features of the linear branch network and the output features of the convolutional branch network, and the generation unit 430 is specifically used to: fuse the output features of the linear network branch with the output features of the convolutional network branch to obtain a fused feature; and based on the fused feature, use the residual connection to generate a predicted value of the time synchronization error.
[0125] It can be understood that the training device of the above-mentioned time synchronization error prediction model can implement the various steps of the training method of the time synchronization error prediction model provided in the aforementioned embodiment. The relevant explanations on the training method of the time synchronization error prediction model are applicable to the training device of the time synchronization error prediction model and will not be repeated here.
[0126] The embodiment of the present application also provides a time synchronization error compensation device 500, such as Figure 5 As shown, a schematic diagram of the structure of a time synchronization error compensation device in an embodiment of the present application is provided. The time synchronization error compensation device 500 includes: a capture unit 510, a prediction unit 520 and a compensation unit 530, wherein:
[0127] A capture unit 510, configured to capture time offset data and path delay data;
[0128] A prediction unit 520 is configured to predict a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data;
[0129] a compensation unit 530, configured to perform error compensation according to the time synchronization error;
[0130] The time synchronization error prediction model is obtained by training based on the aforementioned time synchronization error prediction model training device.
[0131] It can be understood that the above-mentioned time synchronization error compensation device can implement each step of the time synchronization error compensation method provided in the above-mentioned embodiment. The relevant explanations about the time synchronization error compensation method are applicable to the time synchronization error compensation device and will not be repeated here.
[0132] In order to verify the performance of the time synchronization error compensation method proposed in this application, Figure 6As shown, a schematic diagram of a test platform for a time synchronization error compensation solution in an embodiment of the present application is provided. The platform consists of a synchronous clock, a 20-kilometer optical fiber link and a cellular network that complies with the 3GPP Release 17 standard. The base station operates in the N78 frequency band and uses a 100MHz bandwidth under a single-input single-output (SISO) configuration. The user terminal equipment (CPE) is connected to the base station through a wireless air interface, and the master clock (Master Clock) and the slave clock (Slave Clock) are interconnected through an optical fiber link and a cellular network, and synchronized based on the PTP protocol. The neural network timing error suppression algorithm (NN-based timing error mitigation) deployed at the slave clock end will capture the clock offset and path delay data during the PTP message interaction process. The second pulse (PPS) signal output by the master and slave clocks is connected to the time synchronization tester (Synchronization Tester) for real-time measurement of timing errors.
[0133] like Figure 7 As shown, a characteristic schematic diagram of time synchronization data in a test environment in an embodiment of the present application is provided. Figure 7 The data shows how the offset, path delay, and measured timing error (TE) change over time when PTP messages are transmitted over a 20-kilometer optical fiber and a native 5G system. The path delay and TE exhibit symmetry—they are mirror images around a 3ms axis—while the offset exhibits more random variations. Therefore, offset sequences are more suitable for processing using linear fully connected networks, while path delay sequences are more suitable for processing using convolutional neural networks.
[0134] like Figure 8 As shown, a schematic diagram of the accuracy of predicting timing errors in an embodiment of the present application is provided. Figure 8 A comparison of the predicted value of timing error of the hybrid linear-convolutional neural network with the measured value of timing error showed that the predicted curve was highly consistent with the measured curve, with the maximum absolute error not exceeding 100 μs over a 12-hour test period, demonstrating the model's ability to compensate for timing error.
[0135] like Figure 9 As shown, a schematic diagram of the change of the relative timing error of a solution proposed in the present application is provided in an embodiment of the present application. Figure 9The relative timing errors of this application's solution (PTP over the timing error mitigation approach) and the native 5G system (PTP over native 5G) are compared. In the native 5G system, PTP synchronization can fluctuate significantly from -4ms to +4ms due to uncompensated path delay variations and clock offsets. The neural network-based timing error mitigation method controls the timing error within the range of ±100μs by jointly optimizing the linear and convolutional branches of the neural network.
[0136] Figure 10 This is a schematic diagram of the structure of a device in the embodiment of the present application. Figure 10 As shown, the device includes one or more processors (or processing units), may further include one or more memories coupled to the processors, and may further include a communication module coupled to the processors.
[0137] The communication module can be used to communicate with other devices or apparatuses, such as sending or receiving data and / or signals. The communication module can include at least one communication module for communication. The communication module can include any interface necessary for communicating with other devices. Exemplarily, the communication module can be a transceiver, circuit, bus, module, or other type of communication module.
[0138] The processor may include, but is not limited to, at least one of the following: a general-purpose computer, a special-purpose computer, a microcontroller, a digital signal processor (DSP), or one or more of a controller-based multi-core controller architecture. A device may have multiple processors, such as application-specific integrated circuit chips, which are time-slave to a clock synchronized with a main processor.
[0139] The memory may include one or more non-volatile memories and one or more volatile memories. Examples of non-volatile memories include, but are not limited to, at least one of the following: read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, hard disk, compact disc (CD), digital video disc (DVD), or other magnetic storage and / or optical storage. Examples of volatile memories include, but are not limited to, at least one of the following: random access memory (RAM), or other volatile memories that do not persist during a power outage.
[0140] A computer program includes computer-executable instructions that are executed by an associated processor. The program may be stored in ROM. The processor may perform any suitable actions and processes by loading the program into RAM.
[0141] The possible implementation of the present application can be realized by means of a program, so that the communication device can perform any process discussed in the above embodiments. The possible implementation of the present application can also be realized by hardware or by a combination of software and hardware.
[0142] In some embodiments, the program may be tangibly contained in a computer-readable storage medium that may be included in the device (such as in a memory) or other storage device accessible by the device. The program may be loaded from the computer-readable storage medium into RAM for execution. The computer-readable storage medium may include any type of tangible non-volatile memory, such as ROM, EPROM, flash memory, hard disk, CD, DVD, etc.
[0143] The present application also provides a computer-readable storage medium having computer instructions or program codes stored thereon, which, when executed by a processor, causes the processor to perform the methods and functions described in any of the above embodiments. A computer-readable medium may be any tangible medium containing or storing a program for or related to an instruction execution system, apparatus, or device. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. Computer-readable media may include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination thereof. The computer-readable storage medium may be any available medium that a computer can access, or a data storage device such as a server or data center that includes one or more available media integrated therein. More detailed examples of computer-readable storage media include electrical connections with one or more wires, magnetic media (e.g., magnetic disks, floppy disks, hard disks, tapes, magnetic storage devices), optical media (e.g., optical storage devices, DVDs), semiconductor media (e.g., solid-state drives), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), or any suitable combination thereof.
[0144] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The embodiments of the present application also provide at least one computer program product tangibly stored on a non-transitory computer-readable storage medium. The computer program product includes one or more computer-executable instructions, such as instructions included in a program module, which are executed in a device on a real or virtual processor of the target to perform the processes, methods and functions involved in any of the above embodiments. When the computer program instructions are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) method.
[0145] The present application also provides a computer program product, including a computer program or instructions, which, when run on a computer, causes the computer to perform the processes, methods, and functions in the above-described embodiments. Typically, a program module includes routines, programs, libraries, objects, classes, components, data structures, etc. that perform specific tasks or implement specific abstract data types. In various embodiments, the functions of the program modules can be combined or divided between program modules as needed. The machine executable instructions for the program modules can be executed in local or distributed devices. In distributed devices, the program modules can be located in local and remote storage media.
[0146] In general, various embodiments of the present application can be implemented in hardware or dedicated circuits, software, logic, or any combination thereof. Some aspects can be implemented in hardware, while other aspects can be implemented in firmware or software, which can be executed by a controller, microprocessor, or other computing device. Although various aspects of the embodiments of the present disclosure are shown and described as block diagrams, flow charts, or using some other graphical representation, it should be understood that the blocks, devices, systems, techniques, or methods described herein can be implemented as, by way of non-limiting example, hardware, software, firmware, dedicated circuits or logic, general-purpose hardware or a controller or other computing device, or some combination thereof.
[0147] It should be noted that although the embodiments of the present application are described above in conjunction with the accompanying drawings, the above embodiments are not independent of each other, and they can also be combined to obtain other embodiments. The methods, situations, categories, and divisions of the embodiments in the embodiments of the present application are only for the convenience of description and should not constitute special limitations. The features of the various methods, categories, situations, and embodiments can be combined with each other when they are logical. The various embodiments of the present application can be combined arbitrarily to achieve different technical effects. The embodiments of the present application no longer list various combinations.
[0148] In addition, although the operations of the method of the present disclosure are described in a particular order in the accompanying drawings, this does not require or imply that these operations must be performed in this particular order, or that all the operations shown must be performed to achieve the desired result. On the contrary, the steps depicted in the flowchart can change the order of execution. Additionally or alternatively, certain steps can be omitted, multiple steps can be combined into one step, and / or one step can be decomposed into multiple steps. It should also be noted that the features and functions of two or more devices according to the present disclosure can be embodied in one device. Conversely, the features and functions of a device described above can be further divided into being embodied by multiple devices.
[0149] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0150] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.
Claims
1. A training method for a time synchronization error prediction model, characterized in that: The training method of the time synchronization error prediction model includes: Constructing training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error; inputting the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively to obtain branch features output by the different branch networks; Generate a predicted value of the time synchronization error according to the branch features output by different branch networks; A loss value is calculated according to the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and the parameters of the time synchronization error prediction model are updated using the loss value to obtain a trained time synchronization error prediction model.
2. The training method of the time synchronization error prediction model according to claim 1, characterized in that: The branch network includes a linear branch network and a convolutional branch network, and the time offset data and the path delay data are respectively input into different branch networks of the time synchronization error prediction model to obtain branch features output by different branch networks, including: Inputting the time offset data into the linear branching network to obtain output features of the linear branching network; The path delay data is input into the convolutional branch network to obtain output features of the convolutional branch network.
3. The training method of the time synchronization error prediction model according to claim 2, characterized in that: The time offset data includes an original time offset sequence and a position code, and the inputting of the time offset data into the linear branch network to obtain the output features of the linear branch network includes: splicing the original time offset sequence and the position code to obtain spliced time offset data; The spliced time-shifted data is input into the linear branch network to obtain output features of the linear branch network.
4. The training method of the time synchronization error prediction model according to claim 3, characterized in that: The position code is obtained as follows: Based on the set time period, the cosine function is used to generate position codes corresponding to different time periods; The position codes corresponding to different time periods are fused to obtain the final position code.
5. The training method of the time synchronization error prediction model according to claim 1, characterized in that: The branch features output by different branch networks include output features of a linear branch network and output features of a convolutional branch network. Generating a predicted value of a time synchronization error based on the branch features output by different branch networks includes: Fusing the output features of the linear network branch with the output features of the convolutional network branch to obtain fused features; According to the fusion features, a predicted value of the time synchronization error is generated using a residual connection.
6. A time synchronization error compensation method, characterized in that: The time synchronization error compensation method comprises: Capture time offset data and path delay data; Predicting a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data; performing error compensation according to the time synchronization error; The time synchronization error prediction model is obtained by training based on the training method of the time synchronization error prediction model according to any one of claims 1 to 5.
7. A training device for a time synchronization error prediction model, characterized in that: The training device of the time synchronization error prediction model includes: A construction unit, configured to construct training data for a time synchronization error prediction model, wherein the training data includes time offset data, path delay data, and corresponding true values of the time synchronization error; a feature extraction unit, configured to input the time offset data and the path delay data into different branch networks of the time synchronization error prediction model respectively, to obtain branch features output by the different branch networks; A generation unit, configured to generate a predicted value of a time synchronization error according to branch features output by different branch networks; An updating unit is used to calculate a loss value based on the predicted value of the time synchronization error and the corresponding true value of the time synchronization error, and use the loss value to update the parameters of the time synchronization error prediction model to obtain a trained time synchronization error prediction model.
8. A time synchronization error compensation device, characterized in that: The time synchronization error compensation device comprises: A capture unit, used for capturing time offset data and path delay data; a prediction unit, configured to predict a time synchronization error using a time synchronization error prediction model according to the time offset data and the path delay data; a compensation unit, configured to perform error compensation according to the time synchronization error; The time synchronization error prediction model is obtained by training based on the training device of the time synchronization error prediction model according to claim 7.
9. A device comprising: processor; And a memory arranged to store computer-executable instructions, which, when executed, cause the processor to execute the training method of the time synchronization error prediction model of any one of claims 1 to 5, and the time synchronization error compensation method of claim 6.
10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the training method of the time synchronization error prediction model of any one of claims 1 to 5 is implemented, and the time synchronization error compensation method of claim 6 is implemented.