Handheld intravenous radio frequency closing device

Abstract

The invention belongs to the technical field of medical equipment, and particularly discloses a handheld intravenous radio frequency closing device which comprises a drive control and sampling module, a drive control module, a temperature conditioning module, a communication module, a main control module, an auxiliary power supply, a display screen and a button control module. The storage battery, the flyback converter module, the inversion module, the impedance acquisition module and the output interface module are connected in sequence; the driving control and sampling module is bidirectionally connected with the flyback converter module and the main control module respectively; the driving control unit is in bidirectional connection with the inversion module and the main control module. The output interface module is in bidirectional connection with the temperature conditioning module and the communication module. The main control unit is in bidirectional connection with the temperature conditioning module, the communication module, the display screen and the button control module. The problems that an existing intravenous-cavity radio-frequency closing system needs to be connected with a power grid and a host when working, is prone to being interfered by a power source and is low in efficiency are solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of medical equipment, and in particular relates to a handheld intravenous radiofrequency closure device. Background Art

[0002] Varicose veins of the lower extremities are one of the most common peripheral vascular diseases, affecting nearly one-third of the world's population. Traditional high ligation and stripping of superficial veins is a classic surgical procedure for treating varicose veins of the lower extremities. While this technique is mature and simple to perform, it has drawbacks such as significant surgical trauma, numerous complications, slow recovery, prolonged hospitalization, and a high recurrence rate.

[0003] In recent years, traditional surgical procedures have been gradually replaced by minimally invasive surgeries. Endovascular thermal ablation closure, a technique with a history of over 20 years, utilizes various physical media to release heat within the venous lumen, causing the lumen to contract and rapidly fibrosize, forming a thrombus, thereby sealing the diseased vessel. Common endovascular thermal ablation closure techniques include endovascular laser closure, endovascular steam closure, and endovascular microwave closure. Endovascular thermal ablation closure is effective and has accumulated a wealth of evidence-based medical evidence. It is recommended as a first-line treatment option in multiple guidelines and has largely replaced open surgery in Western countries. However, endovascular thermal ablation closure does have certain drawbacks, such as incomplete closure of the saphenous vein after endovascular laser closure, a high incidence of postoperative recanalization, and excessive residual blood in the vessel caused by excessive laser fiber withdrawal or insufficient compression during surgery, which can compromise the effectiveness of closure and increase the risk of recurrence. Furthermore, endovascular laser closure is associated with a number of adverse reactions, including subcutaneous ecchymosis, numbness after saphenous nerve injury, and a burning sensation. Endocavity steam closure and endocavity microwave closure are relatively rarely used in clinical practice. A small number of studies have shown that the vein closure rate three years after endocavity microwave closure is 79.8%, and the numbness rate of the affected limb is as high as 32.1%. Due to the lack of evidence-based medicine, the efficacy of the two closure techniques remains to be verified.

[0004] As the first-line treatment for varicose veins of the lower limbs, intravenous radiofrequency closure (RFCL) primarily works by heat-induced venous spasm and collagen contraction. However, precise control of energy transmission to provide patients with a safer and more reliable system is an urgent issue that needs to be addressed. Existing RF RF closure systems require connection to the power grid and host computer during operation, are susceptible to power supply interference, and suffer from low efficiency. Summary of the Invention

[0005] The purpose of the present invention is to solve the problem that the existing intravenous radiofrequency closure system needs to be connected to the power grid and the host when working, is susceptible to power supply interference and has low efficiency. A handheld intravenous radiofrequency closure device is proposed.

[0006] The technical solution of the present invention is: a handheld intravenous radiofrequency closure device, comprising a drive control and sampling module, a drive control module, a temperature conditioning module, a communication module, a main control module, an auxiliary power supply, a display screen and button control module, and a battery, a flyback converter module, an inverter module, an impedance acquisition module and an output interface module connected in sequence; the drive control and sampling module is bidirectionally connected to the flyback converter module and the main control module respectively; the drive control unit is bidirectionally connected to the inverter module and the main control module respectively; the output interface module is bidirectionally connected to the temperature conditioning module and the communication module respectively; the main control unit is bidirectionally connected to the temperature conditioning module, the communication module and the display screen and button control module respectively; the other output end of the impedance acquisition module is connected to the main control module; the other output end of the battery is connected to the auxiliary power supply; wherein: The drive control and sampling module is used to generate the drive signal and sample to realize the flyback converter control; A drive control module, used to generate a drive control signal to drive the inverter module; a temperature conditioning module, used for connecting the temperature line passing through the output interface module and the thermocouple of the catheter; A communication module, used for communicating and interacting with the catheter's software information; Interactive module, used to display working temperature, treatment time and start the device; A battery for storing energy and supplying power to the entire handheld intravenous radiofrequency sealing device; A flyback converter module for outputting a DC voltage; an inverter module, configured to receive the DC voltage; Impedance acquisition module, used to sample DC voltage and calculate output impedance; Output interface module, used for energy output control.

[0007] The beneficial effects of the present invention are: 1. The present invention achieves a minimized structural volume and reduces costs by stacking the battery, flyback converter module, inverter module, impedance acquisition module, and output interface module. Furthermore, the battery-powered device eliminates the need for connecting to an external power source or host, thus improving portability. 2. The present invention provides an interactive module including a display screen and button control, ensuring safety of use. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 Shown is a schematic structural diagram of a handheld intravenous radiofrequency closure device.

[0009] Figure 2 Shown is the circuit diagram of the flyback converter module.

[0010] Figure 3 Shown is the circuit diagram of the inverter module.

[0011] Figure 4 Shown is the circuit diagram of the impedance acquisition module.

[0012] Figure 5 Shown is the circuit diagram of the current protection unit.

[0013] Figure 6 Shown is the circuit diagram of the interaction module.

[0014] Figure 7 Shown is the circuit diagram of the temperature conditioning module. DETAILED DESCRIPTION

[0015] The exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be understood that the embodiments shown and described in the accompanying drawings are merely exemplary and are intended to illustrate the principles and spirit of the present invention, rather than to limit the scope of the present invention.

[0016] Example: like Figure 1 As shown, a handheld intravenous radiofrequency closure device includes a drive control and sampling module, a drive control module, a temperature conditioning module, a communication module, a main control module, an auxiliary power supply, a display screen and button control module, and a battery, a flyback converter module, an inverter module, an impedance acquisition module, and an output interface module connected in sequence; the drive control and sampling module is bidirectionally connected to the flyback converter module and the main control module respectively; the drive control unit is bidirectionally connected to the inverter module and the main control module respectively; the output interface module is bidirectionally connected to the temperature conditioning module and the communication module respectively; the main control unit is bidirectionally connected to the temperature conditioning module, the communication module, and the display screen and button control module respectively; another output end of the impedance acquisition module is connected to the main control module; another output end of the battery is connected to the auxiliary power supply; wherein: The drive control and sampling module is used to generate the drive signal and sample to realize the flyback converter control; A drive control module, used to generate a drive control signal to drive the inverter module; a temperature conditioning module, used for connecting the temperature line passing through the output interface module and the thermocouple of the catheter; A communication module, used for communicating and interacting with the catheter's software information; Interactive module, used to display working temperature, treatment time and start the device; A battery for storing energy and supplying power to the entire handheld intravenous radiofrequency sealing device; A flyback converter module for outputting a DC voltage; an inverter module, configured to receive the DC voltage; Impedance acquisition module, used to sample DC voltage and calculate output impedance; Output interface module, used for energy output control.

[0017] The flyback converter module outputs a DC voltage, which is used as the input of the inverter module; the impedance acquisition module samples the current and voltage through a transformer and a mutual inductor and calculates the output impedance; the temperature conditioning module connects the temperature wire at the output port and the thermocouple of the catheter as input, and samples the voltage value after temperature conditioning through the serial data acquisition module.

[0018] In this embodiment, if Figure 2 As shown, the flyback converter module includes a connector J1, wherein pin 2 of the connector J1 is connected to the anode of the diode D2, and the cathode of the diode D2 is respectively connected to V+, the anode of the polar capacitor E1, one end of the capacitor C4, one end of the capacitor C5, one end of the resistor R5, one end of the capacitor C3, the anode of the Zener diode D3, and port 1 of the core transformer TA1; pin 3 of the connector J1, the negative electrode of the polar capacitor E1, the other end of the capacitor C4, the other end of the capacitor C5, one end of the resistor R17, and one end of the resistor R18 are grounded; the other end of the resistor R5 is respectively connected to the other end of the resistor R17, the other end of the resistor R18, and one end of the resistor R11, and the other end of the resistor R11 is connected to the ADC_BAT terminal; the ADC_BAT terminal is used to collect the battery power to prompt the user to charge or replace the battery; Port 5 of the core transformer TA1 is connected to the input end of the diode D4, one end of the resistor R12 and the drain of the N-channel field effect transistor Q2; the other end of the resistor R12 is connected to the other end of the capacitor C3; the output end of the diode D4 is connected to the cathode of the voltage-stabilizing diode D3; the source of the N-channel field effect transistor Q2 is connected to one end of the resistor R31, the other end of the resistor R31 is connected to V-, and the source of the N-channel field effect transistor Q2 is also connected to the CS terminal; the gate of the N-channel field effect transistor Q2 is respectively connected to one end of the resistor R28 and one end of the resistor R34, the other end of the resistor R34 is connected to V-; the other end of the resistor R28 is connected to pin 7 of the amplifier U3A, Pin 2 of the amplifier U3A is connected to one end of the resistor R30, the other end of the resistor R30 is connected to the OUT pin of the chip U4, the VCC pin of the chip U4 is connected to one end of the capacitor C11, the positive electrode of the polarity capacitor E4 and the 12V power supply, the other end of the capacitor C11 and the negative electrode of the polarity capacitor E4 are connected to V-; the RT / CT pin of the chip U4 is connected to one end of the resistor R27 and one end of the capacitor C14; the other end of the resistor R27 is connected to the VREF pin of the chip U4; the other end of the capacitor C14 is connected to V-; the COMP pin of the chip U4 is connected to the COMP terminal; the GND pin of the chip U4 is grounded; the ISENSE pin of the chip U4 is connected to the CS terminal; Port 9 of the core transformer TA1 is connected to one end of the resistor R1, one end of the resistor R3, and the input end of the diode D1; the other end of the resistor R1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is respectively connected to the positive electrode of the polarity capacitor E2, the positive electrode of the polarity capacitor E3, one end of the resistor R2, and one end of the resistor R6; the other end of the resistor R2 is connected to the Vo_S3 power supply; Port 7 of the core transformer TA1 is connected to one end of capacitor C7, the negative electrode of polar capacitor E2, the negative electrode of polar capacitor E3, one end of resistor R15, one end of resistor R20, and Vo_S3-power supply; the other end of capacitor C7 is connected to the other end of resistor R3, the other end of resistor R15 is connected to the other end of resistor R6 and the FB terminal respectively; the other end of resistor R20 is grounded; The COMP terminal is also connected to the output end of the operational amplifier U5A, one end of the resistor R37 and one end of the capacitor C16; the other end of the capacitor C16 is connected to one end of the resistor R35; the inverting input end of the operational amplifier U5A is connected to the other end of the resistor R37, the other end of the resistor R35 and the FB terminal; the non-inverting input end of the operational amplifier U5A is connected to the output end of the operational amplifier U5B and the inverting input end of the operational amplifier U5B through the resistor R40; the non-inverting input end of the operational amplifier U5B is connected to the Pset terminal.

[0019] In this embodiment, if Figure 3 As shown, the inverter module includes a chip U7 and a chip U6C, and the VDD pin of the chip U7 and the VDD pin of the chip U6C are both connected to a 12V power supply; The EAN pin of the chip U7 is connected to the EAOUT pin of the chip U7; the RAMP pin of the chip U7 is connected to the CT pin of the chip U7 and one end of the capacitor C32, the other end of the capacitor C32 is connected to one end of the capacitor C31, and the other end of the capacitor C31 is connected to the REF terminal; the chip U7 provides a reference voltage to the outside through the REF terminal; the REF pin of the chip U7 is connected to the REF terminal; the GND pin of the chip U7 is grounded; the RT pin of the chip U7 is connected to one end of the resistor R59; the DELAB pin of the chip U7 is connected to one end of the resistor R60; the DELCD pin of the chip U7 is connected to one end of the resistor R61; the ADS pin of the chip U7 and the CS pin of the chip U7 are connected to one end of the resistor R62; the other end of the resistor R59, the resistor R The other end of resistor R60, the other end of resistor R61 and the other end of resistor R62 are all connected to one end of resistor R63; the OUTD pin of the chip U7 is connected to the OUT1A terminal; the OUTC pin of the chip U7 is connected to the OUT1B terminal; the VDD pin of the chip U7 is also connected to one end of capacitor C27 and the positive electrode of polarity capacitor E5; the other end of the capacitor C27 is connected to the negative electrode of the polarity capacitor E5; the SS / DISB pin of the chip U7 is connected to the SS / DIS terminal and one end of capacitor C25; the other end of the resistor R59, the other end of the resistor R60, the other end of the resistor R61 and the other end of the resistor R62, the other end of the resistor R67, the PGND pin of the chip U7, the other end of the capacitor C27, the negative electrode of the polarity capacitor E5 and the other end of the capacitor C25 are connected to V-; The OUT1B terminal is also connected to one end of a resistor R48, the other end of the resistor R48 is connected to one end of a capacitor C28 and pin 2 of the amplifier U6A, and the other end of the capacitor C28 is connected to V-; pin 7 of the amplifier U6A is connected to one end of a resistor R49, the other end of the resistor R49 is connected to one end of a resistor R50, one end of a bidirectional transient suppression diode D8, and the gate of an N-channel field effect transistor Q5, the other end of the resistor R50 and the other end of the bidirectional transient suppression diode D8 are connected to V-; the source of the N-channel field effect transistor Q5 is connected to V-; the N-channel field effect transistor Q5 The drain of the amplifier U6A is connected to the 1B_Drain terminal and the same-name end of the secondary coil 1 of the transformer T1; the pin 1 of the amplifier U6A is connected to one end of the resistor R54, the other end of the resistor R54 is connected to one end of the resistor R58 and the pin 8 of the amplifier U6B; the other end of the resistor R58 is connected to a 12V power supply; the pin 4 of the amplifier U6B is connected to one end of the capacitor C35 and one end of the resistor R65, the other end of the resistor R65 is connected to the OUT1A terminal, and the other end of the capacitor C35 is connected to 12V; the pin 5 of the amplifier U6B is connected to one end of the resistor R66, the other end of the resistor R66 is connected to the OUT1A terminal, and the other end of the capacitor C35 is connected to 12V; The first terminal of the transformer T1 is connected to one end of the resistor R70, one end of the bidirectional transient suppression diode D11 and the gate of the N-channel field effect transistor Q6; the source of the N-channel field effect transistor Q6 is connected to 12V; the drain of the N-channel field effect transistor Q6 is connected to the 1A_Drain terminal and the opposite-name end of the secondary coil 2 of the transformer T1; the shielded wire of the transformer T1 is connected to the 12V power supply, the same-name end of the primary coil of the transformer T1 is connected to one end of the resistor R63 and one end of the inductor L1; the opposite-name end of the primary coil of the transformer T1 is connected to the other end of the resistor R63, one end of the capacitor C29 and the end of the core transformer TA2. Port 2; the other end of the inductor L1 and the other end of the capacitor C29 are connected to the OUT1_RF terminal; port 1 of the core transformer TA2 is connected to the OUT2_RF terminal; port 3 of the core transformer TA2 is connected to the input end of the diode D10 and the output end of the diode D13; port 4 of the core transformer TA2 is connected to the input end of the diode D9 and the output end of the diode D12; the output end of the diode D10 and the output end of the diode D9 are connected to the IS3 terminal; the IS3 terminal is used to collect current signals; the input end of the diode D12 and the input end of the diode D13 are both connected to V-; The SS / DIS terminal is connected to the collector of transistor Q4; the base of transistor Q4 is connected to one end of resistor R43 and one end of capacitor C24; the emitter of transistor Q4 and the other end of capacitor C24 are both grounded; the other end of resistor R43 is connected to one end of resistor R42 and the EN_RF terminal; the EN_RF terminal is used to start the U7 chip; the other end of resistor R42 is connected to a 3V3 power supply; The 1A_Drain terminal is connected to the input end of the diode D7, and the output end of the diode D7 is connected to one end of the resistor R45 and one end of the capacitor C26. The 1B_Drain terminal is connected to the input end of the diode D6, and the output end of the diode D6 is connected to one end of the resistor R41 and one end of the capacitor C20. The other end of the resistor R45, the other end of the capacitor C26, the other end of the resistor R41, and the other end of the capacitor C20 are all connected to the 3V3 power supply, one end of the capacitor C21, and the positive electrode of the polarity capacitor E6. The other end of the capacitor C21 and the negative electrode of the polarity capacitor E6 are grounded. The VDD pin of the chip U6C is also connected to one end of the capacitor C22 and one end of the capacitor C23, and the GND pin of the chip U6C, the other end of the capacitor C22 and the other end of the capacitor C23 are grounded.

[0020] In this embodiment, if Figure 4 As shown, the impedance acquisition module includes a resistor R77, one end of the resistor R77 is connected to the OUT1_RF terminal and port 1 of the core transformer PE1, and port 2 of the core transformer PE1 is connected to the Ip terminal and one end of the resistor R73; port 3 of the core transformer PE1 is connected to the Is terminal and the other end of the resistor R73; port 4 of the core transformer PE1 is connected to pin 3 of the connector J2; pin 1 of the connector J2 is connected to the OUT2_RF terminal; the other end of the resistor R77 is connected to one end of the resistor R80; the other end of the resistor R80 is connected to one end of the capacitor C47 and port 1 of the core transformer T2, and the other end of the capacitor C47 is connected to one end of the resistor R85 and port 2 of the core transformer T2; the other end of the resistor R85 is connected to the OUT2_RF terminal; port 3 of the core transformer T2 is connected to one end of the resistor R84 and the Up terminal; the Up terminal is used to output a voltage acquisition signal; port 4 of the core transformer T2 is connected to the other end of the resistor R84 and the Us terminal; The Ip terminal is connected to the IN1 pin of the chip U11; the GND pin of the chip U11 is grounded; the IN2 pin of the chip U11 is connected to the Is terminal, one end of the resistor R75 and one end of the resistor R81; the other end of the resistor R75 is connected to the 5VCC power supply, and the other end of the resistor R81 is grounded; the The pin and the OUT- pin of the chip U11 are grounded; the V+ pin of the chip U11 is connected to one end of the capacitor C40 and the 5VCC power supply, and the other end of the capacitor C40 is grounded; the OUT+ pin of the chip U11 is connected to one end of the resistor R82, and the other end of the resistor R82 is connected to the Irms terminal; The Irms terminal is also connected to the CH1 pin of the chip U14. The pin is connected to the Buff_CS terminal, the CH0 pin of the chip U14 is connected to the Urms terminal, the DIN pin of the chip U14 is connected to the Buff_DIN terminal, the DOUT pin of the chip U14 is connected to the Buff_DA terminal, the CLK pin of the chip U14 is connected to the Buff_CK terminal, the VDD pin of the chip U14 is connected to the 5VCC power supply and one end of the capacitor C55, and the other end of the capacitor C55 is grounded; The Us terminal is connected to the IN1 pin of the chip U13, and the IN1 pin of the chip U13 is also connected to one end of the resistor R87 and one end of the resistor R92. The other end of the resistor R87 is connected to the 5VCC power supply, and the other end of the resistor R92 is grounded; the GND pin of the chip U13 is grounded; the OUT+ pin of the chip U13 is connected to one end of the resistor R94, and the other end of the resistor R94 is connected to the Urms terminal; the V+ pin of the chip U13 is connected to one end of the capacitor C51; the OUT- pin of the chip U13, the The other end of the pin and capacitor C51 are grounded; The Buff_CS terminal is also connected to one end of the capacitor C48 and one end of the resistor R88, and the other end of the resistor R88 is connected to the CS_Imped terminal; The Buff_DIN terminal is also connected to one end of the capacitor C49 and one end of the resistor R89, and the other end of the resistor R89 ​​is connected to the MOSI_SPI terminal; The Buff_CK terminal is also connected to one end of the capacitor C50 and one end of the resistor R93, and the other end of the resistor R93 is connected to the CLK_SPI terminal; The Buff_DA terminal is also connected to one end of a resistor R95, the other end of the resistor R95 is connected to one end of a capacitor C54 and the MOSI_SPI terminal, and the other end of the capacitor C54 is grounded; The impedance acquisition module also includes a chip U10, the Vin pin of the chip U10 and the en pin of the chip U10 are connected to one end of the capacitor C42 and a 5V power supply, the Bypass pin of the chip U10 is connected to one end of the capacitor C44, the Out pin of the chip U10 is connected to one end of the capacitor C431 and a 5VCC power supply, and the gnd pin of the chip U10, the other end of the capacitor C42, the other end of the capacitor C44 and the other end of the capacitor C43 are grounded.

[0021] In this embodiment, if Figure 5 As shown, the drive control and sampling module is further provided with a current protection unit, which includes a resistor R9, one end of which is a voltage source, and the other end of which is connected to pin 3 of the comparator U1A and one end of the resistor R25; pin 1 of the comparator U1A is connected to one end of the resistor R13, the OC2 terminal and one end of the capacitor C9; the OC2 terminal is used to output a current acquisition signal; the other end of the resistor R13 is a voltage source; pin 2 of the comparator U1A is connected to one end of the resistor R14; the other end of the resistor R14 is connected to one end of the capacitor C6, pin 1 of the amplifier U2A and one end of the resistor R23, and the other end of the resistor R23 is connected to the other end of the capacitor C9 and the other end of the resistor R25 and to V-; The other end of the capacitor C6 is connected to one end of the resistor R19 and pin 2 of the amplifier U2A; Pin 3 of the amplifier U2A is connected to one end of the capacitor C8, one end of the resistor R21 and one end of the resistor R22; The other end of the resistor R19, the other end of the capacitor C8 and the other end of the resistor R21 are all grounded; The other end of the resistor R22 is grounded; The current protection unit further includes a resistor R8 , which is connected in parallel to the capacitor C6 .

[0022] In this embodiment, if Figure 6 As shown, the interactive module includes a display screen unit and a button control unit, and the display screen unit and the button control unit are connected in parallel; The display screen unit includes a chip U15 with a model number of OLED12864, wherein pin 1 of the chip U15 is grounded, pin 2 of the chip U15 is connected to one end of a resistor R100, the other end of the resistor R100 is connected to a DC power conversion terminal of the display screen unit, pin 3 of the chip U15 is connected to one end of a resistor R101, and the other end of the resistor R100 is connected to a parameter setting terminal of the display screen unit, pin 4 of the chip U15, pin 5 of the chip U15, and pin 6 of the chip U15 are connected to a 3V3 power supply, and pin 7 of the chip U15 is grounded; The button control unit includes a resistor R96, a resistor R97 and a resistor R98; one end of the resistor R96, one end of the resistor R97 and one end of the resistor R98 are all connected to a voltage source; The other end of the resistor R96 is connected to the preparation button terminal, pin 2 of the connector J3, and one end of the capacitor C56; the pin 1 of the connector J3 and the other end of the capacitor C56 are both grounded; The other end of the resistor R97 is connected to the start button terminal, pin 2 of the connector J4, and one end of the capacitor C57; the pin 1 of the connector J4 and the other end of the capacitor C57 are both grounded; The other end of the resistor R98 is connected to pin 2 of the connector J5; pin 1 of the connector J5 is connected to the LED4 terminal; and pin 1 of the connector J5 is connected to the LED3 terminal.

[0023] In this embodiment, if Figure 7 As shown, the temperature conditioning module includes an amplifier U31A, the output end of the amplifier U31A is connected to one end of the resistor R159, one end of the capacitor C132, one end of the resistor R170 and the non-inverting input end of the amplifier U31C, and the other end of the resistor R170 is grounded; the non-inverting input end of the amplifier U31A is connected to the positive electrode of the polarity capacitor C140 and one end of the resistor R169, and the other end of the resistor R169 is connected to pin 1 of the connector J9; the negative electrode of the polarity capacitor C140 and pin 2 of the connector J9 are both grounded; the inverting input end of the amplifier U31A is connected to the other end of the resistor R159, the other end of the capacitor C132 and one end of the resistor R156; the other end of the resistor R156 is connected to the output end of the amplifier U31B and one end of the resistor R149; The inverting input terminal of the amplifier U31B is connected to the other end of the resistor R149 and one end of the resistor 151; the non-inverting input terminal of the amplifier U31B is connected to one end of the resistor R155, and the other end of the resistor R155 is grounded; the other end of the resistor R151 is connected to pin 16 of the amplifier U31D and pin 17 of the amplifier U31D; Pin 5 of the amplifier U31D is connected to one end of the resistor R164, one end of the capacitor C134, and a voltage source; Pin 15 of the amplifier U31D is connected to the other end of the resistor R164, one end of the capacitor C139, and one end of the resistor R171; the other end of the capacitor C139 and the other end of the resistor R171 are grounded; Pin 14 of the amplifier U31D is connected to one end of the capacitor C138 and a voltage source; the other end of the capacitor C134 and the other end of the capacitor C138 are both grounded; Pin 12 of the amplifier U31C is connected to one end of the capacitor C131, one end of the resistor R157, and one end of the resistor R161; the other end of the resistor R161 is grounded; the other end of the capacitor C131 and the other end of the resistor R157 are connected to pin 11 of the amplifier U31C and one end of the resistor R168; the other end of the resistor R168 is connected to the Vout terminal; The Vout terminal is also connected to the VIN+ pin of the chip U26. The pin is connected to the CS_LTC terminal; the VIN+ pin of the chip U26 is also connected to one end of the capacitor Cx1 and the cathode of the diode D23; the VIN- pin of the chip U26, the GND pin of the chip U26, the other end of the capacitor Cx1 and the anode of the diode D23 are grounded; the REF pin of the chip U26 is connected to the reference voltage Vref_LTC and one end of the resistor R135; the DOUT pin of the chip U26 is connected to the DOUT_LTC terminal; the CLK pin of the chip U26 is connected to the CLK_LTC terminal; the VCC pin of the chip U26 is connected to one end of the capacitor C101, and the other end of the capacitor C101 is grounded; the VCC pin of U26 and the other end of the resistor R135 are connected to a voltage source; The CS_LTC terminal is also connected to the VOB pin of the chip U29; the VDD2 pin of the chip U29 and the VE2 pin of the chip U29 are both connected to one end of the capacitor C121, one end of the capacitor C122 and the 5V+temp power supply, and the other end of the capacitor C121 and the other end of the capacitor C122 are grounded; the GND3 pin of the chip U29 and the GND4 pin of the chip U29 are both grounded; the VID pin of the chip U29 is connected to one end of the capacitor C112 and one end of the resistor C144; the other end of the capacitor C112 is grounded; the other end of the resistor C144 is connected to the DOUT_LTC terminal; the VOC pin of the chip U29 is connected to the CLK_LTC terminal; the VIA pin of the chip U29 is connected to one end of the resistor R137, and the other end of the resistor R137 is grounded; the VIB pin of the chip U29 is connected to one end of the capacitor C109 and the resistor R139 one end of the capacitor C109, the other end of the capacitor C109 is grounded, and the other end of the resistor R139 is connected to the CS_Temp terminal; the CS_Temp terminal is used to input the temperature acquisition control signal; the VIC pin of the chip U29 is connected to one end of the capacitor C110 and one end of the resistor R142, the other end of the capacitor C110 is grounded, and the other end of the resistor R142 is connected to the CLK_SPI terminal; the VOD pin of the chip U29 is connected to one end of the resistor R143, and the other end of the resistor R143 is connected to the MISO_SPI terminal; the MISO_SPI terminal is used to transmit the temperature acquisition control signal; one end of the VDD1 pin of the chip U29 and the VE1 pin of the chip U29 are both connected to one end of the capacitor C119 and one end of the capacitor C120; the GND1 pin of the chip U29, the GND2 pin of the chip U29, the other end of the capacitor C119 and the other end of the capacitor C120 are all grounded.

[0024] In this embodiment, the connector J1 and the connector J5 are B3P-VH type connectors; the connector J3 and the connector J4 are 2510-2P type connectors; The chip U4 model is UCC28C44; the chip U7 model is UCC3895DW; the chip U10 model is LM3985IM-5.0PB; the chip U15 model is OLED12864; The N-channel field effect transistor Q2, the N-channel field effect transistor Q5 and the N-channel field effect transistor Q6 are of model FDP52N20; The models of the amplifier U2A, the amplifier U5A and the amplifier U5B are LM358, and the model of the comparator U1A is LM393DR; The amplifier U3A, amplifier U6A, amplifier U6B, amplifier U31A, amplifier U31B, amplifier U31C and amplifier U31D are of model LM358; The resistor R65 is a 1K resistor; The capacitor C26 is 100pF or 630pF; the capacitor C56 and the capacitor C57 are 100nF capacitors; and the capacitor C134 is a 1uF capacitor.

[0025] The handheld intravenous radiofrequency closure device proposed in the present invention is used to treat patients with varicose veins. It does not require connection to the power grid or host, provides a safe interactive mode, is equipped with a standby button and a start / stop button, and can display the temperature and working status in real time through an OLED display. The device is also equipped with a rechargeable battery that is charged when the battery is low. Based on the actual working time of 5 minutes per device, it can perform 24 operations continuously, 7 operations per day, and 3 days of operation. The present invention achieves no power interference and is portable, providing a single doctor with the convenience of independently completing varicose vein surgery, thereby improving efficiency.

[0026] The present invention adopts a battery + flyback converter + push-pull inverter circuit + structural stacking to achieve the same function as a thermos cup of 500-1500ml, minimizing the volume, simplifying the structure, and reducing the cost. It can be promoted to county-level hospitals and community hospitals to realize outpatient surgery.

[0027] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and it should be understood that the scope of protection of the present invention is not limited to such specific descriptions and embodiments. Those skilled in the art can make various other specific variations and combinations based on the technical teachings disclosed in the present invention without departing from the essence of the present invention, and such variations and combinations are still within the scope of protection of the present invention.

Claims

1. A handheld intravenous radiofrequency closure device, characterized in that: The device includes a drive control and sampling module, a drive control module, a temperature conditioning module, a communication module, a main control module, an auxiliary power supply, an interaction module, and a battery, a flyback converter module, an inverter module, an impedance acquisition module, and an output interface module connected in sequence; the drive control and sampling module is bidirectionally connected to the flyback converter module and the main control module respectively; the drive control module is bidirectionally connected to the inverter module and the main control module respectively; the output interface module is bidirectionally connected to the temperature conditioning module and the communication module respectively; the main control module is bidirectionally connected to the temperature conditioning module, the communication module, and the interaction module respectively; the other output end of the impedance acquisition module is connected to the main control module; the other output end of the battery is connected to the auxiliary power supply; wherein: The drive control and sampling module is used to generate the drive signal and sample to realize the flyback converter control; A drive control module, used to generate a drive control signal to drive the inverter module; a temperature conditioning module, used for connecting the temperature line passing through the output interface module and the thermocouple of the catheter; A communication module, used for communicating and interacting with the catheter's software information; Interactive module, used to display working temperature, treatment time and start the device; A battery for storing energy and supplying power to the entire handheld intravenous radiofrequency sealing device; A flyback converter module for outputting a DC voltage; an inverter module, configured to receive the DC voltage; Impedance acquisition module, used to sample DC voltage and calculate output impedance; Output interface module, used for energy output control.

2. The handheld intravenous radiofrequency closure device according to claim 1, characterized in that: The flyback converter module includes a connector J1, wherein pin 2 of the connector J1 is connected to the anode of the diode D2, and the cathode of the diode D2 is respectively connected to V+, the anode of the polar capacitor E1, one end of the capacitor C4, one end of the capacitor C5, one end of the resistor R5, one end of the capacitor C3, the anode of the voltage-stabilizing diode D3, and port 1 of the core transformer TA1; pin 3 of the connector J1, the negative electrode of the polar capacitor E1, the other end of the capacitor C4, the other end of the capacitor C5, one end of the resistor R17, and one end of the resistor R18 are grounded; the other end of the resistor R5 is respectively connected to the other end of the resistor R17, the other end of the resistor R18, and one end of the resistor R11, and the other end of the resistor R11 is connected to the ADC_BAT terminal; the ADC_BAT terminal is used to collect the battery power to prompt the user to charge or replace the battery; Port 5 of the core transformer TA1 is connected to the input end of the diode D4, one end of the resistor R12 and the drain of the N-channel field effect transistor Q2; the other end of the resistor R12 is connected to the other end of the capacitor C3; the output end of the diode D4 is connected to the cathode of the voltage-stabilizing diode D3; the source of the N-channel field effect transistor Q2 is connected to one end of the resistor R31, the other end of the resistor R31 is connected to V-, and the source of the N-channel field effect transistor Q2 is also connected to the CS terminal; the gate of the N-channel field effect transistor Q2 is respectively connected to one end of the resistor R28 and one end of the resistor R34, the other end of the resistor R34 is connected to V-; the other end of the resistor R28 is connected to pin 7 of the amplifier U3A, Pin 2 of the amplifier U3A is connected to one end of the resistor R30, the other end of the resistor R30 is connected to the OUT pin of the chip U4, the VCC pin of the chip U4 is connected to one end of the capacitor C11, the positive electrode of the polarity capacitor E4 and the 12V power supply, the other end of the capacitor C11 and the negative electrode of the polarity capacitor E4 are connected to V-; the RT / CT pin of the chip U4 is connected to one end of the resistor R27 and one end of the capacitor C14; the other end of the resistor R27 is connected to the VREF pin of the chip U4; the other end of the capacitor C14 is connected to V-; the COMP pin of the chip U4 is connected to the COMP terminal; the GND pin of the chip U4 is grounded; the ISENSE pin of the chip U4 is connected to the CS terminal; Port 9 of the core transformer TA1 is connected to one end of the resistor R1, one end of the resistor R3, and the input end of the diode D1; the other end of the resistor R1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is respectively connected to the positive electrode of the polarity capacitor E2, the positive electrode of the polarity capacitor E3, one end of the resistor R2, and one end of the resistor R6; the other end of the resistor R2 is connected to the Vo_S3 power supply; Port 7 of the core transformer TA1 is connected to one end of capacitor C7, the negative electrode of polar capacitor E2, the negative electrode of polar capacitor E3, one end of resistor R15, one end of resistor R20, and Vo_S3-power supply; the other end of capacitor C7 is connected to the other end of resistor R3, the other end of resistor R15 is connected to the other end of resistor R6 and the FB terminal respectively; the other end of resistor R20 is grounded; The COMP terminal is also connected to the output end of the operational amplifier U5A, one end of the resistor R37 and one end of the capacitor C16; the other end of the capacitor C16 is connected to one end of the resistor R35; the inverting input end of the operational amplifier U5A is connected to the other end of the resistor R37, the other end of the resistor R35 and the FB terminal; the non-inverting input end of the operational amplifier U5A is connected to the output end of the operational amplifier U5B and the inverting input end of the operational amplifier U5B through the resistor R40; the non-inverting input end of the operational amplifier U5B is connected to the Pset terminal.

3. The handheld intravenous radiofrequency closure device according to claim 1, characterized in that: The inverter module includes a chip U7 and a chip U6C, and the VDD pin of the chip U7 and the VDD pin of the chip U6C are both connected to a 12V power supply; The EAN pin of the chip U7 is connected to the EAOUT pin of the chip U7; the RAMP pin of the chip U7 is connected to the CT pin of the chip U7 and one end of the capacitor C32, the other end of the capacitor C32 is connected to one end of the capacitor C31, and the other end of the capacitor C31 is connected to the REF terminal; the chip U7 provides a reference voltage to the outside through the REF terminal; the REF pin of the chip U7 is connected to the REF terminal; the GND pin of the chip U7 is grounded; the RT pin of the chip U7 is connected to one end of the resistor R59; the DELAB pin of the chip U7 is connected to one end of the resistor R60; the DELCD pin of the chip U7 is connected to one end of the resistor R61; the ADS pin of the chip U7 and the CS pin of the chip U7 are connected to one end of the resistor R62; the other end of the resistor R59, the resistor R The other end of resistor R60, the other end of resistor R61 and the other end of resistor R62 are all connected to one end of resistor R63; the OUTD pin of the chip U7 is connected to the OUT1A terminal; the OUTC pin of the chip U7 is connected to the OUT1B terminal; the VDD pin of the chip U7 is also connected to one end of capacitor C27 and the positive electrode of polarity capacitor E5; the other end of the capacitor C27 is connected to the negative electrode of the polarity capacitor E5; the SS / DISB pin of the chip U7 is connected to the SS / DIS terminal and one end of capacitor C25; the other end of the resistor R59, the other end of the resistor R60, the other end of the resistor R61 and the other end of the resistor R62, the other end of the resistor R67, the PGND pin of the chip U7, the other end of the capacitor C27, the negative electrode of the polarity capacitor E5 and the other end of the capacitor C25 are connected to V-; The OUT1B terminal is also connected to one end of a resistor R48, the other end of the resistor R48 is connected to one end of a capacitor C28 and pin 2 of the amplifier U6A, and the other end of the capacitor C28 is connected to V-; pin 7 of the amplifier U6A is connected to one end of a resistor R49, the other end of the resistor R49 is connected to one end of a resistor R50, one end of a bidirectional transient suppression diode D8, and the gate of an N-channel field effect transistor Q5, the other end of the resistor R50 and the other end of the bidirectional transient suppression diode D8 are connected to V-; the source of the N-channel field effect transistor Q5 is connected to V-; the N-channel field effect transistor Q5 The drain of the amplifier U6A is connected to the 1B_Drain terminal and the same-name end of the secondary coil 1 of the transformer T1; the pin 1 of the amplifier U6A is connected to one end of the resistor R54, the other end of the resistor R54 is connected to one end of the resistor R58 and the pin 8 of the amplifier U6B; the other end of the resistor R58 is connected to a 12V power supply; the pin 4 of the amplifier U6B is connected to one end of the capacitor C35 and one end of the resistor R65, the other end of the resistor R65 is connected to the OUT1A terminal, and the other end of the capacitor C35 is connected to 12V; the pin 5 of the amplifier U6B is connected to one end of the resistor R66, the other end of the resistor R66 is connected to the OUT1A terminal, and the other end of the capacitor C35 is connected to 12V; The first terminal of the transformer T1 is connected to one end of the resistor R70, one end of the bidirectional transient suppression diode D11 and the gate of the N-channel field effect transistor Q6; the source of the N-channel field effect transistor Q6 is connected to 12V; the drain of the N-channel field effect transistor Q6 is connected to the 1A_Drain terminal and the opposite-name end of the secondary coil 2 of the transformer T1; the shielded wire of the transformer T1 is connected to the 12V power supply, the same-name end of the primary coil of the transformer T1 is connected to one end of the resistor R63 and one end of the inductor L1; the opposite-name end of the primary coil of the transformer T1 is connected to the other end of the resistor R63, one end of the capacitor C29 and the end of the core transformer TA2. Port 2; the other end of the inductor L1 and the other end of the capacitor C29 are connected to the OUT1_RF terminal; port 1 of the core transformer TA2 is connected to the OUT2_RF terminal; port 3 of the core transformer TA2 is connected to the input end of the diode D10 and the output end of the diode D13; port 4 of the core transformer TA2 is connected to the input end of the diode D9 and the output end of the diode D12; the output end of the diode D10 and the output end of the diode D9 are connected to the IS3 terminal; the IS3 terminal is used to collect current signals; the input end of the diode D12 and the input end of the diode D13 are both connected to V-; The SS / DIS terminal is connected to the collector of transistor Q4; the base of transistor Q4 is connected to one end of resistor R43 and one end of capacitor C24; the emitter of transistor Q4 and the other end of capacitor C24 are both grounded; the other end of resistor R43 is connected to one end of resistor R42 and the EN_RF terminal; the EN_RF terminal is used to start the U7 chip; the other end of resistor R42 is connected to a 3V3 power supply; The 1A_Drain terminal is connected to the input end of the diode D7, and the output end of the diode D7 is connected to one end of the resistor R45 and one end of the capacitor C26. The 1B_Drain terminal is connected to the input end of the diode D6, and the output end of the diode D6 is connected to one end of the resistor R41 and one end of the capacitor C20. The other end of the resistor R45, the other end of the capacitor C26, the other end of the resistor R41, and the other end of the capacitor C20 are all connected to the 3V3 power supply, one end of the capacitor C21, and the positive electrode of the polarity capacitor E6. The other end of the capacitor C21 and the negative electrode of the polarity capacitor E6 are grounded. The VDD pin of the chip U6C is also connected to one end of the capacitor C22 and one end of the capacitor C23, and the GND pin of the chip U6C, the other end of the capacitor C22 and the other end of the capacitor C23 are grounded.

4. The handheld intravenous radiofrequency closure device according to claim 3, characterized in that: The impedance acquisition module includes a resistor R77, one end of which is connected to the OUT1_RF terminal and port 1 of the core transformer PE1, and port 2 of the core transformer PE1 is connected to the Ip terminal and one end of the resistor R73; port 3 of the core transformer PE1 is connected to the Is terminal and the other end of the resistor R73; port 4 of the core transformer PE1 is connected to pin 3 of the connector J2; pin 1 of the connector J2 is connected to the OUT2_RF terminal; the other end of the resistor R77 is connected to one end of the resistor R80; the other end of the resistor R80 is connected to one end of the capacitor C47 and port 1 of the core transformer T2, and the other end of the capacitor C47 is connected to one end of the resistor R85 and port 2 of the core transformer T2; the other end of the resistor R85 is connected to the OUT2_RF terminal; port 3 of the core transformer T2 is connected to one end of the resistor R84 and the Up terminal; the Up terminal is used to output a voltage acquisition signal; port 4 of the core transformer T2 is connected to the other end of the resistor R84 and the Us terminal; The Ip terminal is connected to the IN1 pin of the chip U11; the GND pin of the chip U11 is grounded; the IN2 pin of the chip U11 is connected to the Is terminal, one end of the resistor R75 and one end of the resistor R81; the other end of the resistor R75 is connected to the 5VCC power supply, and the other end of the resistor R81 is grounded; the The pin and the OUT- pin of the chip U11 are grounded; the V+ pin of the chip U11 is connected to one end of the capacitor C40 and the 5VCC power supply, and the other end of the capacitor C40 is grounded; the OUT+ pin of the chip U11 is connected to one end of the resistor R82, and the other end of the resistor R82 is connected to the Irms terminal; The Irms terminal is also connected to the CH1 pin of the chip U14. The pin is connected to the Buff_CS terminal, the CH0 pin of the chip U14 is connected to the Urms terminal, the DIN pin of the chip U14 is connected to the Buff_DIN terminal, the DOUT pin of the chip U14 is connected to the Buff_DA terminal, the CLK pin of the chip U14 is connected to the Buff_CK terminal, the VDD pin of the chip U14 is connected to the 5VCC power supply and one end of the capacitor C55, and the other end of the capacitor C55 is grounded; The Us terminal is connected to the IN1 pin of the chip U13, and the IN1 pin of the chip U13 is also connected to one end of the resistor R87 and one end of the resistor R92. The other end of the resistor R87 is connected to the 5VCC power supply, and the other end of the resistor R92 is grounded; the GND pin of the chip U13 is grounded; the OUT+ pin of the chip U13 is connected to one end of the resistor R94, and the other end of the resistor R94 is connected to the Urms terminal; the V+ pin of the chip U13 is connected to one end of the capacitor C51; the OUT- pin of the chip U13, the The other end of the pin and capacitor C51 are grounded; The Buff_CS terminal is also connected to one end of the capacitor C48 and one end of the resistor R88, and the other end of the resistor R88 is connected to the CS_Imped terminal; The Buff_DIN terminal is also connected to one end of the capacitor C49 and one end of the resistor R89, and the other end of the resistor R89 ​​is connected to the MOSI_SPI terminal; The Buff_CK terminal is also connected to one end of the capacitor C50 and one end of the resistor R93, and the other end of the resistor R93 is connected to the CLK_SPI terminal; The Buff_DA terminal is also connected to one end of a resistor R95, the other end of the resistor R95 is connected to one end of a capacitor C54 and the MOSI_SPI terminal, and the other end of the capacitor C54 is grounded; The impedance acquisition module also includes a chip U10, the Vin pin of the chip U10 and the en pin of the chip U10 are connected to one end of the capacitor C42 and a 5V power supply, the Bypass pin of the chip U10 is connected to one end of the capacitor C44, the Out pin of the chip U10 is connected to one end of the capacitor C431 and a 5VCC power supply, and the gnd pin of the chip U10, the other end of the capacitor C42, the other end of the capacitor C44 and the other end of the capacitor C43 are grounded.

5. The handheld intravenous radiofrequency closure device according to claim 1, characterized in that: The drive control and sampling module is also provided with a current protection unit, which includes a resistor R9, one end of which is a voltage source, and the other end of which is connected to pin 3 of the comparator U1A and one end of the resistor R25; pin 1 of the comparator U1A is connected to one end of the resistor R13, the OC2 terminal and one end of the capacitor C9; the OC2 terminal is used to output a current acquisition signal; the other end of the resistor R13 is a voltage source; pin 2 of the comparator U1A is connected to one end of the resistor R14; the other end of the resistor R14 is connected to one end of the capacitor C6, pin 1 of the amplifier U2A and one end of the resistor R23, and the other end of the resistor R23 is connected to the other end of the capacitor C9 and the other end of the resistor R25 and to V-; The other end of the capacitor C6 is connected to one end of the resistor R19 and pin 2 of the amplifier U2A; Pin 3 of the amplifier U2A is connected to one end of the capacitor C8, one end of the resistor R21 and one end of the resistor R22; The other end of the resistor R19, the other end of the capacitor C8 and the other end of the resistor R21 are all grounded; The other end of the resistor R22 is grounded; The current protection unit further includes a resistor R8 , which is connected in parallel to the capacitor C6 .

6. The handheld intravenous radiofrequency closure device according to claim 1, characterized in that: The interactive module includes a display screen unit and a button control unit, and the display screen unit and the button control unit are connected in parallel; The display screen unit includes a chip U15 with a model number of OLED12864, wherein pin 1 of the chip U15 is grounded, pin 2 of the chip U15 is connected to one end of a resistor R100, the other end of the resistor R100 is connected to a DC power conversion terminal of the display screen unit, pin 3 of the chip U15 is connected to one end of a resistor R101, and the other end of the resistor R100 is connected to a parameter setting terminal of the display screen unit, pin 4 of the chip U15, pin 5 of the chip U15, and pin 6 of the chip U15 are connected to a 3V3 power supply, and pin 7 of the chip U15 is grounded; The button control unit includes a resistor R96, a resistor R97 and a resistor R98; one end of the resistor R96, one end of the resistor R97 and one end of the resistor R98 are all connected to a voltage source; The other end of the resistor R96 is connected to the preparation button terminal, pin 2 of the connector J3, and one end of the capacitor C56; the pin 1 of the connector J3 and the other end of the capacitor C56 are both grounded; The other end of the resistor R97 is connected to the start button terminal, pin 2 of the connector J4, and one end of the capacitor C57; the pin 1 of the connector J4 and the other end of the capacitor C57 are both grounded; The other end of the resistor R98 is connected to pin 2 of the connector J5; pin 1 of the connector J5 is connected to the LED4 terminal; and pin 1 of the connector J5 is connected to the LED3 terminal.

7. The handheld intravenous radiofrequency closure device according to claim 1, characterized in that: The temperature conditioning module includes an amplifier U31A, the output end of the amplifier U31A is connected to one end of the resistor R159, one end of the capacitor C132, one end of the resistor R170 and the non-inverting input end of the amplifier U31C, and the other end of the resistor R170 is grounded; the non-inverting input end of the amplifier U31A is connected to the positive electrode of the polarity capacitor C140 and one end of the resistor R169, and the other end of the resistor R169 is connected to pin 1 of the connector J9; the negative electrode of the polarity capacitor C140 and pin 2 of the connector J9 are both grounded; the inverting input end of the amplifier U31A is connected to the other end of the resistor R159, the other end of the capacitor C132 and one end of the resistor R156; the other end of the resistor R156 is connected to the output end of the amplifier U31B and one end of the resistor R149; The inverting input terminal of the amplifier U31B is connected to the other end of the resistor R149 and one end of the resistor 151; the non-inverting input terminal of the amplifier U31B is connected to one end of the resistor R155, and the other end of the resistor R155 is grounded; the other end of the resistor R151 is connected to pin 16 of the amplifier U31D and pin 17 of the amplifier U31D; Pin 5 of the amplifier U31D is connected to one end of the resistor R164, one end of the capacitor C134, and a voltage source; Pin 15 of the amplifier U31D is connected to the other end of the resistor R164, one end of the capacitor C139, and one end of the resistor R171; the other end of the capacitor C139 and the other end of the resistor R171 are grounded; Pin 14 of the amplifier U31D is connected to one end of the capacitor C138 and a voltage source; the other end of the capacitor C134 and the other end of the capacitor C138 are both grounded; Pin 12 of the amplifier U31C is connected to one end of the capacitor C131, one end of the resistor R157, and one end of the resistor R161; the other end of the resistor R161 is grounded; the other end of the capacitor C131 and the other end of the resistor R157 are connected to pin 11 of the amplifier U31C and one end of the resistor R168; the other end of the resistor R168 is connected to the Vout terminal; The Vout terminal is also connected to the VIN+ pin of the chip U26. The pin is connected to the CS_LTC terminal; the VIN+ pin of the chip U26 is also connected to one end of the capacitor Cx1 and the cathode of the diode D23; the VIN- pin of the chip U26, the GND pin of the chip U26, the other end of the capacitor Cx1 and the anode of the diode D23 are grounded; the REF pin of the chip U26 is connected to the reference voltage Vref_LTC and one end of the resistor R135; the DOUT pin of the chip U26 is connected to the DOUT_LTC terminal; the CLK pin of the chip U26 is connected to the CLK_LTC terminal; the VCC pin of the chip U26 is connected to one end of the capacitor C101, and the other end of the capacitor C101 is grounded; the VCC pin of U26 and the other end of the resistor R135 are connected to a voltage source; The CS_LTC terminal is also connected to the VOB pin of the chip U29; the VDD2 pin of the chip U29 and the VE2 pin of the chip U29 are both connected to one end of the capacitor C121, one end of the capacitor C122 and the 5V+temp power supply, and the other end of the capacitor C121 and the other end of the capacitor C122 are grounded; the GND3 pin of the chip U29 and the GND4 pin of the chip U29 are both grounded; the VID pin of the chip U29 is connected to one end of the capacitor C112 and one end of the resistor C144; the The other end of capacitor C112 is grounded; the other end of resistor C144 is connected to the DOUT_LTC terminal; the VOC pin of chip U29 is connected to the CLK_LTC terminal; the VIA pin of chip U29 is connected to one end of resistor R137, and the other end of resistor R137 is grounded; the VIB pin of chip U29 is connected to one end of capacitor C109 and one end of resistor R139, the other end of capacitor C109 is grounded, and the other end of resistor R139 is connected to the CS_Temp terminal; The CS_Temp terminal is used to input the temperature acquisition control signal; the VIC pin of the chip U29 is connected to one end of the capacitor C110 and one end of the resistor R142, the other end of the capacitor C110 is grounded, and the other end of the resistor R142 is connected to the CLK_SPI terminal; the VOD pin of the chip U29 is connected to one end of the resistor R143, and the other end of the resistor R143 is connected to the MISO_SPI terminal; the MISO_SPI terminal is used to transmit the temperature acquisition control signal; the VDD1 pin of the chip U29 and one end of the VE1 pin of the chip U29 are both connected to one end of the capacitor C119 and one end of the capacitor C120; the GND1 pin of the chip U29, the GND2 pin of the chip U29, the other end of the capacitor C119 and the other end of the capacitor C120 are all grounded.

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