Operator compiling method and device, equipment and medium

Abstract

The application provides a compilation method and device of an operator, equipment and a medium, and relates to the technical field of artificial intelligence. The compilation method of the operator comprises the following steps: obtaining operator source code to be compiled, the operator source code being code written in a domain-specific language based on Triton; converting the operator source code into a Triton dialect, performing hardware-independent optimization, the Triton dialect being a hardware-independent dialect based on an MLIR framework and used to represent the computing logic of the operator source code; converting the Triton dialect into a hardware-specific dialect, the hardware-specific dialect being a hardware-related dialect based on the MLIR framework and used to represent hardware-oriented computing logic; generating source code in a general programming language according to the hardware-specific dialect; and calling an LLVM-based compilation tool corresponding to a target chip to generate target code according to the source code in the general programming language. The operator can be applied to chips with different chip architectures.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence technology, and in particular to a method, apparatus, device and medium for compiling an operator. Background Technology

[0002] With the rise of generative artificial intelligence (AI), the competition for computing power driven by generative AI is becoming increasingly fierce. Triton is a popular deep learning operator development tool. Based on the Python language, it hides the chip's architecture information and leaves architecture-related optimizations to the compiler, significantly reducing the difficulty of operator development.

[0003] However, when chips from different manufacturers using different chip architectures are connected to Triton, in order to protect their chip architecture information, manufacturers usually use closed-source code to connect to Triton. Operators developed based on Triton need to be compiled using the Triton compiler developed by the chip manufacturer. Due to the version differences of Triton compilers from different manufacturers, it is difficult to make operators universally applicable to chips with different chip architectures after development. Summary of the Invention

[0004] This application provides a method, apparatus, device, and medium for compiling an operator, which enables the operator to be used in chips with different chip architectures.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] Firstly, a method for compiling an operator is provided. This method may include: obtaining the source code of the operator to be compiled, which is code written in a domain-specific language based on Triton; converting the operator source code into a Triton dialect and performing hardware-independent optimizations, wherein the Triton dialect is a hardware-independent dialect based on the MLIR framework, used to represent the computational logic of the operator source code; converting the Triton dialect into a hardware-specific dialect, which is a hardware-dependent dialect based on the MLIR framework, used to represent hardware-oriented computational logic; generating source code using a general-purpose programming language based on the hardware-specific dialect; and calling an LLVM-based compilation tool corresponding to the target chip to generate target code based on the source code using the general-purpose programming language.

[0007] In one possible implementation, converting the Triton dialect to a hardware-specific dialect includes: converting the Triton dialect to a linear algebra dialect, which is the dialect used in the MLIR framework to represent linear algebra computation operations; and converting the linear algebra dialect to a hardware-specific dialect.

[0008] In another possible implementation, converting the Triton dialect to a hardware-specific dialect further includes: converting arithmetic operations in the Triton dialect to an arithmetic dialect and / or a mathematical dialect, wherein the arithmetic dialect is the dialect used in the MLIR framework to represent mathematical arithmetic operations, and the mathematical dialect is the dialect used in the MLIR framework to represent mathematical function operations; and converting the arithmetic dialect and / or the mathematical dialect to a hardware-specific dialect.

[0009] In another possible implementation, converting the Triton dialect to a hardware-specific dialect also includes: converting the tensor representation in the Triton dialect to a tensor dialect, where the tensor dialect is the dialect used in the MLIR framework to represent tensor operations; and converting the tensor dialect to a hardware-specific dialect.

[0010] In another possible implementation, converting the Triton dialect to a hardware-specific dialect also includes: converting the SCF in the Triton dialect to the SCF dialect, where the SCF dialect is the dialect used in the MLIR framework to represent the operation of the SCF; and converting the SCF dialect to a hardware-specific dialect.

[0011] In another possible implementation, the linear algebra dialect is converted to a hardware-specific dialect, including: converting the linear algebra dialect to an affine dialect and / or a vector dialect, wherein the affine dialect is the dialect used in the MLIR framework to represent affine transformations and loop operations, and the vector dialect is the dialect used in the MLIR framework to represent vector operations; and converting the affine dialect and / or vector dialect to a hardware-specific dialect.

[0012] In another possible implementation, source code in a general programming language is generated based on the hardware-specific dialect, including: generating C / C++ source code based on the EmitC code generation tool in the MLIR framework according to the hardware-specific dialect.

[0013] Secondly, an operator compilation apparatus is provided, which may include: an acquisition module for acquiring the source code of the operator to be compiled, wherein the source code is code written in a domain-specific language based on Triton; a conversion module for converting the operator source code into a Triton dialect and performing hardware-independent optimizations, wherein the Triton dialect is a hardware-independent dialect based on the MLIR framework and is used to represent the computational logic of the operator source code; converting the Triton dialect into a hardware-specific dialect, wherein the hardware-specific dialect is a hardware-dependent dialect based on the MLIR framework and is used to represent the hardware-oriented computational logic; a generation module for generating source code using a general-purpose programming language based on the hardware-specific dialect; and calling an LLVM-based compilation tool corresponding to the target chip to generate target code based on the source code using the general-purpose programming language.

[0014] In one possible implementation, a conversion module is specifically used to convert the Triton dialect into a linear algebra dialect, which is the dialect used in the MLIR framework to represent linear algebra computation operations; and to convert the linear algebra dialect into a hardware-specific dialect.

[0015] In another possible implementation, the conversion module is also used to convert arithmetic operations in the Triton dialect into an arithmetic dialect and / or a mathematical dialect, wherein the arithmetic dialect is the dialect used in the MLIR framework to represent mathematical arithmetic operations and the mathematical dialect is the dialect used in the MLIR framework to represent mathematical function operations; and to convert the arithmetic dialect and / or the mathematical dialect into a hardware-specific dialect.

[0016] In another possible implementation, the conversion module is also used to convert tensor representations in the Triton dialect to tensor dialects, which are dialects used in the MLIR framework to represent tensor operations; and to convert tensor dialects to hardware-specific dialects.

[0017] In another possible implementation, the conversion module is also used to convert the SCF in the Triton dialect to the SCF dialect, which is the dialect used in the MLIR framework to represent the operation of SCF; and to convert the SCF dialect to a hardware-specific dialect.

[0018] In another possible implementation, a conversion module is specifically used to convert a linear algebra dialect into an affine dialect and / or a vector dialect, where the affine dialect is the dialect used in the MLIR framework to represent affine transformations and loop operations, and the vector dialect is the dialect used in the MLIR framework to represent vector operations; and to convert the affine dialect and / or vector dialect into a hardware-specific dialect.

[0019] In another possible implementation, a generation module is specifically used to generate C / C++ source code based on the EmitC code generation tool in the MLIR framework, according to the hardware-specific dialect.

[0020] Thirdly, an electronic device is provided, comprising: a processor, a memory, and a communication interface. The memory and the communication interface are coupled to the processor, and the memory stores computer program code, including computer instructions. When the processor executes the computer instructions, it causes the electronic device to perform the method as described in any one of the first aspects above.

[0021] Fourthly, a computer-readable storage medium is provided that stores computer instructions. When the computer instructions are executed on an electronic device, the electronic device causes the electronic device to perform the method as described in any one of the first aspects above.

[0022] Fifthly, a computer program product comprising computer program instructions is provided, which, when executed by a processor, cause the processor to perform the method as described in any one of the first aspects above.

[0023] In a sixth aspect, an apparatus (e.g., a system-on-a-chip) is provided, comprising a processor for supporting an electronic device in implementing the methods described in the first aspect above. In one possible design, the apparatus further comprises a memory for storing program instructions and data necessary for the electronic device. When the apparatus is a system-on-a-chip, it may be composed of chips or may include chips and other discrete devices.

[0024] In this embodiment, the operator source code to be compiled, written based on Triton, can first be converted into the Triton dialect for hardware-independent optimization, thereby improving the performance of the final compiled target code. Then, the Triton dialect can be converted into a hardware-specific, hardware-dependent dialect, which can then be converted into source code using a general-purpose programming language. The target chip's (i.e., the chip running the operator) Low Level Virtual Machine (LLVM) compilation tool is then called to compile the aforementioned general-purpose programming language source code to generate the target code, thus achieving hardware-related optimization of the operator and generation of the target code. In this way, the compilation of the operator source code no longer relies on the closed-source Triton compiler developed by the chip manufacturer, enabling the developed operator to be universally compatible with chips of different architectures. Furthermore, through the above compilation method, since the final hardware-related compilation process is implemented using the chip manufacturer's own LLVM compilation tool, the chip's architecture information can still be protected by the chip manufacturer, preventing architecture information leakage. Attached Figure Description

[0025] Figure 1 This is a flowchart illustrating an operator compilation method provided in an embodiment of this application;

[0026] Figure 2 This is a schematic diagram of the dialect conversion process in the compilation method of an operator provided in an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of the code conversion process in an operator compilation method provided in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of the structure of an operator compilation device provided in an embodiment of this application;

[0029] Figure 5This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0030] The terminology used in the following embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to include the plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that “ / ” means “or,” for example, A / B can mean A or B; “and / or” in the text is merely a description of the relationship between related objects, indicating that three relationships can exist, for example, A and / or B can mean: A alone, A and B simultaneously, and B alone.

[0031] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.

[0032] The terms "first" and "second" in the following embodiments of this application are for descriptive purposes only and should not be construed as implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature, and in the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0033] With the rise of generative artificial intelligence (AI), the competition for computing power driven by generative AI is becoming increasingly fierce. Triton is a popular deep learning operator development tool. Based on the Python language, it hides the chip's architecture information and leaves architecture-related optimizations to the compiler, significantly reducing the difficulty of operator development.

[0034] However, when chips from different manufacturers using different chip architectures are connected to Triton, in order to protect their chip architecture information, manufacturers usually use closed-source code to connect to Triton. Operators developed based on Triton need to be compiled using the Triton compiler developed by the chip manufacturer. Due to the version differences of Triton compilers from different manufacturers, it is difficult to make operators universally applicable to chips with different chip architectures after development.

[0035] To address this issue, this application provides a method for compiling operators. For operator source code written in a domain-specific language (DSL) based on Triton (i.e., Triton DSL source code), this method first converts the Triton DSL source code to be compiled into a Triton dialect (Dialect), enabling hardware-independent optimization based on the Triton Dialect, thereby improving the performance of the final compiled target code. Then, the Triton Dialect can be converted into a hardware-specific, hardware-dependent dialect (or XPU-CDialect), which in turn converts the hardware-specific dialect into source code using a general-purpose programming language. Finally, the target chip's (i.e., the chip running the operator) compilation tools based on a Low Level Virtual Machine (LLVM) are called to compile the aforementioned general-purpose programming language source code to generate target code, thus achieving hardware-related optimization of the operator and the generation of target code. In this way, the compilation of the operator source code no longer relies on the closed-source Triton compiler developed by the chip manufacturer, allowing the developed operator to be universally compatible with chips of different chip architectures. Furthermore, through the above compilation method, since the final hardware-related compilation process is implemented through the chip manufacturer's own LLVM compilation tool, the chip's architecture information can still be protected by the chip manufacturer, preventing the leakage of architecture information.

[0036] The compilation method of the operator provided in this application will be described in detail below with reference to the accompanying drawings.

[0037] Reference Figure 1 This is a flowchart illustrating a method for compiling an operator according to an embodiment of this application. Figure 1 As shown, the compilation method of this operator can specifically include S101-S105.

[0038] S101. Obtain the source code of the operator to be compiled.

[0039] The operator source code to be compiled can be code written in a domain-specific language based on Triton, that is, operator source code written using Triton DSL (or Triton DSL code).

[0040] Triton is a language and compiler for writing efficient parallel computing kernels, designed to provide optimized support for deep learning and high-performance computing tasks. It allows users to write high-performance operators for chips such as Graphics Processing Units (GPUs) and Neural Processing Units (NPUs) through a Python-based DSL, while utilizing a Multi-Level Intermediate Representation (MLIR) framework for compilation. Therefore, in this embodiment, the operator source code written based on the Triton DSL can achieve higher performance and better run on the chip.

[0041] S102. Convert the operator source code into Triton Dialect and perform hardware-independent optimizations.

[0042] Triton Dialect is a hardware-independent dialect based on the MLIR framework, used to represent the computational logic of the corresponding operator source code. Specifically, Triton Dialect can represent the computational logic of Triton DSL code through a defined set of specific operations (Ops), types (Types), and attributes (Attributes).

[0043] As one possible implementation, when converting operator source code to a Triton Dialect, the operator source code can first be parsed into Python's Abstract Syntax Tree (AST). An AST is a tree-like representation of the syntactic structure of source code, representing syntactic elements (such as variable declarations, function calls, expressions, etc.) as nodes in a tree structure. Therefore, key information in the operator source code can be extracted by traversing this AST, such as function definitions, variable declarations, operators, and memory access operations. Then, based on this key information, the operator source code can be converted into a Triton Intermediate Representation (IR). Triton IR is a hardware-independent high-level representation capable of representing the computational logic of the operator source code. Therefore, Triton IR can be further converted into a Triton Dialect based on the MLIR framework.

[0044] After converting the operator source code into a Triton Dialect, hardware-independent optimizations (such as computational logic optimization) can be performed based on the Triton Dialect to improve operator performance. For example, an inliner pass can be performed to directly expand sub-functions called in the kernel to the call point, reducing function call overhead and improving code efficiency. Another example is a combine pass, which fuses operations for specific patterns to reduce redundant operations and improve code conciseness and efficiency. A canonicalizer pass can be performed, simplifying and standardizing expressions through a series of rules to eliminate redundant expressions, making the Triton Dialect more standardized and facilitating further optimization. A common subexpression elimination pass (CSE pass) can be performed to identify and eliminate common subexpressions, avoiding redundant calculations and improving code execution efficiency. Finally, a loop-invariant code motion pass (LICM pass) can be performed to move loop-independent code out of the loop body, reducing computation within the loop and improving loop efficiency. Of course, the above is only an example of hardware-independent optimization based on Triton Dialect. In some other possible implementations of this application, other hardware-independent optimizations may also be performed, which are not limited here.

[0045] S103. Convert Triton Dialect to a hardware-specific dialect.

[0046] Among them, the hardware-specific dialect (or XPU-C Dialect) is a hardware-related dialect based on the MLIR framework, used to represent hardware-oriented computational logic. The hardware-specific dialect can provide hardware-dependent operation representations by defining specific operations, types, and attributes, directly supporting hardware characteristics and facilitating subsequent hardware-related optimizations of the code.

[0047] Figure 2 The diagram illustrates a dialect conversion process in an operator compilation method provided in an embodiment of this application.

[0048] As one possible implementation method, refer to Figure 2 As shown, when converting Triton Dialect to a hardware-specific dialect, Triton Dialect can be converted to Linalg Dialect (linear algebra dialect) first, and then LinalgDialect can be converted to the corresponding hardware-specific dialect.

[0049] Linalg Dialect is the dialect used in the MLIR framework to represent linear algebra computation operations. This dialect enables high-level linear algebra operations on tensors and supports various tensor shapes, data types, memory layouts, and transformations. Linalg Dialect is at a lower level than Triton Dialect; therefore, converting Triton Dialect to Linalg Dialect first, and then converting Linalg Dialect to a hardware-specific dialect, is more convenient and reliable.

[0050] For example, a Triton Dialect can be converted to a corresponding Linalg Dialect using the triton-shared-opt tool (Triton sharing optimization tool) via a triton-to-linalg conversion pass (i.e., Triton to Linalg conversion optimization).

[0051] As an example, when converting Linalg Dialect to a hardware-specific dialect, such as Figure 2 As shown, Linalg Dialect can be first converted to a dialect closer to the hardware, such as Affine Dialect and / or Vector Dialect, and then these hardware-closer dialects can be further converted to hardware-specific dialects. Affine Dialect is the dialect used in the MLIR framework to represent affine transformations and loop operations, while Vector Dialect is the dialect used in the MLIR framework to represent vector operations. Therefore, affine transformations and loop operations in Linalg Dialect can be converted to Affine Dialect, and vector operations in Linalg Dialect can be converted to Vector Dialect. Since these dialects are closer to the hardware, converting Linalg Dialect to a hardware-closer dialect first and then further converting it to a hardware-specific dialect can improve the conversion effect and thus improve code performance. Of course, in other possible embodiments of this application, Linalg Dialect can also be directly converted to a hardware-specific dialect, or converted to other intermediate dialects and then further converted to a hardware-specific dialect; no limitation is made here.

[0052] As another possible implementation, if the Triton Dialect includes arithmetic operations, then refer to... Figure 2As shown, when converting a Triton Dialect to a hardware-specific dialect, arithmetic operations within the Triton Dialect can also be converted to Arith Dialect and / or Math Dialect. Then, Arith Dialect and / or Math Dialect can be converted to a hardware-specific dialect. Arith Dialect is the dialect in the MLIR framework used to represent mathematical arithmetic operations, defining basic integer and floating-point mathematical operations. Math Dialect is the dialect in the MLIR framework used to represent mathematical function operations, supporting more complex mathematical function operations. Therefore, based on the MLIR framework's optimization toolchain, basic mathematical arithmetic operations in a Triton Dialect can be converted to Arith Dialect, and complex mathematical function operations in a Triton Dialect can be converted to Math Dialect. This allows arithmetic operations in a Triton Dialect to be converted to a lower-level dialect, making it easier and more efficient to further convert arithmetic operations in a Triton Dialect to a hardware-specific dialect.

[0053] As another possible implementation, if the Triton Dialect contains tensor representations, then refer to Figure 2 As shown, when converting a Triton Dialect to a hardware-specific dialect, the tensor representations within the Triton Dialect can also be converted to a Tensor Dialect (tensor dialect). Then, the Tensor Dialect can be converted to a hardware-specific dialect. TensorDialect is the dialect used in the MLIR framework to represent tensor operations, defining a series of operations for creating, manipulating, and transforming tensors. Therefore, based on the optimized toolchain of the MLIR framework, the tensor representations in the Triton Dialect can be converted to TensorDialect, thereby converting the tensor representations in the Triton Dialect to a lower-level dialect, making it easier and more efficient to further convert the tensor representations in the Triton Dialect to a hardware-specific dialect.

[0054] As another possible implementation, if the Triton Dialect includes a Structured Control Flow (SCF), then refer to... Figure 2As shown, when converting a Triton Dialect to a hardware-specific dialect, the SCF (Structured Control Flow Dialect) within the Triton Dialect can also be converted to an SCF Dialect (Structured Control Flow Dialect). Then, an SCF Dialect can be converted to a hardware-specific dialect. The SCF Dialect is a dialect in the MLIR framework used to represent operations of structured control flow, expressing common control flow structures such as loops, conditional statements, and parallel execution. Therefore, based on the MLIR framework's optimization toolchain, the structured control flow in the Triton Dialect can be converted to an SCF Dialect, thereby converting the structured control flow in the Triton Dialect to a lower-level dialect, making it easier and more efficient to further convert the structured control flow in the Triton Dialect to a hardware-specific dialect.

[0055] In the embodiments of this application, reference is made to Figure 2 As shown, specific computational logic can also be extended using custom dialects (such as XCSExt Dialect), thereby converting these specific computational logics in Triton Dialect into corresponding custom dialects. This allows for better translation of certain specific computational logics in Triton Dialect into hardware-specific dialects. In practical applications, this can be configured according to specific circumstances; no restrictions are imposed here.

[0056] For example, in practical applications, such as Figure 2 As shown, vector operations in Affine Dialect can be further converted to Vector Dialect, which is closer to the hardware, and structured control flow in Affine Dialect can be further converted to SCF Dialect, which is closer to the hardware, in order to better convert Affine Dialect to hardware-specific dialects.

[0057] S104. Generate source code using a general programming language based on the hardware-specific dialect.

[0058] The general programming language used in the generated source code can be the same as the general programming language corresponding to the LLVM compilation tool of the target chip, so as to facilitate the subsequent compilation of the source code according to the LLVM compilation tool corresponding to the target chip.

[0059] As an example, the EmitC (or MLIR EmitC) code generation tool under the MLIR framework provides a set of operations and types capable of converting dialects within the MLIR framework into portable C / C++ source code. Therefore, in this example, the MLIR EmitC code generation tool can be used to convert hardware-specific dialects into C / C++ source code. Of course, in other possible implementations of this application, other code generation tools can also be used to generate corresponding source code using general-purpose programming languages ​​based on hardware-specific dialects; this is not a limitation.

[0060] S105. Call the LLVM-based compilation tool corresponding to the target chip to generate target code based on the source code using a general programming language.

[0061] This can be achieved by calling the corresponding LLVM compilation tools through the interface provided by the target chip manufacturer. The target code can be machine code that can be executed by the target chip.

[0062] To protect their chip architecture information, chip manufacturers typically hide this information using proprietary LLVM IRs within their LLVM-based compilation tools. Therefore, this application utilizes the target chip's LLVM-based compilation tool (provided by the target chip manufacturer) to compile the previously generated source code in a general programming language (such as C / C++). This allows for hardware-related optimizations of the operators without revealing the chip's architecture information, ultimately yielding the target code.

[0063] Based on the aforementioned implementation methods, the operator compilation method provided in this application can progressively convert the Triton DSL-based operator source code into target code in stages, and can perform hardware-independent optimizations on the operator source code to improve operator performance. For example, Figure 3 This is a schematic diagram of the code conversion process in an operator compilation method provided in an embodiment of this application.

[0064] like Figure 3 As shown, the compilation process of the operator can be divided into five stages, and the code corresponding to each stage is as follows: Figure 3As shown in the diagram. The first stage corresponds to Triton Dialect code, which converts the Triton DSL-based operator source code into Triton Dialect for hardware-independent optimization. The second stage corresponds to LinalgDialect code, which converts Triton Dialect code into LinalgDialect code for easier and more accurate conversion to hardware-specific dialect code. The third stage corresponds to hardware-specific code, which converts LinalgDialect code into a hardware-specific dialect for subsequent hardware-related optimization. The fourth stage corresponds to C / C++ source code, which uses the MLIR EmitC code generation tool within the MLIR framework to convert the hardware-specific dialect into portable C / C++ source code. This allows the fifth stage to use this source code to call the target chip's LLVM compilation tool for hardware-related optimization of the operator and generate the target code. Accordingly, the code for the fifth stage is the final target code.

[0065] The operator compilation method provided in this application can improve operator performance by converting Triton DSL-based operator source code into Triton Dialect for hardware-independent optimization. Then, by converting TritonDialect to a hardware-specific dialect, and further converting the hardware-specific dialect into source code in a general-purpose programming language, the method calls the LLVM compiler corresponding to the target chip to compile and optimize the source code to obtain the target code. This achieves the goal of protecting the target chip's architecture information and preventing its leakage without relying on a dedicated Triton compiler provided by the target chip manufacturer. Based on this, the operator compilation method provided in this application can achieve operator compilation applicable to chips with different architectures, enabling operators written based on Triton DSL to be compiled and used across different chip architectures, thereby facilitating the construction of operator libraries applicable to various chip architectures.

[0066] Based on the examples given above, those skilled in the art will obviously be able to make various equivalent modifications or changes, which also fall within the scope of the embodiments of this application.

[0067] It is understood that, in order to achieve the above-mentioned functions, electronic devices may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in a hardware-driven or software-driven manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of this application.

[0068] This application embodiment can divide functional modules according to the above method example, thereby obtaining an apparatus capable of implementing the above method example. For example, Figure 4 A schematic diagram of the structure of an operator compilation apparatus provided in an embodiment of this application is shown. Figure 4 As shown, the device may include: an acquisition module 401, used to acquire the source code of the operator to be compiled, wherein the source code is code written in a domain-specific language based on Triton; a conversion module 402, used to convert the source code of the operator into the Triton dialect, perform hardware-independent optimization, wherein the Triton dialect is a hardware-independent dialect based on the MLIR framework, used to represent the computational logic of the source code of the operator; converting the Triton dialect into a hardware-specific dialect, wherein the hardware-specific dialect is a hardware-dependent dialect based on the MLIR framework, used to represent the hardware-oriented computational logic; a generation module 403, used to generate source code using a general-purpose programming language based on the hardware-specific dialect; and calling the LLVM-based compilation tool corresponding to the target chip to generate target code based on the source code using the general-purpose programming language.

[0069] In one possible implementation, the conversion module 402 is specifically used to convert the Triton dialect into a linear algebra dialect, which is the dialect used in the MLIR framework to represent linear algebra computation operations; and to convert the linear algebra dialect into a hardware-specific dialect.

[0070] In another possible implementation, the conversion module 402 is also used to convert arithmetic operations in the Triton dialect into an arithmetic dialect and / or a mathematical dialect, wherein the arithmetic dialect is a dialect in the MLIR framework used to represent mathematical arithmetic operations and the mathematical dialect is a dialect in the MLIR framework used to represent mathematical function operations; and to convert the arithmetic dialect and / or the mathematical dialect into a hardware-specific dialect.

[0071] In another possible implementation, the conversion module 402 is also used to convert the tensor representation in the Triton dialect into a tensor dialect, which is the dialect used in the MLIR framework to represent tensor operations; and to convert the tensor dialect into a hardware-specific dialect.

[0072] In another possible implementation, the conversion module 402 is also used to convert the SCF in the Triton dialect to the SCF dialect, which is the dialect used in the MLIR framework to represent the operation of SCF; and to convert the SCF dialect to a hardware-specific dialect.

[0073] In another possible implementation, the conversion module 402 is specifically used to convert the linear algebra dialect into an affine dialect and / or a vector dialect, wherein the affine dialect is the dialect in the MLIR framework used to represent affine transformations and loop operations, and the vector dialect is the dialect in the MLIR framework used to represent vector operations; and to convert the affine dialect and / or vector dialect into a hardware-specific dialect.

[0074] In another possible implementation, the generation module 403 is specifically used to generate C / C++ source code based on the EmitC code generation tool in the MLIR framework, according to the hardware-specific dialect.

[0075] This application also provides an electronic device. Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown. Figure 5 As shown, the electronic device includes a bus 501, a processor 502, a memory 503, and a communication interface 504. The processor 502, memory 503, and communication interface 504 communicate via the bus 501. The memory 503 stores computer program code, which includes computer instructions. When these instructions are executed by the processor 502, the electronic device performs the method provided in the foregoing embodiments. The electronic device can be a server or a terminal device. It should be understood that this application does not limit the number of processors 502 and memories 503 in the electronic device.

[0076] Bus 501 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Bus 501 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 5The bus 501 may be represented by a single line, but this does not mean that there is only one bus or one type of bus. The bus 501 may include a path for transmitting information between various components of an electronic device (e.g., memory 503, processor 502, communication interface 504).

[0077] Processor 502 may include any one or more processors such as a central processing unit, a graphics processing unit, a microprocessor (MP), or a digital signal processor (DSP).

[0078] Memory 503 may include volatile memory, such as random access memory (RAM). Memory 503 may also include non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid state drive (SSD).

[0079] Communication interface 504 uses a command distribution module, such as, but not limited to, a network interface card or transceiver, to enable communication between electronic devices and other devices or communication networks.

[0080] This application also provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, perform the method provided in the foregoing embodiments.

[0081] Furthermore, in the embodiments of this application, the functional units or modules of the apparatus used to implement the aforementioned method example can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0082] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially or in other words, the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0083] Therefore, this application also provides a computer program product, which includes computer program instructions that, when executed by a processor, cause the processor to perform the method provided in the foregoing embodiments.

[0084] This application also provides a chip system including at least one processor and at least one interface circuit. The processor and the interface circuit are interconnected via lines. For example, the interface circuit can be used to receive signals from other devices (e.g., the memory of an electronic device). As another example, the interface circuit can be used to send signals to other devices (e.g., the processor).

[0085] For example, the interface circuit can read instructions stored in the memory and send those instructions to the processor. When the processor executes the instructions, it causes the chip system to perform the steps in the above embodiments. Of course, the chip system may also include other discrete devices, and this application embodiment does not specifically limit this.

[0086] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for compiling an operator, characterized in that, include: Obtain the source code of the operator to be compiled, wherein the source code of the operator is written in a domain-specific language based on Triton; The operator source code is converted into the Triton dialect and optimized in a hardware-independent manner. The Triton dialect is a hardware-independent dialect based on the multi-level intermediate representation (MLIR) framework and is used to represent the computational logic of the operator source code. The Triton dialect is converted into a hardware-specific dialect, which is a hardware-related dialect based on the MLIR framework and is used to represent hardware-oriented computational logic. Based on the hardware-specific dialect, generate source code using a general programming language; The compiler tool based on the low-level virtual machine LLVM corresponding to the target chip is invoked to generate target code based on the source code using the general programming language. The step of generating source code using a general-purpose programming language based on the hardware-specific dialect includes: Based on the hardware-specific dialect, C / C++ source code is generated using the EmitC code generation tool in the MLIR framework.

2. The method according to claim 1, characterized in that, The process of converting the Triton dialect into a hardware-specific dialect includes: The Triton dialect is converted into a linear algebra dialect, which is the dialect used in the MLIR framework to represent linear algebra computation operations; The linear algebra dialect is converted into the hardware-specific dialect.

3. The method according to claim 2, characterized in that, The process of converting the Triton dialect into a hardware-specific dialect further includes: The arithmetic operations in the Triton dialect are converted into an arithmetic dialect and / or a mathematical dialect, wherein the arithmetic dialect is a dialect in the MLIR framework used to represent mathematical arithmetic operations, and the mathematical dialect is a dialect in the MLIR framework used to represent mathematical function operations; The arithmetic dialect and / or the mathematical dialect are converted into the hardware-specific dialect.

4. The method according to claim 2, characterized in that, The process of converting the Triton dialect into a hardware-specific dialect further includes: The tensor representation in the Triton dialect is converted into a tensor dialect, which is the dialect used in the MLIR framework to represent tensor operations; The tensor dialect is converted into the hardware-specific dialect.

5. The method according to claim 2, characterized in that, The process of converting the Triton dialect into a hardware-specific dialect further includes: The Structured Control Flow (SCF) in the Triton dialect is converted into the SCF dialect, which is the dialect used in the MLIR framework to represent the operations of SCF. The SCF dialect is converted into the hardware-specific dialect.

6. The method according to claim 2, characterized in that, The step of converting the linear algebra dialect into the hardware-specific dialect includes: The linear algebra dialect is converted into an affine dialect and / or a vector dialect, wherein the affine dialect is the dialect used in the MLIR framework to represent affine transformations and loop operations, and the vector dialect is the dialect used in the MLIR framework to represent vector operations. Convert the affine dialect and / or the vector dialect into the hardware-specific dialect.

7. An operator compilation apparatus, characterized in that, include: The acquisition module is used to acquire the source code of the operator to be compiled, wherein the source code of the operator is written in a domain-specific language based on Triton; The conversion module is used to convert the operator source code into the Triton dialect for hardware-independent optimization. The Triton dialect is a hardware-independent dialect based on the multi-level intermediate representation (MLIR) framework, used to represent the computational logic of the operator source code. The module also converts the Triton dialect into a hardware-specific dialect, which is a hardware-dependent dialect based on the MLIR framework, used to represent hardware-oriented computational logic. A generation module is used to generate source code using a general programming language based on the specific dialect of the hardware. The compiler tool based on the low-level virtual machine LLVM corresponding to the target chip is invoked to generate target code based on the source code using the general programming language. The generation module is specifically used to generate C / C++ source code based on the hardware-specific dialect and the EmitC code generation tool in the MLIR framework.

8. An electronic device, characterized in that, The electronic device includes: a processor, a memory, and a communication interface; the memory and the communication interface are coupled to the processor, the memory is used to store computer program code, the computer program code including computer instructions; wherein, when the processor executes the computer instructions, the electronic device performs the method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, the computer program including program instructions, which, when executed by a processor, perform the method as described in any one of claims 1 to 6.

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