Network card drive optimization method and device, equipment and storage medium
By building an interrupt behavior state model and optimizing the interrupt path, the optimal interrupt processing core is dynamically selected, which solves the problem of low resource utilization of network card drivers in multi-core server environments and achieves more efficient interrupt processing and resource utilization.
Patent Information
- Application Number
- CN202510817408.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-18
- Publication Date
- 2025-09-16
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Existing network card drivers lack adaptive scheduling capabilities in multi-core server environments, resulting in low resource utilization. Especially when CPU resource allocation is tight, it is easy to cause some cores to have long interrupt queues and other cores to be idle and wasted.
By constructing an interrupt behavior state model, determining the interrupt merging factor and throttling parameters of the hardware interrupt response, generating a merging control strategy, optimizing the interrupt path, and dynamically selecting the optimal interrupt processing core based on the interrupt response state table and original running data, batch scheduling of soft interrupt threads is realized.
It improves the interrupt handling efficiency and resource utilization of multi-core processors, reduces resource idling and core migration overhead, and improves overall data processing efficiency.
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Figure CN120653591A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of network card technology, and in particular to a network card driver optimization method, device, equipment and storage medium. Background Art
[0002] As data centers continue to demand high-throughput, low-latency network communications, the performance bottleneck of network interface card drivers within the operating system's network protocol stack is becoming increasingly prominent. In typical multi-core server environments, the high frequency of network interrupts and softirq scheduling delays become key factors impacting overall data processing efficiency. This is particularly true in business scenarios with severe load fluctuations or bursts of incoming data packets, such as high-concurrency microservice gateways or containerized network ingresses. The system kernel often experiences interrupt storms, softirq thread starvation, or imbalanced CPU affinity policies, leading to receive queue congestion, packet processing delays, jitter, and even packet loss.
[0003] Taking a typical multi-queue network interface card (such as a 10GbE NIC supporting RSS) as an example, when traffic bursts occur, interrupt requests from multiple DMA (Direct Memory Access) receive rings may be triggered concurrently. However, most current mainstream drivers use static affinity strategies or simple round-robin scheduling to handle the binding of hard and soft interrupt resources, lacking dynamic awareness and feedback adjustment mechanisms for the current system load status. This approach, lacking adaptive scheduling capabilities, often fails to fully utilize the concurrent processing capabilities of multi-core environments. Especially when CPU resources are tight, it can easily lead to long interrupt queues on some cores, while other cores remain idle and wasteful. Summary of the Invention
[0004] The present application provides a network card driver optimization method, apparatus, device and storage medium for solving the problem of low resource utilization caused by the lack of adaptive scheduling capability in static affinity strategies or simple round-robin scheduling in related technologies.
[0005] A first aspect of the present application provides a network card driver optimization method, the network card driver optimization method comprising: By analyzing the original operation data of network card interruption, an interruption behavior state model is constructed; Resetting the throttling counter in the driver interrupt path based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined by the interrupt behavior state model to generate a merging control strategy; Polling and reading the usage status of the buffer in the network card DMA receiving ring according to the merging control strategy, and updating the interrupt response status table based on the usage status; Determine an optimal interrupt processing core set according to the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy; The data packets to be processed in the receiving queue are grouped according to the interrupt affinity mapping strategy, and the soft interrupt threads of the corresponding groups are scheduled in batches based on the different soft interrupt priority levels of the groups.
[0006] Optionally, in a first implementation of the first aspect of the present application, the step of constructing an interruption behavior state model by analyzing original operation data of the network card interruption includes: The original operation data of the network card interrupt is obtained based on the probe component preset in the operating system kernel space, and a data collection vector group is constructed; Obtaining statistical results of the interrupt trigger cycle pattern, resource contention index, and receiving queue saturation rate by performing time window segmentation and sliding aggregation on the data acquisition vector group; Based on the statistical results and a preset behavior classification rule set, multi-dimensional clustering and classification judgment are performed on the interruption triggering events to determine the corresponding interruption load level label; An interruption behavior state model is generated by associating and labeling the interruption load level label with the data acquisition vector group.
[0007] Optionally, in a second implementation of the first aspect of the present application, the step of resetting the throttling counter in the driver interrupt path based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined based on the interrupt behavior state model to generate a merging control strategy includes: Determine a corresponding interrupt merging factor set and a throttling parameter interval according to the interrupt load level label and the soft interrupt queue depth recorded in the interrupt behavior state model, and map the interrupt merging factor set and the throttling parameter interval to an interrupt configuration template table supported by the driver; By performing parameter fitting and matching on the interrupt configuration template table, the interrupt trigger threshold, interrupt merging timing parameter and soft interrupt delay threshold corresponding to the current system state are extracted to generate a merging control item; The throttling counter and the interrupt triggering flag of the driving interrupt path are synchronously reset according to the merging control item to construct a merging control strategy.
[0008] Optionally, in a third implementation of the first aspect of the present application, the merge control strategy includes a buffer utilization query cycle, and the step of polling and reading the usage status of the buffer in the network card DMA receive ring according to the merge control strategy, and updating the interrupt response status table based on the usage status, includes: Read the effective load identifier of each buffer in the network card DMA receiving ring according to the interrupt trigger threshold value of the merge control strategy and the buffer utilization query period polling, and build a buffer status byte stream; By performing interval aggregation and tag extraction on the buffer state byte stream, the write pointer movement rate, remaining space ratio and continuous write segment length corresponding to each buffer are obtained, and a buffer usage statistics graph is generated; According to the buffer usage statistics and the soft interrupt delay threshold, a hierarchical judgment is made on the current DMA buffer usage status to determine whether to trigger an interrupt response suspension flag and lock a corresponding queue processing identifier; The judgment result is associated with the DMA receiving ring state data and coded, and the interrupt response state table is updated.
[0009] Optionally, in a fourth implementation of the first aspect of the present application, the step of determining an optimal interrupt processing core set based on the interrupt response status table and the original operation data, and generating a corresponding interrupt affinity mapping strategy includes: Constructing a processing load distribution matrix based on the interrupt trigger frequency, interrupt pending flag, and corresponding write pointer update rate of each DMA receiving ring in the interrupt response status table, and generating a core load vector set in combination with the CPU core usage in the original operation data; Extracting an inter-core interruption affinity score matrix by performing linear fitting and gradient inversion on the processing load distribution matrix and the core load vector set, and determining a candidate processing core set according to a preset affinity migration rule; According to the affinity distribution weights of the candidate processing core sets and the corresponding core idle time slot widths, a core matching graph is constructed, and the optimal interrupt processing core set corresponding to the current interrupt processing task is selected based on the minimum path cost strategy; The optimal interrupt processing core set is bound to the hard interrupt identifier of each receiving queue to generate an interrupt affinity mapping strategy.
[0010] Optionally, in a fifth implementation of the first aspect of the present application, the step of grouping the to-be-processed data packets in the receive queue according to the interrupt vector dispatch table, and batch scheduling the softirq threads of the corresponding groups based on the different softirq priority levels of the groups includes: Obtaining a hard interrupt distribution index table of data packets to be processed by the driver layer according to the interrupt affinity mapping strategy, and constructing a soft interrupt grouping list by performing queue-level segmentation and soft interrupt priority label screening on the index table; extracting a short-term traffic peak sequence by normalizing and aggregating queue traffic statistics corresponding to each group in the soft interrupt group list; Determine the group-level scheduling reservation window and the corresponding soft interrupt thread startup configuration item based on the peak sequence and the historical soft interrupt ready delay interval; According to the scheduling reserved window and the soft interrupt thread startup configuration item, the soft interrupt group list is sorted by batch scheduling to generate a soft interrupt scheduling sequence table; According to the mapping relationship between the thread number of each scheduling batch and the corresponding receiving queue in the soft interrupt scheduling sequence table, each soft interrupt group is scheduled in batches by controlling the preloading sequence of thread switching in the soft interrupt thread pool.
[0011] Optionally, in a sixth implementation of the first aspect of the present application, the method further includes: Constructing an interrupt trigger context identifier based on the interrupt processing context information in the current interrupt service routine, and generating an interrupt return control block by associating and extending the context identifier; Generate a traceable context snapshot by synchronously encapsulating the state parameters of the interrupt return control block; According to the soft interrupt processing delay distribution and the data reception completion bitmap recorded in the context snapshot, determining whether there is a processing omission flag or a re-entry flag, and generating a corresponding rescheduling trigger condition set and resource reconstruction flag group; By performing priority judgment on the rescheduling trigger condition set and the resource reconstruction flag group, a recovery strategy for the interruption return path is determined, and a recovery parameter set for the interruption return path is dynamically configured according to the recovery strategy.
[0012] A second aspect of the present application provides a network card driver optimization device, which is used to implement a network card driver optimization method. The network card driver optimization device includes: A construction module is used to construct an interruption behavior state model by analyzing the original operation data of the network card interruption; a generating module, configured to reset a throttling counter in a driver interrupt path based on an interrupt merging factor and a throttling parameter of a hardware interrupt response determined by the interrupt behavior state model, and generate a merging control strategy; An updating module, configured to poll and read the usage status of a buffer in a DMA receiving ring of a network card according to the merging control strategy, and update an interrupt response status table based on the usage status; a determination module, configured to determine an optimal interrupt processing core set according to the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy; The scheduling module is used to group the data packets to be processed in the receiving queue according to the interrupt affinity mapping strategy, and to schedule the soft interrupt threads of the corresponding groups in batches based on the different soft interrupt priority levels of each group.
[0013] A third aspect of an embodiment of the present application provides an electronic device, comprising a memory and a processor, wherein the processor is used to execute a computer program stored on the memory. When the processor executes the computer program, it implements the steps of the network card driver optimization method provided in the first aspect of the embodiment of the present application.
[0014] The fourth aspect of the embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the network card driver optimization method provided in the first aspect of the embodiment of the present application are implemented.
[0015] In summary, according to the network card driver optimization method, device, equipment and storage medium provided by the present application, an interrupt behavior state model is constructed by analyzing the original operation data of the network card interrupt; based on the interrupt merging factor and throttling parameters of the hardware interrupt response determined by the interrupt behavior state model, the throttling counter in the driver interrupt path is reset to generate a merging control strategy; according to the merging control strategy, the usage status of the buffer in the network card DMA receiving ring is polled and read, and the interrupt response status table is updated based on the usage status; according to the interrupt response status table and the original operation data, the optimal interrupt processing core set is determined to generate a corresponding interrupt affinity mapping strategy; according to the interrupt affinity mapping strategy, the data packets to be processed in the receiving queue are grouped, and the soft interrupt threads of the corresponding groups are scheduled in batches based on the different soft interrupt priority levels of each group. Through the implementation of the present application, by constructing a dynamic interrupt affinity mapping strategy and combining the real-time load distribution and the CPU idle state to dynamically select the interrupt processing core, the adaptive allocation of interrupt scheduling is realized, the resource idling and core migration overhead are reduced, and the interrupt processing efficiency and resource utilization of the multi-core processor are effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 A flowchart of a network card driver optimization method provided in an embodiment of the present application; Figure 2 A schematic diagram of the program modules of the network card driver optimization device provided in an embodiment of the present application; Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0017] In order to make the purpose, features, and advantages of the invention of this application more obvious and easy to understand, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of this application.
[0018] In order to solve the problem of low resource utilization caused by the lack of adaptive scheduling capability in static affinity strategy or simple polling scheduling in related technologies, the embodiment of the present application provides a network card driver optimization method, such as Figure 1 This is a flow chart of the network card driver optimization method provided in this embodiment. The network card driver optimization method includes the following steps: Step 110: Build an interruption behavior state model by analyzing the original operation data of the network card interruption.
[0019] Specifically, by analyzing the raw operational data of network card interrupts, the technology employed primarily involves continuous monitoring of interrupt events using a probe mechanism within the operating system kernel space. Data acquisition vectors are then used to record multi-dimensional metrics such as interrupt trigger frequency, response latency, and queue usage. Sliding time window technology is then used to periodically aggregate and extract features from the raw data, generating state data that reflects interrupt behavior patterns. Subsequently, the extracted features are subjected to multi-dimensional clustering and classification using a pre-defined set of behavior classification rules, generating a set of labels describing different interrupt states and ultimately constructing a complete interrupt behavior state model.
[0020] In an optional implementation of this embodiment, the steps of constructing an interrupt behavior state model by analyzing the original operation data of the network card interrupt include: obtaining the original operation data of the network card interrupt according to the probe component preset in the operating system kernel space, and constructing a data acquisition vector group; obtaining the statistical results of the interrupt trigger cycle pattern, resource contention index and receiving queue saturation rate by time window segmentation and sliding aggregation of the data acquisition vector group; performing multi-dimensional clustering and classification judgment on the interrupt triggering events according to the statistical results combined with the preset behavior classification rule set to determine the corresponding interrupt load level label; and generating an interrupt behavior state model by associating and labeling the interrupt load level label with the data acquisition vector group.
[0021] Specifically, to obtain and analyze the operational characteristics of network interface card interrupts, it is first necessary to rely on a probe component deployed in the operating system kernel space to obtain the raw operational data of the network interface card interrupt. This probe component is a lightweight kernel monitoring tool embedded in a key location in the interrupt processing path. It can intercept and record in real time the interrupt trigger timestamp, interrupt number, corresponding CPU core number, trigger source (such as the receive or transmit queue), soft interrupt context switch information, and DMA buffer status, among other raw signals. This method establishes a time series of interrupt events and organizes the collected data into a structured multidimensional vector, constructing a data acquisition vector group. This forms a continuous, high-frequency, and realistic monitoring basis for the interrupt response behavior of the network interface card under actual operating conditions. For example, one dimension in the vector can represent the number of receive interrupt triggers per unit time, while another dimension can record the number of context switches on the CPU during this period, effectively capturing the system load impact caused by interrupts. The constructed data acquisition vector groups are then subjected to time window segmentation and sliding aggregation. This approach uses fixed-length time slices as analysis units, chronologically dividing the original vector stream into multiple segments. Statistical aggregation operations are then performed on the vector data within each time slice, such as calculating the mean, maximum, variance, and distribution interval of the trigger interval. To avoid information loss due to window boundaries, a sliding window mechanism is introduced, which sets a certain overlap ratio between time windows (e.g., 50%) to ensure a more continuous and context-sensitive analysis. This step aims to extract stable interrupt trigger cycle patterns and further derive resource contention metrics (such as the overlap between CPU utilization and other I / O events during the interrupt trigger period) and queue saturation (indicating whether the available space in the DMA receive ring queue is consistently near a critical value). For example, if the receive interrupt trigger frequency is extremely high and the remaining buffer space is often close to zero within multiple consecutive windows, it can be determined that the system is experiencing interrupt response overload. Based on the corresponding statistical results, multi-dimensional clustering and classification of interrupt events are performed in conjunction with a predefined set of behavioral classification rules. The behavioral classification rule set is a set of judgment criteria constructed based on empirical observation and manual annotation of large amounts of interrupt operation data. It typically includes rules combining dimensions such as interrupt triggering cycle ranges (e.g., high / medium / low), resource contention levels (high / medium / low), buffer utilization intervals, and soft interrupt queue depths. When performing cluster analysis, a density-based spatial clustering algorithm can be used to cluster vectors. The clustering results are then combined with lightweight models such as classification trees or logistic regression to determine interrupt load level labels. For example, if samples within a particular cluster exhibit high triggering frequency, high contention metrics, and significant soft interrupt processing delays, the cluster can be labeled as "heavy." These interrupt load level labels are then associated with the original data acquisition vectors in a one-to-one correspondence. This means that the corresponding state label is embedded in each original vector record, forming a labeled interrupt behavior state set. This is then used to generate an interrupt behavior state model.This model is not only temporal but also explanatory, and can serve as a reference for dynamic scheduling strategy switching under different system operating conditions. For example, if the model reflects that most queues are under light load at a certain stage, soft interrupt processing can be appropriately delayed to reduce the number of context switches in the CPU core. However, if the model determines that some queues are already under medium to high load levels, the merging control strategy and interrupt affinity adjustment mechanism should be immediately activated to alleviate resource bottlenecks. Therefore, this behavioral state model plays a key role in the entire drive scheduling system, providing precise contextual input for subsequent throttling tuning, interrupt affinity mapping, and soft interrupt scheduling.
[0022] Step 120 : Based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined by the interrupt behavior state model, the throttling counter in the driver interrupt path is reset to generate a merging control strategy.
[0023] Specifically, based on the interrupt merging factor and throttling parameters determined in the interrupt behavior state model, a parameter reset mechanism for the throttling counter is introduced in the driver's intermediate path. By cross-matching the soft interrupt queue depth and the interrupt load level, the appropriate interrupt merging threshold, interrupt trigger delay, and soft interrupt trigger threshold for the current environment are determined. These parameters are matched to the driver interrupt configuration template through a table lookup, and the throttling counter and interrupt trigger flag are synchronously adjusted in the driver interrupt path, forming a dynamically adaptable merging control strategy to control the interrupt trigger frequency and data processing rhythm.
[0024] In an optional implementation of this embodiment, the interrupt merging factor and throttling parameters of the hardware interrupt response determined based on the interrupt behavior state model are used to reset the throttling counter in the driver interrupt path, and the steps of generating a merging control strategy include: determining the corresponding interrupt merging factor set and throttling parameter interval according to the interrupt load level label and soft interrupt queue depth recorded in the interrupt behavior state model, and mapping the interrupt merging factor set and throttling parameter interval to the interrupt configuration template table supported by the driver; extracting the interrupt trigger threshold value, interrupt merging timing parameters and soft interrupt delay threshold corresponding to the current system state by performing parameter fitting and matching on the interrupt configuration template table, and generating a merging control item; synchronously resetting the throttling counter and interrupt trigger flag of the driver interrupt path according to the merging control item, and constructing a merging control strategy.
[0025] Specifically, to achieve dynamic throttling optimization of interrupt paths, the corresponding interrupt merging factor set and throttling parameter range are determined based on two core parameters recorded in the interrupt behavior state model: the interrupt load level label and the soft interrupt queue depth. The interrupt load level label represents the intensity and density of interrupt triggering in the current system within a certain time period. It is usually classified by clustering and statistical methods, such as "light load," "medium load," or "heavy load." The soft interrupt queue depth reflects the backlog of soft interrupt threads caused by factors such as resource preemption and scheduling delays when the kernel processes network data. The larger the queue depth, the less timely the system response to interrupt processing and the presence of a certain degree of interrupt congestion. Therefore, by analyzing the load level and queue depth in conjunction, it is possible to determine whether the system needs to merge interrupt events, extend the trigger period, or reduce the interrupt wakeup frequency. To implement the above analysis results in the driver, it is necessary to map the determined interrupt merging factor set and throttling parameter range to the interrupt configuration template table supported by the driver based on the existing driver interrupt control policy structure. This template table is a predefined parameter table within the driver. It records acceptable threshold combinations for various interrupt handling strategies, such as the interrupt trigger threshold (which controls the amount of data in the DMA buffer required to trigger an interrupt), the interrupt coalescing timer (which sets the minimum time between interrupts), and the soft interrupt delay threshold (which indicates the maximum delay before soft interrupt processing). By searching for parameter intervals that match the current load state and comparing them with the pattern entries corresponding to the interrupt coalescing factor set, the template table can extract the most appropriate set of control parameters for the current system state. For example, in a "heavy load + high queue depth" scenario, the template table might return a combination of high thresholds, long coalescing delays, and minimum soft interrupt delays to alleviate interrupt pressure. Based on this extracted set of control parameters, a specific coalescing control item is generated. The coalescing control item is a parameter structure used to reset key control units in the driver's interrupt path. It primarily includes the throttle counter initialization value, the interrupt trigger flag clearing rules, and the interrupt polling interval adjustment strategy. The throttle counter is an internal register that controls the interrupt trigger frequency. The throttle counter decrements to zero before the next interrupt is allowed to occur. Properly configuring this value can effectively reduce the CPU load caused by frequent interrupt triggering. The interrupt trigger flag indicates whether the current buffer has met the interrupt trigger conditions. Resetting this flag can prevent frequent interrupt triggering due to data fluctuations in a short period of time. By writing the numerical parameters extracted from the merge control items into the driver interrupt path control logic, the system can dynamically adjust the interrupt rhythm without interrupting current communications, achieving real-time regulation of interrupt frequency and self-balancing of system load. The merge control strategy, also known as the merge control structure, is essentially a mechanism that dynamically adjusts interrupt triggering behavior to reduce interrupt frequency and improve processing efficiency.This strategy does not trigger an interrupt immediately every time a data packet is received. Instead, it delays and merges interrupt triggers appropriately based on the current system load and data reception status, thereby reducing the frequent interruptions of the CPU in high-concurrency scenarios. As the merging control strategy is constructed, the behavior in the interrupt processing path will automatically switch to the corresponding interrupt merging mode according to the current load status, thereby reducing the interrupt triggering frequency, reducing the response pressure of the CPU core under high-load conditions, and improving the overall processing throughput of the packet receiving queue. For example, in the stage of network burst traffic, by extending the merging timer and increasing the DMA buffer trigger threshold, the interrupt triggering can be delayed without sacrificing data integrity, so that the system has enough time to clear the backlog of data packets from the previous batch of processing, thereby achieving the purpose of load adaptation.
[0026] Step 130: poll and read the usage status of the buffer in the network card DMA receiving ring according to the merge control strategy, and update the interrupt response status table based on the usage status.
[0027] Specifically, after the merge control strategy is generated, the usage status of the network card's DMA receive ring buffer is read by setting a polling cycle. Technically, this involves scanning and comparing the buffer's payload flags to construct a continuous buffer status byte stream within the specified query cycle. Dynamic indicators such as pointer movement rate, remaining space ratio, and write segment length are combined to generate a usage statistics graph reflecting the cache's operating status, which can be used to determine whether the buffer is saturated or idle. The soft interrupt delay threshold is combined with the processing status of the DMA receive queue to determine whether the interrupt is pending. The interrupt response status table is then updated in real time, providing support for core selection and task allocation.
[0028] In an optional implementation of this embodiment, the steps of polling and reading the usage status of the buffer in the network card DMA receiving ring according to the merge control strategy, and updating the interrupt response status table based on the usage status include: polling and reading the effective load identifier of each buffer in the network card DMA receiving ring according to the interrupt trigger threshold value of the merge control strategy and the buffer utilization query cycle, and constructing a buffer status byte stream; obtaining the write pointer movement rate, remaining space ratio and continuous write segment length corresponding to each buffer by performing interval aggregation and tag extraction on the buffer status byte stream, and generating a buffer usage statistics graph; performing a hierarchical judgment on the current DMA buffer usage status according to the buffer usage statistics graph and the soft interrupt delay threshold, determining whether to trigger the interrupt response suspension flag and lock the corresponding queue processing identifier; associating and encoding the judgment result with the DMA receiving ring status data, and updating the interrupt response status table.
[0029] Specifically, in this embodiment, the status of each buffer in the NIC's DMA receive ring is polled and sampled based on the interrupt trigger threshold and buffer utilization query cycle. The interrupt trigger threshold refers to the minimum amount of data accumulation required to trigger an interrupt, which is used to determine whether the data meets the critical condition for interrupt processing. The buffer utilization query cycle defines the interval at which the driver regularly checks DMA buffer usage. The core of the polling read operation is to access the descriptor item on the DMA ring corresponding to each receive queue, extract the payload identifier, and determine whether the corresponding buffer has been written by the NIC and has not yet been processed. The buffer status byte stream is then sequentially constructed in byte form. This byte stream uses each descriptor as a basic unit and uniformly records its validity, write offset, and position index in the ring queue. The purpose of this construction is to provide the driver layer with a comprehensive description of the current DMA buffer usage status. For example, a receive ring with a length of 1024 bytes forms a 1024-byte status stream, with each bit indicating whether the location contains valid data. After the buffer status byte stream is constructed, it is segmented and labeled. A sliding window is used to divide the stream into continuous regions, and the payload density of each segment is calculated. Interval aggregation combines consecutive segments of buffer descriptor status into a single aggregate statistical unit to reduce processing overhead and capture local trends in buffer writes. Tag extraction analyzes the length of continuous data writes, the number of intermittent segments, and the maximum free span within each aggregate segment. The extraction results are used to calculate the write pointer movement rate for each buffer—the change in the number of payload writes per unit time. Combined with the total number of descriptors and the number of free items, the free space ratio is further inferred. The length of consecutive write segments is also recorded to determine the NIC's write activity in that buffer. This statistical information is plotted as a buffer usage chart, which visualizes the DMA ring buffer's fill efficiency, write patterns, and burst behavior during the current query cycle. For example, in high-traffic burst scenarios, the buffer usage chart will show rapid write pointer movement, an increase in consecutive write segments, and a decrease in the free ratio. The current DMA buffer status is graded based on this buffer usage chart and the soft interrupt latency threshold. The soft interrupt latency threshold is the soft interrupt suspension tolerance set in the interrupt response logic to avoid frequent triggering. It determines whether interrupt processing can be delayed if the receive ring is not fully filled. The buffer status classification judgment is based on a preset rule set, mainly evaluating whether the current buffer utilization is close to the limit, whether the write rate continues to rise, and whether the continuous write area reaches the trigger threshold. If the above conditions are met at the same time or some conditions exceed the statistical warning value, the queue corresponding to the current buffer is marked as a high-risk state at the driver layer, and the interrupt response suspension flag is triggered to suspend interrupt signal reporting.The suspend operation avoids repeatedly waking up the interrupt handling thread within a short period of time, improving overall system responsiveness. Furthermore, by locking the queue processing flag, the current buffer space is identified as a priority clearing area, prioritizing these packets in subsequent scheduling and preventing data loss. For example, in high-speed network access scenarios, frequent interrupts can lead to a surge in CPU load. This mechanism can proactively adjust the processing cadence before buffer criticality is reached. Finally, the judgment result is associated with the DMA receive ring status data and encoded to form a structured identifier, which is then updated in the interrupt response status table. This association encoding combines the aforementioned suspend flag and queue processing lock bit with basic information such as the current valid item index, write pointer position, and ring utilization in the DMA ring to generate a status identifier packet used for interrupt scheduling decisions and store it in the interrupt response status table. The interrupt response status table is a core structure used by the kernel driver layer to track the interrupt processing status of each receive queue. It records information such as the number of interrupts handled, the number of suspensions, the last processing time, and buffer usage for each queue. Updating this table provides state traceability and the ability to backtrack processing behavior throughout the interrupt control mechanism. For example, in the next scheduling cycle, the system can use this status table to determine which queues should prioritize activating processing threads or deferring interrupts, further improving resource scheduling rationality and network receive throughput efficiency. Through a complete data collection, statistics, judgment, and structured writing process, efficient management of DMA buffer status and dynamic regulation of interrupt response behavior are achieved.
[0030] Step 140: Determine the optimal interrupt processing core set according to the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy.
[0031] Specifically, based on the interrupt response status table and the original operating data, combined with the trigger frequency, suspension status and pointer movement characteristics of each DMA ring, a processing load distribution matrix is constructed, and the load vector of the current core is extracted in combination with the operating status of the CPU core. Linear fitting and gradient inversion techniques are used to fit the relationship between load and interrupt response to form an inter-core interrupt affinity scoring matrix. Further, the preset migration rules are combined with the idle time slot width of the processing core to extract the affinity distribution weight and construct a core matching map. Finally, the minimum path cost algorithm is used to screen out the current optimal interrupt processing core set, and this set is bound to the specific network card receive queue to generate an interrupt affinity mapping strategy.
[0032] In an optional implementation of the present embodiment, the steps of determining the optimal interrupt processing core set based on the interrupt response status table and the original operation data and generating the corresponding interrupt affinity mapping strategy include: constructing a processing load distribution matrix based on the interrupt trigger frequency, interrupt suspension flag and corresponding write pointer update rate of each DMA receiving ring in the interrupt response status table, and generating a core load vector set in combination with the CPU core usage in the original operation data; extracting the inter-core interrupt affinity scoring matrix by linear fitting and gradient inversion of the processing load distribution matrix and the core load vector set, and determining the candidate processing core set according to the preset affinity migration rule; constructing a core matching map based on the affinity distribution weights of the candidate processing core set and the corresponding core idle time slot width, and screening the optimal interrupt processing core set corresponding to the current interrupt processing task based on the minimum path cost strategy; binding the optimal interrupt processing core set to the hard interrupt identifier of each receiving queue to generate an interrupt affinity mapping strategy.
[0033] Specifically, in this embodiment, a processing load distribution matrix is constructed based on the operational metrics of each DMA (Direct Memory Access) receive loop recorded in the interrupt response status table. This status table includes several key fields, including the interrupt trigger frequency, which reflects the activity of interrupt events per unit time in the receive loop; the interrupt pending flag, which indicates whether there are any pending interrupt requests; and the write pointer update rate, which quantifies the dynamic speed of data writes to the receive buffer, thereby indirectly reflecting the intensity and fluctuation of the current receive data stream. By extracting these metrics and expanding them to construct a two-dimensional matrix based on the number of DMA loops, a load distribution graph is formed, with the receive loop as the primary index and the load status within the time series as the characteristic dimension. This accurately depicts the spatial distribution and temporal variation of network interface card interrupt processing requirements on each receive channel. To coordinately optimize the aforementioned network load and CPU core resource allocation, a core load vector set is constructed based on CPU core usage obtained from raw operational data. This vector set describes performance metrics such as average utilization, task context switch frequency, and soft interrupt readiness latency for each core within a given time window, reflecting the current scheduling pressure and responsiveness of each core. For example, if a CPU core's utilization is close to 100% and context switches frequently occur, its scheduling bandwidth is fully utilized and it is unsuitable for handling additional interrupt processing tasks. By linearly fitting this vector set to the aforementioned load distribution matrix, a direct mapping between network receive pressure and core processing capacity can be achieved. This results in an affinity scoring matrix that contains the fitted relationships between all cores and DMA loops. The elements of this matrix represent the estimated scores for processing efficiency and response latency if a CPU core handles an interrupt from a specific receive loop. By applying preset affinity migration rules to the affinity scoring matrix, a set of candidate processing cores can be identified. Affinity migration rules are a set of empirically defined constraints designed to avoid scheduling oscillations caused by frequent interrupt migration. For example, a rule might require that if the difference in affinity score between the current core and a candidate core does not exceed a set threshold, and the average response latency of the current core's past N scheduled interrupts exceeds a certain upper limit, migration to a candidate core with a higher score is permitted. This rule can be used to filter out cores that are unworthy of migration or too expensive to migrate, thereby forming a set of candidate cores that offer advantages in both processing capacity and affinity. Next, a core matching graph is constructed based on the affinity distribution weights and the CPU core idle slot widths. The affinity distribution weights are derived from the normalized affinity scores of each core relative to a specific DMA ring in the scoring matrix, while the idle slot width reflects the estimated schedulable time window before the core can process the next round of interrupt tasks. For example, if a core is not currently blocked by high-priority tasks and has low scheduling latency, its idle slot is wider and its scheduling priority is higher.By weightedly combining the two metrics above, a matching graph is formed, with DMA rings as nodes and CPU cores as targets. Based on the minimum path cost strategy, a set of connections with the lowest path cost is selected between each DMA ring and its candidate cores. Path cost is evaluated based on the inverse of affinity plus an idle bandwidth exhaustion risk indicator. The selected optimal interrupt handling core set is then associated with the hard interrupt identifiers in each receive queue to generate an interrupt affinity mapping strategy. The interrupt affinity mapping strategy, also known as the interrupt affinity mapping structure, is a data mapping table that guides the driver layer to automatically dispatch interrupt tasks to specific CPU cores after an interrupt is triggered, enabling targeted delivery of hard interrupts to specific cores. This mechanism allows the system to dynamically adjust interrupt scheduling strategies based on network traffic and core resource availability, significantly reducing interrupt processing latency and improving the parallelism and accuracy of resource scheduling in multi-core systems. For example, in a high-concurrency network scenario, if a core becomes saturated, its corresponding interrupt task will be migrated to a nearby idle core in the next mapping round, ensuring stable and sustainable operation of the overall system processing path.
[0034] Step 150: Group the data packets to be processed in the receiving queue according to the interrupt affinity mapping strategy, and schedule the softirq threads of the corresponding groups in batches based on the different softirq priority levels of the groups.
[0035] Specifically, according to the interrupt affinity mapping strategy, the interrupt distribution index of the data packets to be processed in the driver receiving queue is extracted and classified to form a soft interrupt group list. By extracting the real-time traffic statistics of the queues in each group, a short-term peak sequence is obtained after normalization, and the startup configuration items and scheduling windows of the soft interrupt thread are determined in combination with the historical soft interrupt processing delay interval. The scheduling configuration is used to batch divide and schedule the soft interrupt list to generate a soft interrupt scheduling sequence table. Then, based on the mapping relationship between the thread number and the receiving queue in the table, a preload sequence in the soft interrupt thread pool is generated, and batch scheduling is performed on each group of soft interrupt threads, so that the processing tasks are more reasonably allocated in terms of time and resource dimensions.
[0036] In an optional implementation of the present embodiment, the steps of grouping the data packets to be processed in the receiving queue according to the interrupt vector dispatch table, and batch scheduling the soft interrupt threads of the corresponding groups based on the different soft interrupt priority levels of each group include: obtaining the hard interrupt distribution index table of the data packets to be processed by the driver layer according to the interrupt affinity mapping strategy, and constructing a soft interrupt group list by performing queue-level segmentation and soft interrupt priority label screening on the index table; extracting the short-term traffic peak sequence by normalizing and aggregating the queue traffic statistical information corresponding to each group in the soft interrupt group list; determining the group-level scheduling reservation window and the corresponding soft interrupt thread startup configuration item based on the peak sequence and the historical soft interrupt ready delay interval; performing batch-level scheduling sorting on the soft interrupt group list according to the scheduling reservation window and the soft interrupt thread startup configuration item to generate a soft interrupt scheduling sequence table; and scheduling each soft interrupt group in batches by controlling the preloading sequence of thread switching in the soft interrupt thread pool according to the mapping relationship between the thread number of each scheduling batch and the corresponding receiving queue in the soft interrupt scheduling sequence table.
[0037] Specifically, in this embodiment, during the soft interrupt scheduling optimization process, the driver layer extracts a hard interrupt distribution index table for pending data packets based on the interrupt affinity mapping strategy. The interrupt affinity mapping strategy is a mapping table generated by the network card driver during the interrupt initialization phase, defining which CPU core should handle each hard interrupt event in each receive queue. The hard interrupt distribution index table is a data structure dynamically generated during runtime by monitoring the actual distribution of interrupt events. Its contents include the interrupt number, the number of the corresponding receive queue, the ID of the target core, and the index of the data packet attached to the interrupt. Extracting this index table is crucial for constructing a preliminary organizational view of the received data stream at the driver layer, thereby preparing for subsequent soft interrupt scheduling. For example, if multiple receive queues are found to be converging on the same core with too many interrupt events, this may cause soft interrupt thread response delays. Based on this index table, each receive queue is segmented at the queue level and filtered using soft interrupt priority tags to construct a soft interrupt group list. The soft interrupt priority tag is a kernel scheduling attribute that indicates the scheduler weight of the soft interrupt threads corresponding to different interrupt types. For example, network receive threads typically have a higher priority. Through queue-level segmentation, hard interrupt events with the same delivery target core and soft interrupt type can be grouped together for batch scheduling. The purpose of constructing a soft interrupt group list is to create a data structure with clear and well-defined schedulable units, assigning specific scheduling resources to each group to avoid resource contention. For example, high-frequency UDP packets and TCP retransmission packets are placed in different groups to prevent processing imbalances caused by priority misalignment. Next, queue traffic statistics corresponding to each group are extracted and aggregated through normalization to generate a short-term traffic peak sequence. Queue traffic statistics typically include metrics such as the number of queue write pointer movements per unit time, average packet size, and burst traffic ratio. Normalization involves mapping traffic data from different queues to the same evaluation range using the same dimension, enabling fair comparison across multiple groups. Aggregating and analyzing normalized traffic values through a sliding time window captures the peak data load borne by each group in the current system and extracts a short-term traffic peak sequence. This sequence reflects the current processing pressure borne by each soft interrupt group and serves as an important basis for assessing scheduling urgency and processing resource allocation strategies. For example, if a packet's traffic utilization consistently exceeds 95%, its scheduling priority should be increased to prevent packet loss. The extracted peak sequence is matched with the historical softirq ready latency interval to determine each packet's reserved scheduling window and the corresponding softirq thread startup configuration item. Softirq ready latency refers to the queuing delay before the kernel scheduler adds the packet's thread to the run queue. This value is influenced by the total number of threads, core idleness, and softirq type.By jointly modeling peak traffic and ready latency, the expected response time window for each group is calculated and a corresponding softirq thread wakeup mode is generated, such as preemptive start, delayed start, or on-demand wakeup. This configuration is crucial for improving scheduler efficiency. For example, assigning preemptive threads to high-frequency queues maintains processing stability during peak system load. The softirq group list is sorted by batches based on the scheduling reservation window and thread start configuration, generating a softirq scheduling order table. This scheduling order considers multiple factors, including minimizing thread response latency, balancing CPU core load, and the risk of traffic interference between groups. The scheduling batches for each group are determined using a combination of a strategy similar to shortest job first (SJF) and weighted round-robin (WRR). The scheduling order table clearly identifies the thread numbers and corresponding receive queues in each batch, providing an execution path for the subsequent thread pool scheduling mechanism. For example, the first batch can schedule the core UDP queue on a high-speed link, while the second batch can schedule relatively low-frequency control traffic. Finally, based on the scheduling order table, a preload sequence for thread switching can be executed in the soft interrupt thread pool, and batch scheduling can be implemented for each soft interrupt group. The soft interrupt thread pool is a collection of threads in the kernel space dedicated to processing asynchronous events, where each thread is bound to a specific priority and core resources. Through the preload scheduling strategy, the system places the thread sequence to be activated in the scheduling queue in advance, and starts the threads according to the priority of the scheduling order table, thereby achieving orderly processing of soft interrupt events. This mechanism significantly reduces the cost of thread scheduling context switching and avoids the jitter caused by threads competing for resources. For example, under high load conditions, the thread pool prioritizes activating threads corresponding to data burst segments according to the preload table, effectively shortening the interrupt response time and improving the data packet processing throughput.
[0038] In an optional implementation of this embodiment, an interrupt trigger context identifier is constructed based on the interrupt processing context information in the current interrupt service routine, and an interrupt return control block is generated by associating and extending the context identifier; a traceable context snapshot is generated by synchronously encapsulating the status parameters of the interrupt return control block; based on the soft interrupt processing delay distribution and the data reception completion bitmap recorded in the context snapshot, it is determined whether there is a processing omission flag or a re-entry flag, and a corresponding rescheduling trigger condition set and resource reconstruction flag group are generated; by performing priority judgment on the rescheduling trigger condition set and the resource reconstruction flag group, the recovery strategy of the interrupt return path is determined, and the interrupt return path recovery parameter set is dynamically configured according to the recovery strategy.
[0039] Specifically, in this embodiment, an interrupt trigger context identifier is constructed based on the current interrupt processing context information. This information includes key information such as the interrupt number, the corresponding receive queue, the CPU core number, the service start timestamp, the interrupt nesting level, and the processing thread identifier. The interrupt trigger context identifier is a unique identifier used to identify a single interrupt service instance, facilitating the tracking of the contextual relationship of interrupt responses in a multi-core concurrent environment. It is constructed by mapping the context parameters into a set of time-sequential index numbers using a hash function. This identifier not only traces the specific interrupt processing trajectory but also provides a reference for subsequent state backtracking and rescheduling. For example, in high-concurrency scenarios, different receive queues may trigger interrupts concurrently on multiple cores. Distinguishing context identifiers effectively avoids information confusion. Subsequently, this context identifier is associated and expanded to generate an interrupt return control block. Association and expansion involves binding the context identifier with temporary state data generated during processing, including the contents of intermediate status registers, scheduling lock usage, interrupt suppression flags, and soft interrupt mount status, to form a complete interrupt return control block. The interrupt return control block is a data structure used to guide resource cleanup, process state synchronization, and return path configuration after interrupt processing. Its purpose is to structure and record dynamic information during interrupt processing, ensuring that the processing context can be correctly restored after the interrupt service is complete. For example, if a portion of the processing task is suspended due to lock contention during an interrupt service, this abnormal state must be recorded in the return control block for subsequent recovery strategy invocation. After the interrupt return control block is generated, its state parameters must be synchronously encapsulated to create a traceable context snapshot. Synchronous encapsulation involves storing state information related to processing timing, resource usage, and interrupt thread mapping in the interrupt return control block in a unified format in the kernel's interrupt snapshot area, forming a complete and traceable context snapshot. This snapshot includes not only a sequence of timestamps during the processing process, but also the function entry addresses executed at each stage, lock usage stack information, and call chain information. This allows for state restoration in the event of an exception or interrupt loss. The traceable context snapshot provides the kernel interrupt scheduler with a detailed execution trajectory and state boundaries, enabling rapid reconstruction through backtracking in the event of interrupt reentry, false triggering, or processing failure. For example, when inconsistent receive counts occur at the driver layer, the snapshot can be used by the scheduler to determine whether the previous service was fully executed. The soft interrupt processing latency distribution recorded in the context snapshot and the data reception completion bitmap are analyzed to determine whether there are processing omission flags or reentry flags. The soft interrupt processing latency distribution reflects the delay between the soft interrupt thread's ready state and the execution state, as well as the actual processing time. If the latency of a segment significantly exceeds the statistical expectation, it may indicate that the thread processing was incomplete or interrupted.The data reception completion bitmap is a bitmap structure used by the network card driver layer to mark the processing status of each packet on the DMA ring. If there are consecutive blocks of unset data bits, it indicates that some packets have not been correctly received by the upper-layer protocol stack. Combining this information, it can determine whether there are missed processing flags that need to be compensated or reentrancy flags caused by uncleared interrupts, thereby generating a clear set of rescheduling trigger conditions and resource reconstruction flags. For example, if a softirq handler is found to have been repeatedly mounted after an interrupt is serviced, it should be marked as reentrant and rescheduled in the next cycle. Finally, the generated rescheduling trigger condition set and resource reconstruction flag set are prioritized to determine the recovery strategy for the interrupt return path. Priority determination is based on multiple dimensions, such as the urgency of the missed packets, the thread resources involved in the reentrant task, and the current core load. The scheduler dynamically selects the optimal recovery path based on these priorities, including whether to immediately reschedule the softirq thread, activate an alternative core, or perform a DMA ring reconstruction. After clarifying the recovery strategy, the scheduling system will configure a set of interrupt return path recovery parameter sets based on the strategy content. This parameter set includes key control items such as interrupt clearing delay, soft interrupt mounting strategy, and interrupt service flag reset options. It is used to complete the recovery operation of the interrupt link at the driver layer immediately after the interrupt processing is completed. For example, if it is determined that there are high-priority missed packets in a queue and the current soft interrupt thread queue is severely blocked, the backup thread can be immediately enabled and the interrupt can be relocated to the idle core to achieve seamless compensation scheduling. Through this mechanism, the robustness and adaptability of interrupt processing can be significantly improved, ensuring the continuous and stable operation of the interrupt process in high-throughput scenarios.
[0040] According to a network card driver optimization method provided by the present application, an interrupt behavior state model is constructed by analyzing the original operation data of the network card interrupt; based on the interrupt merging factor and throttling parameters of the hardware interrupt response determined by the interrupt behavior state model, the throttling counter in the driver interrupt path is reset to generate a merging control strategy; according to the merging control strategy, the usage status of the buffer in the network card DMA receiving ring is polled and read, and the interrupt response status table is updated based on the usage status; according to the interrupt response status table and the original operation data, the optimal interrupt processing core set is determined to generate a corresponding interrupt affinity mapping strategy; according to the interrupt affinity mapping strategy, the data packets to be processed in the receiving queue are grouped, and the soft interrupt threads of the corresponding groups are scheduled in batches based on the different soft interrupt priority levels of each group. Through the implementation of the present application, by constructing a dynamic interrupt affinity mapping strategy and combining the real-time load distribution and the CPU idle state to dynamically select the interrupt processing core, the adaptive allocation of interrupt scheduling is realized, the resource idling and core migration overhead are reduced, and the interrupt processing efficiency and resource utilization of the multi-core processor are effectively improved.
[0041] Figure 2The embodiment of the present application provides a network card driver optimization device, which can be used to implement the network card driver optimization method in the above embodiment. Figure 2 As shown, the network card driver optimization device mainly includes: A construction module 10 is used to construct an interruption behavior state model by analyzing the original operation data of the network card interruption; A generating module 20 is configured to reset the throttling counter in the driver interrupt path based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined by the interrupt behavior state model, and generate a merging control strategy; An updating module 30 is configured to poll and read the usage status of the buffer in the DMA receiving ring of the network card according to the merge control strategy, and update the interrupt response status table based on the usage status; A determination module 40 is configured to determine an optimal interrupt processing core set based on the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy; The scheduling module 50 is configured to group the data packets to be processed in the receiving queue according to the interrupt affinity mapping strategy, and schedule the softirq threads of the corresponding groups in batches based on the different softirq priority levels of the groups.
[0042] In an optional implementation of this embodiment, the construction module is specifically used to: obtain the original operating data of the network card interrupt based on the probe component preset in the operating system kernel space, and construct a data acquisition vector group; obtain the statistical results of the interrupt trigger cycle pattern, resource contention index and receiving queue saturation rate by time window segmentation and sliding aggregation of the data acquisition vector group; perform multi-dimensional clustering and classification judgment on the interrupt triggering events based on the statistical results combined with the preset behavior classification rule set to determine the corresponding interrupt load level label; generate an interrupt behavior state model by associating the interrupt load level label with the data acquisition vector group.
[0043] In an optional implementation of this embodiment, the generation module is specifically used to: determine the corresponding interrupt merging factor set and throttling parameter interval based on the interrupt load level label and soft interrupt queue depth recorded in the interrupt behavior state model, and map the interrupt merging factor set and throttling parameter interval to the interrupt configuration template table supported by the driver; extract the interrupt trigger threshold value, interrupt merging timing parameters and soft interrupt delay threshold corresponding to the current system state by performing parameter fitting and matching on the interrupt configuration template table, and generate a merging control item; synchronously reset the throttling counter and interrupt trigger flag of the driving interrupt path according to the merging control item to construct a merging control strategy.
[0044] In an optional implementation of this embodiment, the update module is specifically used to: read the effective load identifier of each buffer in the network card DMA receiving ring according to the interrupt trigger threshold value of the merge control strategy and the buffer utilization query cycle polling, and construct a buffer status byte stream; obtain the write pointer movement rate, remaining space ratio and continuous write segment length corresponding to each buffer by performing interval aggregation and mark extraction on the buffer status byte stream, and generate a buffer usage statistics graph; perform a hierarchical judgment on the current DMA buffer usage status according to the buffer usage statistics graph and the soft interrupt delay threshold, determine whether to trigger the interrupt response suspension flag and lock the corresponding queue processing identifier; associate the judgment result with the DMA receiving ring status data and encode it, and update the interrupt response status table.
[0045] In an optional implementation of this embodiment, the determination module is specifically used to: construct a processing load distribution matrix based on the interrupt trigger frequency, interrupt suspension flag and corresponding write pointer update rate of each DMA receiving ring in the interrupt response status table, and generate a core load vector set in combination with the CPU core usage in the original operation data; extract the inter-core interrupt affinity scoring matrix by performing linear fitting and gradient inversion on the processing load distribution matrix and the core load vector set, and determine the candidate processing core set according to the preset affinity migration rules; construct a core matching map based on the affinity distribution weights of the candidate processing core set and the corresponding core idle time slot width, and screen the optimal interrupt processing core set corresponding to the current interrupt processing task based on the minimum path cost strategy; bind the optimal interrupt processing core set to the hard interrupt identifier of each receiving queue to generate an interrupt affinity mapping strategy.
[0046] In an optional implementation of this embodiment, the scheduling module is specifically used to: obtain the hard interrupt distribution index table of the data packets to be processed by the driver layer according to the interrupt affinity mapping strategy, and construct a soft interrupt group list by performing queue-level segmentation and soft interrupt priority label screening on the index table; extract the short-term traffic peak sequence by normalizing and aggregating the queue traffic statistical information corresponding to each group in the soft interrupt group list; determine the group-level scheduling reservation window and the corresponding soft interrupt thread startup configuration item based on the peak sequence and the historical soft interrupt ready delay interval; perform batch-level scheduling sorting on the soft interrupt group list according to the scheduling reservation window and the soft interrupt thread startup configuration item to generate a soft interrupt scheduling sequence table; schedule each soft interrupt group in batches by controlling the preloading sequence of thread switching in the soft interrupt thread pool according to the thread number of each scheduling batch in the soft interrupt scheduling sequence table and the corresponding receiving queue mapping relationship.
[0047] In an optional implementation of this embodiment, the scheduling module is also used to: construct an interrupt trigger context identifier based on the interrupt processing context information in the current interrupt service routine, and generate an interrupt return control block by associating and expanding the context identifier; generate a traceable context snapshot by synchronously encapsulating the status parameters of the interrupt return control block; determine whether there is a processing omission flag or a re-entry flag based on the soft interrupt processing delay distribution and data reception completion bitmap recorded in the context snapshot, and generate a corresponding rescheduling trigger condition set and resource reconstruction flag group; determine the recovery strategy of the interrupt return path by performing priority judgment on the rescheduling trigger condition set and the resource reconstruction flag group, and dynamically configure the interrupt return path recovery parameter set according to the recovery strategy.
[0048] According to a network card driver optimization device provided by the present application, an interrupt behavior state model is constructed by analyzing the original operation data of the network card interrupt; based on the interrupt merging factor and throttling parameters of the hardware interrupt response determined by the interrupt behavior state model, the throttling counter in the driver interrupt path is reset to generate a merging control strategy; according to the merging control strategy, the usage status of the buffer in the network card DMA receiving ring is polled and read, and the interrupt response status table is updated based on the usage status; according to the interrupt response status table and the original operation data, the optimal interrupt processing core set is determined to generate a corresponding interrupt affinity mapping strategy; according to the interrupt affinity mapping strategy, the data packets to be processed in the receiving queue are grouped, and the soft interrupt threads of the corresponding groups are scheduled in batches based on the different soft interrupt priority levels of each group. Through the implementation of the present application, by constructing a dynamic interrupt affinity mapping strategy and combining the real-time load distribution and the CPU idle state to dynamically select the interrupt processing core, the adaptive allocation of interrupt scheduling is realized, the resource idling and core migration overhead are reduced, and the interrupt processing efficiency and resource utilization of the multi-core processor are effectively improved.
[0049] According to the application plan Figure 3 An electronic device provided in an embodiment of the present application. The electronic device can be used to implement the network card driver optimization method in the aforementioned embodiment, mainly comprising: Memory 301, processor 302, and computer program 303 stored in memory 301 and executable on processor 302. Memory 301 and processor 302 are connected via communication. When processor 302 executes computer program 303, the network card driver optimization method described in the aforementioned embodiment is implemented. The number of processors can be one or more.
[0050] The memory 301 can be a high-speed random access memory (RAM) memory or a non-volatile memory such as a disk drive. The memory 301 is used to store executable program code. The processor 302 is coupled to the memory 301 .
[0051] Furthermore, the embodiment of the present application also provides a computer-readable storage medium, which can be provided in the electronic device in the above embodiments. The computer-readable storage medium can be the above Figure 3 Memory in the illustrated embodiment.
[0052] The computer-readable storage medium stores a computer program that, when executed by a processor, implements the network card driver optimization method described in the aforementioned embodiment. Furthermore, the computer-readable storage medium may be a USB flash drive, a mobile hard drive, a read-only memory (ROM), RAM, a magnetic disk, or an optical disk, among other media capable of storing program code.
[0053] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0054] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program code.
[0055] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A network card driver optimization method, characterized in that: include: By analyzing the original operation data of network card interruption, an interruption behavior state model is constructed; Resetting the throttling counter in the driver interrupt path based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined by the interrupt behavior state model to generate a merging control strategy; Polling and reading the usage status of the buffer in the network card DMA receiving ring according to the merging control strategy, and updating the interrupt response status table based on the usage status; Determine an optimal interrupt processing core set according to the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy; The data packets to be processed in the receiving queue are grouped according to the interrupt affinity mapping strategy, and the soft interrupt threads of the corresponding groups are scheduled in batches based on the different soft interrupt priority levels of the groups.
2. The network card driver optimization method according to claim 1, characterized in that: The step of constructing an interruption behavior state model by analyzing the original operation data of the network card interruption includes: The original operation data of the network card interrupt is obtained based on the probe component preset in the operating system kernel space, and a data collection vector group is constructed; Obtaining statistical results of the interrupt trigger cycle pattern, resource contention index, and receiving queue saturation rate by performing time window segmentation and sliding aggregation on the data acquisition vector group; Based on the statistical results and a preset behavior classification rule set, multi-dimensional clustering and classification judgment are performed on the interruption triggering events to determine the corresponding interruption load level label; An interruption behavior state model is generated by associating and labeling the interruption load level label with the data acquisition vector group.
3. The network card driver optimization method according to claim 1, characterized in that: The step of resetting the throttling counter in the driver interrupt path based on the interrupt merging factor and throttling parameter of the hardware interrupt response determined based on the interrupt behavior state model to generate a merging control strategy includes: Determine a corresponding interrupt merging factor set and a throttling parameter interval according to the interrupt load level label and the soft interrupt queue depth recorded in the interrupt behavior state model, and map the interrupt merging factor set and the throttling parameter interval to an interrupt configuration template table supported by the driver; By performing parameter fitting and matching on the interrupt configuration template table, the interrupt trigger threshold, interrupt merging timing parameter and soft interrupt delay threshold corresponding to the current system state are extracted to generate a merging control item; The throttling counter and the interrupt triggering flag of the driving interrupt path are synchronously reset according to the merging control item to construct a merging control strategy.
4. The network card driver optimization method according to claim 3, characterized in that: The merge control strategy includes a buffer utilization query cycle, and the step of polling and reading the usage status of the buffer in the network card DMA receiving ring according to the merge control strategy and updating the interrupt response status table based on the usage status includes: Read the effective load identifier of each buffer in the network card DMA receiving ring according to the interrupt trigger threshold value of the merge control strategy and the buffer utilization query period polling, and build a buffer status byte stream; By performing interval aggregation and tag extraction on the buffer state byte stream, the write pointer movement rate, remaining space ratio and continuous write segment length corresponding to each buffer are obtained, and a buffer usage statistics graph is generated; According to the buffer usage statistics and the soft interrupt delay threshold, a hierarchical judgment is made on the current DMA buffer usage status to determine whether to trigger an interrupt response suspension flag and lock a corresponding queue processing identifier; The judgment result is associated with the DMA receiving ring state data and coded, and the interrupt response state table is updated.
5. The network card driver optimization method according to claim 4, characterized in that: The step of determining the optimal interrupt processing core set according to the interrupt response status table and the original operation data and generating a corresponding interrupt affinity mapping strategy includes: Constructing a processing load distribution matrix based on the interrupt trigger frequency, interrupt pending flag, and corresponding write pointer update rate of each DMA receiving ring in the interrupt response status table, and generating a core load vector set in combination with the CPU core usage in the original operation data; Extracting an inter-core interruption affinity score matrix by performing linear fitting and gradient inversion on the processing load distribution matrix and the core load vector set, and determining a candidate processing core set according to a preset affinity migration rule; According to the affinity distribution weights of the candidate processing core sets and the corresponding core idle time slot widths, a core matching graph is constructed, and the optimal interrupt processing core set corresponding to the current interrupt processing task is selected based on the minimum path cost strategy; The optimal interrupt processing core set is bound to the hard interrupt identifier of each receiving queue to generate an interrupt affinity mapping strategy.
6. The network card driver optimization method according to claim 1, characterized in that: The step of grouping the to-be-processed data packets in the receiving queue according to the interrupt vector dispatch table, and scheduling the soft interrupt threads of the corresponding groups in batches based on the different soft interrupt priority levels of the groups includes: Obtaining a hard interrupt distribution index table of data packets to be processed by the driver layer according to the interrupt affinity mapping strategy, and constructing a soft interrupt grouping list by performing queue-level segmentation and soft interrupt priority label screening on the index table; extracting a short-term traffic peak sequence by normalizing and aggregating queue traffic statistics corresponding to each group in the soft interrupt group list; Determine the group-level scheduling reservation window and the corresponding soft interrupt thread startup configuration item based on the peak sequence and the historical soft interrupt ready delay interval; According to the scheduling reserved window and the soft interrupt thread startup configuration item, the soft interrupt group list is sorted by batch scheduling to generate a soft interrupt scheduling sequence table; According to the mapping relationship between the thread number of each scheduling batch and the corresponding receiving queue in the soft interrupt scheduling sequence table, each soft interrupt group is scheduled in batches by controlling the preloading sequence of thread switching in the soft interrupt thread pool.
7. The network card driver optimization method according to claim 1, characterized in that: The method further comprises: Constructing an interrupt trigger context identifier based on the interrupt processing context information in the current interrupt service routine, and generating an interrupt return control block by associating and extending the context identifier; Generate a traceable context snapshot by synchronously encapsulating the state parameters of the interrupt return control block; According to the soft interrupt processing delay distribution and the data reception completion bitmap recorded in the context snapshot, determining whether there is a processing omission flag or a re-entry flag, and generating a corresponding rescheduling trigger condition set and resource reconstruction flag group; By performing priority judgment on the rescheduling trigger condition set and the resource reconstruction flag group, a recovery strategy for the interruption return path is determined, and a recovery parameter set for the interruption return path is dynamically configured according to the recovery strategy.
8. A network card driver optimization device, characterized in that: The network card driver optimization device is used to implement the network card driver optimization method according to claim 1, and the network card driver optimization device includes: A construction module is used to construct an interruption behavior state model by analyzing the original operation data of the network card interruption; a generating module, configured to reset a throttling counter in a driver interrupt path based on an interrupt merging factor and a throttling parameter of a hardware interrupt response determined by the interrupt behavior state model, and generate a merging control strategy; An updating module, configured to poll and read the usage status of a buffer in a DMA receiving ring of a network card according to the merging control strategy, and update an interrupt response status table based on the usage status; a determination module, configured to determine an optimal interrupt processing core set according to the interrupt response status table and the original operation data, and generate a corresponding interrupt affinity mapping strategy; The scheduling module is used to group the data packets to be processed in the receiving queue according to the interrupt affinity mapping strategy, and to schedule the soft interrupt threads of the corresponding groups in batches based on the different soft interrupt priority levels of each group.
9. An electronic device, characterized in that: Comprising a memory and a processor, wherein: The processor is configured to execute a computer program stored in the memory; When the processor executes the computer program, the steps of the network card driver optimization method described in any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the network card driver optimization method described in any one of claims 1 to 7 are implemented.
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