Software radio microsystem with three-dimensional stacked structure

Abstract

The invention provides a software radio microsystem with a three-dimensional stacked structure, which relates to a radio circuit and is characterized in that a plurality of digital signal processing module switching micro convex points are arranged at the bottom of a digital signal switching plate; the digital signal processing unit is mounted on the digital signal adapter plate, and the digital signal processing unit is electrically connected with the digital signal processing module adapter micro convex points; the bottom of the radio frequency adapter plate is provided with a plurality of radio frequency adapter micro convex points; the radio frequency channel units are installed in the corresponding radio frequency adapter plates, and the radio frequency channel units are electrically connected with the radio frequency adapter micro convex points of the corresponding radio frequency adapter plates. The bottom of the digital signal processing module and the bottom of the radio frequency channel module are both installed on the interconnection substrate. And the digital signal processing unit is electrically connected with the corresponding radio frequency channel unit through the digital signal processing module switching micro salient points, the interconnection substrate and the radio frequency switching micro salient points in sequence.

Description

Technical Field

[0001] The present invention relates to a radio circuit, and in particular to a software radio microsystem with a three-dimensional stacking structure. Background Art

[0002] Software radio technology reduces the amount of dedicated hardware and lowers equipment costs by implementing different radio functions on a unified reconfigurable hardware platform.

[0003] However, most existing software radio hardware architectures are still based on discrete components or circuit boards, which makes it difficult to meet the stringent requirements of payloads for lightweight and miniaturization.

[0004] For example, patent CN115632675B discloses a multi-module wireless signal processing system based on an FPGA. This system consists of independent baseband digital signal processing modules, radio frequency boards, and data exchange modules connected via interfaces. While focusing on flexibility in development and debugging, it still uses a modular and discrete implementation, making it difficult to further reduce size and weight, and unable to fully meet the strict volume and weight restrictions imposed by lightweight platform payloads.

[0005] Another approach involves designing communication systems for specific frequency bands. For example, patent CN111211858A proposes a C-band airborne network transceiver system based on time-division duplexing. This system integrates an airborne C-band transceiver and other components for drone telemetry and remote control communications, improving performance in specific applications. However, such designs are targeted at a single frequency band or function and fail to universally support multiple radio functions. Additional hardware is still required to handle various tasks, resulting in a low level of overall system integration.

[0006] On the other hand, the development of advanced packaging technology has provided new avenues for miniaturization of electronic systems. Multi-chip modules integrate multiple chips into a single package to improve performance and reduce space requirements. Furthermore, the rise of chiplet-based architectures has enabled more flexible combinations of chips with different functions.

[0007] For example, patent CN104977027A discloses a miniature intelligent sensor based on MCM-3D packaging. This sensor integrates a sensor chip, a microprocessor chip, and a wireless communication chip, achieving a compact size and extremely low power consumption. However, this sensor is primarily used for simple data acquisition and transmission, and has limited processing capabilities, failing to meet the high-speed signal processing and multi-functional integration requirements of wireless communication systems.

[0008] In summary, the existing technology lacks a software radio system that not only uses advanced packaging technology to achieve high-density integration, but also takes into account multi-channel high-performance signal processing, supports multiple algorithm function reconstruction, and is suitable for miniaturization and low-power consumption scenarios. Summary of the Invention

[0009] In order to solve the technical problems existing in the above-mentioned prior art, the purpose of the present invention is to provide a software radio microsystem with a three-dimensional stacked structure, which realizes high-density integration through packaging technology, takes into account multi-channel high-performance signal processing, supports reconstruction of multiple algorithm functions, and is suitable for software radio systems in miniaturized and low-power scenarios.

[0010] To achieve the above-mentioned object of the invention, the present invention provides a software radio microsystem with a three-dimensional stacked structure, comprising an interconnected substrate, a digital signal processing module and a plurality of radio frequency channel modules;

[0011] The digital signal processing module includes a digital signal processing unit and a digital signal adapter board; the bottom of the digital signal adapter board is provided with a plurality of digital signal processing module adapter micro-bumps;

[0012] The digital signal processing unit is mounted on the digital signal adapter board, and the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected one-to-one with the digital signal processing module adapter micro-bumps;

[0013] The multiple radio frequency channel modules each include a radio frequency channel unit and a radio frequency adapter board; the bottom of the radio frequency adapter board is provided with multiple radio frequency adapter micro-bumps;

[0014] The radio frequency channel unit is installed in the corresponding radio frequency adapter board, and the intermediate frequency signal input / output end of the radio frequency channel unit is electrically connected one-to-one with the radio frequency adapter micro-bump of the corresponding radio frequency adapter board;

[0015] The bottoms of the digital signal processing module and the radio frequency channel module are both installed on the interconnection substrate; so that the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected to the intermediate frequency signal output / input end of the corresponding radio frequency channel unit through the digital signal processing module transfer micro-bumps, the interconnection substrate and the radio frequency transfer micro-bumps in sequence.

[0016] According to one technical solution of the present invention, the digital signal processing unit includes an FPGA core and a DSP core interconnected by a bus, and a memory core; the storage data input / output terminal of the memory core is electrically connected to the storage data output / input terminal of the FPGA core and the DSP core respectively;

[0017] The FPGA core, DSP core and memory core are all packaged on the upper part of the digital signal switching board, and the upper surfaces of the FPGA core, DSP core and memory core are flush.

[0018] According to a technical solution of the present invention, the FPGA core, the DSP core and the memory core are all encapsulated on the upper part of the digital signal adapter board through an encapsulation layer;

[0019] The upper surfaces of the FPGA core, the DSP core, and the memory core are flush with the upper surface of the packaging layer, or are higher than the upper surface of the packaging layer.

[0020] According to a technical solution of the present invention, the radio frequency channel unit includes a plurality of radio frequency chips;

[0021] The RF adapter plate includes a cover plate, a middle-layer adapter plate and a bottom-layer adapter plate; and the cover plate, the middle-layer adapter plate and the bottom-layer adapter plate are stacked and fixed from top to bottom;

[0022] The middle adapter plate and the bottom adapter plate are both provided with cavities;

[0023] At least one RF chip is installed in the cavity of the middle-layer adapter board; the other RF chips are installed in the cavity of the bottom-layer adapter board;

[0024] The intermediate frequency signal input / output terminals corresponding to the RF chip in the cavity of the middle adapter board are electrically connected to the intermediate frequency signal output / input terminals corresponding to the RF chip in the cavity of the bottom adapter board through the middle adapter board and the bottom adapter board in sequence;

[0025] The control signal input / output ends corresponding to the RF core particles in the cavity of the middle-layer adapter board are electrically connected to the control signal output / input ends corresponding to the RF core particles in the cavity of the bottom-layer adapter board through the middle-layer adapter board and the bottom-layer adapter board in sequence.

[0026] According to a technical solution of the present invention, the bottom of the middle-layer adapter plate is provided with RF chip transfer micro-bumps;

[0027] The signal input / output ends of the RF core particles in the cavity of the middle-layer adapter board are electrically connected one-to-one with the RF core particle transfer micro-bumps; so that the corresponding signal input / output ends of the RF core particles in the cavity of the middle-layer adapter board are electrically connected with the corresponding signal output / input ends of the RF core particles in the cavity of the bottom-layer adapter board through the middle-layer adapter board, the RF core particle transfer micro-bumps and the bottom-layer adapter board in sequence.

[0028] According to a technical solution of the present invention, it also includes a heat dissipation plate;

[0029] The heat dissipation plate is fixed above the interconnection substrate, and the digital signal processing module and the radio frequency channel module are buckled between the heat dissipation plate and the interconnection substrate;

[0030] The bottom of the heat dissipation plate contacts the upper surfaces of the FPGA core, the DSP core and the memory core in the digital signal processing module, as well as the upper surface of the radio frequency channel module.

[0031] According to a technical solution of the present invention, a plurality of radio frequency channel modules are evenly arranged around the digital signal processing module.

[0032] According to a technical solution of the present invention, the multiple radio frequency channel modules are homogeneous.

[0033] According to a technical solution of the present invention, the interconnect substrate is a through silicon via substrate;

[0034] The digital signal processing module transfer micro-bumps are electrically connected to the corresponding radio frequency transfer micro-bumps through the through silicon via interposer on the interconnect substrate.

[0035] According to a technical solution of the present invention, the bottom array of the interconnect substrate is provided with solder balls;

[0036] The solder balls are electrically connected one-to-one with the corresponding intermediate frequency input / output terminals and control signal input / output terminals of the digital signal processing module and the radio frequency channel module.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] 1. Using chiplet and 3D packaging technology to vertically stack multiple specialized chips in a single package, this achieves the integrated integration of RF processing, baseband processing, I / O interconnection, and fan-out functional modules, significantly reducing system size and weight. This is particularly suitable for applications that are sensitive to payload size and weight, such as lightweight platforms.

[0039] 2. The design supports multiple RF transceiver channels working in parallel. Each channel can process different signals independently or collaboratively, achieving multiple uses for one device. At the same time, the digital signal processing module combines FPGA and DSP to provide powerful real-time processing capabilities, ensuring reliable operation in wide-band, high-speed signal environments.

[0040] 3. By optimizing hardware functional division and package interconnection, we can reduce signal loss and repeated conversion over long distances, achieve lower power consumption, minimize heat generation while meeting performance requirements, and improve the reliability of unmanned platforms.

[0041] 4. Both the RF channel module and the digital signal processing module are partially packaged using a silicon adapter board, which allows the RF channel module and the digital signal processing module to be used not only in the radio microsystem of the present invention but also as reusable components in other radio microsystems.

[0042] 5. In the packaging design, both material and process costs are taken into consideration, and FCBGA packaging technology combined with TSV interconnection is used to achieve a balance between performance and cost, making this high-performance radio microsystem practically manufacturable. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be derived from these drawings without inventive effort.

[0044] Figure 1 A diagram schematically showing the functional architecture of a software radio microsystem with a three-dimensional stacked structure according to an embodiment of the present invention;

[0045] Figure 2 A schematic diagram schematically showing the external structure of a software radio microsystem with a three-dimensional stacked structure according to an embodiment of the present invention;

[0046] in, Figure 2 (A) is a top view of the software radio microsystem structure. Figure 2 (B) is a bottom-view structural diagram of the software radio microsystem;

[0047] Figure 3 A schematic diagram showing a disassembled structure of a software radio microsystem with a three-dimensional stacked structure according to an embodiment of the present invention;

[0048] Figure 4 A structural diagram schematically showing a radio frequency channel module in a software radio microsystem with a three-dimensional stacked structure according to an embodiment of the present invention;

[0049] in, Figure 4 (A) is the top view of the RF channel module. Figure 4 (B) is the bottom view of the RF channel module;

[0050] Figure 5 Schematically illustrates a structure of a digital signal processing module in a software radio microsystem with a three-dimensional stacked structure according to an embodiment of the present invention;

[0051] in, Figure 5 (A) is the top view of the digital signal processing module. Figure 5 (B) is a bottom view structural diagram of the digital signal processing module;

[0052] Figure 6 This is a diagram showing the integrated layout of each chip in the digital signal processing module of the present invention;

[0053] in, Figure 6 (A) is a structural diagram without an encapsulation layer. Figure 6 (B) is a structural diagram with an encapsulation layer. DETAILED DESCRIPTION

[0054] The description of the embodiments in this specification should be combined with the corresponding drawings, which should be considered a complete part of this specification. In the drawings, the shapes and thicknesses of the embodiments may be exaggerated and indicated for simplicity or convenience. Furthermore, the various structural components in the drawings will be described separately. It is worth noting that components not shown in the drawings or not described in words are known to those of ordinary skill in the art.

[0055] The description of the embodiments herein and any references to directions and orientations are for ease of description only and are not to be construed as limiting the scope of the present invention. The following description of the preferred embodiments may involve combinations of features, which may exist independently or in combination. The present invention is not specifically limited to the preferred embodiments. The scope of the present invention is defined by the claims.

[0056] like Figures 1 to 6 As shown, a software radio microsystem of a three-dimensional stacked structure in this embodiment includes an interconnect substrate 1, a digital signal processing module 2 and a plurality of radio frequency channel modules 3;

[0057] The digital signal processing module 2 includes a digital signal processing unit and a digital signal adapter board 2-1; a plurality of digital signal processing module adapter micro-bumps 2-2 are provided at the bottom of the digital signal adapter board 2-1;

[0058] The digital signal processing unit is installed on the digital signal adapter board 2-1, and the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected one-to-one with the digital signal processing module adapter micro-bump 2-2;

[0059] The multiple RF channel modules 3 each include a RF channel unit and a RF adapter board 3-1; a plurality of RF adapter micro-bumps 3-2 are provided at the bottom of the RF adapter board 3-1;

[0060] The RF channel unit is installed in the corresponding RF adapter board 3-1, and the intermediate frequency signal input / output end of the RF channel unit is electrically connected one-to-one with the RF adapter micro-bump 3-2 of the corresponding RF adapter board 3-1;

[0061] The bottoms of the digital signal processing module 2 and the radio frequency channel module 3 are both installed on the interconnection substrate 1; so that the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected to the intermediate frequency signal output / input end of the corresponding radio frequency channel unit through the digital signal processing module transfer micro-bump 2-2, the interconnection substrate 1 and the radio frequency transfer micro-bump 3-2 in sequence.

[0062] In this embodiment, if Figures 1-2As shown, the software-defined radio microsystem of this embodiment adopts a multi-channel transceiver architecture. The core components include a digital signal processing module 2, four RF channel modules 3, and an I / O interconnect and fan-out module consisting of a digital signal adapter board 2-1 in the digital signal processing module 2, an RF adapter board 3-1 in the RF channel module 3, and an interconnect substrate 1.

[0063] The radio microsystem in this embodiment utilizes three-dimensional, vertically stacked heterogeneous integration. By interconnecting the substrate 1, digital signal adapter board 2-1, and RF adapter board 3-1, the RF channel module 3 and digital signal processing module 2 are packaged together using FCBGA within a single package. All modules are integrated together to form a highly integrated radio microsystem. This stacked structure design achieves a high degree of three-dimensional integration for the entire radio microsystem, significantly reducing the package size.

[0064] The I / O interconnect and fan-out module is used to achieve reliable electrical interconnection between the RF channel module 3 and the digital signal processing module 2, as well as between the radio microsystem and external devices. Specifically, by leveraging silicon-based adapter boards (digital signal adapter board 2-1 and RF adapter board 3-1) with smaller process feature sizes and a high-density, multi-layer interconnect substrate (interconnect substrate 1 located at the bottom of the package, with the upper surface supporting the various internal functional modules of the radio microsystem), the radio microsystem in this embodiment can achieve high-density I / O interconnection and a large number of fan-out pins.

[0065] The digital signal processing module 2 uses a digital signal adapter board 2-1 (a high-density silicon-based adapter board) to integrate the various core particles and form a local package.

[0066] The core particles in the RF channel module 3 are interconnected through a multi-layer RF adapter board 3-1 with through-silicon vias and integrated together through three-dimensional vertical stacking packaging.

[0067] The above-mentioned RF channel module 3 is composed of multiple homogeneous RF transceiver channels, each of which integrates a filter, an up / down converter, an analog-to-digital converter and a digital-to-analog converter to achieve filtering, amplification, frequency conversion and digital / analog conversion of the input signal.

[0068] The RF channel modules 3 are used to process RF transmit and receive signals from different channels. The digital signal processing module 2 connects all RF channel modules 3 and performs unified baseband processing on their outputs. The four-channel software radio architecture deployed in this embodiment can support parallel processing of multiple signals. Each RF channel module 3 communicates with the digital signal processing module 2 via high-speed vertical interconnects, receiving downlink intermediate frequency (IF) signals from the digital signal processing module 2 and sending uplink IF signals to the digital signal processing module 2, achieving tight coupling between RF and digital baseband.

[0069] The RF channel module 3 can also synchronize the RF local oscillator and sampling clock between channels and collaboratively process RF signals at specific frequencies.

[0070] In addition, several passive components 5 for power supply decoupling and filtering are integrated on the interconnect substrate 1 to improve the power integrity and reliability of the radio microsystem. The above packaging structure allows the radio microsystem to be easily mounted on the circuit board like an integrated component and provides a compact miniaturized design.

[0071] Figure 2 (A) shows the external structure of the radio microsystem viewed from above. Figure 2 (B) shows the external structure as viewed from below. It can be seen that the radio microsystem of this embodiment is compact in size, and the main heat dissipation and interface components are optimized in layout to adapt to the narrow space and heat dissipation requirements.

[0072] In the software radio microsystem, the digital signal processing unit includes an FPGA chip and a DSP chip interconnected by a bus, and a memory chip; a storage data input / output terminal of the memory chip is electrically connected to the storage data output / input terminals of the FPGA chip and the DSP chip, respectively;

[0073] The FPGA chip, the DSP chip and the memory chip are all packaged on the upper part of the digital signal adapter board 2 - 1 , and the upper surfaces of the FPGA chip, the DSP chip and the memory chip are flush.

[0074] In this embodiment, the digital signal processing module 2 uses a high-density silicon-based digital signal adapter board 2-1 to achieve the integration of various chiplets. Among them, the digital signal processing unit is composed of multiple digital chiplets and is the information processing core of the entire radio microsystem.

[0075] like Figure 5 and Figure 6 As shown, a digital signal processing unit is integrated on the digital signal adapter board 2-1 of the digital signal processing module 2, including: a field programmable gate array FPGA core 2-4, a digital signal processor DSP core 2-5, a (first) memory core 2-6 and a (second) memory core 2-7. The above devices are interconnected through a high-speed bus and work together to perform intermediate frequency or baseband processing on the input digital signal.

[0076] Through the combination of FPGA+DSP, this digital signal processing unit can flexibly implement a variety of waveform algorithms and signal processing processes, balancing processing capability and power consumption.

[0077] Two high-speed memory chips are also packaged in the digital signal processing module 2, which are used to store signal processing program code and buffer data. These chips are connected to the FPGA / DSP via multi-layer interconnect lines, enabling high-speed data reading and writing.

[0078] In summary, the digital signal processing unit in the digital signal processing module 2 integrates a reconfigurable logic unit, a general-purpose processor, and a high-speed storage unit. It can complete parallel real-time processing of multiple signals with low power consumption and is the key to achieving the flexibility of software radio.

[0079] After the digital signal processing module 2 forms a local package, each chip is ground and thinned so that its back substrate remains in the same plane and is exposed on the upper surface of the local package, so as to fully contact with the top heat sink to achieve efficient heat conduction.

[0080] In the software radio microsystem, the FPGA core, the DSP core and the memory core are all encapsulated on the upper part of the digital signal transfer board 2-1 through the encapsulation layer 2-3;

[0081] The upper surfaces of the FPGA core, the DSP core, and the memory core are flush with the upper surface of the packaging layer 2 - 3 , or are higher than the upper surface of the packaging layer 2 - 3 .

[0082] In this embodiment, in order to protect the stress strength of the digital signal adapter board 2-1 and improve the reliability of the module, the digital signal processing module 2 adopts a local package (such as Figure 6 (See the perspective view shown). After the FPGA, DSP, and memory chips are mounted on the digital signal transfer board 2-1, a local encapsulation layer 2-3 is formed thereon using an injection molding process. This method enhances the strength and reliability of the digital signal processing module 2 while also improving its reusability.

[0083] In addition, each core particle is ground and thinned so that its back substrate remains in the same plane and is exposed on the local package upper surface, which facilitates subsequent full contact with the top heat sink to achieve efficient heat conduction.

[0084] In a software radio microsystem, a radio frequency channel unit includes multiple radio frequency cores;

[0085] The RF adapter plate 3-1 includes a cover plate 3-1-1, a middle adapter plate 3-1-2 and a bottom adapter plate 3-1-3; and the cover plate 3-1-1, the middle adapter plate 3-1-2 and the bottom adapter plate 3-1-3 are stacked and fixed from top to bottom;

[0086] Both the middle adapter plate 3-1-2 and the bottom adapter plate 3-1-3 are provided with cavities;

[0087] At least one RF chip is installed in the cavity of the middle adapter board 3-1-2; the other RF chips are installed in the cavity of the bottom adapter board 3-1-3;

[0088] The intermediate frequency signal input / output terminals of the RF core particles in the cavity of the middle adapter board 3-1-2 are electrically connected to the intermediate frequency signal output / input terminals of the RF core particles in the cavity of the bottom adapter board 3-1-3 through the middle adapter board 3-1-2 and the bottom adapter board 3-1-3 in sequence;

[0089] The corresponding control signal input / output terminals of the RF core particles in the cavity of the middle adapter board 3-1-2 are electrically connected to the corresponding control signal output / input terminals of the RF core particles in the cavity of the bottom adapter board 3-1-3 through the middle adapter board 3-1-2 and the bottom adapter board 3-1-3.

[0090] In this embodiment, if Figure 4 As shown, each RF channel module 3 includes a complete RF transceiver circuit unit.

[0091] The RF chips within the RF channel module 3 are interconnected via a multi-layer RF adapter plate 3-1 with through-silicon vias (TSVs) and integrated together through a three-dimensional vertical stacked package. This vertical, three-dimensional structure creates a unique stacked chamber structure, resulting in improved interconnectivity and volume advantages after packaging.

[0092] The electrical connection between the RF chip in the cavity of the middle-layer adapter board 3-1-2 and the RF chip in the cavity of the bottom-layer adapter board 3-1-3 only illustrates the overall structural transmission path of the IF and control signals between the RF chips in the cavities of different layers. However, this connection relationship is highly dependent on practical applications, and the specific implementation requires detailed design based on multiple factors such as system functional requirements, signal flow, module layout, and electrical performance indicators.

[0093] For example, the functions of different RF chiplets (such as filtering, amplification, and mixing) determine the number and arrangement of their corresponding IF signal input / output ports. Furthermore, the type of control signal (such as power control, operating mode selection, and gain adjustment) directly influences the definition and connection order of the control ports. Therefore, during implementation, precise port matching and wiring design of RF chiplets at each level must be performed in conjunction with the overall system architecture, circuit schematics, and electromagnetic compatibility requirements to ensure signal transmission integrity and stable system operation.

[0094] Therefore, the connection method between these cross-layer RF chiplets is not fixed, but needs to be flexibly configured based on the hardware design specifications and communication protocols in the actual application scenario and the experience of technical personnel in this field to achieve optimal system performance.

[0095] Specifically, the RF channel module 3 uses an RF adapter plate 3-1 and an RF core particle stacked in a multi-layer structure. The structure consists of a cover plate 3-1-1, a middle layer adapter plate 3-1-2, and a bottom layer adapter plate 3-1-3. The RF adapter micro-bumps 3-2 on the bottom surface of the bottom layer adapter plate 3-1-3 are connected to the RF adapter micro-bumps 3-2 on the bottom surface of the bottom layer adapter plate 3-1-3. Figure 3 The interconnect substrate 1 achieves electrical interconnection. Three RF chips (3-3, 3-4, and 3-5) are integrated into the cavities of the middle and bottom adapter boards 3-1-2 and 3-1-3, respectively. These chips amplify and up-convert RF signals, provide frequency synthesis, and high-speed analog-to-digital and digital-to-analog conversion. These components are electrically connected within the RF channel module 3 via microstrip lines and through-holes, and the metal shielding layer within the module reduces crosstalk.

[0096] The highly integrated design of the RF channel module 3 enables each RF transceiver circuit to be encapsulated in an independent small module, which not only facilitates multi-channel expansion but also ensures RF performance.

[0097] In the software radio microsystem, the bottom of the middle layer adapter board 3-1-2 is provided with a radio frequency chip transfer micro bump 3-1-4;

[0098] The signal input / output end of the RF core particle in the cavity of the middle-layer adapter board 3-1-2 is electrically connected one-to-one with the RF core particle transfer micro-bump 3-1-4; so that the corresponding signal input / output end of the RF core particle in the cavity of the middle-layer adapter board 3-1-2 is electrically connected with the corresponding signal output / input end of the RF core particle in the cavity of the bottom-layer adapter board 3-1-3 through the middle-layer adapter board 3-1-2, the RF core particle transfer micro-bump 3-1-4 and the bottom-layer adapter board 3-1-3 in sequence.

[0099] In this embodiment, if Figure 4 As shown, the RF channel module 3 uses an RF adapter plate 3-1 and an RF chip stacked together to form a multi-layer structure. This structure consists of a cover plate 3-1-1, a middle adapter plate 3-1-2, and a bottom adapter plate 3-1-3. RF chip transfer micro-bumps 3-1-4 are used to achieve electrical interconnection between the upper and lower layers.

[0100] Since the bottom adapter board 3-1-3 has a concave cavity, the RF chip transfer micro-bumps 3-1-4 at the bottom of the middle adapter board 3-1-2 should be set at the edge to correspond to the edges around the outside of the cavity of the bottom adapter board 3-1-3.

[0101] The software radio microsystem further includes a heat sink 4;

[0102] The heat sink 4 is fixed above the interconnection substrate 1, and the digital signal processing module 2 and the radio frequency channel module 3 are buckled between the heat sink 4 and the interconnection substrate 1;

[0103] The bottom of the heat dissipation plate 4 contacts the upper surfaces of the FPGA chip, the DSP chip and the memory chip in the digital signal processing module 2 , as well as the upper surface of the radio frequency channel module 3 .

[0104] In this embodiment, if Figure 2 As shown, the external structure of the radio microsystem package in this embodiment also includes:

[0105] The heat sink 4 installed on the top layer is in full contact with the substrate surfaces of the chips inside the digital signal processing module 2 and the radio frequency channel module 3 to improve the heat dissipation efficiency of heat conduction and dissipate heat when the radio microsystem is working.

[0106] The radio microsystem adopts three-dimensional vertical stacking heterogeneous integration. Through the interconnection substrate 1 (high-density interconnection substrate), the digital signal adapter board 2-1 and the radio frequency adapter board 3-1 (silicon-based adapter board) and the top heat sink, the radio frequency channel module 3 and the digital signal processing module 2 are integrated in a single package to realize a highly integrated software radio system.

[0107] In the software radio microsystem, multiple radio frequency channel modules 3 are evenly distributed around the digital signal processing module 2 .

[0108] In this embodiment, the digital signal processing module 2 is located in the center, and the four radio frequency channel modules 3 are located around it.

[0109] The above layout ensures the shortest possible connection between each RF channel module 3 and the digital signal processing module 2, reducing signal delay and loss. At the same time, the RF channel modules 3 maintain a certain isolation distance from each other to reduce crosstalk between channels.

[0110] However, in order to meet some specific design requirements, other layout methods can also be used, and are not limited to the above layout methods. Figure 3 As shown, four radio frequency channel modules 3 may also be arranged on one side of the digital signal processing module 2 .

[0111] In the software radio microsystem, the multiple radio frequency channel modules 3 are homogeneous.

[0112] In the software radio microsystem, the interconnect substrate 1 is a through silicon via substrate;

[0113] The digital signal processing module transfer micro-bumps 2-2 are electrically connected to the corresponding radio frequency transfer micro-bumps 3-2 through the silicon through-via interposer on the interconnect substrate 1.

[0114] In this embodiment, the interconnection substrate 1 is a pre-prepared high-density interconnection circuit board with an internal metal interconnection structure. The circuit board is characterized by using a substrate with copper clad on both sides as the core layer to provide mechanical support and rigidity. The core layer is electrically interconnected on the upper and lower sides through mechanical drilling and electroplating, and the interconnection line pattern is printed on the copper clad layer on both sides. Fine metal interconnection build-up layers are manufactured on both sides of the core layer through electroplating process, and the electrical interconnection between each metal interconnection build-up layer is achieved through ABF (Ajinomoto Build-up Film) insulating film material and laser drilling and electroplating process. The digital signal adapter board 2-1 and the radio frequency adapter board 3-1 use silicon-based adapter boards. This type of adapter board realizes through-silicon vias (TSV) and circuit patterns through etching and electroplating processes to achieve high-density signal interconnection.

[0115] In the software radio microsystem, the bottom array of the interconnect substrate 1 is provided with solder balls 6;

[0116] The solder balls are electrically connected one-to-one to the corresponding intermediate frequency input / output terminals and control signal input / output terminals of the digital signal processing module 2 and the radio frequency channel module 3 .

[0117] In this embodiment, if Figure 3 As shown, the bottom surface of the high-density multi-layer interconnect substrate 1 has an array of BGA solder balls 6. The solder ball array on the bottom surface of the interconnect substrate 1 is used to fix and electrically connect the radio microsystem to the platform circuit board.

[0118] The solder balls are electrically connected one-to-one to the intermediate frequency input / output terminals and control signal input / output terminals of the digital signal processing module 2 and the radio frequency channel module 3, thereby enabling data exchange between the internal modules and the external peripheral circuits. However, this connection method should be determined based on the design requirements of the specific application scenario and the existing experience of those skilled in the art.

[0119] The three-dimensional stacked software-defined radio microsystem of this invention integrates multiple functions required in software-defined radio systems, including radio frequency channels, baseband signal processing, and waveform reconstruction. It addresses the limitations of existing technologies in lightweight platform applications and provides a high-performance, miniaturized, and low-power software-defined radio architecture to meet the stringent payload requirements of lightweight platforms.

[0120] The four RF channel modules 3 correspond to four independent RF transceiver links. Through these four channels, the radio microsystem can simultaneously process wireless signals from different frequency bands or different communication protocols, achieving multi-tasking parallelism.

[0121] For example, two channels can be used for a dual-band communication link, while another two channels can be used for navigation signal reception and spectrum monitoring. Alternatively, four channels can work together in the same frequency band to implement multi-antenna diversity reception, or MIMO communication, thereby enhancing the performance of a single link. This multi-channel configuration provides the system with tremendous flexibility, allowing the division of labor among channels to be dynamically adjusted based on mission requirements. Furthermore, because all channels share the same digital signal processing module, the system can improve processing resource utilization while maintaining a compact overall size.

[0122] Actual measurements show that the radio microsystem of the present invention realizes a functional combination that traditionally requires multiple sets of equipment to complete without increasing the hardware volume, and has high cost performance and application value.

[0123] The software radio microsystem of the present invention has a three-dimensional stacked structure, comprising: a digital signal adapter board having a plurality of digital signal processing module adapter micro-bumps at the bottom; a digital signal processing unit installed on the digital signal adapter board, and the digital signal processing unit is electrically connected to the digital signal processing module adapter micro-bumps; a radio frequency adapter board having a plurality of radio frequency adapter micro-bumps at the bottom; a radio frequency channel unit installed in a corresponding radio frequency adapter board, and the radio frequency channel unit is electrically connected to the radio frequency adapter micro-bumps of the corresponding radio frequency adapter board; the bottoms of the digital signal processing module and the radio frequency channel module are both installed on an interconnection substrate; the digital signal processing unit is electrically connected to the corresponding radio frequency channel unit via the digital signal processing module adapter micro-bumps, the interconnection substrate and the radio frequency adapter micro-bumps in sequence.

[0124] It should also be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or terminal device comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or terminal device comprising the element.

[0125] Finally, it should be noted that the above is a preferred embodiment of this embodiment. It should be noted that although the preferred embodiment of this embodiment has been described, those skilled in the art, once they understand the basic inventive concept of this embodiment, can make certain improvements and modifications without departing from the principles of this embodiment. Such improvements and modifications should also be considered within the scope of protection of this embodiment. Therefore, the appended claims are intended to be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of this embodiment.

Claims

1. A software radio microsystem with a three-dimensional stacked structure, characterized in that: It comprises an interconnection substrate (1), a digital signal processing module (2) and a plurality of radio frequency channel modules (3); The digital signal processing module (2) comprises a digital signal processing unit and a digital signal switching board (2-1); a plurality of digital signal processing module switching micro-bumps (2-2) are provided at the bottom of the digital signal switching board (2-1); The digital signal processing unit is installed above the digital signal adapter board (2-1), and the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected one-to-one with the digital signal processing module adapter micro-bump (2-2); The multiple radio frequency channel modules (3) each comprise a radio frequency channel unit and a radio frequency adapter plate (3-1); the bottom of the radio frequency adapter plate (3-1) is provided with multiple radio frequency adapter micro-bumps (3-2); The radio frequency channel unit is installed in the corresponding radio frequency adapter board (3-1), and the intermediate frequency signal input / output end of the radio frequency channel unit is electrically connected one-to-one with the radio frequency adapter micro-bump (3-2) on the corresponding radio frequency adapter board (3-1); The bottoms of the digital signal processing module (2) and the radio frequency channel module (3) are both mounted on the interconnection substrate (1); so that the intermediate frequency signal input / output end of the digital signal processing unit is electrically connected to the intermediate frequency signal output / input end of the corresponding radio frequency channel unit via the digital signal processing module switching micro-bumps (2-2), the interconnection substrate (1), and the radio frequency switching micro-bumps (3-2) in sequence.

2. The software radio microsystem of the three-dimensional stacked structure according to claim 1, characterized in that: The digital signal processing unit includes an FPGA core and a DSP core interconnected by a bus, and a memory core; the storage data input / output terminal of the memory core is electrically connected to the storage data output / input terminal of the FPGA core and the DSP core respectively; The FPGA core, DSP core and memory core are all packaged on the upper part of the digital signal switching board (2-1), and the upper surfaces of the FPGA core, DSP core and memory core are flush.

3. The software radio microsystem of the three-dimensional stacked structure according to claim 2, characterized in that: The FPGA core, DSP core and memory core are all encapsulated on the upper part of the digital signal adapter board (2-1) through an encapsulation layer (2-3); The upper surfaces of the FPGA core particles, the DSP core particles and the memory core particles are flush with the upper surface of the packaging layer (2-3), or are higher than the upper surface of the packaging layer (2-3).

4. The software radio microsystem of the three-dimensional stacked structure according to claim 1, characterized in that: The radio frequency channel unit includes a plurality of radio frequency chips; The radio frequency adapter plate (3-1) comprises a cover plate (3-1-1), a middle-layer adapter plate (3-1-2), and a bottom-layer adapter plate (3-1-3); and the cover plate (3-1-1), the middle-layer adapter plate (3-1-2), and the bottom-layer adapter plate (3-1-3) are stacked and fixed from top to bottom; Both the middle adapter plate (3-1-2) and the bottom adapter plate (3-1-3) are provided with cavities; At least one radio frequency chip is installed in the cavity of the middle layer adapter board (3-1-2); the other radio frequency chips are installed in the cavity of the bottom layer adapter board (3-1-3); The intermediate frequency signal input / output end corresponding to the radio frequency core particle in the cavity of the middle layer adapter board (3-1-2) is electrically connected to the intermediate frequency signal output / input end corresponding to the radio frequency core particle in the cavity of the bottom layer adapter board (3-1-3) through the middle layer adapter board (3-1-2) and the bottom layer adapter board (3-1-3) in sequence; The control signal input / output ends corresponding to the RF core particles in the cavity of the middle-layer adapter board (3-1-2) are electrically connected to the control signal output / input ends corresponding to the RF core particles in the cavity of the bottom-layer adapter board (3-1-3) through the middle-layer adapter board (3-1-2) and the bottom-layer adapter board (3-1-3) in sequence.

5. The software radio microsystem of the three-dimensional stacked structure according to claim 4, characterized in that: The bottom of the middle-layer adapter plate (3-1-2) is provided with radio frequency core particle adapter micro-bumps (3-1-4); The signal input / output end of the RF core particle in the cavity of the middle-layer adapter board (3-1-2) is electrically connected one-to-one with the RF core particle transfer micro-bump (3-1-4); so that the corresponding signal input / output end of the RF core particle in the cavity of the middle-layer adapter board (3-1-2) is electrically connected with the corresponding signal output / input end of the RF core particle in the cavity of the bottom-layer adapter board (3-1-3) through the middle-layer adapter board (3-1-2), the RF core particle transfer micro-bump (3-1-4) and the bottom-layer adapter board (3-1-3) in sequence.

6. The software radio microsystem of the three-dimensional stacked structure according to any one of claims 1 to 5, characterized in that: Also includes a heat dissipation plate (4); The heat dissipation plate (4) is fixed above the interconnection substrate (1), and the digital signal processing module (2) and the radio frequency channel module (3) are buckled between the heat dissipation plate (4) and the interconnection substrate (1); The bottom of the heat dissipation plate (4) contacts the upper surfaces of the FPGA core, the DSP core and the memory core in the digital signal processing module (2), as well as the upper surface of the radio frequency channel module (3).

7. The software radio microsystem of the three-dimensional stacked structure according to claim 6, characterized in that: A plurality of radio frequency channel modules (3) are evenly arranged around the digital signal processing module (2).

8. The software radio microsystem of the three-dimensional stacked structure according to any one of claims 1 to 5 and 7, characterized in that: The multiple radio frequency channel modules (3) are homogeneous.

9. The software radio microsystem of the three-dimensional stacked structure according to claim 8, characterized in that: The interconnect substrate (1) is a through silicon via substrate; The digital signal processing module transfer micro-bumps (2-2) are electrically connected to corresponding radio frequency transfer micro-bumps (3-2) via a through-silicon via intermediary layer on the interconnect substrate (1).

10. The software radio microsystem of the three-dimensional stacked structure according to claim 9, characterized in that: The bottom array of the interconnect substrate (1) is provided with solder balls; The solder balls are electrically connected one-to-one with the corresponding intermediate frequency input / output terminals and control signal input / output terminals of the digital signal processing module (2) and the radio frequency channel module (3).

Images