Pixel circuit, display panel, display screen and display device

Abstract

The invention relates to a pixel circuit, a display panel, a display screen and a display device. The pixel circuit comprises a first driving transistor, a first storage capacitor, a first data writing transistor and a voltage stabilizing capacitor; wherein the first end of the first storage capacitor is used for receiving a first power supply signal, and the second end of the first storage capacitor is connected with the grid electrode of the first driving transistor; the first electrode of the first data writing transistor is used for receiving a data signal, the second electrode of the first data writing transistor is connected with the grid electrode of the first driving transistor, and the grid electrode of the first data writing transistor is used for receiving a first scanning signal; the first end of the voltage stabilizing capacitor is used for receiving a target scanning signal, the second end of the voltage stabilizing capacitor is connected with the grid electrode of the first driving transistor, and the target scanning signal comprises a first scanning signal. According to the pixel circuit, the display effect of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel circuit, a display panel, a display screen, and a display device. Background Art

[0002] With the continuous development of display technology, partition refresh has been widely used in display panels because it can save power.

[0003] When the refresh rate of the display area is high, the human eye is not sensitive to this frequency, and the possibility of detecting screen flicker is low. When the refresh rate of the display area is low, the human eye is more sensitive to this frequency, and the possibility of detecting screen flicker is high. Therefore, the visual effect of the display area with low refresh rate is poor. Summary of the Invention

[0004] Based on this, it is necessary to provide a pixel circuit, a display panel, a display screen and a display device, aiming to improve the display effect of the display panel.

[0005] In a first aspect, an embodiment of the present application provides a pixel circuit, wherein the pixel circuit includes a first driving transistor, a first storage capacitor, a first data writing transistor and a voltage stabilizing capacitor; wherein,

[0006] A first end of the first storage capacitor is used to receive a first power supply signal, and a second end of the first storage capacitor is connected to the gate of the first driving transistor;

[0007] The first electrode of the first data writing transistor is used to receive a data signal, the second electrode of the first data writing transistor is connected to the gate of the first driving transistor, and the gate of the first data writing transistor is used to receive a first scanning signal;

[0008] The first end of the voltage-stabilizing capacitor is used to receive a target scanning signal, and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, wherein the target scanning signal includes a first scanning signal.

[0009] In a second aspect, an embodiment of the present application further provides a pixel circuit, the pixel circuit comprising a first driving transistor, a first storage capacitor, a first data writing transistor, a first initialization transistor and a voltage stabilizing capacitor; wherein,

[0010] A first end of the first storage capacitor is used to receive a first power supply signal, and a second end of the first storage capacitor is connected to the gate of the first driving transistor;

[0011] The first electrode of the first data writing transistor is used to receive a data signal, the second electrode of the first data writing transistor is connected to the gate of the first driving transistor, and the gate of the first data writing transistor is used to receive a first scanning signal;

[0012] A first electrode of the first A initialization transistor is used to receive a first initialization signal, a second electrode of the first A initialization transistor is connected to the gate of the first driving transistor, and the gate of the first A initialization transistor is used to receive a second scanning signal;

[0013] The first end of the voltage-stabilizing capacitor is used to receive a target scanning signal, and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, wherein the target scanning signal is one of the first scanning signal and the second scanning signal.

[0014] In a third aspect, an embodiment of the present application further provides a display panel, comprising a first display area and a second display area, wherein a refresh frequency of the first display area is lower than a refresh frequency of the second display area; the first display area comprises at least one first pixel circuit, and the second display area comprises at least one second pixel circuit;

[0015] The first pixel circuit includes a first driving transistor, and the second pixel circuit includes a second driving transistor;

[0016] The first voltage stabilization parameter of the first pixel circuit is greater than the second voltage stabilization parameter of the second pixel circuit, wherein the first voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the first driving transistor in the first pixel circuit, and the second voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the second driving transistor in the second pixel circuit.

[0017] In a fourth aspect, the present application also provides a display screen, comprising a cover plate and the display panel of the third aspect.

[0018] In a fifth aspect, the present application also provides a display device, including the display screen of the fourth aspect.

[0019] The pixel circuit provided in the embodiment of the present application includes a first driving transistor, a first storage capacitor, a first data writing transistor and a voltage-stabilizing capacitor. The pixel circuit of the present application has an additional voltage-stabilizing capacitor relative to the pixel circuit in the related art. Since the first end of the voltage-stabilizing capacitor is used to receive the target scanning signal and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, the stability of the gate potential of the first driving transistor can be improved through the voltage-stabilizing capacitor. The gate potential of the first driving transistor is related to the luminous brightness of the corresponding light-emitting element. Therefore, the pixel circuit of the present application can effectively improve the screen flickering in the display area with low refresh frequency, improve the display effect of the display panel, and thereby improve the visual effect of the display panel.

[0020] A display panel provided in an embodiment of the present application includes a first display area and a second display area, wherein the refresh frequency of the first display area is lower than the refresh frequency of the second display area; the first display area includes a plurality of first pixel circuits, and the second display area includes a plurality of second pixel circuits; the first pixel circuit includes a first driving transistor, and the second pixel circuit includes a second driving transistor; since a first voltage stabilization parameter of the first pixel circuit is greater than a second voltage stabilization parameter of the second pixel circuit, and the first voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the first driving transistor in the first pixel circuit, and the second voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the second driving transistor in the second pixel circuit, and since the ability of a capacitor to stabilize the potential difference across it is positively correlated with its capacitance, by making the second voltage stabilization parameter of the first pixel circuit greater than the first voltage stabilization parameter of the second pixel circuit, the stability of the gate potential of the first driving transistor can be improved. Since the gate potential of the second driving transistor is related to the luminous brightness of the corresponding light-emitting element, improving the stability of the gate potential of the first driving transistor can effectively alleviate screen flicker in the first display area, improve the display effect of the first display area, and thereby improve the visual effect of the first display area. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A circuit structure diagram of a pixel circuit in the related art;

[0022] Figure 2 A circuit structure diagram of another pixel circuit provided in an embodiment of the present application;

[0023] Figure 3 A circuit structure diagram of another pixel circuit provided in an embodiment of the present application;

[0024] Figure 4 A circuit structure diagram of another pixel circuit provided in an embodiment of the present application;

[0025] Figure 5 A circuit structure diagram of another pixel circuit provided in an embodiment of the present application;

[0026] Figure 6 A schematic plan view of a display panel provided in an embodiment of the present application;

[0027] Figure 7 A circuit structure diagram of a first pixel circuit provided in an embodiment of the present application;

[0028] Figure 8 A circuit structure diagram of a second pixel circuit provided in an embodiment of the present application;

[0029] Figure 9 A circuit structure diagram of another first pixel circuit provided in an embodiment of the present application;

[0030] Figure 10 A schematic plan view of another display panel provided in an embodiment of the present application;

[0031] Figure 11 A circuit structure diagram of a third pixel circuit provided in an embodiment of the present application;

[0032] Figure 12 A circuit structure diagram of another third pixel circuit provided in an embodiment of the present application;

[0033] Figure 13 A schematic structural diagram of a display device provided in an embodiment of the present application.

[0034] Description of reference numerals:

[0035] 101 - first pixel circuit, 102 - second pixel circuit, 103 - third pixel circuit, 100 - display panel, 200 - display screen, 300 - display device. DETAILED DESCRIPTION

[0036] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present application.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.

[0038] When describing positional relationships, unless otherwise specified, when an element such as a layer, film, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Furthermore, when a layer is referred to as being "under" another layer, it can be directly under or one or more intervening elements may also be present. It will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening elements may also be present.

[0039] In the case of using “including,” “having,” and “comprising” described herein, another component may be added unless a clear limiting term such as “only,” “consisting of,” etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as having one number.

[0040] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this application.

[0041] It should also be understood that when interpreting an element, even if not explicitly described, the element is interpreted as including a range of error, which should be within the acceptable deviation range of the specific value determined by those skilled in the art. For example, "approximately," "approximately," or "substantially" can mean within one or more standard deviations, and is not limited here.

[0042] Furthermore, in the specification, the phrase “planar distribution diagram” refers to a drawing when the target portion is viewed from above, and the phrase “cross-sectional diagram” refers to a drawing when a section taken by vertically cutting the target portion is viewed from the side.

[0043] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the elements in the drawings are drawn only as examples and not necessarily according to the true scale.

[0044] As mentioned in the background technology section, the display panel in the related art is more likely to be perceived as flickering by the human eye at a low refresh rate. Figure 1 , Figure 1This is a circuit diagram of a pixel circuit in the related art. The driver transistor M3 is the core component that controls the brightness of the light-emitting element. The gate voltage of the driver transistor M3 determines the drive current of the driver transistor M3, which directly controls the luminous intensity of the light-emitting element. The storage capacitor Cst maintains the gate voltage of the driver transistor M3 between refreshes, ensuring stable brightness. When the display panel is refreshed, the data signal Vdata is written to the storage capacitor Cst through transistors M2 and M4. The gate voltage of the driver transistor M3 is set to the target value, the drive current is stable, and the light-emitting element maintains a constant brightness. When the gate voltage of the driver transistor M3 is stored by the storage capacitor Cst, leakage from the gate of the driver transistor M3 causes the charge stored in the storage capacitor Cst to be lost over time, causing the gate voltage of the driver transistor M3 to gradually decrease, thereby gradually reducing the brightness of the light-emitting element. Between refreshes, the brightness of the light-emitting element gradually decreases due to leakage until the next refresh, when the gate of the driver transistor M3 is rewritten with the data signal Vdata, and the brightness of the light-emitting element instantly returns to the set value. At high refresh rates (e.g., >60Hz), the refresh interval is short, the storage capacitor Cst needs to maintain voltage for a short time, and the brightness decay is difficult for the human eye to perceive, so the flicker risk is low. At low refresh rates (e.g., <20Hz), the refresh interval is long, and leakage accumulation can easily cause brightness fluctuations exceeding the human eye's perception threshold, so the flicker risk is high.

[0045] Based on the above technical problems, the inventors have discovered that by increasing the capacitance at the gate of the driver transistor in the pixel circuit, the flicker problem of the display panel can be alleviated. Based on this, the inventors further developed the technical solution of the embodiment of the present application. Specifically, the pixel circuit provided in the embodiment of the present application includes a first driver transistor, a first storage capacitor, a first data write transistor and a voltage-stabilizing capacitor; wherein the first end of the first storage capacitor is used to receive a first power supply signal, and the second end of the first storage capacitor is connected to the gate of the first driver transistor; the first electrode of the first data write transistor is used to receive a data signal, the second electrode of the first data write transistor is connected to the gate of the first driver transistor, and the gate of the first data write transistor is used to receive a first scan signal; the first end of the voltage-stabilizing capacitor is used to receive a target scan signal, and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driver transistor, wherein the target scan signal includes the first scan signal. Using the above technical solution, by adding a voltage-stabilizing capacitor at the gate of the first driver transistor, the sensitivity of the gate voltage of the first driver transistor to the leakage current can be reduced in the event of leakage of the gate of the first driver transistor, thereby preventing the accumulation of leakage current from causing brightness fluctuations exceeding the threshold perceptible to the human eye, thereby alleviating the flicker phenomenon of the display panel and improving the display performance of the display panel.

[0046] The above is the core concept of this application. The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making any creative work are within the scope of protection of this application.

[0047] In an exemplary embodiment, the present application provides a pixel circuit, which includes a first driving transistor T1-1, a first storage capacitor C1-1, a first data writing transistor T2-1 and a voltage stabilizing capacitor C2.

[0048] A first end of the first storage capacitor C1 - 1 is used to receive the first power signal PVDD, and a second end of the first storage capacitor C1 - 1 is connected to the gate of the first driving transistor T1 - 1 .

[0049] The first electrode of the first data writing transistor T2 - 1 is used to receive the data signal Vdata, the second electrode T2 of the first data writing transistor is connected to the gate of the first driving transistor T1 - 1 , and the gate of the first data writing transistor T1 is used to receive the first scanning signal S1 .

[0050] A first end of the stabilizing capacitor C2 is used to receive a target scanning signal SX, and a second end of the stabilizing capacitor C2 is connected to the gate of the first driving transistor T1 - 1 , wherein the target scanning signal SX includes a first scanning signal S1 .

[0051] It can be understood that in the data writing phase of the pixel circuit, the data signal Vdata is written into the gate of the first driving transistor T1-1 through the first data writing transistor T2-1 and the first driving transistor T1-1. The first storage capacitor C1-1 and the voltage-stabilizing capacitor C2 can store charge to maintain the stability of the gate potential of the first driving transistor T1-1. In the present application, since the voltage-stabilizing capacitor C2 is added to the pixel circuit, the capacitance at the gate of the first driving transistor T1-1 in the pixel circuit of the present application is greater than the capacitance at the gate of the driving transistor M3 in the pixel circuit of the related art. Under the data signal Vdata of the same amplitude, the total amount of charge stored by the first storage capacitor C1-1 and the voltage-stabilizing capacitor C2 of the present application will be greater than the total amount of charge stored by the storage capacitor Cst in the related art. Furthermore, within the same refresh interval, the gate potential of the first driving transistor T1-1 after leakage in the present application will be higher than the gate potential of the driving transistor M3 after leakage in the related art. Therefore, the brightness fluctuation degree of the light-emitting element in this application will be smaller than that of the light-emitting element in the related art. Therefore, the pixel circuit of this application can avoid leakage accumulation causing brightness fluctuations exceeding the threshold that can be perceived by the human eye, thereby alleviating the flicker phenomenon of the display panel.

[0052] The pixel circuit provided in the embodiment of the present application includes a first driving transistor, a first storage capacitor, a first data writing transistor and a voltage-stabilizing capacitor. The pixel circuit of the present application has an additional voltage-stabilizing capacitor relative to the pixel circuit in the related art. Since the first end of the voltage-stabilizing capacitor is used to receive the target scanning signal and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, the stability of the gate potential of the first driving transistor can be improved through the voltage-stabilizing capacitor. The gate potential of the first driving transistor is related to the luminous brightness of the corresponding light-emitting element. Therefore, the pixel circuit of the present application can effectively improve the screen flickering in the display area with low refresh frequency, improve the display effect of the display panel, and thereby improve the visual effect of the display panel.

[0053] In an exemplary embodiment, a first terminal of the voltage-stabilizing capacitor C2 is connected to the gate of the first data-writing transistor T2 - 1 .

[0054] In the application, since a voltage-stabilizing capacitor C2 is added at the gate of the first driving transistor T1-1 in the present application, the capacitance at the gate of the first driving transistor T1-1 is increased, the data signal Vdata may not be written sufficiently during the data writing phase of the pixel circuit. For example, when the display panel is in a black or dark state, the amplitude of the data signal Vdata needs to be 6.8V, but when the capacitance at the gate of the first driving transistor T1-1 is increased, 7.2V or even a higher voltage is required.

[0055] In this embodiment, to address the issue of insufficient data signal Vdata write, the first end of the voltage-stabilizing capacitor C2 can be connected to the gate of the first data write transistor T2-1, thereby reusing the first scan signal S1 as the target scan signal SX. This is because the first data write transistor T2-1 is a low-temperature polysilicon transistor in both LTPO (Low-temperature Poly-Crystalline Silicon and Oxide) and LTPS (Low-temperature Poly-Silicon) pixel circuits. The active level of a low-temperature polysilicon transistor is low, and the inactive level is high. By reusing the first scan signal S1 as the target scan signal SX, at the end of the data write phase of the pixel circuit, the first scan signal S1 transitions from a low level to a high level, i.e., the potential at the first end of the voltage-stabilizing capacitor C2 transitions from a low level to a high level, thereby increasing the potential at the second end of the voltage-stabilizing capacitor C2 (i.e., the gate of the first drive transistor T1-1), thereby compensating for insufficient data signal Vdata write. In this way, the pixel circuit of the present application not only helps to improve the flicker phenomenon of the display panel, but also helps to improve the dark state voltage.

[0056] In this embodiment, by multiplexing the first scan signal S1 as the target scan signal SX, the potential of the gate of the first driving transistor T1-1 can be increased by the transition of the first scan signal S1 when the first data writing transistor T2-1 is turned off, thereby helping to improve the dark state voltage.

[0057] In an exemplary embodiment, see Figure 3 The pixel circuit further includes a first threshold compensation transistor T3-1, which is a low-temperature polysilicon transistor.

[0058] A first electrode of the first threshold compensation transistor T3-1 is connected to a first electrode of the first driving transistor T1-1, a second electrode of the first threshold compensation transistor T3-1 is connected to a gate of the first driving transistor T1-1, and a gate of the first threshold compensation transistor T3-1 is used to receive a first scanning signal S1.

[0059] It is understood that the pixel circuit also includes a first threshold compensation transistor T3-1. Both the first threshold compensation transistor T3-1 and the first data write transistor T2-1 are low-temperature polysilicon transistors. During the data write phase of the pixel circuit, the first threshold compensation transistor T3-1 and the first data write transistor T2-1 are simultaneously turned on in response to the first scan signal S1, so that the data signal Vdata is written to the gate of the first drive transistor T1-1.

[0060] In application, the present application can set the first end of the voltage-stabilizing capacitor C2 to be connected to the gate of the first threshold compensation transistor T3-1. By setting the first end of the voltage-stabilizing capacitor C2 to be connected to the gate of the first threshold compensation transistor T3-1, the first scanning signal S1 can be reused as the target scanning signal SX. Then, at the end of the data writing phase of the pixel circuit, the first scanning signal S1 jumps from a low level to a high level, that is, the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, driving the second end of the voltage-stabilizing capacitor C2, that is, the potential of the gate of the first driving transistor T1-1, to be pulled up, thereby solving the problem of insufficient writing of the data signal Vdata.

[0061] In this embodiment, by multiplexing the first scanning signal S1 as the target scanning signal SX, the potential of the gate of the first driving transistor T1-1 can be increased by the transition of the first scanning signal S1 when the first threshold compensation transistor T3-1 is turned off, thereby helping to improve the dark state voltage.

[0062] In an exemplary embodiment, see Figure 4 The present application also provides a pixel circuit, which includes a first driving transistor T1-1, a first storage capacitor C1-1, a first data writing transistor T2-1, a first initialization transistor T4-1 and a voltage stabilizing capacitor C2.

[0063] A first end of the first storage capacitor C1 - 1 is used to receive the first power signal PVDD, and a second end of the first storage capacitor C1 - 1 is connected to the gate of the first driving transistor T1 - 1 .

[0064] The first electrode of the first data writing transistor T2-1 is used to receive the data signal Vdata, the second electrode of the first data writing transistor T2-1 is connected to the gate of the first driving transistor T1-1, and the gate of the first data writing transistor T2-1 is used to receive the first scanning signal S1.

[0065] A first electrode of the first A initialization transistor T4 - 1 is used to receive a first initialization signal Vref1 , a second electrode of the first A initialization transistor T4 - 1 is connected to a gate of the first driving transistor T1 - 1 , and a gate of the first A initialization transistor T4 - 1 is used to receive a second scan signal S2 .

[0066] A first end of the stabilizing capacitor C2 is used to receive a target scanning signal SX, and a second end of the stabilizing capacitor C2 is connected to the gate of the first driving transistor, wherein the target scanning signal SX is one of the first scanning signal S1 and the second scanning signal S2.

[0067] It can be understood that in the data writing phase of the pixel circuit, the data signal Vdata is written into the gate of the first driving transistor T1-1 through the first data writing transistor T2-1 and the first driving transistor T1-1, and the first storage capacitor C1-1 and the voltage-stabilizing capacitor C2 store charge to maintain the stability of the gate potential of the first driving transistor T1-1. In the present application, since the voltage-stabilizing capacitor C2 is added to the pixel circuit, the capacitance at the gate of the first driving transistor T1-1 in the pixel circuit of the present application is greater than the capacitance at the gate of the driving transistor M3 in the pixel circuit of the related art. Under the data signal Vdata of the same amplitude, the total amount of charge stored by the first storage capacitor C1-1 and the voltage-stabilizing capacitor C2 of the present application will be greater than the total amount of charge stored by the storage capacitor Cst in the related art. Furthermore, within the same refresh interval, the gate potential of the first driving transistor T1-1 after leakage in the present application will be higher than the gate potential of the driving transistor M3 after leakage in the related art. Therefore, the brightness fluctuation degree of the light-emitting element in this application will be smaller than that of the light-emitting element in the related art. Therefore, the pixel circuit of this application can avoid leakage accumulation causing brightness fluctuations exceeding the threshold that can be perceived by the human eye, thereby alleviating the flicker phenomenon of the display panel.

[0068] In an exemplary embodiment, see Figure 4 The pixel circuit further includes a first threshold compensation transistor T3-1, which is a low-temperature polysilicon transistor.

[0069] A first electrode of the first threshold compensation transistor T3-1 is connected to a first electrode of the first driving transistor T1-1, a second electrode of the first threshold compensation transistor T3-1 is connected to a gate of the first driving transistor T1-1, and a gate of the first threshold compensation transistor T3-1 is used to receive a first scanning signal S1.

[0070] In applications, the first scanning signal S1 can be multiplexed into the target scanning signal SX, and the first end of the stabilizing capacitor C2 is connected to the gate of the first threshold compensation transistor T3 - 1 or the gate of the first data writing transistor T2 - 1 .

[0071] It can be understood that since a voltage-stabilizing capacitor C2 is added to the gate of the first driving transistor T1-1 in this application, the capacitance at the gate of the first driving transistor T1-1 is increased, the data signal Vdata may be insufficiently written during the data writing phase of the pixel circuit.

[0072] In order to solve the problem of insufficient writing of the data signal Vdata, the first end of the voltage-stabilizing capacitor C2 can be set to be connected to the gate of the first data writing transistor T2-1 or the gate of the first threshold compensation transistor T3-1, that is, the first scanning signal S1 is reused as the target scanning signal SX. Since the first data writing transistor T2-1 and the first threshold compensation transistor T3-1 are both low-temperature polysilicon transistors. At the end of the data writing phase of the pixel circuit, the first scanning signal S1 jumps from a low level to a high level, that is, the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, driving the second end of the voltage-stabilizing capacitor C2, that is, the potential of the gate of the first driving transistor T1-1, to be pulled up, thereby compensating for the insufficient writing of the data signal Vdata. In this way, the pixel circuit of the present application not only helps to improve the flickering phenomenon of the display panel, but also helps to improve the dark state voltage.

[0073] In this embodiment, by multiplexing the first scanning signal S1 as the target scanning signal SX, the potential of the gate of the first driving transistor T1-1 can be increased by the jump of the first scanning signal S1 when the first data writing transistor T2-1 and the first threshold compensation transistor T3-1 are turned off, thereby helping to improve the dark state voltage.

[0074] In an exemplary embodiment, the target scanning signal SX is the second scanning signal S2 , and the first end of the stabilizing capacitor C2 is connected to the gate of the first A initialization transistor T4 - 1 .

[0075] In an application, when the first-A initialization transistor T4-1 is a low-temperature polysilicon transistor, the first end of a voltage-stabilizing capacitor C2 can be connected to the gate of the first-A initialization transistor T4-1, i.e., the second scan signal S2 is reused as the target scan signal SX to address the problem of insufficient data signal Vdata write. By reusing the second scan signal S2 as the target scan signal SX, at the end of the first reset phase of the pixel circuit (the phase of resetting the gate of the first drive transistor T1-1), the second scan signal S2 jumps from a low level to a high level, i.e., the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, driving the second end of the voltage-stabilizing capacitor C2, i.e., the gate of the first drive transistor T1-1, to rise in potential, thereby addressing the problem of insufficient data signal Vdata write.

[0076] In this embodiment, by multiplexing the second scanning signal S2 as the target scanning signal SX, the potential of the gate of the first driving transistor T1-1 can be raised by the jump of the second scanning signal S2 when the first threshold compensation transistor T3-1 is turned off, thereby helping to solve the problem of insufficient writing of the data signal Vdata and improve the dark state voltage.

[0077] In an exemplary embodiment, see Figure 5 The pixel circuit further includes a first threshold compensation transistor T3 - 1 , which is a metal oxide transistor.

[0078] A first electrode of the first threshold compensation transistor T3-1 is connected to a first electrode of the first driving transistor T1-1, a second electrode of the first threshold compensation transistor T3-1 is connected to a gate of the first driving transistor T3, and a gate of the first threshold compensation transistor T3-1 is used to receive a third scanning signal S3.

[0079] In practice, the first threshold compensation transistor T3-1 and the first A initialization transistor T4-1 can be metal oxide transistors. It will be understood that for metal oxide transistors, when the gate of the metal oxide transistor receives a high level, the metal oxide transistor is turned on; when the gate of the metal oxide transistor receives a low level, the metal oxide transistor is turned off. If the second scan signal S2 or the third scan signal S3 is reused as the target scan signal SX, this will cause the second scan signal S2 or the third scan signal S3 to jump from a high level to a low level at the end of the first reset phase (the phase for resetting the gate of the first drive transistor T1-1) or the threshold compensation phase, lowering the potential of the second end of the voltage-stabilizing capacitor C2, i.e., the gate of the first drive transistor T1-1, and exacerbating the problem of insufficient data signal Vdata being written. Therefore, in the present application, when the first threshold compensation transistor T3-1 and the first A initialization transistor T4-1 can be metal oxide transistors, the present application can set the first end of the voltage-stabilizing capacitor C2 to be connected to the gate of the first data writing transistor T2-1, that is, the first scanning signal S1 is reused as the target scanning signal SX. At the end of the data writing phase of the pixel circuit, the first scanning signal S1 jumps from a low level to a high level, that is, the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, thereby driving the second end of the voltage-stabilizing capacitor C2, that is, the potential of the gate of the first driving transistor T1-1, to be pulled up, thereby solving the problem of insufficient writing of the data signal Vdata.

[0080] In this embodiment, by multiplexing the first scan signal S1 as the target scan signal SX, the potential of the gate of the first driving transistor T1-1 can be increased by the transition of the first scan signal S1 when the first data writing transistor T2-1 is turned off, thereby helping to improve the dark state voltage.

[0081] In an exemplary embodiment, see Figure 6 The present application provides a display panel 100, which includes a first display area AA1 and a second display area AA2. The refresh frequency of the first display area AA1 is lower than the refresh frequency of the second display area AA2; the first display area AA1 includes at least one first pixel circuit 101, and the second display area AA2 includes at least one second pixel circuit 102.

[0082] The first pixel circuit 101 includes a first driving transistor T1 - 1 , and the second pixel circuit 102 includes a second driving transistor T1 - 2 .

[0083] The first voltage stabilization parameter of the first pixel circuit 101 is greater than the second voltage stabilization parameter of the second pixel circuit 102, wherein the first voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the first driving transistor T1-1 in the first pixel circuit 101, and the second voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the second driving transistor T1-2 in the second pixel circuit 102.

[0084] It can be understood that the first display area AA1 is a low refresh area in the display panel, and the second display area AA2 is a high refresh area in the display panel.

[0085] In the second display area AA2 of the present application, when the refresh frequency is ≥60Hz, the light and dark alternation speed of each light-emitting element in the second display area AA2 is relatively fast (for example, 60 times per second at 60Hz, and a refresh interval of 16.7ms). The human eye cannot distinguish a single brightness change, but instead "fuses" the brightness of multiple flashes into a stable visual effect, which is similar to the superposition effect of "visual persistence + rapid refresh".

[0086] In the first display area AA1 of the present application, at a low refresh rate (e.g., when the refresh rate is ≤20 Hz), the light-emitting elements in the first display area AA1 alternate between bright and dark at a relatively slow rate (e.g., 20 refreshes per second at 20 Hz, with a refresh interval of 50 ms). Because the first voltage regulation parameter of the first pixel circuit 101 in the first display area AA1 is greater than the second voltage regulation parameter of the second pixel circuit 102 in the second display area AA2, under data signals Vdata of the same amplitude, the total charge stored in the capacitors connected to the gate of the first driver transistor T1-1 in the first pixel circuit 101 of the present application is greater than the total charge stored in the capacitors connected to the gate of the second driver transistor T1-2 in the second pixel circuit 102. Therefore, even if the refresh interval of the first pixel circuit 101 is relatively long, the voltage in the first pixel circuit 101 connected to the gate of the first driver transistor T1-1 remains highly stable, resulting in relatively small fluctuations in the brightness of the light-emitting elements in the first display area AA1, thereby preventing flickering in the first display area AA1.

[0087] A display panel provided in an embodiment of the present application includes a first display area and a second display area, wherein the refresh frequency of the first display area is lower than the refresh frequency of the second display area; the first display area includes a plurality of first pixel circuits, and the second display area includes a plurality of second pixel circuits; the first pixel circuit includes a first driving transistor, and the second pixel circuit includes a second driving transistor; since a first voltage stabilization parameter of the first pixel circuit is greater than a second voltage stabilization parameter of the second pixel circuit, and the first voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the first driving transistor in the first pixel circuit, and the second voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the second driving transistor in the second pixel circuit, and since the ability of a capacitor to stabilize the potential difference across it is positively correlated with its capacitance, by making the second voltage stabilization parameter of the first pixel circuit greater than the first voltage stabilization parameter of the second pixel circuit, the stability of the gate potential of the first driving transistor can be improved. Since the gate potential of the first driving transistor is related to the luminance of the corresponding light-emitting element, improving the stability of the gate potential of the first driving transistor can effectively alleviate screen flicker in the first display area, improve the display effect of the first display area, and thereby improve the visual effect of the first display area.

[0088] In an exemplary embodiment, see Figure 7 and Figure 8 The first pixel circuit 101 includes a first storage capacitor C1-1, and the second pixel circuit 102 includes a second storage capacitor C1-2.

[0089] A first end of the first storage capacitor C1 - 1 is used to receive a first power signal PVDD, and a second end of the first storage capacitor C1 - 1 is connected to the gate of the first driving transistor.

[0090] A first end of the second storage capacitor C1 - 2 is used to receive the first power signal PVDD, and a second end of the second storage capacitor C1 - 2 is connected to the gate of the second driving transistor.

[0091] The capacitance of the first storage capacitor C1-1 is greater than the capacitance of the second storage capacitor C1-2.

[0092] In an example, see Figure 7 and Figure 8 , taking the first pixel circuit 101 and the second pixel circuit 102 as an example, both of which are LTPS type pixel circuits, Figure 7 FIG. 1 is a circuit structure diagram of the first pixel circuit 101 in an example. Figure 8: This is a circuit diagram of the second pixel circuit 102 in an example. The first pixel circuit 101 may include a first driving transistor T1-1, a first data writing transistor T2-1, a first threshold compensation transistor T3-1, a first A initialization transistor T4-1, a second A initialization transistor T5-1, a first A emission control transistor T6-1, a second A emission control transistor T7-1, a first bias adjustment transistor T8-1, and a first storage capacitor C1-1. The second pixel circuit 102 may include a second driving transistor T1-2, a second data writing transistor T2-2, a second threshold compensation transistor T3-2, a first B initialization transistor T4-2, a second B initialization transistor T5-2, a first B emission control transistor T6-2, a second B emission control transistor T7-2, a second bias adjustment transistor T8-2, and a second storage capacitor C1-2.

[0093] A first end of the first storage capacitor C1-1 is used to receive the first power signal PVDD, and a second end of the first storage capacitor C1-1 is connected to the gate of the first driving transistor T1-1. A first end of the second storage capacitor C1-2 is used to receive the first power signal PVDD, and a second end of the second storage capacitor C1-2 is connected to the gate of the second driving transistor T1-2.

[0094] In this embodiment, the capacitance of the first storage capacitor C1-1 can be greater than the capacitance of the second storage capacitor C1-2. Since the capacitance of the first storage capacitor C1-1 is greater than the capacitance of the second storage capacitor C1-2, the first storage capacitor C1-1 can store a larger amount of charge. Consequently, although the charge stored in the first storage capacitor C1-1 will be lost over time during the refresh interval, a larger amount of charge will still remain in the first storage capacitor C1-1 before the next refresh. In other words, the brightness of the light-emitting element corresponding to the first driving transistor T1-1 will fluctuate less during the refresh interval. Therefore, the flicker of the image in the first display area can be effectively improved, the display effect of the first display area can be enhanced, and the visual effect of the first display area can be improved.

[0095] In this embodiment, since the capacitance of the first storage capacitor C1-1 is greater than that of the second storage capacitor C1-2, the first storage capacitor C1-1 has a stronger charge storage capability, ensuring that a larger amount of charge remains in the first storage capacitor C1-1 when the first pixel circuit 101 is refreshed next time. This means that the potential of the first driving transistor T1-1 decreases less, and the brightness fluctuation of the light-emitting element corresponding to the first driving transistor T1-1 during the refresh interval is smaller. This effectively reduces screen flicker in the first display area.

[0096] In an exemplary embodiment, the first pixel circuit 101 may be the pixel circuit in any of the above embodiments, that is, the first pixel circuit 101 of the present application may further be provided with a voltage-stabilizing capacitor C2 .

[0097] In this embodiment, the capacitance of the first storage capacitor C1-1 may be equal to the capacitance of the second storage capacitor C1-2. Since the first pixel circuit 101 is also provided with a voltage stabilizing capacitor C2, the sum of the capacitance of the first storage capacitor C1-1 and the capacitance of the voltage stabilizing capacitor C2 in the first pixel circuit 101 is greater than the capacitance of the second storage capacitor C1-2 in the second pixel circuit 102. That is, in this application, the first voltage stabilizing parameter of the first pixel circuit 101 is greater than the second voltage stabilizing parameter of the second pixel circuit 102.

[0098] Taking the first pixel circuit 101 as an LTPS type pixel circuit as an example, the second end of the voltage-stabilizing capacitor C2 can receive the first scanning signal S1 or the second scanning signal S2. Furthermore, at the end of the first reset phase of the pixel circuit (the phase for resetting the gate of the first driving transistor T1-1), the second scanning signal S2 jumps from a low level to a high level, that is, the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, which drives the second end of the voltage-stabilizing capacitor C2, that is, the potential of the gate of the first driving transistor T1-1, to be pulled up, thereby compensating for the problem of insufficient writing of the data signal Vdata. Alternatively, at the end of the data writing phase of the pixel circuit, the second scanning signal S2 jumps from a low level to a high level, that is, the potential at the first end of the voltage-stabilizing capacitor C2 jumps from a low level to a high level, which drives the second end of the voltage-stabilizing capacitor C2, that is, the potential of the gate of the first driving transistor T1-1, to be pulled up, thereby compensating for the problem of insufficient writing of the data signal Vdata.

[0099] In this embodiment, by multiplexing the first scan signal S1 or the second scan signal S2 as the target scan signal SX, the potential of the gate of the first driving transistor T1-1 can be raised by the jump of the first scan signal S1 when the first data writing transistor T2-1 is turned off, or the jump of the second scan signal S2 when the first A initialization transistor T4-1 is turned off, thereby helping to compensate for the problem of insufficient writing of the data signal Vdata and improving the dark state voltage.

[0100] In an exemplary embodiment, see Figure 10 and Figure 11 The display panel 100 further includes a transition display area AA3 , which is located between the first display area AA1 and the second display area AA2 .

[0101] The transition display area AA3 includes a third pixel circuit 103 , and the third pixel circuit 103 includes a third driving transistor T1 - 3 .

[0102] The third voltage regulation parameter of the third pixel circuit 103 is less than or equal to the first voltage regulation parameter and greater than or equal to the second voltage regulation parameter, wherein the third voltage regulation parameter is the sum of the capacitances of the capacitors connected to the gate of the third driving transistor T1-3 in the third pixel circuit 103.

[0103] In applications, by providing a transitional display area AA3 between the first display area AA1 and the second display area AA2, the transitional display area AA3 can act as a buffer when the display panel displays content, allowing for a smooth transition in the refresh rate of the screen pixels, reducing the likelihood of flicker and afterimages, protecting the user's eyes, and also helping to improve screen display quality. Furthermore, to prevent flicker in the transitional display area AA3, the present application can set the third voltage regulation parameter of the third pixel circuit 103 in the transitional display area AA3 to be less than or equal to the first voltage regulation parameter, and greater than or equal to the second voltage regulation parameter, to achieve a transition in the voltage regulation parameters.

[0104] When the display panel is a foldable display panel, the transition display area AA3 may be a bending area of ​​the display panel.

[0105] In this embodiment, by setting the transition display area AA3, the refresh frequency of the screen pixels can be smoothly transitioned, the probability of flickering and afterimages can be reduced, and the display effect of the display panel can be improved.

[0106] In an exemplary embodiment, the third voltage regulation parameter of the third pixel circuit 103 is positively correlated with the row number where the third pixel circuit 103 is located.

[0107] It can be understood that since the function of the transitional display area AA3 is to achieve a smooth transition from the high refresh rate of the first display area AA1 to the low refresh rate of the second display area AA2, the refresh rates of the third pixel circuits 103 located in different rows in the transitional display area AA3 are different. For example, the refresh rate of the third pixel circuit 103 near the second display area AA2 is higher than the refresh rate of the third pixel circuit 103 near the first display area AA1. In other words, the refresh rate of the third pixel circuit 103 is negatively correlated with the row number of the third pixel circuit 103. To prevent flickering of the light-emitting element corresponding to the third pixel circuit 103, the present application can set the third voltage regulation parameter of the third pixel circuit 103 to be positively correlated with the row number of the third pixel circuit 103.

[0108] In this embodiment, by setting the third voltage stabilization parameter of the third pixel circuit 103 to be positively correlated with the number of rows where the third pixel circuit 103 is located, a smooth transition of the third voltage stabilization parameter of the third pixel circuit 103 between the second voltage stabilization parameter and the first voltage stabilization parameter can be achieved, which helps to improve the display effect of the transition display area AA3.

[0109] In an exemplary embodiment, the third voltage stabilization parameters of the third pixel circuits 103 in different rows are different, and the third voltage stabilization parameters of the third pixel circuits 103 increase with the number of the row where the third pixel circuits 103 are located.

[0110] In application, the refresh frequency of the third pixel circuit 103 can be set to be different, and the refresh frequency of the third pixel circuit 103 decreases with the number of rows where the third pixel circuit 103 is located. Correspondingly, the third voltage stabilization parameters of the third pixel circuits 103 in different rows can be set to be different, and the third voltage stabilization parameters of the third pixel circuit 103 increase with the number of rows where the third pixel circuit 103 is located.

[0111] In an example, see Figure 7 、 Figure 8 and Figure 11 The third pixel circuit 103 may include a third driving transistor T1-3, a third data writing transistor T2-3, a third threshold compensation transistor T3-3, a first C initialization transistor T4-3, a second C initialization transistor T5-3, a first C light emission control transistor T6-3, a second C light emission control transistor T7-3, a third bias adjustment transistor T8-3, and a third storage capacitor C1-3. The second storage capacitors C1-2 have the same capacitance, the first storage capacitors C1-1 have the same capacitance, the second storage capacitors C1-2 have a smaller capacitance than the third storage capacitor C1-3, the third storage capacitor C1-3 has a smaller capacitance than the first storage capacitor C1-1, and the capacitance of each third storage capacitor C1-3 increases with the number of rows in which the third pixel circuit 103 is located.

[0112] In another example, see Figure 8 、 Figure 9 、 Figure 12The third pixel circuit 103 may include a third driving transistor T1-3, a third data writing transistor T2-3, a third threshold compensation transistor T3-3, a first C initialization transistor T4-3, a second C initialization transistor T5-3, a first C light emission control transistor T6-3, a second C light emission control transistor T7-3, a third bias adjustment transistor T8-3, a third storage capacitor C1-3, and a compensation capacitor C3. The capacitance of each first storage capacitor C1-1, each second storage capacitor C1-2, and each third storage capacitor C1-3 is the same, the capacitance of the voltage stabilizing capacitor C2 in each first pixel circuit 101 is the same, and the capacitance of the compensation capacitor C3 in each third pixel circuit 103 is different. The capacitance of the compensation capacitor C3 in each third pixel circuit 103 increases with the number of rows where the third pixel circuit 103 is located. For example, the transition display area AA3 includes n rows of third pixel circuits 103, wherein the capacitance of the compensation capacitor C3 in the first row of the third pixel circuit 103 is 1 / n of the capacitance of the voltage-stabilizing capacitor C2; the capacitance of the compensation capacitor C3 in the second row of the third pixel circuit 103 is 2 / n of the capacitance of the voltage-stabilizing capacitor C2; the capacitance of the compensation capacitor C3 in the third row of the third pixel circuit 103 is 3 / n of the capacitance of the voltage-stabilizing capacitor C2; ...; the capacitance of the compensation capacitor C3 in the i-th row of the third pixel circuit 103 is i / n of the capacitance of the voltage-stabilizing capacitor C2; the capacitance of the compensation capacitor C3 in the i+1-th row of the third pixel circuit 103 is (i+1) / n of the capacitance of the voltage-stabilizing capacitor C2; ...; the capacitance of the compensation capacitor C3 in the n-1-th row of the third pixel circuit 103 is (n-1) / n of the capacitance of the voltage-stabilizing capacitor C2; and the capacitance of the compensation capacitor C3 in the n-th row of the third pixel circuit 103 is equal to the capacitance of the voltage-stabilizing capacitor C2. The third pixel circuits 103 in the first row are the third pixel circuits 103 closest to the second display area AA2 in the transition display area AA3 , and the third pixel circuits 103 in the nth row are the third pixel circuits 103 closest to the first display area AA1 in the transition display area AA3 .

[0113] In this embodiment, by setting the third voltage stabilization parameter of the third pixel circuit 103 to increase with the number of rows where the third pixel circuit 103 is located, it is possible to avoid excessive fluctuations in the brightness of the light-emitting elements corresponding to each third pixel circuit 103, thereby ensuring that the brightness of the light-emitting elements corresponding to each third pixel circuit 103 is stable, thereby improving the display effect of the display panel.

[0114] In an exemplary embodiment, the structure of the third pixel circuit 103 is the same as that of the first pixel circuit 101 or the second pixel circuit 102 .

[0115] In an example, see Figure 11The structure of the third pixel circuit 103 may be the same as that of the second pixel circuit 102, that is, a third storage capacitor C1-3 is provided in the third pixel circuit 103, and the capacitance of the third storage capacitor C1-3 is less than or equal to the capacitance of the first storage capacitor C1-1, and greater than or equal to the capacitance of the second storage capacitor C1-2.

[0116] In another example, see Figure 12 The structure of the third pixel circuit 103 may be the same as that of the first pixel circuit 101. A compensation capacitor C3 is added to the third pixel circuit 103. The first end of the compensation capacitor C3 is connected to the gate of the third driving transistor T1-3. The second end of the compensation capacitor C3 is used to receive the target scanning signal SX. The target scanning signal SX can reuse the first scanning signal or the second scanning signal. The effective level of the target scanning signal SX is a low level, and the invalid level is a high level. The potential at the gate of the third driving transistor T1-3 is increased by the level jump of the target scanning signal SX to compensate for the problem of insufficient writing of the data signal Vdata.

[0117] In an exemplary embodiment, the refresh frequency of the first display area AA1 is greater than or equal to 60 Hz, the refresh frequency of the second display area AA2 is less than or equal to 20 Hz, and the refresh frequency of the transition display area AA3 is between 60 Hz and 20 Hz.

[0118] Among them, the refresh frequency of the third pixel circuit 103 in the transition display area AA3 is negatively correlated with the number of rows where the third pixel circuit 103 is located, and the third voltage stabilization parameter of the third pixel circuit 103 is positively correlated with the number of rows where the third pixel circuit 103 is located. For example, the refresh frequencies of the third pixel circuits 103 in different rows are different, and the refresh frequency of the third pixel circuit 103 decreases with the number of rows where the third pixel circuit 103 is located, and the third voltage stabilization parameter of the third pixel circuit 103 increases with the number of rows where the third pixel circuit 103 is located.

[0119] In this embodiment, by setting the refresh frequency of the transitional display area AA3 between the refresh frequency of the first display area AA1 and the refresh frequency of the second display area AA2, a uniform transition of the refresh frequency can be ensured, thereby improving the display quality of the display panel. By setting the third voltage regulation parameter of the third pixel circuit 103 to increase with the number of rows in which the third pixel circuit 103 is located, excessive fluctuations in the brightness of the light-emitting elements corresponding to each third pixel circuit 103 can be avoided, ensuring stable brightness of the light-emitting elements corresponding to each third pixel circuit 103, and further improving the display quality of the display panel.

[0120] In a detailed embodiment, please refer to Figure 8 、 Figure 9 、 Figure 10 and Figure 12The display panel includes a first display area AA1, a second display area AA2, and a transitional display area AA3. The transitional display area AA3 is located between the first display area AA1 and the second display area AA2. The first display area AA1 includes at least one first pixel circuit 101, the second display area AA2 includes at least one second pixel circuit 102, and the transitional display area AA3 includes at least one third pixel circuit 103. The refresh rate of the first display area AA1 is lower than that of the second display area AA2, and the refresh rate of the transitional display area AA3 is between the refresh rates of the first display area AA1 and the second display area AA2.

[0121] The first pixel circuit 101 includes a first driving transistor T1-1, a first data writing transistor T2-1, a first threshold compensation transistor T3-1, a first A initialization transistor T4-1, a second A initialization transistor T5-1, a first A emission control transistor T6-1, a second A emission control transistor T7-1, a first bias adjustment transistor T8-1, a first storage capacitor C1-1, and a voltage stabilizing capacitor C2. The second pixel circuit 102 may include a second driving transistor T1-2, a second data writing transistor T2-2, a second threshold compensation transistor T3-2, a first B initialization transistor T4-2, a second B initialization transistor T5-2, a first B emission control transistor T6-2, a second B emission control transistor T7-2, a second bias adjustment transistor T8-2, and a second storage capacitor C1-2. The third pixel circuit 103 includes a third driving transistor T1-3, a third data writing transistor T2-3, a third threshold compensation transistor T3-3, a first π initialization transistor T4-3, a second π initialization transistor T5-3, a first π emission control transistor T6-3, a second π emission control transistor T7-3, a third bias adjustment transistor T8-3, a third storage capacitor C1-3 and a compensation capacitor C3.

[0122] In this example, the capacitances of the first storage capacitors C1-1, the second storage capacitors C1-2, and the third storage capacitors C1-3 are the same, the capacitances of the voltage-stabilizing capacitors C2 in the first pixel circuits 101 are the same, the capacitances of the compensation capacitors C3 in the third pixel circuits 103 are different, and the capacitances of the compensation capacitors C3 in the third pixel circuits 103 are directly proportional to the number of rows in which the third pixel circuits 103 are located.

[0123] In this embodiment, first, by setting a transition display area AA3 between the first display area AA1 and the second display area AA2, the transition display area AA3 can play a buffering role, so that the refresh frequency of the screen pixels can transition smoothly, reducing the probability of flickering and afterimages, and improving the display effect.

[0124] Secondly, since a voltage-stabilizing capacitor C2 is added to each first pixel circuit 101 and a compensation capacitor C3 is added to the third pixel circuit 103, the first voltage-stabilizing parameter of each first pixel circuit 101 and the third voltage-stabilizing parameter of each third pixel circuit 103 are greater than the second voltage-stabilizing parameter of each second pixel circuit 102. Since the ability of a capacitor to stabilize the potential difference across it is positively correlated with its capacitance, the stability of the potential of each first drive transistor T1-1 and the stability of the potential of each third drive transistor T1-3 can be improved. Furthermore, by improving the stability of the potential of the first drive transistor T1-1 and the stability of the potential of the third drive transistor T1-3, the risk of screen flicker in the first display area AA1 and the transition display area AA3 can be effectively reduced, the display effect of the first display area AA1 and the transition display area AA3 can be improved, and the visual effect of the first display area AA1 and the transition display area AA3 can be improved.

[0125] Finally, by setting the second ends of each voltage-stabilizing capacitor C2 and each compensation capacitor C3 to receive the target scanning signal SX, the effective level of the target scanning signal SX is a low level, and the invalid level is a high level. The potential at the gate of the first driving transistor T1-1 and the third driving transistor T1-3 can be increased through the level jump of the target scanning signal SX, thereby compensating for the problem of insufficient writing of the data signal Vdata and improving the dark state voltage.

[0126] It can be understood that although the second ends of the voltage-stabilizing capacitors C2 and the compensation capacitors C3 receive the target scanning signal SX, due to the different driving timings of the first display area AA1 and the transition display area AA3, the timing of the target scanning signal SX received by the voltage-stabilizing capacitors C2 is different from that of the target scanning signal SX received by the compensation capacitors C3.

[0127] In an exemplary embodiment, the present application further provides a display screen 200 , comprising a cover plate and the display panel in any one of the above embodiments.

[0128] Based on the same application concept, an embodiment of the present application further provides a display device 300 , including the display screen 200 in the above embodiment.

[0129] Figure 13 This is a schematic diagram of the structure of the display device 300 provided in an embodiment of the present application, as shown in FIG. Figure 13 As shown, the display device 300 includes the display screen 200 in any of the above embodiments. Figure 13 As shown, the display device 300 includes a display screen 200. Therefore, the display device 300 also has the beneficial effects of the display panel 100 or the display screen 200 in the above embodiment. The similarities can be understood by referring to the above explanation of the display panel 10, which will not be repeated below.

[0130] The display device 300 provided in the embodiment of the present application can be Figure 13 The mobile phone shown can also be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop monitors, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, industrial control equipment, medical display screens, touch interactive terminals, etc. The embodiments of this application do not specifically limit this.

[0131] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0132] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A pixel circuit, characterized in that: The pixel circuit includes a first driving transistor, a first storage capacitor, a first data writing transistor and a voltage stabilizing capacitor; wherein, A first end of the first storage capacitor is used to receive a first power supply signal, and a second end of the first storage capacitor is connected to the gate of the first driving transistor; The first electrode of the first data writing transistor is used to receive a data signal, the second electrode of the first data writing transistor is connected to the gate of the first driving transistor, and the gate of the first data writing transistor is used to receive a first scanning signal; The first end of the voltage-stabilizing capacitor is used to receive a target scanning signal, and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, wherein the target scanning signal includes a first scanning signal.

2. The pixel circuit according to claim 1, wherein: A first end of the voltage-stabilizing capacitor is connected to the gate of the first data-writing transistor.

3. The pixel circuit according to claim 1, wherein: The pixel circuit further includes a first threshold compensation transistor, wherein the first threshold compensation transistor is a low temperature polysilicon transistor; A first electrode of the first threshold compensation transistor is connected to a first electrode of the first driving transistor, a second electrode of the first threshold compensation transistor is connected to a gate of the first driving transistor, and the gate of the first threshold compensation transistor is used to receive the first scanning signal.

4. The pixel circuit according to claim 3, wherein: A first terminal of the voltage-stabilizing capacitor is connected to the gate of the first threshold compensation transistor.

5. A pixel circuit, characterized in that: The pixel circuit includes a first driving transistor, a first storage capacitor, a first data writing transistor, a first initialization transistor and a voltage stabilizing capacitor; wherein, A first end of the first storage capacitor is used to receive a first power supply signal, and a second end of the first storage capacitor is connected to the gate of the first driving transistor; The first electrode of the first data writing transistor is used to receive a data signal, the second electrode of the first data writing transistor is connected to the gate of the first driving transistor, and the gate of the first data writing transistor is used to receive a first scanning signal; A first electrode of the first A initialization transistor is used to receive a first initialization signal, a second electrode of the first A initialization transistor is connected to the gate of the first driving transistor, and the gate of the first A initialization transistor is used to receive a second scanning signal; The first end of the voltage-stabilizing capacitor is used to receive a target scanning signal, and the second end of the voltage-stabilizing capacitor is connected to the gate of the first driving transistor, wherein the target scanning signal is one of the first scanning signal and the second scanning signal.

6. The pixel circuit according to claim 5, wherein: The pixel circuit further includes a first threshold compensation transistor, wherein the first threshold compensation transistor is a low temperature polysilicon transistor; A first electrode of the first threshold compensation transistor is connected to a first electrode of the first driving transistor, a second electrode of the first threshold compensation transistor is connected to a gate of the first driving transistor, and the gate of the first threshold compensation transistor is used to receive the first scanning signal.

7. The pixel circuit according to claim 6, wherein: The target scanning signal is the first scanning signal, and the first end of the voltage-stabilizing capacitor is connected to the gate of the first threshold compensation transistor or the gate of the first data writing transistor.

8. The pixel circuit according to claim 5, wherein: The target scanning signal is the second scanning signal, and the first end of the voltage-stabilizing capacitor is connected to the gate of the first A initialization transistor.

9. The pixel circuit according to claim 5, wherein: The pixel circuit further includes a first threshold compensation transistor, wherein the first threshold compensation transistor is a metal oxide transistor; A first electrode of the first threshold compensation transistor is connected to a first electrode of the first driving transistor, a second electrode of the first threshold compensation transistor is connected to a gate of the first driving transistor, and the gate of the first threshold compensation transistor is used to receive a third scanning signal.

10. The pixel circuit according to claim 9, wherein: The target scanning signal is the first scanning signal, and the first end of the voltage-stabilizing capacitor is connected to the gate of the first data writing transistor.

11. A display panel, characterized in that: The display panel includes a first display area and a second display area, wherein a refresh frequency of the first display area is lower than a refresh frequency of the second display area; the first display area includes at least one first pixel circuit, and the second display area includes at least one second pixel circuit; The first pixel circuit includes a first driving transistor, and the second pixel circuit includes a second driving transistor; The first voltage stabilization parameter of the first pixel circuit is greater than the second voltage stabilization parameter of the second pixel circuit, wherein the first voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the first driving transistor in the first pixel circuit, and the second voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the second driving transistor in the second pixel circuit.

12. The display panel according to claim 11, wherein: The first pixel circuit includes: a first storage capacitor, and the second pixel circuit includes a second storage capacitor; A first end of the first storage capacitor is used to receive a first power supply signal, and a second end of the first storage capacitor is connected to the gate of the first driving transistor; A first end of the second storage capacitor is used to receive the first power signal, and a second end of the second storage capacitor is connected to the gate of the second driving transistor; The capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor.

13. The display panel according to claim 12, wherein: The first pixel circuit is the pixel circuit according to any one of claims 1 to 9.

14. The display panel according to claim 11, wherein: The display panel further includes a transition display area, wherein the transition display area is located between the first display area and the second display area; The transition display area includes a third pixel circuit, and the third pixel circuit includes a third driving transistor; The third voltage stabilization parameter of the third pixel circuit is less than or equal to the first voltage stabilization parameter, and greater than or equal to the second voltage stabilization parameter, wherein the third voltage stabilization parameter is the sum of the capacitances of the capacitors connected to the gate of the third driving transistor in the third pixel circuit.

15. The display panel according to claim 14, wherein: The third voltage stabilization parameter of the third pixel circuit is positively correlated with the number of the row where the third pixel circuit is located.

16. The display panel according to claim 15, wherein: The third voltage stabilization parameters of the third pixel circuits in different rows are different, and the third voltage stabilization parameters of the third pixel circuits increase with the number of rows where the third pixel circuits are located.

17. The display panel according to claim 14, wherein: The structure of the third pixel circuit is the same as that of the first pixel circuit or the second pixel circuit.

18. The display panel according to claim 14, wherein: The transition display area is a bending area of ​​the display panel.

19. The display panel according to claim 11, wherein: The refresh frequency of the first display area is greater than 60 Hz.

20. The display panel according to claim 11, wherein The refresh frequency of the second display area is less than 20 Hz.

21. A display screen, characterized in that: The display device comprises a cover plate and the display panel according to any one of claims 11 to 20.

22. A display device, characterized in that: Comprising the display screen as claimed in claim 21.

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