Automatic digital IC test and performance evaluation method based on digital test platform

Through an automated testing method based on a digital test platform, combined with a load dump simulator and sensor network, the algorithm complexity step size is dynamically adjusted, and reinforcement learning is used to optimize weights. This solves the problem of high-precision performance testing of digital ICs in complex vehicle environments, ensuring system safety and stability.

CN120669672AActive Publication Date: 2025-09-19JIANGYIN SEAGATEK ELECTRONIC CO LTD
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Patent Information

Application Number
CN202510770884.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-10
Publication Date
2025-09-19
Estimated Expiration
2045-06-10

AI Technical Summary

Technical Problem

Existing technologies make it difficult to conduct high-precision, high-coverage dynamic performance testing and evaluation of digital ICs under conditions close to real working conditions, especially in the complex and changeable vehicle electronic system environment, which affects system safety and stability.

Method used

An automated testing method based on a digital test platform is adopted to simulate the vehicle's real operating conditions, collect voltage, temperature and CAN message load in real time, combine with a load dump simulator and sensor network, dynamically adjust the algorithm complexity step size, and use the Soft Actor-Critic reinforcement learning framework to optimize weights and achieve performance evaluation.

Benefits of technology

It achieves rapid adjustment of complexity in the safe zone, exponential decay of the step size in the warning zone, and stops testing in the overload zone, building a "safety first, fine control" mechanism, improving test accuracy and coverage, and ensuring system stability.

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Abstract

The invention discloses an automatic digital IC testing and performance evaluation method based on a digital testing platform, and relates to the technical field of IC testing, and the method comprises the steps: carrying out the instrumentation of a tested vehicle-mounted IC through a digital testing platform, simulating the real working condition of a vehicle, obtaining the reference performance, and connecting a load throwing simulator, a sensor network and the to-be-tested IC; acquiring vehicle-mounted voltage, temperature and CAN message load in real time, identifying a load throwing state, and monitoring a vehicle state in real time to obtain a vehicle state value; measuring IC execution delay, power consumption and error rate, and calculating a performance state value; setting a complexity regulation and control algorithm, and dynamically and adaptively adjusting the complexity step length of the algorithm according to the performance sensitivity and the vehicle state; fitting a trend surface, identifying critical complexity, and setting a complexity prediction model to output optimal test complexity. According to the method, the problems of low efficiency and high risk of fixed step length or manual parameter adjustment caused by relatively large influence of algorithm complexity on IC performance change in a vehicle IC test process are solved.
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Description

Technical Field

[0001] The present invention relates to the field of IC testing technology, and in particular to an automated digital IC testing and performance evaluation method based on a digital testing platform. Background Art

[0002] In vehicle electronic systems, digital ICs often run critical functional modules such as motor control, vehicle control, sensor data fusion, and communication message processing. Any performance anomalies can directly impact system safety and stability. Automotive electronic systems place extremely high demands on microcontroller reliability, making early detection of design flaws crucial.

[0003] In actual operation, digital ICs often face a volatile and complex operating environment, including sudden voltage fluctuations and transient algorithm computational pressure. These factors have a multi-dimensional coupled impact on IC performance. Therefore, conducting high-precision, high-coverage dynamic performance testing and evaluation of digital ICs in an environment close to real-world operating conditions has become a key technical challenge in digital chip design verification and quality control. A typical motor control closed loop requires an update rate of 1-10kHz, and each calculation must be completed within 100-1000μs; otherwise, closed-loop stability will be severely compromised.

[0004] To this end, the present invention provides an automated digital IC testing and performance evaluation method based on a digital testing platform. Summary of the Invention

[0005] The object of the present invention is to provide an automated digital IC testing and performance evaluation method based on a digital test platform to solve the existing problems raised in the above background technology.

[0006] To achieve the above objectives, the present invention provides the following technical solution: an automated digital IC testing and performance evaluation method based on a digital test platform, comprising the following steps: S1. Use a digital test platform to insert a stub into the in-vehicle IC under test and simulate real vehicle operating conditions to obtain benchmark performance. Connect the load dump simulator, sensor network, and IC under test. S2. Real-time collection of vehicle voltage, temperature, and CAN message load, identification of load dump status, and real-time monitoring of vehicle status to obtain vehicle status values; S3, measure IC execution delay, power consumption, error rate, and calculate performance status value; S4. Set the complexity control algorithm and dynamically and adaptively adjust the algorithm complexity step size according to performance sensitivity and vehicle status; S5. Fit the trend surface, identify the critical complexity, and set the complexity prediction model to output the optimal test complexity.

[0007] A further improvement of the present invention is that step S1 specifically includes loading firmware on the PXI, establishing a logical path between the vehicle-mounted IC under test and the digital platform, generating a standard voltage transient waveform through the load dump simulator interface, and synchronously simulating the CAN bus and embedded sensor network signals to generate a vehicle operating condition waveform; the embedded sensor network includes a high-speed voltage probe, a current detection chip and a temperature sensor, the high-speed voltage probe is used to capture voltage transient spikes, the current detection chip is used to record the load current change rate, and the temperature sensor is used to record the IC temperature rise.

[0008] A further improvement of the present invention is that the complexity control algorithm specifically comprises the following steps: S41. Establish vehicle test objects, including window control, air conditioning temperature control, lighting control, and cruise control; S42, running the test object simultaneously, capturing the vehicle state value Vs and the performance state value psv in real time; S43. Design independent PID parameters for each control task and generate a PID parameter control sequence; S44, defining the initial algorithm complexity as the weighted average of the number of test object operations and the amount of data in the PID parameter control sequence; S45. Obtain performance sensitivity by calculating the proportion of performance status value in the previous algorithm complexity change ; S46. Set up the initial complexity change step , a first vehicle state threshold Tvs1 and a second vehicle state threshold Tvs2; and updating the algorithm complexity step size in real time according to the real-time vehicle state value and performance sensitivity; S47. Establish a weight update model to adjust the performance sensitivity and vehicle status value weights in real time.

[0009] The present invention is further improved in that step S46 specifically includes the following steps: When the vehicle state value is less than or equal to the first vehicle state threshold, it is judged to be a safe state. At this time, the algorithm complexity step size Keeping linear attenuation, the calculation formula is expressed as: ,in, represents the minimum allowed step size, Indicates the maximum allowed step length; When the vehicle status value is greater than the first threshold value of the vehicle status or less than the second threshold value of the vehicle status, it is judged as a warning state. At this time, the algorithm complexity step size The update formula is ,in, and Indicates the set weight, Indicates the Second adjustment; When the vehicle status value is greater than or equal to the second vehicle status threshold, it is determined to be an overload state and the test is stopped.

[0010] A further improvement of the present invention is that the weight updating model specifically includes: The vehicle control scenario is mapped to the reinforcement learning framework, including the vehicle state value, performance state value and the current time t, to obtain the current time control state vector , and Normalize the data, , indicating the performance status change trend, , indicating the changing trend of vehicle status, and Represents the weight learned at the previous moment; Computational performance is close to the reward, , Indicates the performance status benchmark value, which is used to penalize the absolute distance from the target deviation; and sets the smoothness penalty , get the total reward ; Will As input, the SAC algorithm is used for 10 iterations. 5 Step, output mean and variance parameters, get sampling action , converted to weight increment 、 , Indicates the adjustment rate; training sampling action , using SAC’s two Critic networks to update the Q value of each sampled action based on the total reward calculation, the sampled action network optimizes the strategy according to the gradient direction provided by the Critic and outputs a new weight.

[0011] The present invention is further improved in that the specific step S5 includes: S51, the nonlinear variation of quadratic function fitting performance with complexity; S52. Derivate the fitting curve to find the algorithm complexity corresponding to the minimum performance state and obtain the first critical complexity. ; and find the algorithm complexity corresponding to the standard value of the performance state as the second critical complexity ; S53, using historical algorithm complexity and vehicle status values ​​as input features and performance status values ​​as target variables, the support vector regression model is used to predict performance status values ​​under different algorithm complexities in real time. ; S54: If the actual performance state value is less than the predicted performance state value three times in a row, the first critical complexity update is triggered. ; S55, output The algorithm complexity corresponding to the maximum value is sent to the terminal as the optimal complexity of the vehicle IC.

[0012] A further improvement of the present invention is that the first critical complexity is calculated by the formula Get, then ,in, Indicates the complexity of the historical algorithm; if a 0, then it is the algorithm complexity corresponding to the minimum performance state. If a 0, then refitting is required.

[0013] The present invention is further improved in that the specific step S2 includes capturing the bus voltage, calculating the smooth voltage MA (V) and the transient voltage gradient ΔV in real time, and normalizing the smooth voltage and the transient voltage gradient and then performing weighted summation to obtain the voltage risk ;CAN analyzer reports CAN bus occupancy every 10ms , normalized to get bus occupancy risk The temperature sensor reports the real-time temperature Tamb every 100ms, and the normalized temperature risk is obtained. ; Get vehicle status value ,in 、 and Represents the weight; and calculates Vs every 10ms and writes it to the shared variable.

[0014] A further improvement of the present invention is that the performance status value is obtained by setting performance monitoring targets, including execution delay, dynamic power consumption and CAN frame error rate; first, the execution delay is obtained by measuring the time from "task triggering" to "result output" using the built-in 1ns resolution timing module. ; Secondly, collect the average power of voltage and current at N=1000 points to obtain dynamic power consumption ; The CAN frame error rate is obtained by collecting the proportion of the number of error frames in the total number of sent frames; the execution delay, dynamic power consumption and CAN frame error rate are normalized and then weighted summed to obtain the performance status value.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention first designs a dynamic step-size update strategy based on performance sensitivity and vehicle status values, allowing for rapid complexity adjustment in the safe zone, exponential step-size decay in the warning zone, and test cessation in the overload zone, thus building a complete "safety-first, fine-grained control" mechanism. By mapping complexity control to the Soft Actor-Critic reinforcement learning framework, online intelligent optimization of weights is achieved, making the step size adjustment self-learning and adaptive according to performance trends and vehicle trends. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a flow chart of the automated digital IC testing and performance evaluation method based on a digital test platform of the present invention; Figure 2 This is a flow chart of the complexity control algorithm of the present invention; Figure 3 This is a flow chart of the complexity prediction model of the present invention. DETAILED DESCRIPTION

[0017] The technical solution of the present invention is described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations on the technical solution of the present invention. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0018] The term "and / or" simply describes a relationship between related objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, or B exists alone. Additionally, the character " / " generally indicates an "or" relationship between the related objects.

[0019] Example 1 Figure 1 The flowchart of the automated digital IC testing and performance evaluation method based on the digital test platform disclosed in this embodiment is shown, and the steps are as follows: S1. Use the digital test platform to insert the vehicle IC under test and simulate the actual vehicle operating conditions to obtain benchmark performance, connect the load dump simulator, sensor network and the IC under test; specifically, load the firmware on the PXI, establish a logical path between the vehicle IC under test and the digital platform, generate a standard voltage transient waveform through the load dump simulator interface, and simultaneously simulate the CAN bus and embedded sensor network signals to generate a vehicle operating waveform; the embedded sensor network includes a high-speed voltage probe, a current detection chip and a temperature sensor. The high-speed voltage probe is used to capture voltage transient spikes, the current detection chip is used to record the load current change rate, and the temperature sensor is used to record the IC temperature rise. Used to reproduce vehicle conditions; The high-voltage probe uses a high-spring force probe to directly press the on-board IC pin; the load dump simulator interface connects a programmable pulse source between the 12V main bus and the DUT (Device Under Test); the programmable pulse source uses a digital signal controller (DSC) to drive the switching circuit to generate a load dump waveform to meet , , , exponential decay simulates the natural recovery process of the load dump voltage, is the time constant, .

[0020] S2. Real-time acquisition of vehicle voltage, temperature, and CAN message load, identification of load dump status, and real-time monitoring of vehicle status to obtain vehicle status values. Specific steps include capturing bus voltage, real-time calculation of smoothed voltage MA (V) and transient voltage gradient ΔV, and normalization of smoothed voltage and transient voltage gradient, and weighted summation to obtain voltage risk. ;CAN analyzer reports CAN bus occupancy every 10ms , normalized to get bus occupancy risk The temperature sensor reports the real-time temperature Tamb every 100ms, and the normalized temperature risk is obtained. ; Get vehicle status value ,in 、 and Represents the weight; and calculates Vs every 10ms and writes it into the shared variable; , Represents the voltage within the window, W=10ms; ΔV=(V(t)-V(t-1)) / Δt.

[0021] S3. Measure IC execution delay, power consumption, and error rate, and calculate performance status values ​​by setting performance monitoring targets, including execution delay, dynamic power consumption, and CAN frame error rate. First, use the built-in 1ns resolution timing module to measure the time from "task trigger" to "result output" to obtain the execution delay. ; Secondly, collect the average power of voltage and current at N=1000 points to obtain dynamic power consumption , ; The CAN frame error rate is obtained by collecting the proportion of the number of error frames in the total number of sent frames; the execution delay, dynamic power consumption and CAN frame error rate are normalized and then weighted summed to obtain the performance status value.

[0022] S4. Set the complexity control algorithm and dynamically and adaptively adjust the algorithm complexity step size according to performance sensitivity and vehicle status.

[0023] S5. Fit the trend surface, identify the critical complexity, and set the complexity prediction model to output the optimal test complexity.

[0024] Example 2 Based on the inventive concept of Example 1, this embodiment provides specific implementation steps of the complexity control algorithm in the automated digital IC testing and performance evaluation method based on a digital test platform. Figure 2 The flowchart of the complexity control algorithm of the present invention is shown, and the specific steps include: S41. To ensure vehicle IC safety and efficiency, and to adaptively select algorithm complexity based on the vehicle's own state, establish test objects including window control, air conditioning temperature control, lighting control, and cruise control; S42, running the test object simultaneously, capturing the vehicle state value Vs and the performance state value psv in real time; S43. Design independent PID parameters for each control task and generate a PID parameter control sequence; S44. The PID control algorithm itself is simple, and its complexity mainly comes from the characteristics of the controlled object and the real-time requirements. The high sampling frequency means that the controller must complete the calculation in a shorter time, which requires higher processing speed and may require optimization of the algorithm structure. Therefore, the initial algorithm complexity is defined as the weighted average of the number of test object operations and the amount of data in the PID parameter control sequence. For example, the number of window control operations is the number of operations, and the amount of data is the standard value of the window movement; the number of air conditioning temperature control operations is the number of operations, and the amount of data is the standard value of the window temperature adjustment value; the number of lighting control operations is the number of operations, and the amount of data is the standard value of the light brightness change value; the number of cruise control operations is the number of speed changes, and the amount of data is the standard value of the speed change value. S45. Obtain performance sensitivity by calculating the proportion of performance status value in the previous algorithm complexity change ; S46: Continuing to test after dumping the load will damage the chip. If the algorithm complexity is still applied with a large step size under high load, the chip will still be damaged and the optimal complexity cannot be found. Therefore, the initial complexity change step size is set , a first vehicle state threshold Tvs1 and a second vehicle state threshold Tvs2; and updating the algorithm complexity step size in real time according to the real-time vehicle state value and performance sensitivity; When the vehicle state value is less than or equal to the first threshold value of the vehicle state, it is judged to be a safe state. At this time, the vehicle state is healthy and the vehicle state adjustment step size can be ignored. The algorithm complexity step size Keep linear decay, ,in, represents the minimum allowed step size, Indicates the maximum allowed step length; When the vehicle status value is greater than the first threshold value of the vehicle status or less than the second threshold value of the vehicle status, it is judged as a warning state. At this time, the algorithm complexity step size The update formula is ,in, and Indicates the set weight, Indicates the Second adjustment; When the vehicle status value is greater than or equal to the second vehicle status threshold, it is determined to be an overload state and the test is stopped.

[0025] This embodiment realizes smooth adjustment through exponential function in normal state and rapid reduction of complexity through step jump in emergency state; it also accelerates response but limits the upper limit to prevent oscillation. S47: Establish a weight update model to adjust performance sensitivity and vehicle status value weights in real time; the weight update model specifically includes: The vehicle control scenario is mapped to the reinforcement learning framework, including the vehicle state value, performance state value and the current time t, to obtain the current time control state vector , and Normalize the data, , indicating the performance status change trend, , indicating the changing trend of vehicle status, and Represents the weight learned at the previous moment; Computational performance is close to the reward, , Indicates the performance status benchmark value, which is used to penalize the absolute distance from the target deviation; and sets the smoothness penalty , get the total reward ; Will As input, the SAC algorithm is used for 10 iterations. 5 Step, output mean and variance parameters, get sampling action , converted to weight increment 、 , Indicates the adjustment rate; training sampling action , using SAC’s two Critic networks to update the Q value of each sampled action based on the total reward calculation, the sampled action network optimizes the strategy according to the gradient direction provided by the Critic and outputs a new weight.

[0026] This embodiment increases the weight of the vehicle status value as the trend of the vehicle status value increases, and increases the weight of the performance status sensitivity as the trend of the performance status value increases, thereby increasing the flexibility of weight change and taking into account the balance of step size change calculation.

[0027] Example 3 Based on the inventive concept of Example 1 and Example 2, this embodiment provides specific implementation steps of the complexity prediction model in the automated digital IC testing and performance evaluation method based on a digital test platform. Figure 3 The flow chart of the complexity prediction model of the present invention is shown, and the specific steps include: S51, the nonlinear variation of quadratic function fitting performance with complexity; S52. Derivate the fitting curve to find the algorithm complexity corresponding to the minimum performance state and obtain the first critical complexity. , indicating the critical value of complexity that allows the worst performance, and it is not appropriate to expand the complexity; and find the algorithm complexity corresponding to the standard value of the performance state as the second critical complexity ; The first critical complexity is given by the formula Get, then ,in, Indicates the complexity of the historical algorithm; if a 0, then it is the algorithm complexity corresponding to the minimum performance state. If a 0, then refitting is required; S53, using historical algorithm complexity and vehicle status values ​​as input features and performance status values ​​as target variables, the support vector regression model is used to predict performance status values ​​under different algorithm complexities in real time. ; S54: If the actual performance state value is less than the predicted performance state value three times in a row, the first critical complexity update is triggered. ; S55, output The algorithm complexity corresponding to the maximum value is sent to the terminal as the optimal complexity of the vehicle IC.

[0028] The thresholds, weights and other setting values ​​may be set by default according to the present invention, or may be set by an operator.

[0029] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0030] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0031] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0032] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0033] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the purpose of the present invention and the claims, which are all protected by the present invention.

Claims

1. An automated digital IC testing and performance evaluation method based on a digital test platform, characterized by: The following steps are involved: S1. Use a digital test platform to insert a stub into the in-vehicle IC under test and simulate real vehicle operating conditions to obtain benchmark performance. Connect the load dump simulator, sensor network, and IC under test. S2. Real-time collection of vehicle voltage, temperature, and CAN message load, identification of load dump status, and real-time monitoring of vehicle status to obtain vehicle status values; S3, measure IC execution delay, power consumption, error rate, and calculate performance status value; S4. Set the complexity control algorithm and dynamically and adaptively adjust the algorithm complexity step size according to performance sensitivity and vehicle status; S5. Fit the trend surface, identify the critical complexity, and set the complexity prediction model to output the optimal test complexity.

2. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 1, characterized in that: Step S1 specifically includes loading firmware on the PXI, establishing a logical path between the vehicle-mounted IC under test and the digital platform, generating a standard voltage transient waveform through the load dump simulator interface, and synchronously simulating the CAN bus and embedded sensor network signals to generate a vehicle operating condition waveform; the embedded sensor network includes a high-speed voltage probe, a current detection chip, and a temperature sensor. The high-speed voltage probe is used to capture voltage transient spikes, the current detection chip is used to record the load current change rate, and the temperature sensor is used to record the IC temperature rise.

3. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 1, wherein: The complexity control algorithm specifically includes the following steps: S41. Establish vehicle test objects, including window control, air conditioning temperature control, lighting control, and cruise control; S42, running the test object simultaneously, capturing the vehicle state value Vs and the performance state value psv in real time; S43. Design independent PID parameters for each control task and generate a PID parameter control sequence; S44, defining the initial algorithm complexity as the weighted average of the number of test object operations and the amount of data in the PID parameter control sequence; S45. Obtain performance sensitivity by calculating the proportion of performance status value in the previous algorithm complexity change ; S46. Set up the initial complexity change step , a first vehicle state threshold Tvs1 and a second vehicle state threshold Tvs2; and updating the algorithm complexity step size in real time according to the real-time vehicle state value and performance sensitivity; S47. Establish a weight update model to adjust the performance sensitivity and vehicle status value weights in real time.

4. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 3, characterized in that: Step S46 specifically includes the following steps: When the vehicle state value is less than or equal to the first vehicle state threshold, it is judged to be a safe state. At this time, the algorithm complexity step size Keeping linear attenuation, the calculation formula is expressed as: ,in, represents the minimum allowed step size, Indicates the maximum allowed step length; When the vehicle status value is greater than the first threshold value of the vehicle status or less than the second threshold value of the vehicle status, it is judged as a warning state. At this time, the algorithm complexity step size The update formula is ,in, and Indicates the set weight, Indicates the Second adjustment; When the vehicle status value is greater than or equal to the second vehicle status threshold, it is determined to be an overload state and the test is stopped.

5. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 3, wherein: The weight update model specifically includes: The vehicle control scenario is mapped to the reinforcement learning framework, including the vehicle state value, performance state value and the current time t, to obtain the current time control state vector , and Normalize the data, , indicating the performance status change trend, , indicating the changing trend of vehicle status, and Represents the weight learned at the previous moment; Computational performance is close to the reward, , Indicates the performance status benchmark value, which is used to penalize the absolute distance from the target deviation; and sets the smoothness penalty , get the total reward ; Will As input, the SAC algorithm is used for 10 iterations. 5 Step, output mean and variance parameters, get sampling action , converted to weight increment 、 , Indicates the adjustment rate; training sampling action , using SAC’s two Critic networks to update the Q value of each sampled action based on the total reward calculation, the sampled action network optimizes the strategy according to the gradient direction provided by the Critic and outputs a new weight.

6. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 1, wherein: The specific steps of S5 include: S51, the nonlinear variation of quadratic function fitting performance with complexity; S52. Derivate the fitting curve to find the algorithm complexity corresponding to the minimum performance state and obtain the first critical complexity. ; and find the algorithm complexity corresponding to the standard value of the performance state as the second critical complexity ; S53, using historical algorithm complexity and vehicle status values ​​as input features and performance status values ​​as target variables, the support vector regression model is used to predict performance status values ​​under different algorithm complexities in real time. ; S54: If the actual performance state value is less than the predicted performance state value three times in a row, the first critical complexity update is triggered. ; S55, output The algorithm complexity corresponding to the maximum value is sent to the terminal as the optimal complexity of the vehicle IC.

7. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 6, characterized in that: The first critical complexity is given by the formula Get, then ,in, Indicates the complexity of the historical algorithm; if a 0, then it is the algorithm complexity corresponding to the minimum performance state. If a 0, then refitting is required.

8. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 1, wherein: The specific steps of S2 include capturing the bus voltage, calculating the smoothed voltage MA (V) and the transient voltage gradient ΔV in real time, and performing weighted summation of the normalized smoothed voltage and transient voltage gradient to obtain the voltage risk. ;CAN analyzer reports CAN bus occupancy every 10ms , normalized to get bus occupancy risk The temperature sensor reports the real-time temperature Tamb every 100ms, and the normalized temperature risk is obtained. ; Get vehicle status value ,in 、 and Represents the weight; and calculates Vs every 10ms and writes it to the shared variable.

9. The automated digital IC testing and performance evaluation method based on a digital test platform according to claim 1, wherein: The performance status value is obtained by setting performance monitoring targets, including execution delay, dynamic power consumption and CAN frame error rate; first, the built-in 1ns resolution timing module is used to measure the time from "task trigger" to "result output" to obtain the execution delay. ; Secondly, collect the average power of voltage and current at N=1000 points to obtain dynamic power consumption ; The CAN frame error rate is obtained by collecting the proportion of the number of error frames in the total number of sent frames; the execution delay, dynamic power consumption and CAN frame error rate are normalized and then weighted summed to obtain the performance status value.

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