Display driver, chip, and electronic device

Abstract

The invention discloses a display driver, a chip and electronic equipment, and belongs to the technical field of display. The display driver includes a controller, a first comparator, M first data channels, and M repair channels, M being a positive integer greater than 1. The controller controls the M first data channels to send first test signals to the first comparator. The first comparator compares the first test signal sent by each first data channel with a reference signal to obtain a first comparison result. And under the condition that the first comparison result indicates that the at least one first data channel has the fault, the controller controls each repair channel in the M repair channels to provide a first driving signal for the corresponding first data channel so as to repair the fault existing in the at least one first data channel. According to the display driver provided by the invention, M: 1 comparator multiplexing is realized, the number of comparators is reduced, and the size of the display driver is reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular to a display driver, a chip, and an electronic device. Background Art

[0002] With the continuous advancement of display technology, users' requirements for the display quality of content on display panels are becoming increasingly stringent. Display panels are driven by display drivers, which include multiple data channels. If at least one of these data channels fails, the display quality of the content on the display panel will be degraded. Therefore, repairing a faulty data channel has become a pressing issue. Summary of the Invention

[0003] The embodiments of the present application provide a display driver and a display method. The technical solutions provided by the embodiments of the present application include the following aspects.

[0004] In a first aspect, a display driver is provided, comprising a controller, a comparator, a repair channel, and M data channels, where M is a positive integer greater than 1.

[0005] The controller is used to control each of the M data channels to send a test signal to the comparator respectively; the comparator is used to compare the test signal sent by each data channel with the reference signal respectively to obtain a comparison result; the controller is also used to control the repair channel to provide a driving signal to the at least one data channel when the comparison result indicates that at least one data channel of the M data channels has a fault, and the driving signal is used to drive at least one sub-pixel corresponding to the at least one data channel on the display panel to emit light, so as to repair the fault of the at least one data channel.

[0006] In the display driver provided by the first aspect of the embodiments of the present application, every M (M is a positive integer greater than 1) data channels share a comparator, achieving M:1 multiplexing of the comparators, thereby reducing the size of the display driver and the chip on which the display driver resides. While reducing the size of the display driver and the chip, the embodiments of the present application achieve data channel fault testing and repair, thereby being relatively practical and flexible.

[0007] In a second aspect, another display driver is provided, including a controller, M first comparators, M first data channels, and M repair channels, where M is a positive integer greater than 1.

[0008] Any one of the first comparators is used to compare the first test signal sent by the respective corresponding first data channel with a reference signal to obtain a first comparison result; the controller is used to control the M repair channels to provide first drive signals for the M first data channels when the first comparison result indicates that at least one of the M first data channels has a fault, wherein the first drive signal is used to drive the first pixel groups corresponding to the M first data channels on the display panel to emit light, so as to repair the fault of the at least one first data channel.

[0009] In the display driver provided in the second aspect of the embodiment of the present application, the first drive signal is used to drive the first pixel group on the display panel to emit light during the fault repair process, so the repair is performed in units of complete pixels. The design is simple, the granularity of the repair is appropriate, and the practicality and feasibility are strong.

[0010] In a third aspect, another display driver is provided. The display driver includes a controller, a first comparator, M first data channels, and M repair channels, where M is a positive integer greater than 1.

[0011] The controller is used to control each of the M first data channels to send a first test signal to the first comparator respectively; the first comparator is used to compare the first test signal sent by each first data channel with a reference signal respectively to obtain a first comparison result; the controller is also used to control each of the M repair channels to provide a first drive signal to the corresponding first data channel respectively when the first comparison result indicates that at least one of the M first data channels has a fault, and the first drive signal is used to drive the first pixel group corresponding to the M first data channels on the display panel to emit light, so as to repair the fault of the at least one first data channel.

[0012] In the display driver provided by the third aspect of the embodiment of the present application, every M (M is a positive integer greater than 1) data channels share a comparator, achieving M:1 multiplexing of the comparator, thereby reducing the size of the display driver and the size of the chip where the display driver is located. The embodiment of the present application implements fault testing and fault repair of the data channel under the premise of reducing the size of the display driver and reducing the size of the chip, which is more practical and flexible. In addition, during the fault repair process, the first drive signal is used to drive the first pixel group on the display panel to emit light, so the repair is performed in units of complete pixels, which has a simple design, an appropriate granularity for repair, and strong practicality and feasibility.

[0013] In a fourth aspect, a chip is provided, comprising the display driver provided by the first aspect or any exemplary embodiment of the first aspect.

[0014] In a fifth aspect, an electronic device is provided, comprising a display panel and the chip provided in the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0016] Figure 1 is a structural diagram of a display panel provided in an embodiment of the present application;

[0017] Figure 2 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0018] Figure 3 This is a schematic diagram of the structure of a display driver provided by the related art;

[0019] Figure 4 It is a structural diagram of a data channel provided by related technologies;

[0020] Figure 5 It is a schematic diagram of an output solution of a data channel provided by the related art;

[0021] Figure 6 1 is a schematic structural diagram of a display driver provided in an embodiment of the present application;

[0022] Figure 7 is a structural diagram of another display driver provided in an embodiment of the present application;

[0023] Figure 8 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0024] Figure 9 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0025] Figure 10 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0026] Figure 11 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0027] Figure 12This is a structural diagram of another display driver provided in an embodiment of the present application;

[0028] Figure 13 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0029] Figure 14 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0030] Figure 15 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0031] Figure 16 This is a structural diagram of another display driver provided in an embodiment of the present application;

[0032] Figure 17 This is a structural diagram of another display driver provided in an embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0034] A display panel is a device that can display images and other content. Display panels include but are not limited to organic light-emitting diode (OLED) panels. Figure 1 The display panel 10 includes a plurality of sub-pixels P, which are arranged in an array. In the column direction, each sub-pixel column corresponds to a color, and different sub-pixel columns correspond to the same or different colors, including but not limited to red, green, or blue. In the row direction, each sub-pixel row includes a plurality of complete pixels, and each pixel includes M sub-pixels P, where M is a positive integer greater than 1. For example, the value of M is 4. In the first sub-pixel row, a complete pixel includes the sub-pixels P located in the first to fourth sub-pixel columns, that is, the pixel includes a total of 4 sub-pixels P.

[0035] The electronic device includes a display panel and a display driver. The display panel displays content under the drive of the display driver. Figure 2 As shown, the electronic device includes a display driver 00 and a display panel 10. The display driver 00 is coupled to a plurality of sub-pixels P included in the display panel 10 to drive the plurality of sub-pixels P to emit light, so that the display panel can display content.

[0036] The display driver is also referred to as a display panel driving circuit or a display driver integrated circuit (DDIC). Alternatively, the electronic device includes, but is not limited to, any product or component with a display function, such as a mobile phone, a tablet computer, a laptop computer, a television, and an in-car navigation device. The embodiments of this application do not limit the type of electronic device.

[0037] The display driver includes a gate driver and a source driver. The gate driver is, for example, a gate driver on array (GOA), which is obtained by integrating a gate driver circuit on an array substrate. The gate driver includes a plurality of gate channels, each gate channel corresponding to a sub-pixel row. Each gate channel is used to control the corresponding sub-pixel row to be turned on or off. The source driver includes a plurality of data channels (also referred to as source channels), each data channel corresponding to a sub-pixel column, and each data channel is used to control the brightness of the corresponding sub-pixel column to emit light. For a sub-pixel, when the sub-pixel row where the sub-pixel is located is turned on according to the control of the gate channel, the sub-pixel can emit light according to a certain brightness according to the control of the data channel, and the light emitted has the color corresponding to the sub-pixel itself. The light emitted by each sub-pixel included in the same pixel is mixed with each other, so that content display can be achieved.

[0038] A source driver may include thousands of data channels. Even a single fault in one of these channels can reduce the display quality of the display panel. For example, a faulty data channel can make it difficult to properly control the brightness of the corresponding sub-pixel column, potentially causing the sub-pixel column to emit dim light. This can lead to "dark lines" on the display panel, reducing the display quality. While this won't affect the reliability of the display panel, it will affect the user experience.

[0039] There may be many reasons for the failure of the data channel. For example, the data channel includes multiple devices (including but not limited to semiconductor devices), and different devices are connected by metal wiring. If some or all of the multiple devices have defects caused by the production process, or the metal wiring forms an open circuit, it will cause a failure in the data channel. In addition, the negligence of the user in the process of using the electronic device may also cause a failure in the data channel. In the case of a failure in the data channel, if the failure cannot be automatically repaired, it may be necessary to replace a new display driver to ensure the content display quality of the display panel. However, this method is expensive and will bring inconvenience to the user. Therefore, it is necessary to provide a display driver to automatically repair the failure of the data channel, so as to ensure the content display quality of the display panel without replacing a new display driver, save costs, and improve the user experience. Among them, automatically repairing the failure of the data channel can also be called automatic source repair (auto source repair) or automatic pixel repair.

[0040] Before describing the display driver provided in the embodiment of the present application, the display driver provided in the related art is described first.

[0041] In related art, see Figure 3 The display driver includes a gate driver, source driver, gamma circuit, memory, logic circuit, interface circuit, and analog circuit. The analog circuit includes a power supply, oscillator, and temperature sensor. The power supply is used to power the various components in the display driver, and the temperature sensor is used to measure the temperature of each component.

[0042] The interface circuit receives data sent by the main control chip (such as a processor). The logic circuit generates control signals based on the data and the clock signal provided by the oscillator. The control signals include gate control signals and source control signals (including digital data, hereinafter referred to as digital signals), which are stored in the memory. The gate channels included in the gate driver drive the rows according to the gate control signals to control the corresponding sub-pixel rows to be turned on or off. The gamma circuit generates multiple analog voltages. The data channels included in the source driver select the analog voltage corresponding to the digital signal from the multiple analog voltages according to the source control signal to control the corresponding sub-pixel column to emit light according to the brightness corresponding to the selected analog voltage.

[0043] like Figure 4 As shown, Figure 4The figure shows N data channels, with four channels (4 channels) grouped together. Each data channel includes a shift register, a level shifter, a decoder, an amplifier (Amp), a direct-connect switch (DSW), a test switch (TEST), and a driver (SOUT).

[0044] The sub-pixel columns corresponding to the driving terminals SOUT of each of the four data channels in each group are four sub-pixel columns corresponding to a complete pixel, and the colors corresponding to the four sub-pixel columns are, for example, red, green 1, blue, and green 2. Figure 5 The first group includes four data channels, each of which includes a drive terminal SOUT <1> To SOUT <4> Corresponding to red, green 1, blue and green 2 respectively, the second group includes four data channels each including the driving end SOUT <5> To SOUT <8> Corresponding to red, green 1, blue and green 2 respectively.

[0045] The shift register is used to store, shift, and perform serial-to-parallel conversion on digital signals, sending the processed digital signals to the level shifter. The level shifter performs voltage level conversion on the processed digital signals, converting them from one voltage domain to another (e.g., from a low voltage domain to a high voltage domain), generating a level-shifted digital signal. This level-shifted digital signal is then sent to the decoder. The decoder converts the level-shifted digital signal into an analog signal and sends the analog signal to the amplifier. The amplifier amplifies the analog signal to generate an amplified analog signal.

[0046] For example, see Figure 5 The amplifier includes a positive input terminal, a negative input terminal and an output terminal. The positive input terminal of the amplifier is connected to the decoder to receive the input analog signal SRC_INPUT. The output terminal of the amplifier is connected to the negative input terminal (i.e., a unit gain connection mode). Figure 5 The output end of the amplifier is further connected to the driving end through two parallel branches, one branch including a direct-connect switch DSW and the other branch including a test switch TEST.

[0047] When the direct-connect switch DSW is open and the test switch TEST is closed, electrical die sorting (EDS), also known as probe testing, can be performed after wafer processing is completed. It is an important step in ensuring chip quality in semiconductor manufacturing.

[0048] When the wafer test passes, the direct connection switch DSW is closed, the test switch TEST is disconnected, and the amplifier is enabled, the amplifier generates an amplified analog signal based on the analog signal SRC_INPUT input to the positive input terminal, and outputs the amplified analog signal through the output terminal. The amplified analog signal is output through the driving terminal SOUT to control the sub-pixel column corresponding to the data channel where the amplifier is located to emit light according to the brightness corresponding to the amplified analog signal.

[0049] In each group of four data channels, the opening or closing of each direct-connect switch DSW can be controlled by the same direct-connect switch enable signal (DSW_EN). Figure 5 The first group includes four direct-connect switches DSW, which are opened or closed by DSW_EN <1> The second group of four direct-connect switches DSW are controlled by DSW_EN. <2> control.

[0050] In each group of four data channels, the opening or closing of each test switch TEST is controlled by a test switch enable signal (TEST_EN). There are four test switch enable signals in total, denoted as TEST_EN<4:1>, where 4:1 represents 1 to 4. For example, Figure 5 As shown, the first test switch of each of the first and second groups is connected to the TEST_EN <1> Control, the first and second groups each include a second test switch through TEST_EN <2> Control, the first and second groups each include a third test switch through TEST_EN <3> Control, the first and second groups each include a fourth test switch through TEST_EN <4> control.

[0051] In each group of four data channels, the enable of each amplifier Amp can be controlled by the same amplifier enable signal (AMP_EN). Figure 5 The first group includes four amplifiers Amp enabled by AMP_EN <1> The second group includes four amplifiers Amp, which are enabled by AMP_EN <2> control.

[0052] Figures 3 to 5 The display driver shown can only implement the above-mentioned wafer test and be put into use if the wafer test passes. However, if a data channel fails after being put into use, it is difficult to automatically repair the data channel failure, resulting in the display driver being unable to continue to be used.

[0053] In response to the problems existing in the related art, the embodiments of the present application provide multiple display drivers, which are described below respectively.

[0054] The first display driver, see Figure 6 , comprising a controller, a comparator, a repair channel, and M data channels, where M is a positive integer greater than 1. The controller is configured to control each of the M data channels to send a test signal to the comparator. The comparator is configured to compare the test signal sent by each data channel with a reference signal to obtain a comparison result. The controller is further configured to, if the comparison result indicates that at least one of the M data channels is faulty, control the repair channel to provide a drive signal to the at least one data channel, the drive signal being configured to drive at least one sub-pixel on the display panel corresponding to the at least one data channel to emit light, thereby repairing the fault in the at least one data channel.

[0055] The comparator, the repair channel, and the M data channels are connected to the controller respectively. The comparator is also connected to the M data channels respectively. The repair channel is also connected to the M data channels in a one-to-one correspondence. In addition, the M data channels are also connected to the display panel respectively.

[0056] Because the controller controls each of the M data channels to send a test signal to the comparator, the comparator compares the test signal sent by each data channel with the reference signal to obtain a comparison result. This comparison result indicates whether each data channel has a fault. If the comparison result indicates that at least one of the M data channels has a fault, the controller controls the repair channel to repair the fault in the at least one data channel. Specifically, the repair channel provides a drive signal to the at least one data channel to normally drive at least one sub-pixel corresponding to the at least one data channel to emit light, thereby repairing the fault in the at least one data channel.

[0057] In one example, see Figure 7 and Figure 8 , Figure 7 and Figure 8 At least 4 data channels are shown. Therefore, the display driver includes a repair channel and at least 4 data channels, and at least 4 data channels reuse the same comparator, thereby realizing M:1 multiplexing of the comparator. Thus, compared with the case where each data channel includes a comparator, the embodiment of the present application reduces the size of the display driver and the size of the chip where the display driver is located, so that the first display driver provided by the embodiment of the present application can realize fault testing and fault repair of the data channel under the premise of reducing the size of the display driver and the chip size. The embodiment of the present application does not limit the value of M, and it is sufficient to ensure that M is a positive integer greater than 1.

[0058] Next, the structures of the data channel, the comparator, and the repair channel included in the display driver are described respectively.

[0059] In an exemplary embodiment, each data channel includes an amplifier, a direct-connect switch, a test switch, and a driving terminal. The driving terminal is used to send a driving signal to the sub-pixel. One of the M data channels also includes an access terminal. A controller is configured to, in a fault test mode, control each direct-connect switch to open, disconnecting the output terminal of each amplifier from the driving terminal, and control each test switch to close in sequence, causing each amplifier to sequentially send a test signal to the comparator via the output terminal, the test switch, and the access terminal.

[0060] In each data channel, the direct connection switch and the test switch are respectively connected to the controller, the output end of the amplifier is connected to the driving end through the direct connection switch, the output end is also connected to the access end through the test switch, and the access end is connected to the comparator.

[0061] The direct-connect switches are denoted as DSW. The closing or opening of each direct-connect switch DSW is controlled by a direct-connect switch enable signal DSW_EN. The test switches are denoted as TEST. The closing or opening of each test switch is controlled by a test switch enable signal TEST_EN. The driver terminals are denoted as SOUT. Each driver terminal corresponds to a subpixel column on the display panel.

[0062] In addition, the amplifiers in the data channel are denoted as Amp. Each amplifier includes a positive input, a negative input, an output, and an enable terminal. Each positive input is used to receive the analog signal SRC_INPUT input from the corresponding decoder. The output is connected to the negative input to form a unity gain connection. Each enable terminal is used to receive the amplifier enable signal AMP_EN. Based on the above description, the output is also connected to the driver terminal SOUT via a direct-connect switch DSW and to the access terminal via a test switch TEST.

[0063] See also Figure 7 and Figure 8 In each data channel (including but not limited to 4 data channels), the driver terminal SOUT <1> The data channel 1 includes an access terminal to connect the multiplexed comparator.

[0064] The four data channels include direct-connect switches DSW, and the closing or opening of the four DSWs is respectively controlled by DSW_EN <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> control.

[0065] The four data channels include test switches TEST, and the closing or opening of the four TESTs is respectively controlled by TEST_EN <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> control.

[0066] The four data channels include the drive end SOUT, that is, Figure 7 and Figure 8 SOUT shown <1> 、SOUT <2> 、SOUT <3> and SOUT <4> Correspondingly, the sub-pixel columns corresponding to the four driving terminals SOUT correspond to red, green 1, blue and green 2 respectively.

[0067] The amplifiers in the four data channels each include a positive input terminal, which is used to input SRC_INPUT <1> 、SRC_INPUT <2> 、SRC_INPUT <3> and SRC_INPUT <4> .

[0068] The amplifiers in the four data channels each include an enable terminal. Figure 7 In the amplifier, different amplifiers receive different amplifier enable signals AMP_EN <1> AMP_EN <2> AMP_EN <3> and AMP_EN <4> .exist Figure 8 In the example, different amplifiers may receive the same amplifier enable signal. For example, the amplifiers in data channels 1 and 2 receive the same amplifier enable signal AMP_EN. <1> , the amplifiers in data channels 3 and 4 receive the same amplifier enable signal AMP_EN <2> Different amplifiers receive the same enable signal, which reduces the number of required amplifier enable signals AMP_EN, helps reduce AMP_EN related circuits, and thus further reduces the area of ​​the display driver and the chip where the display driver is located.

[0069] In fault test mode, the controller sends DSW_EN to the four direct-connect switches DSW. <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> , to control the four direct-connected switches DSW to be disconnected, so that the output end of each amplifier Amp is disconnected from the driving end SOUT.

[0070] The controller also sends TEST_EN to the four test switches TEST. <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> , to control the four test switches to close in sequence, so that each amplifier Amp is connected to the access end through the closed test switch TEST, so that each amplifier Amp sends a test signal to the comparator through the output end, the closed test switch TEST and the access end in sequence.

[0071] The test signal transmitted by each amplifier is generated based on the input test analog signal. That is, in fault test mode, the analog signal SRC_INPUT input via the positive input of each amplifier is used to test whether a data channel fault exists. Alternatively, the test analog signal is transmitted to the amplifier by a decoder in the data channel under the control of a controller.

[0072] In an exemplary embodiment, the comparator includes a test input, a reference input, and a result output. The comparator is configured to sequentially receive a test signal from each data channel via the test input, receive a reference signal via the reference input, sequentially compare the test signal from each data channel with the reference signal, obtain a comparison result, and transmit the comparison result to the controller via the result output.

[0073] In one example, the comparison result includes M sub-results, each corresponding to one of the M data channels. Each sub-result indicates whether the corresponding data channel is faulty. The comparator generates a sub-result each time it compares a test signal transmitted by a data channel with a reference signal. After all test signals are compared with the reference signal, a comparison result is obtained, which is then transmitted to the controller via a result output terminal.

[0074] In another example, different comparison result values ​​correspond to different fault conditions. For example, if the comparison result is a first value, all data channels are fault-free. If the comparison result is a second value, only data channel 1 is faulty, and the other data channels are fault-free. Examples of other cases are not given here one by one. After the comparator compares all test signals with the reference signal, it obtains a comparison result, which is then transmitted to the controller via the result output terminal.

[0075] In an exemplary embodiment, a level shifter is further included; a comparator is used to send a comparison result to the level shifter through a result output terminal; the level shifter is used to level-shift the comparison result to obtain a level-shifted comparison result, and send the level-shifted comparison result to the controller, and the level-shifted comparison result indicates whether each data channel has a fault.

[0076] That is, the comparator has a corresponding level shifter, and the comparator stores the comparison result in the level shifter, so that the level shifter shifts the comparison result, thereby enabling the controller to determine whether each data channel has a fault according to the comparison result after level shifting.

[0077] Exemplarily, the test signal and the reference signal are both analog signals (e.g., analog voltage signals). The comparator receives these two analog signals and outputs a comparison result, which is also an analog signal. The level shifter shifts the comparison result (e.g., performs a level shift down), and the comparison result obtained after the level shift is a digital signal (recorded as value 1, where value 1 is, for example, a voltage value). Accordingly, the controller compares value 1 with value 2 as a reference (the value can be flexibly set according to actual needs). If value 1 and value 2 are the same or similar (e.g., the absolute value of the difference between value 1 and value 2 is less than or equal to the reference threshold), it indicates that there is no fault in the data channel. If there is a large difference between value 1 and value 2 (e.g., the absolute value of the difference between value 1 and value 2 is greater than the reference threshold), it indicates that there is a fault in the data channel.

[0078] Optionally, the level shifter may directly send the level-shifted comparison result to the controller, or may store the level-shifted comparison result in a memory, and the controller obtains the level-shifted comparison result from the memory.

[0079] Since the embodiment of the present application reduces the number of comparators through M:1 comparator multiplexing, and the comparators correspond to the level shifters, the number of level shifters is also reduced accordingly, thereby further reducing the size of the display driver and the size of the chip where the display driver is located.

[0080] Combine Figure 7 and Figure 8 , the fault test mode is illustrated as follows.

[0081] Power on → Repair channels are closed (not running) → All switches are closed, including the repair switch RSW, direct-connect switch DSW, shift switch SSW (see below for details), and test switch TEST → Bias circuit is turned on. The bias circuit is used to provide the required voltages for the gamma circuit and each amplifier to operate normally → Gamma circuit is turned on to generate multiple analog voltages → Each amplifier Amp is turned on (since the repair channels are all closed, the repair amplifier remains off) → Comparator Comp is turned on → The decoder included in each data channel selects an analog voltage SRC_INPUT and inputs it to the corresponding amplifier. In addition, a reference signal is provided to the comparator Comp for comparison → TEST_EN <1> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 1 → TEST_EN <1> Control the corresponding test switch TEST to be disconnected, and TEST_EN <2> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 2 → TEST_EN <2> Control the corresponding test switch TEST to be disconnected, and TEST_EN <3> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 3 → TEST_EN <3> Control the corresponding test switch TEST to be disconnected, and TEST_EN <4> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 4 → and so on until TEST_EN <m>Control the corresponding test switch TEST to close and check whether there is a fault in the data channel M → the comparator Comp is closed → each comparator sends the comparison result to the controller.

[0082] If there are no faults in all data channels, the display is turned on, the repair switch RSW, the test switch TEST and the shift switch SSW are all disconnected, and the direct connection switch DSW is closed, so that each data channel works normally to drive the corresponding sub-pixel column to emit light and realize content display on the display panel.

[0083] If at least one data channel has a fault, fault repair is required to repair the fault in at least one data channel, as described below.

[0084] Illustratively, each repair channel includes a repair amplifier and a repair switch. The controller is configured to, in a fault repair mode, control each test switch to be opened, disconnecting the output of each amplifier from the comparator, control the direct-connect switch to be opened as needed, disconnecting the output of the amplifier from the driver in the data channel where the open direct-connect switch is located, and control each repair switch to be closed, causing each repair amplifier to send a drive signal to the corresponding driver via the repair switch.

[0085] In each repair channel, a repair switch is connected to the controller, and a repair output terminal of the repair amplifier is connected to a driving terminal included in a corresponding data channel through the repair switch.

[0086] The repair switch is denoted as RSW. The closing or opening of each repair switch RSW is controlled by a repair switch enable signal RSW_EN. The repair amplifier is denoted as REP_Amp. Each repair amplifier includes a repair positive input terminal, a repair negative input terminal, a repair output terminal, and a repair enable terminal. Each repair positive input terminal is used to receive an input analog signal SRC_INPUT_REP, and the repair output terminal is connected to the repair negative input terminal to form a unit gain connection mode. Each repair enable terminal is used to receive a repair enable signal REP_AMP_EN. Based on the above description, the repair output terminal is also connected to the driving terminal SOUT included in the corresponding data channel through the repair switch RSW.

[0087] In one example, see Figure 7 , the number of repair channels is 1, and the repair channel corresponds to the target data channel in the M data channels. For example, Figure 7 FIG shows an exemplary case where the target data channel is data channel 1, wherein the output end of the repair amplifier included in the repair channel is connected to the repair switch RSW (by RSW_EN <1> Control) and data channel 1 includes the drive terminal SOUT <1> connect.

[0088] Exemplarily, each data channel further includes a shift switch SSW, and the opening or closing of each shift switch SSW is controlled by a shift switch enable signal (SSW_EN). Figure 7 The opening or closing of the four shift switches SSW included in the four data channels shown is controlled by SSW_EN<4:1>, where 4:1 represents 1 to 4. Optionally, the last data channel (e.g., the Mth data channel) among the M data channels does not include the shift switch SSW, while the other data channels all include the shift switch SSW.

[0089] The output end of the amplifier included in one data channel is connected to the driving end SOUT included in another data channel through the shift switch SSW. Figure 7 , the output of the amplifier included in data channel 1 is switched via the shift switch SSW (by SSW EN <1> Control) and data channel 2 include the drive end SOUT <2> The output of the amplifier included in data channel 2 is connected via the shift switch SSW (by SSW_EN <2> Control) and data channel 3 include the drive end SOUT <3> The output of the amplifier included in data channel 3 is connected via the shift switch SSW (by SSW_EN <3> Control) and data channel 4 include the drive end SOUT <4> The output of the amplifier included in data channel 4 is connected via a shift switch SSW (by SSW_EN <4> The output end of the amplifier included in data channel M-1 is connected to the driving end included in data channel M through the shift switch SSW. Data channel M may include a shift switch as a backup, or may not include a shift switch.

[0090] The drive signal sent by each repair amplifier is generated based on the above-mentioned repair enable signal REP_AMP_EN and the analog signal input to the repair positive input terminal of the repair amplifier. This analog signal is the analog signal corresponding to the target data channel. In other words, the analog signal that should be input to the target data channel does not need to be input to the target data channel during the fault repair process. Instead, it is channel remapped (i.e., input) to the repair channel. After the repair amplifier in the repair channel is enabled by the repair enable signal, it can generate a drive signal for the target data channel based on the input analog signal. The generated drive signal can be sent to the drive end of the target data channel through the repair switch.

[0091] In addition to remapping between the repair channel and the target data channel, remapping is also required between two data channels connected by a shift switch. For example, if the output of the amplifier included in data channel A is connected to the driver included in data channel B via a shift switch, remapping means that the analog signal that should be input to data channel B does not need to be input to data channel B during the fault repair process. Instead, it is remapped to data channel A. After the amplifier in data channel A is enabled by the amplifier enable signal AMP_EN, it can generate a drive signal for data channel B based on the input analog signal. The generated drive signal can be sent to the driver of data channel B via the shift switch.

[0092] Optionally, the above remapping process may be controlled by a controller.

[0093] Combine Figure 7 , with the drive end SOUT <2> Taking the case where data channel 2 has a fault as an example, the fault recovery mode is described as follows.

[0094] Power on → Repair channel is closed (not running) → All switches are closed, including the repair switch RSW, direct connection switch DSW, shift switch SSW and test switch TEST, and all comparators are also closed → Bias circuit is turned on → Gamma circuit is turned on → Channel remapping is performed, that is, the analog signal that should be input to data channel 1 is remapped to the repair channel, and the analog signal that should be input to data channel 2 is remapped to data channel 1 → The amplifier in the faulty data channel is not turned on (that is, AMP_EN <2> The amplifier in data channel 2 is not enabled), and the amplifier in the data channel without a fault is turned on (that is, AMP_EN <1> Enable the amplifier in data channel 1, AMP_EN <m:3>Enable the amplifiers in the third data channel to the Mth data channel respectively, M:3 represents 3 to M, M is the number of data channels), the repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the repair switch RSW is turned on according to RSW_EN <1> The control is closed, and the direct switch DSW in data channel 1 is closed according to DSW_EN <1> The control is disconnected, and the shift switch SSW of data channel 1 is set according to SSW_EN <1> The control is closed, and the direct switch DSW in data channel 2 is closed according to DSW_EN <2> The control of the data channel 2 to M is disconnected, and the shift switch SSW is set according to SSW_EN <m:2>The control is disconnected, and the direct switch DSW in data channel 3 to M is disconnected according to DSW_EN <m:3>The control is closed → As a result, the repair channel provides a driving signal for data channel 1, data channel 1 provides a driving signal for data channel 2, and data channels 3 to M normally provide driving signals for themselves, thereby repairing the fault of data channel 2 → the display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0095] In another example, see Figure 8 , the number of repair channels is P, P is less than M and P is a positive integer. The M data channels are divided into multiple channel groups, each channel group includes P data channels. Accordingly, the P repair channels correspond one-to-one to the P data channels in one target channel group (connected by a repair switch, and channel remapping needs to be performed between the corresponding repair channels and data channels), and the P data channels in the target channel group correspond one-to-one to the P data channels in other channel groups (connected by a shift switch, and channel remapping needs to be performed between the corresponding different data channels). Optionally, the remapping process can be controlled by a controller.

[0096] for example, Figure 8 The case where P is 2 is shown in FIG. Repair channel 1 is repaired by repair switch RSW (by RSW_EN <1> Control) and the driving end SOUT of data channel 1 <1> Connect, repair channel 2 through the repair switch RSW (by RSW_EN <2> Control) and the driving end SOUT of data channel 2 <2> Connection, data channel 1 is through the shift switch (by SSW_EN <1> Control) and the driving end SOUT of data channel 3 <3> Connection, data channel 2 is connected through the shift switch SSW (by SSW_EN <2> Control) and the driving end SOUT of data channel 4 <4> The repair amplifier REP_Amp and repair switch RSW included in the repair channel, and the amplifier Amp and shift switch SSW included in the data channel are not described here in detail. Figure 7 The corresponding instructions are sufficient.

[0097] Combine Figure 8 , with the drive end SOUT <3> Taking the case where data channel 3 has a fault as an example, the fault recovery mode is described as follows.

[0098] In fault repair mode, power on → both repair channels are closed (not running) → all switches are closed, including the repair switch RSW, direct connection switch DSW, shift switch SSW, and test switch TEST, and all comparators are also closed → bias circuit is turned on → gamma circuit is turned on → channel remapping is performed, that is, the analog signal that should be input to data channel 1 is remapped to repair channel 1, the analog signal that should be input to data channel 2 is remapped to repair channel 2, the analog signal that should be input to data channel 3 is remapped to data channel 1, and the analog signal that should be input to data channel 4 is remapped to data channel 2 → the amplifier in the data channel with the fault is not turned on (AMP_EN <2> The amplifiers in data channels 3 and 4 are disabled), and the amplifiers in the data channels without faults are enabled (AMP_EN <1> Enables the amplifiers in data channels 1 and 2, and AMP_EN <m 2:3>Enable the amplifiers in data channels 5 to M. M / 2:3 represents 3 to M / 2, the number of data channels is M, and the amplifiers in every two data channels are enabled by the same AMP_EN, so there are M / 2 AMP_ENs in total). The repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the two repair switches RSW are closed according to the control of RSW_EN<2:1>, the four direct-connect switches DSW in data channels 1 to 4 are opened according to the control of DSW_EN<4:1>, the two shift switches SSW in data channels 1 and 2 are closed according to the control of SSW_EN<2:1>, and the M-4 direct-connect switches DSW in data channels 5 to M are closed according to DSW_EN <m:5>The control is closed, and each shift switch SSW in data channel 3 to M is closed according to SSW_EN <m:3>The control is disconnected → As a result, repair channels 1 and 2 provide driving signals for data channels 1 and 2 respectively, data channels 1 and 2 provide driving signals for data channels 3 and 4 respectively, and data channels 5 to M provide driving signals for themselves normally, realizing the repair of the fault of data channel 3 → the display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0099] The second display driver, see Figure 9 , comprising a controller, M first comparators, M first data channels, and M repair channels, where M is a positive integer greater than 1. Each first comparator is configured to compare a first test signal sent by its corresponding first data channel with a reference signal to obtain a first comparison result. The controller is configured to, if the first comparison result indicates that at least one of the M first data channels is faulty, control the M repair channels to provide first drive signals to the M first data channels, the first drive signals being configured to drive first pixel groups corresponding to the M first data channels on the display panel to emit light, thereby repairing the fault in the at least one first data channel.

[0100] Among them, the first comparator is connected to the first data channel in a one-to-one correspondence, the M first comparators, the M first data channels and the M repair channels are connected to the controller respectively, and the M first data channels are also connected to the M repair channels in a one-to-one correspondence. In addition, the M first data channels are also connected to the display panel respectively ( Figure 9 not shown).

[0101] The controller can control each first data channel to send a first test signal to a corresponding first comparator. Thus, for any first comparator, the first comparator can compare the first test signal sent by the corresponding first data channel with a reference signal to obtain a first comparison result, which indicates whether the corresponding first data channel has a fault. If the first comparison result obtained by at least one first comparator indicates that the corresponding first data channel has a fault, indicating that at least one of the M first data channels has a fault, the controller controls each repair channel to provide a first drive signal to the corresponding first data channel. That is, the M repair channels generate the first drive signals on behalf of the M first data channels, thereby normally driving the first pixel groups corresponding to the M first data channels to emit light, thereby repairing the fault of at least one first data channel.

[0102] During the fault repair process, the first drive signal is used to drive the first pixel group on the display panel to emit light, so the repair is performed in complete pixel units. Compared to the first display driver's sub-pixel repair method, the second display driver's complete pixel repair method has a more appropriate granularity and is more practical.

[0103] The first display driver performs repair on a sub-pixel basis because the drive signal in the first display driver is used to drive at least one sub-pixel on the display panel to emit light. Furthermore, the shift switch in the first display driver is located between two adjacent data channels. Since each data channel corresponds to a sub-pixel column, channel remapping and shifting also occur between different sub-pixel columns, meaning that repair is performed on a sub-pixel basis.

[0104] Next, the structures of the data channel, the comparator, and the repair channel included in the display driver are described respectively.

[0105] In an exemplary embodiment, each first data channel includes a first amplifier, a first direct-connect switch, and a first driver terminal, wherein the first driver terminal is configured to transmit a first drive signal to the first pixel group. Each first data channel may also include a first access terminal and a first test switch. A controller is configured to, in a fault test mode, control each first direct-connect switch to be opened, thereby disconnecting the first output terminal of each first amplifier from the first driver terminal, and control each first test switch to be closed, thereby transmitting a test signal to the corresponding first comparator via the first output terminal, the first test switch, and the first access terminal.

[0106] In each first data channel, the first direct switch and the first test switch are respectively connected to the controller, the first output end of the first amplifier is connected to the first driving end through the first direct switch, the first output end is also connected to the first access end through the first test switch, and the first access end is connected to the first comparator.

[0107] The first direct switch DSW is closed or opened by a direct switch enable signal DSW_EN. The first test switch TEST is closed or opened by a test switch enable signal TEST_EN. Each first drive terminal SOUT corresponds to a sub-pixel column on the display panel.

[0108] The first amplifier Amp in the first data channel includes a first positive input, a first negative input, a first output, and a first enable terminal. Each first positive input is configured to receive an analog signal SRC_INPUT inputted by a corresponding decoder. The first output is connected to the first negative input to achieve unity gain. Each first enable terminal is configured to receive an amplifier enable signal AMP_EN. Furthermore, the first output is connected to the first drive terminal SOUT via a first direct-connect switch DSW and to the first access terminal via a first test switch TEST.

[0109] The embodiment of the present application does not limit M. Taking the value of M as 4 as an example, see Figure 10 , M first data channels include a first driving terminal SOUT <1> To the first drive terminal SOUT <4> The data channels 1 to 4 are described below based on this.

[0110] The four first data channels each include a first direct-connect switch DSW, and the closing or opening of the four DSWs is respectively controlled by DSW_EN <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> control.

[0111] The four first data channels each include a first test switch TEST, and the closing or opening of the four TESTs is respectively controlled by TEST_EN <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> control.

[0112] The four first data channels each include a first driving terminal SOUT, namely Figure 10 SOUT shown <1> 、SOUT <2> 、SOUT <3> and SOUT <4> Correspondingly, the sub-pixel columns corresponding to the four first driving terminals SOUT correspond to red, green 1, blue, and green 2, respectively.

[0113] The first amplifiers in the four first data channels each include a first positive input terminal, which is used to input SRC_INPUT <1> 、SRC_INPUT <2> 、SRC_INPUT <3> and SRC_INPUT <4> .

[0114] The first amplifiers in the four first data channels each include a first enable terminal, which receives the same amplifier enable signal AMP_EN. <1> , then the 4 first amplifiers can be AMP_EN <1> Enable at the same time.

[0115] The controller sends DSW_EN to the four first direct-connect switches DSW. <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> , to control the four first direct-connected switches DSW to be disconnected, so that the first output end of each first amplifier Amp is disconnected from the first driving end SOUT.

[0116] The controller also sends TEST_EN to the four first test switches TEST. <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> , to control the closure of the four first test switches (including but not limited to closing in sequence), so that each first amplifier Amp is connected to the first access terminal through the closed first test switch TEST, so that each first amplifier Amp sends the first test signal to the corresponding first comparator through the first output terminal, the closed first test switch TEST and the first access terminal in sequence.

[0117] The first test signal transmitted by each first amplifier is generated based on the input test analog signal. That is, in fault test mode, the analog signal SRC_INPUT input via the first positive input terminal of each first amplifier is a test analog signal used to test whether a fault exists in the first data channel. Optionally, the test analog signal is transmitted to the first amplifier by a decoder in the first data channel under control of a controller.

[0118] In an exemplary embodiment, the first comparator includes a first test input, a first reference input, and a first result output. The first comparator is configured to receive a first test signal transmitted from a corresponding first amplifier via the first test input, receive a reference signal via the first reference input, compare the received first test signal with the reference signal, obtain a first comparison result, and transmit the first comparison result to the controller via the first result output. The first comparison result transmitted by the first comparator indicates whether a first data channel corresponding to the first comparator has a fault.

[0119] In an exemplary embodiment, the display driver further includes a level shifter. The first comparator is configured to transmit a first comparison result to the level shifter via a first result output terminal. The level shifter is configured to level-shift the first comparison result to obtain a level-shifted first comparison result, transmit the level-shifted first comparison result to the controller, and determine whether a first data channel corresponding to the level-shifted first comparison result is faulty. The first result output terminal is connected to the controller via the level shifter.

[0120] That is, the first comparator corresponds to a level shifter, and the first comparator stores the first comparison result in the level shifter, so that the level shifter shifts the first comparison result, thereby enabling the controller to determine whether each first data channel has a fault according to the first comparison result after level shifting.

[0121] Exemplarily, the first test signal and the reference signal are both analog signals (e.g., analog voltage signals). The first comparator receives the two analog signals and outputs a first comparison result, which is also an analog signal. The level shifter shifts the first comparison result (e.g., performs a level shift down), and the first comparison result obtained after the level shift is a digital signal (recorded as value 1, where value 1 is, for example, a voltage value). Accordingly, the controller compares value 1 with value 2 as a reference (the value can be flexibly set according to actual needs). If value 1 and value 2 are the same or similar (e.g., the absolute value of the difference between value 1 and value 2 is less than or equal to a reference threshold), it indicates that the corresponding first data channel has no fault. If there is a large difference between value 1 and value 2 (e.g., the absolute value of the difference between value 1 and value 2 is greater than the reference threshold), it indicates that the corresponding first data channel has a fault.

[0122] Optionally, the level shifter may directly send the level-shifted first comparison result to the controller, or may store the level-shifted first comparison result in a memory, and the controller obtains the level-shifted first comparison result from the memory.

[0123] Illustratively, each repair channel includes a repair amplifier and a repair switch. The controller is configured to, in a fault repair mode, control each first direct-connect switch to be open, thereby disconnecting the first output terminal of each first amplifier from the first driver terminal, and control each repair switch to be closed, thereby causing each repair amplifier to transmit a first drive signal to the corresponding first driver terminal via the repair switch.

[0124] In each repair channel, the repair switch is connected to the controller, and the repair output terminal of the repair amplifier is connected to the first driving terminal included in the corresponding first data channel through the repair switch.

[0125] The opening and closing of the repair switch RSW is controlled by the repair switch enable signal RSW_EN. The repair amplifier REP_Amp includes a repair positive input, a repair negative input, a repair output, and a repair enable. Each repair positive input is configured to receive an analog signal SRC_INPUT_REP. The repair output is connected to the repair negative input to form a unity gain connection. Each repair enable is configured to receive the repair enable signal REP_AMP_EN. The repair output is also connected to the first drive terminal SOUT of the corresponding first data channel via the repair switch RSW.

[0126] Continue to see Figure 10 , taking the value of M as 4 as an example, there are 4 repair channels. Repair channel 1 corresponds to the first data channel 1, so the repair amplifier REP_Amp in repair channel 1 is turned on by the repair switch (by RSW_EN <1> control) and the first driving end SOUT of the first data channel 1 <1> In addition, the repair amplifier REP_Amp in repair channel 2 is switched on by the repair switch (by RSW_EN <2> control) and the first driving end SOUT of the first data channel 2 <2> The repair amplifier REP_Amp in repair channel 3 is connected via the repair switch (by RSW_EN <3> control) and the first driving end SOUT of the first data channel 3 <3> The repair amplifier REP_Amp in repair channel 4 is connected via the repair switch (by RSW_EN <4> control) and the first driving end SOUT of the first data channel 4 <4> connect.

[0127] In the event that a fault occurs in at least one first data channel, the controller enters a fault recovery mode.

[0128] The controller sends DSW_EN to the four first direct-connect switches DSW. <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> , to control the four first direct-connected switches DSW to be disconnected, so that the first output end of each first amplifier Amp is disconnected from the first driving end.

[0129] The controller also sends TEST_EN to the four first test switches TEST. <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> , so as to control the four first test switches to be disconnected, so that the first output terminal of each first amplifier Amp is disconnected from the first access terminal. Since the first access terminal is connected to the first comparator, the first output terminal of each first amplifier Amp is also disconnected from the first comparator.

[0130] The controller also sends RSW_EN to the four repair switches RSW. <1> 、RSW_EN <2> 、RSW_EN <3> and RSW_EN <4> , controlling each repair switch to close, so that the repair output terminal of each repair amplifier is connected to the corresponding first driver terminal. Furthermore, the controller sends a repair enable signal REP_AMP_EN to the repair enable terminal of each repair amplifier, thereby causing each repair amplifier to send a first drive signal to the corresponding first driver terminal via the repair output terminal and the closed repair switch.

[0131] The first drive signal sent by each repair amplifier is generated based on the repair enable signal and the input first analog signal, and the first analog signal matches the first data channel corresponding to the repair amplifier. In other words, the first analog signal that should have been input to the first data channel is remapped to the repair channel corresponding to the first data channel. Once enabled by the repair enable signal, the repair amplifier in the repair channel can generate the first drive signal for the corresponding first data channel based on the input first analog signal. Optionally, this remapping process can be controlled by a controller.

[0132] Take the first data channel 1 and the repair channel 1 as an example for explanation. When at least one of the first data channels fails, the first data channel 1 no longer receives the input first analog signal, and the first amplifier in the first data channel 1 no longer generates a driving signal. Instead, the repair channel 1 receives the input first analog signal SRC_INPUT_REP <1> After the repair amplifier in repair channel 1 is enabled by REP_AMP_EN, it is based on the first analog signal SRC_INPUT_REP <1> Generates a first drive signal, which is then switched on by the closed repair switch RSW (by RSW_EN <1> control) to the first drive terminal SOUT <1> A first driving signal is output to drive the sub-pixel column corresponding to the first data channel 1 to emit light.

[0133] Exemplarily, the first pixel group includes M sub-pixel columns, the M first data channels correspond one-to-one to the M sub-pixel columns, and the first driving signal corresponding to each first data channel is used to drive the corresponding sub-pixel column to emit light.

[0134] Combined with the above Figure 2 As can be seen from the description, each first data channel corresponds to a sub-pixel column, so the first pixel group corresponding to M first data channels includes M sub-pixel columns. The M sub-pixel columns are all the sub-pixel columns corresponding to a complete pixel. For example, the M sub-pixel columns correspond to red, green 1, blue, and green 2, and a complete pixel contains exactly four sub-pixels: red, green 1, blue, and green 2.

[0135] During the fault repair process, the first analog signals corresponding to the M first data channels need to be remapped to the corresponding repair channels respectively. Since the M sub-pixel columns are all sub-pixel columns corresponding to a complete pixel, the remapping performed in the embodiment of the present application is performed in units of complete pixels. The remapping design is relatively simple and the granularity of the repair is more appropriate.

[0136] Exemplarily, the display driver further includes M second comparators and M second data channels. Each second comparator is configured to compare a second test signal transmitted by its corresponding second data channel with a reference signal to obtain a second comparison result. The controller is further configured to, if none of the M first data channels are faulty and the second comparison result indicates that at least one of the M second data channels is faulty, control the M repair channels to provide the first drive signal to the M first data channels and control the M first data channels to provide the second drive signal.

[0137] Among them, M second comparators and M second data channels are respectively connected to the controller, the M second comparators are also connected one-to-one with the M second data channels, the M second data channels are also connected one-to-one with the M first data channels (directly or indirectly), and the M second data channels are also respectively connected to the display panel.

[0138] Each second data channel includes a second amplifier, a second direct-connect switch, a second access terminal, and a second driving terminal. The second access terminal is used to connect to the corresponding second comparator, and the second driving terminal is used to send a specific driving signal to the second pixel group. Each second data channel may also include a second access terminal and a second test switch. In each second data channel, the second direct-connect switch and the second test switch are respectively connected to the controller. The second output terminal of the second amplifier is connected to the second driving terminal via the second direct-connect switch, and the second output terminal is also connected to the second access terminal via the second test switch.

[0139] Each second amplifier includes a second positive input, a second negative input, a second output, and a second enable terminal. Each second positive input is respectively configured to receive an analog signal SRC_INPUT inputted by a corresponding decoder. The second output is connected to the second negative input to form a unity-gain connection. Each second enable terminal is configured to receive an amplifier enable signal AMP_EN. Furthermore, the second output is connected to the second drive terminal SOUT via a second direct-connect switch DSW and to the second access terminal via a second test switch TEST.

[0140] In addition, each second comparator includes a second test input, a second reference input, and a second result output. The second test input is used to receive a second test signal transmitted by the corresponding second data channel, the second reference input is used to receive a reference signal, and the second result output is used to output a second comparison result to the controller. The second comparison result output by a second comparator indicates whether the corresponding second data channel has a fault. Optionally, the second comparator includes a corresponding level shifter, which is used to level shift the second comparison result, so that the controller determines whether each second data channel has a fault based on the level-shifted second comparison result.

[0141] The structure of each second data channel, the process of the second comparator outputting the second comparison result, and the process of the controller detecting whether there is a fault in each second data channel are not described in detail here. Please refer to the above description related to the first data channel and the first comparator.

[0142] Continue to see Figure 10 , taking the value of M as 4 as an example, the M second data channels include the second driving terminal SOUT <5> To the second drive terminal SOUT <8> The data channels 5 to 8 are described below.

[0143] The four second data channels each include a second direct-connect switch DSW, and the closing or opening of the four DSWs is respectively controlled by DSW_EN <5> 、DSW_EN <6> 、DSW_EN <7> and DSW_EN <8> control.

[0144] The four second data channels each include a second test switch TEST, and the closing or opening of the four TESTs is respectively controlled by TEST_EN <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> control.

[0145] The four second data channels each include a second driving terminal SOUT, namely Figure 10 SOUT shown <5> 、SOUT <6> 、SOUT <7> and SOUT <8> Correspondingly, the sub-pixel columns corresponding to the four second driving terminals SOUT correspond to red, green 1, blue and green 2 respectively.

[0146] The second amplifiers in the four second data channels each include a second positive input terminal, which is used to input SRC_INPUT <5> 、SRC_INPUT <6> 、SRC_INPUT <7> and SRC_INPUT <8> .

[0147] The second amplifiers in the four second data channels each include a second enable terminal, which receives the same amplifier enable signal AMP_EN. <2> , then the 4 second amplifiers can be AMP_EN <2> Enable at the same time.

[0148] As described above, when at least one second data channel fails, the controller controls the M repair channels to provide the first drive signal to the M first data channels, and controls the M first data channels to provide the second drive signal. The second drive signal has the following first and second conditions.

[0149] In the first case, the second driving signal is a signal provided by the M first data channels to the M second data channels, and the second driving signal is used to repair a fault existing in at least one second data channel.

[0150] In this case, the M first data channels are directly connected to the M second data channels, and each first data channel directly provides a second driving signal to the corresponding second data channel.

[0151] Exemplarily, each first data channel further includes a first shift switch, which is denoted as SSW. The closing or opening of each first shift switch SSW is controlled by a first shift switch enable signal SSW_EN. In each first data channel, the first shift switch SSW is connected to the controller, and the first output terminal of the first amplifier is also connected to the second driving terminal of the corresponding second data channel through the first shift switch. For example, see Figure 10 , the first shift switch includes the shift switches in data channels 1 to 4 (by SSW_EN <1> to SSW_EN <4> controlled separately).

[0152] Each first data channel includes a first shift switch configured to connect to a second drive terminal of a corresponding second data channel. This allows the first amplifier of the first data channel to transmit a second drive signal to the corresponding second data channel via the first output terminal and the first shift switch, and the second drive terminal of the corresponding second data channel transmits the second drive signal to the second pixel group.

[0153] A controller is used to control each first direct-connect switch to be disconnected in a fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end respectively, control each second direct-connect switch to be disconnected, so that the second output end of each second amplifier is disconnected from the second driving end respectively, and control each repair switch and each first shift switch to be closed, so that each repair amplifier sends a first drive signal to the corresponding first driving end through the repair switch, and each first amplifier sends a second drive signal to the corresponding second driving end through the first shift switch.

[0154] The second drive signal sent by each first amplifier is generated based on the first enable signal and the input second analog signal, with the second analog signal corresponding to the corresponding second data channel. In other words, the second analog signal, which should have been input to the second data channel, is remapped to the first data channel corresponding to the second data channel. Once the first amplifier in the first data channel is enabled by the first enable signal, it can generate the second drive signal for the corresponding second data channel based on the input second analog signal. Optionally, this remapping process can be controlled by a controller.

[0155] Take the first data channel 1 and the second data channel 1 as an example for illustration. When at least one of the second data channels fails, the second data channel 1 no longer receives the input second analog signal, and the second amplifier in the second data channel 1 no longer generates a drive signal. Instead, the first data channel 1 receives the input second analog signal SRC_INPUT. <1> , the first amplifier is AMP_EN <1> After enabling, the first analog signal SRC_INPUT based on the input <1> Generate a second drive signal, through the closed first shift switch SSW (by SSW_EN <1> Control) to the second driving end SOUT included in the second data channel 1 <5> The second driving signal is output to drive the sub-pixel column corresponding to the second data channel 1 to emit light. For the first data channels 2 to 4 and the second data channels 2 to 4, no further examples are given here.

[0156] In the second case, the second driving signal is a signal provided by the M first data channels to other data channels in the display driver. The other data channels are used to provide other driving signals to the M second data channels. The other driving signals are used to repair a fault in at least one second data channel.

[0157] In this case, the M first data channels are not directly connected to the M second data channels, but are indirectly connected to the M second data channels. The M first data channels are directly connected to other data channels, and the other data channels are directly or indirectly connected to the M second data channels.

[0158] Exemplarily, in addition to the aforementioned M first data channels and M second data channels, the display driver further includes Q channel groups, each of which includes M other data channels. Q can have various values, as detailed in the following two examples.

[0159] In the first example, Q is 1. That is, the display driver includes M first data channels, M second data channels, and one channel group (including M other data channels). The controller is configured to control the M first data channels to provide a second drive signal to the one channel group, and further to control the one channel group to provide other drive signals to the M second data channels. The other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0160] Furthermore, when Q is 1, the M first data channels correspond one-to-one with the M other data channels included in a channel group. Each first data channel is connected to the driver end of the corresponding other data channel via a first shift switch, which is closed in fault recovery mode. Furthermore, the M other data channels included in a channel group also correspond one-to-one with the M second data channels, and each other data channel is connected to the second driver end of the corresponding second data channel via a second shift switch, which is also closed in fault recovery mode.

[0161] For example, the M first data channels are data channels 1 to 4, the M other data channels are data channels 5 to 8, and the M second data channels are data channels 9 to 12. When at least one second data channel is faulty, the system enters a fault repair mode, repairing channels 1 to 4 respectively providing first drive signals to data channels 1 to 4 (through closed repair switches), and data channels 1 to 4 respectively providing second drive signals to data channels 5 to 8 (through closed first shift switches, for the process, see the description of the first case above). Data channels 5 to 8 respectively provide other drive signals to data channels 9 to 12 (through closed second shift switches), and the other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0162] In the second example, Q is a positive integer greater than 1. That is, the display driver includes M first data channels, M second data channels, and Q (i.e., at least two) channel groups, each channel group including M other data channels. Q-1 channel groups in the Q channel groups correspond to other channel groups, and 1 channel group in the Q channel groups corresponds to the M second data channels. The controller is used to control the M first data channels to provide a second drive signal to any one of the Q-1 channel groups, and is also used to control the Q-1 channel groups to provide a third drive signal to the corresponding channel group, and control the 1 channel group to provide other drive signals to the corresponding M second data channels. The other drive signals are used to drive the second pixel group corresponding to the M second data channels on the display panel to emit light.

[0163] Moreover, when Q is a positive integer greater than 1, the M first data channels are connected to any corresponding channel group through the first shift switch, Q-1 channel groups are connected to the corresponding other channel groups through the third shift switch, and 1 channel group is connected to the corresponding M second data channels through the fourth shift switch. The first shift switch, the third shift switch and the fourth shift switch are closed in the fault repair mode.

[0164] For example, when the value of Q is 2, the M first data channels are data channels 1 to 4, the M other data channels included in channel group X are data channels 5 to 8, the M other data channels included in channel group Y are data channels 9 to 12, and the M second data channels are data channels 13 to 16. When at least one second data channel is faulty, the system enters a fault repair mode, where repair channels 1 to 4 respectively provide first drive signals to data channels 1 to 4 (via closed repair switches), data channels 1 to 4 respectively provide second drive signals to data channels 5 to 8 (via closed first shift switches), data channels 5 to 8 respectively provide third drive signals to data channels 9 to 12 (via closed third shift switches), and data channels 9 to 12 respectively provide other drive signals to data channels 13 to 16 (via closed fourth shift switches). The other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0165] For example, in both the first and second cases described above, the second drive signal sent by each first amplifier is generated based on the same enable signal. This embodiment of the present application eliminates the need to provide a different enable signal AMP_EN for each first amplifier, thereby reducing the number of AMP_EN-related circuits and further reducing the area of ​​the display driver and the chip on which the display driver resides.

[0166] Hereinafter, the total number of all data channels included in the display driver is recorded as N. N=M×K, where K is a positive integer greater than or equal to 2. That is, the display driver includes K channel groups, and each channel group includes M data channels. Figure 10 , the fault test mode and the fault repair mode are respectively illustrated as follows.

[0167] Power on → Repair channel closed (not running) → All switches are closed, including the repair switch RSW, direct-connect switch DSW, shift switch SSW, and test switch TEST → Bias circuit turned on → Gamma circuit turned on → Amplifier Amp in each data channel turned on (repair amplifier remains off) → Comparator Comp in each data channel turned on → The decoder included in each data channel selects an analog voltage SRC_INPUT and inputs it to the corresponding amplifier, providing a reference signal for comparison for each comparator Comp → TEST_EN <1> Control the corresponding test switch TEST to close → Check data channels 1, 5, 9, ..., N-3 for faults → TEST_EN <1> Control the corresponding test switch TEST to be disconnected, and TEST_EN <2> Control the corresponding test switch TEST to close → Check data channels 2, 6, 10, ..., N-2 for faults → TEST_EN <2> Control the corresponding test switch TEST to be disconnected, and TEST_EN <3> Control the corresponding test switch TEST to close → Check data channels 3, 7, 11, ..., N-1 for faults → TEST_EN <3> Control the corresponding test switch TEST to be disconnected, and TEST_EN <4> Control the corresponding test switch TEST to close → respectively check whether data channels 4, 8, 12, ..., N have faults → the comparator Comp is closed → each comparator sends the comparison result to the controller.

[0168] Among them, each of the 4 data channels corresponds to TEST_EN <1> To TEST_EN <4> For example only, the embodiment of the present application can also make N test switches included in N data channels correspond to N test switch enable signals TEST_EN respectively, then in the fault detection process, TEST_EN <1> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 1 → TEST_EN <1> Control the corresponding test switch TEST to be disconnected, and TEST_EN <2> Control the corresponding test switch TEST to close to check whether there is a fault in data channel 2 → and so on until TEST_EN <n>Control the corresponding test switch TEST to close and check whether the data channel N has a fault.

[0169] If there are no faults in all data channels, the display is turned on, the repair switch RSW, the test switch TEST and the shift switch SSW are all disconnected, and the direct connection switch DSW is closed, so that each data channel works normally to drive the corresponding sub-pixel column to emit light and realize content display on the display panel.

[0170] If at least one data channel has a fault, fault repair is required to repair the fault of the at least one data channel.

[0171] Regarding the first situation mentioned above, taking the case where data channel 7 has a fault as an example, an example is given below.

[0172] In fault repair mode, power on → all four repair channels of automatic source repair are turned off (not running) → all switches are turned off, including the repair switch RSW, direct connection switch DSW, shift switch SSW, and test switch TEST, and all comparators are turned off → bias circuit is turned on → gamma circuit is turned on → channel remapping is performed, that is, the analog signals that should be input to data channels 1 to 4 are remapped to repair channels 1 to 4, and the analog signals that should be input to data channels 5 to 8 are remapped to data channels 1 to 4 → the amplifier in the data channel with the fault is not turned on (AMP_EN <2> The amplifiers in data channels 5 to 8 are not enabled), and the amplifiers in the data channels without faults are turned on (AMP_EN <1> Enables the amplifiers in data channels 1 to 4, and AMP_EN <n 4:3>Enable the amplifiers in data channels 9 to N. N / 4:3 represents 3 to N / 4. The number of data channels is N. The amplifiers in every 4 data channels are enabled by the same AMP_EN, so there are N / 4 AMP_ENs in total. The repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the 4 repair switches RSW are closed according to the control of RSW_EN<4:1>, the 8 direct-connect switches DSW in data channels 1 to 8 are opened according to the control of DSW_EN<8:1>, the 4 shift switches SSW in data channels 1 to 4 are closed according to the control of SSW_EN<4:1>, and the N-8 direct-connect switches DSW in data channels 9 to N are closed according to DSW_EN <n:9>The control is closed, and the shift switches SSW in data channels 5 to N are set according to SSW_EN <n:5>The control is disconnected → repair channels 1 to 4 provide drive signals (i.e., the first drive signals mentioned above) to data channels 1 to 4 respectively, and data channels 1 to 4 provide drive signals (i.e., the second drive signals mentioned above) to data channels 5 to 8 respectively. Data channels 9 to N provide drive signals to themselves normally, thereby repairing the fault of data channel 7 → display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0173] Regarding the second situation mentioned above, taking the case where the data channel 11 is faulty as an example, an example is given below.

[0174] In fault repair mode, power on → all four repair channels of automatic source repair are turned off (not running) → all switches are turned off, including the repair switch RSW, direct connection switch DSW, shift switch SSW, and test switch TEST, and all comparators are turned off → bias circuit is turned on → gamma circuit is turned on → channel remapping is performed, that is, the analog signals that should be input to data channels 1 to 4 are remapped to repair channels 1 to 4, and the analog signals that should be input to data channels 5 to 8 are remapped to data channels 1 to 4, and the analog signals that should be input to data channels 9 to 12 are remapped to data channels 5 to 8 → the amplifier in the data channel with the fault is not turned on (AMP_EN <3> The amplifiers in data channels 9 to 12 are not enabled), and the amplifiers in the data channels without faults are turned on (AMP_EN <1> Enable the amplifiers in data channels 1 to 4, AMP_EN <2> Enables the amplifiers in data channels 5 to 8, and AMP_EN <n 4:4>Enable the amplifiers in data channels 13 to N. N / 4:4 represents 4 to N / 4, the number of data channels is N, and the amplifiers in every 4 data channels are enabled by the same AMP_EN, so there are N / 4 AMP_ENs in total). The repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the 4 repair switches RSW are closed according to the control of RSW_EN<4:1>, the 12 direct-connect switches DSW in data channels 1 to 12 are opened according to the control of DSW_EN<12:1>, the 4 shift switches SSW in data channels 1 to 4 are closed according to the control of SSW_EN<4:1>, the 4 shift switches SSW in data channels 5 to 8 are closed according to the control of SSW_EN<8:5>, and the N-12 direct-connect switches DSW in data channels 13 to N are closed according to DSW_EN <n:13>The control of SSW_EN is closed, and the shift switches SSW in data channels 9 to N are set according to SSW_EN <n:9>The control is disconnected → As a result, repair channels 1 to 4 provide driving signals for data channels 1 to 4 respectively (i.e., the first driving signals mentioned above), data channels 1 to 4 provide driving signals for data channels 5 to 8 respectively (i.e., the second driving signals mentioned above), data channels 5 to 8 provide driving signals for data channels 9 to 12 respectively (i.e., the other driving signals mentioned above), and data channels 13 to N provide driving signals for themselves normally, thereby repairing the fault of data channel 11 → the display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0175] Based on the above examples, it can be seen that the K channel groups in the embodiment of the present application are ordered. For example, in an example where the value of M is 4, data channels 1 to 4 are the first channel group, data channels 5 to 8 are the second channel group, data channels 9 to 12 are the third channel group, and so on. Data channels N-3 to N are the last channel group.

[0176] When the first channel group fails, the repair channel can be used to repair the fault. In fault repair mode, the repair switch in the repair channel closes, and the direct-connect switch and shift switch in the first channel group are opened. This allows the repair channel to provide a drive signal to the first channel group, thus repairing the fault in the first channel group. The direct-connect switches in the second through last channel groups close, and the shift switches open, allowing them to continue to provide drive signals normally.

[0177] When other channel groups except the first channel group fail, the failures in the other channel groups with failures can be repaired by repairing the channel and the channel groups before the other channel groups with failures. The repair switch in the repair channel is closed, the direct-connected switch from the first channel group to the previous channel group of the other channel groups with failures is disconnected, the shift switch is closed, and the direct-connected switch of the other channel groups with failures is disconnected and the shift switch is also disconnected. Thus, the repair switch provides a driving signal to the first channel group, the first channel group provides a driving signal to the second channel group, the second channel group provides a driving signal to the third channel group, and so on, until the previous channel group of the other channel groups with failures provides a driving signal to the other channel groups with failures, thereby achieving the repair of the failures of the other channel groups with failures. The direct-connected switches in the subsequent channel groups of the other channel groups with failures are closed and the shift switches are disconnected to provide driving signals to themselves normally.

[0178] It should be understood that in another example where the value of M is 4, data channels 1 to 4 may be the first channel group, data channels 9 to 12 may be the second channel group, and data channels 5 to 8 may be the third channel group. The embodiment of the present application does not limit the arrangement order of each channel group. By reasonably setting the shift switch according to actual needs, the arrangement order of each channel group can be set.

[0179] In addition, embodiments of the present application also provide a third display driver in which every M (M is a positive integer greater than 1) data channels share a comparator, achieving M:1 multiplexing of the comparators, thereby reducing the size of the display driver and the chip on which the display driver resides. In other words, the display driver provided in embodiments of the present application can implement data channel fault testing and repair while reducing both the display driver and chip sizes, as described below.

[0180] See also Figure 11 The display driver includes a controller, a first comparator, M first data channels, and M repair channels, where M is a positive integer greater than 1. The controller is configured to control the M first data channels to send first test signals to the first comparator respectively. The first comparator is configured to compare the first test signal sent by each of the M first data channels with a reference signal to obtain a first comparison result. The controller is further configured to control each of the M repair channels to provide a first drive signal to the corresponding first data channel when the first comparison result indicates that at least one of the M first data channels has a fault, and the first drive signal is used to drive the first pixel group corresponding to the M first data channels on the display panel to emit light, so as to repair the fault of at least one first data channel.

[0181] Continue to see Figure 11 It can be seen that the first comparator, the M first data channels and the M repair channels are connected to the controller respectively, the first comparator is also connected to the M first data channels respectively, and the M first data channels are also connected to the M repair channels in a one-to-one correspondence. In addition, the M first data channels are also connected to the display panel respectively ( Figure 11 not shown).

[0182] Because the controller controls the M first data channels to transmit first test signals to the first comparator, the first comparator can compare the first test signals transmitted by each first data channel with the reference signal, thereby obtaining a first comparison result. This first comparison result is used to indicate whether each first data channel has a fault. If the first comparison result indicates that at least one of the M first data channels has a fault, the controller controls each repair channel to provide a first drive signal to the corresponding first data channel. In other words, the M repair channels generate first drive signals on behalf of the M first data channels, thereby normally driving the first pixel groups corresponding to the M first data channels to emit light, thereby repairing the fault in at least one first data channel.

[0183] For example, see Figure 12 , each source driver (including multiple data channels) in the display driver provided in the embodiment of the present application corresponds to M repair channels. The display driver may include one or more source drivers. The embodiment of the present application does not limit the number of source drivers included in the display driver. Optionally, the controller included in the display driver is, for example, Figure 12 The logic circuit shown in the embodiment of the present application does not limit the implementation method of the controller.

[0184] In one example, see Figure 13 , the value of M is 4. Therefore, the display driver includes four repair channels and four first data channels. The four first data channels reuse the same first comparator, achieving 4:1 multiplexing of the first comparator. This embodiment of the present application does not limit the value of M; it is sufficient to ensure that M is a positive integer greater than 1. Next, the structures of the first data channel, first comparator, and repair channel included in the display driver are described separately.

[0185] In an exemplary embodiment, each first data channel includes a first amplifier, a first direct-connect switch, a first test switch and a first driving end, the first driving end is used to send a first driving signal to the first pixel group, and one of the M first data channels also includes a first access end.

[0186] The controller is used to control each first direct-connect switch to be disconnected in a fault test mode, so that the first output terminal of each first amplifier is disconnected from the first driving terminal, and control each first test switch to be closed in sequence, so that each first amplifier sends a first test signal to the first comparator through the first output terminal, the first test switch and the first access terminal in sequence.

[0187] In each first data channel, the first direct switch and the first test switch are respectively connected to the controller, the first output end of the first amplifier is connected to the first driving end through the first direct switch, the first output end is also connected to the first access end through the first test switch, and the first access end is connected to the first comparator.

[0188] The first direct-connect switch is denoted as DSW. The closing or opening of each first direct-connect switch DSW is controlled by a direct-connect switch enable signal DSW_EN. The first test switch is denoted as TEST. The closing or opening of each first test switch is controlled by a test switch enable signal TEST_EN. The first driving terminal is denoted as SOUT. Each first driving terminal corresponds to a subpixel column on the display panel.

[0189] In addition, the first amplifier is denoted as Amp. Each first amplifier includes a first positive input terminal, a first negative input terminal, a first output terminal, and a first enable terminal. Each first positive input terminal is respectively configured to receive an analog signal SRC_INPUT inputted by a corresponding decoder. The first output terminal is connected to the first negative input terminal to form a unity gain connection. Each first enable terminal is configured to receive an amplifier enable signal AMP_EN. Furthermore, based on the above description, the first output terminal is further connected to the first drive terminal SOUT via a first direct-connect switch DSW, and is connected to the first access terminal via a first test switch TEST.

[0190] For example, see Figure 14 , the value of M is 4, so there are a total of four first data channels. These four first data channels multiplex the first comparator to achieve 4:1 multiplexing of the first comparator. In addition, among the four first data channels, the first data channel includes a first access terminal to connect to the multiplexed first comparator.

[0191] The four first data channels each include a first direct-connect switch DSW, and the closing or opening of the four DSWs is respectively controlled by DSW_EN <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> control.

[0192] The four first data channels each include a first test switch TEST, and the closing or opening of the four TESTs is respectively controlled by TEST_EN <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> control.

[0193] The four first data channels each include a first driving terminal SOUT, namely Figure 14 SOUT shown <1> 、SOUT <2> 、SOUT <3> and SOUT <4> Correspondingly, the sub-pixel columns corresponding to the four first driving terminals SOUT correspond to red, green 1, blue, and green 2, respectively.

[0194] The first amplifiers in the four first data channels each include a first positive input terminal, which is used to input SRC_INPUT <1> 、SRC_INPUT <2> 、SRC_INPUT <3> and SRC_INPUT <4> .

[0195] The first amplifiers in the four first data channels each include a first enable terminal, which receives the same amplifier enable signal AMP_EN. <1> , then the 4 first amplifiers can be AMP_EN <1> Enable at the same time.

[0196] The controller sends DSW_EN to the four first direct-connect switches DSW. <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> , to control the four first direct-connected switches DSW to be disconnected, so that the first output end of each first amplifier Amp is disconnected from the first driving end SOUT.

[0197] The controller also sends TEST_EN to the four first test switches TEST. <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> , to control the four first test switches to close in sequence, so that each first amplifier Amp is connected to the first access terminal through the closed first test switch TEST, so that each first amplifier Amp sends the first test signal to the first comparator through the first output terminal, the closed first test switch TEST and the first access terminal in sequence.

[0198] The first test signal transmitted by each first amplifier is generated based on the input test analog signal. That is, in fault test mode, the analog signal SRC_INPUT input via the first positive input terminal of each first amplifier is a test analog signal used to test whether a fault exists in the first data channel. Optionally, the test analog signal is transmitted to the first amplifier by a decoder in the first data channel under control of a controller.

[0199] In an exemplary embodiment, the first comparator includes a test input, a reference input, and a first result output. The first comparator is configured to sequentially receive a first test signal transmitted from each first data channel via the test input, receive a reference signal via the reference input, sequentially compare the first test signal transmitted from each first data channel with the reference signal, obtain a first comparison result, and transmit the first comparison result to a controller via the first result output. The test input is connected to a first access terminal included in one of the M first data channels, the reference input is configured to receive the reference signal, and the first result output is connected to the controller.

[0200] In one example, the first comparison result includes M sub-results, each of which corresponds to one of the M first data channels. Each sub-result indicates whether the corresponding first data channel has a fault. The first comparator obtains a first sub-result each time it compares the first test signal transmitted by a first data channel with the reference signal. After all first test signals are compared with the reference signal, a first comparison result is obtained, which is then transmitted to the controller via the first result output terminal.

[0201] In another example, different values ​​of the first comparison result correspond to different fault conditions. For example, when the first comparison result is a first value, it means that all first data channels are fault-free. When the first comparison result is a second value, it means that only the first first data channel is faulty, and the other first data channels are fault-free. For other cases, examples are not given here one by one. After the first comparator compares all first test signals with the reference signal, it obtains a first comparison result, and then sends the first comparison result to the controller via the first result output terminal.

[0202] In an exemplary embodiment, the display driver further includes a level shifter. The first comparator is configured to transmit a first comparison result to the level shifter via a first result output terminal. The level shifter is configured to level-shift the first comparison result to obtain a level-shifted first comparison result, and transmit the level-shifted first comparison result to the controller. The level-shifted first comparison result indicates whether each first data channel has a fault. The first result output terminal is connected to the controller via the level shifter.

[0203] That is, the first comparator corresponds to a level shifter, and the first comparator stores the first comparison result in the level shifter, so that the level shifter shifts the first comparison result, thereby enabling the controller to determine whether each first data channel has a fault according to the first comparison result after level shifting.

[0204] Exemplarily, the first test signal and the reference signal are both analog signals (e.g., analog voltage signals). The first comparator receives the two analog signals and outputs a first comparison result, which is also an analog signal. The level shifter shifts the first comparison result (e.g., performs a level shift down), and the first comparison result obtained after the level shift is a digital signal (recorded as value 1, where value 1 is, for example, a voltage value). Accordingly, the controller compares value 1 with value 2 as a reference (the value can be flexibly set according to actual needs). If value 1 and value 2 are the same or similar (e.g., the absolute value of the difference between value 1 and value 2 is less than or equal to the reference threshold), it indicates that there is no fault in the first data channel. If there is a large difference between value 1 and value 2 (e.g., the absolute value of the difference between value 1 and value 2 is greater than the reference threshold), it indicates that there is a fault in the first data channel.

[0205] Optionally, the level shifter may directly send the level-shifted first comparison result to the controller, or may store the level-shifted first comparison result in a memory, and the controller obtains the level-shifted first comparison result from the memory.

[0206] Since the embodiment of the present application reduces the number of comparators through M:1 comparator multiplexing, the number of level shifters is also reduced, thereby further reducing the size of the display driver and the size of the chip where the display driver is located.

[0207] Illustratively, each repair channel includes a repair amplifier and a repair switch. The controller is configured to, in a fault repair mode, control each first direct-connect switch and each first test switch to be open, thereby disconnecting the first output terminal of each first amplifier from the first driver terminal and the first comparator, and control each repair switch to be closed, thereby causing each repair amplifier to transmit a first drive signal to the corresponding first driver terminal via the repair switch.

[0208] In each repair channel, the repair switch is connected to the controller, and the repair output terminal of the repair amplifier is connected to the first driving terminal included in the corresponding first data channel through the repair switch.

[0209] The repair switch is denoted as RSW. The closing or opening of each repair switch RSW is controlled by a repair switch enable signal RSW_EN. The repair amplifier is denoted as REP_Amp. Each repair amplifier includes a repair positive input terminal, a repair negative input terminal, a repair output terminal, and a repair enable terminal. Each repair positive input terminal is respectively used to receive an input analog signal SRC_INPUT_REP. The repair output terminal is connected to the repair negative input terminal to form a unity gain connection mode. Each repair enable terminal is used to receive a repair enable signal REP_AMP_EN. In addition, based on the above description, the repair output terminal is also connected to the first drive terminal SOUT included in the corresponding first data channel through the repair switch RSW.

[0210] For example, see Figure 14 , the value of M is 4, so there are 4 repair channels in total. Among them, the first repair channel corresponds to the first first data channel, so the repair amplifier REP_Amp in the first repair channel is switched on by the repair switch (by RSW_EN <1> control) and the first driving terminal SOUT of the first data channel <1> The repair amplifier REP_Amp in the second repair channel is connected via the repair switch (by RSW_EN <2> control) and the first driving end SOUT of the second first data channel <2> The repair amplifier REP_Amp in the third repair channel is connected via the repair switch (by RSW_EN <3> control) and the first driving terminal SOUT of the third first data channel <3> The repair amplifier REP_Amp in the fourth repair channel is connected via the repair switch (by RSW_EN <4> control) and the first driving end SOUT of the fourth first data channel <4> connect.

[0211] In a case where the first comparison result indicates that a fault exists in at least one first data channel, the controller enters a fault recovery mode.

[0212] The controller sends DSW_EN to the four first direct-connect switches DSW. <1> 、DSW_EN <2> 、DSW_EN <3> and DSW_EN <4> , to control the four first direct-connected switches DSW to be disconnected, so that the first output end of each first amplifier Amp is disconnected from the first driving end.

[0213] The controller also sends TEST_EN to the four first test switches TEST. <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> , so as to control the four first test switches to be disconnected, so that the first output terminal of each first amplifier Amp is disconnected from the first access terminal. Since the first access terminal is connected to the first comparator, the first output terminal of each first amplifier Amp is also disconnected from the first comparator.

[0214] The controller also sends RSW_EN to the four repair switches RSW. <1> 、RSW_EN <2> 、RSW_EN <3> and RSW_EN <4> , controlling each repair switch to close, so that the repair output terminal of each repair amplifier is connected to the corresponding first driver terminal. Furthermore, the controller sends a repair enable signal REP_AMP_EN to the repair enable terminal of each repair amplifier, thereby causing each repair amplifier to send a first drive signal to the corresponding first driver terminal via the repair output terminal and the closed repair switch.

[0215] The first drive signal sent by each repair amplifier is generated based on the repair enable signal and the input first analog signal, and the first analog signal matches the first data channel corresponding to the repair amplifier. In other words, the first analog signal that should have been input to the first data channel is remapped (i.e., input) to the repair channel corresponding to the first data channel. After the repair amplifier in the repair channel is enabled by the repair enable signal, it can generate the first drive signal for the corresponding first data channel based on the input first analog signal. Optionally, this remapping process can be controlled by a controller.

[0216] For example, the first data channel and the first repair channel are used as examples for illustration. When none of the M first data channels have faults, the first amplifier in the first data channel receives the input first analog signal and is AMP_EN <1> After being enabled, a first driving signal is generated based on the first analog signal input, and a first direct-connect switch DSW (DSW_EN) is closed. <1> control) to the first drive terminal SOUT <1> Output the first driving signal to drive the corresponding sub-pixel column to emit light. In the case that at least one of the M first data channels has a fault, the first first data channel no longer receives the input first analog signal, and the first amplifier in the first first data channel no longer generates a driving signal. Instead, the first repair channel receives the input first analog signal, and the repair amplifier in the first repair channel is enabled by REP_AMP_EN to generate the first driving signal based on the input first analog signal. The repair switch RSW (controlled by RSW_EN) is closed. <1> control) to the first drive terminal SOUT <1> A first driving signal is output to drive the corresponding sub-pixel column to emit light.

[0217] Exemplarily, the first pixel group includes M sub-pixel columns, the M first data channels are connected to the M sub-pixel columns in a one-to-one correspondence, and the first driving signal corresponding to each first data channel is used to drive the corresponding sub-pixel column to emit light.

[0218] As mentioned above, each first data channel corresponds to a sub-pixel column, and thus the first pixel group corresponding to the M first data channels includes M sub-pixel columns. Among them, the M sub-pixel columns are all sub-pixel columns corresponding to a complete pixel. For example, the M sub-pixel columns correspond to red, green 1, blue and green 2, and a complete pixel just includes 4 sub-pixels, namely red, green 1, blue and green 2. In combination with the above description, it can be seen that in the process of fault repair, the first analog signals corresponding to each of the M first data channels need to be remapped to the corresponding repair channel respectively. Since the M sub-pixel columns are all sub-pixel columns corresponding to a complete pixel, the remapping performed in the embodiment of the present application is performed in units of complete pixels, the remapping design is relatively simple, and the granularity of the repair is more appropriate.

[0219] In an exemplary embodiment, the display driver further includes a second comparator and M second data channels. Exemplarily, the second comparator and the M second data channels are respectively connected to the controller, the second comparator is further connected to the M second data channels respectively, the M second data channels are further connected to the M first data channels in a one-to-one correspondence, and the M second data channels are further further connected to the display panel respectively.

[0220] The controller is further configured to control the M second data channels to respectively transmit a second test signal to the second comparator. The second comparator is configured to compare the second test signal transmitted by each of the M second data channels with the reference signal to obtain a second comparison result. The controller is further configured to control the M repair channels to provide the first drive signal to the M first data channels, and to control the M first data channels to provide the second drive signal, if the first comparison result indicates that none of the M first data channels are faulty and the second comparison result indicates that at least one of the M second data channels is faulty.

[0221] In this regard, the embodiments of the present application provide the following first and second situations.

[0222] In the first case, the second driving signal is a signal provided by the M first data channels to the M second data channels, and the second driving signal is used to repair a fault existing in at least one second data channel.

[0223] In this case, the M first data channels are directly connected to the M second data channels, and each first data channel directly provides a second driving signal to the corresponding second data channel.

[0224] In a case where none of the M first data channels have faults but at least one second data channel has a fault, the M repair channels generate first drive signals on behalf of the M first data channels to drive the first pixel groups corresponding to the M first data channels, and the M first data channels generate second drive signals on behalf of the M second data channels to drive the second pixel groups corresponding to the M second data channels to emit light, thereby achieving fault repair of at least one second data channel.

[0225] Exemplarily, each first data channel includes a first amplifier, a first direct-connect switch, a first test switch, a first driving end and a first shift switch, and each second data channel includes a second amplifier, a second direct-connect switch, a second test switch and a second driving end, and the second driving end is used to send a second driving signal to the second pixel group.

[0226] A controller is used to control each first direct-connect switch and each first test switch to be disconnected in a fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end and the first comparator respectively, control each second direct-connect switch and each second test switch to be disconnected, so that the second output end of each second amplifier is disconnected from the second driving end and the second comparator respectively, and control each repair switch and each first shift switch to be closed, so that each repair amplifier sends a first drive signal to the corresponding first driving end through the repair switch, and each first amplifier sends a second drive signal to the corresponding second driving end through the first shift switch.

[0227] The first shift switch is denoted as SSW. The closing or opening of each first shift switch SSW is controlled by a first shift switch enable signal SSW_EN. In each first data channel, the first shift switch SSW is connected to the controller, and the first output terminal of the first amplifier is also connected to the second drive terminal of the corresponding second data channel through the first shift switch. The first shift switch is described here in detail. For the first amplifier, the first direct-connect switch, the first test switch, and the first drive terminal, please refer to the above description and will not be repeated here.

[0228] One of the M second data channels also includes a second access terminal connected to the second comparator. In each second data channel, a second direct-connection switch and a second test switch are respectively connected to the controller. The second output terminal of the second amplifier is connected to the second driver terminal via the second direct-connection switch, and the second output terminal is also connected to the second access terminal via the second test switch. Each second data channel and the process by which the controller detects whether a fault exists in each second data channel are not further described here. Please refer to the above description of the first data channel.

[0229] Optionally, the second comparator corresponds to a level shifter, which is used to level-shift the second comparison result, so that the controller determines whether each second data channel has a fault based on the second comparison result after level shifting. The embodiment of the present application reduces the number of second comparators, and thus also reduces the number of level shifters corresponding to the second comparators, thereby reducing the area of ​​the display driver and the chip where the display driver is located. The second comparator and the corresponding level shifter are not further described here, and reference is made to the first comparator and the corresponding level shifter described above.

[0230] The first drive signal sent by each repair amplifier is generated according to the repair enable signal and the input first analog signal, and the first analog signal corresponds to the corresponding first data channel. The remapping of the first analog signal has been explained above and will not be repeated here. The second drive signal sent by each first amplifier is generated according to the first enable signal and the input second analog signal, and the second analog signal corresponds to the corresponding second data channel. That is, the second analog signal that should have been input into the second data channel is remapped (i.e., input) to the first data channel corresponding to the second data channel. After the first amplifier in the first data channel is enabled by the first enable signal, it can generate the second drive signal for the corresponding second data channel based on the input second analog signal. Optionally, this remapping process can be controlled by a controller.

[0231] See also Figure 14 , the value of M is 4, so there are a total of 4 second data channels. These 4 second data channels multiplex the second comparator to achieve 4:1 multiplexing of the second comparator. In addition, among the 4 second data channels, the second data channel includes a second access terminal to connect to the multiplexed second comparator.

[0232] The four second data channels each include a second direct-connect switch DSW, and the closing or opening of the four DSWs is respectively controlled by DSW_EN <5> 、DSW_EN <6> 、DSW_EN <7> and DSW_EN <8> control.

[0233] The four second data channels each include a second test switch TEST, and the closing or opening of the four TESTs is respectively controlled by TEST_EN <1> 、TEST_EN <2> 、TEST_EN <3> and TEST_EN <4> control.

[0234] The four second data channels each include a second driving terminal SOUT, namely Figure 14 SOUT shown <5> 、SOUT <6> 、SOUT <7> and SOUT <8> Correspondingly, the sub-pixel columns corresponding to the four second driving terminals SOUT correspond to red, green 1, blue and green 2 respectively.

[0235] The second amplifiers in the four second data channels each include a second positive input terminal, which is used to input SRC_INPUT <5> 、SRC_INPUT <6> 、SRC_INPUT <7> and SRC_INPUT <8> .

[0236] The second amplifiers in the four second data channels each include a second enable terminal, which receives the same amplifier enable signal AMP_EN. <2> , then the 4 second amplifiers can be AMP_EN <2> Enable at the same time.

[0237] in, Figure 14 The direct connection switch DSW (respectively controlled by DSW_EN<8:1>), the shift switch SSW (respectively controlled by SSW_EN<8:1>), and the repair switch RSW (respectively controlled by RSW_EN<4:1>) are alternately closed (ON) or opened (OFF).

[0238] The controller sends DSW_EN<8:1> to the four first direct-connected switches DSW and the four second direct-connected switches DSW, respectively, to control the four first direct-connected switches DSW and the four second direct-connected switches DSW to be disconnected, so that the first output end of each first amplifier is disconnected from the first driving end, and the second output end of each second amplifier is disconnected from the second driving end.

[0239] The controller sends TEST_EN<4:1> to the four first test switches TEST and the four second test switches TEST, respectively, to control the four first test switches TEST and the four second test switches TEST to be disconnected, so that the first output end of each first amplifier is disconnected from the first access end (that is, disconnected from the first comparator), and the second output end of each second amplifier is disconnected from the second access end (that is, disconnected from the second comparator).

[0240] The controller also sends RSW_EN<4:1> to each of the four repair switches RSW to control the four repair switches to be closed, so that the repair output terminal of each repair amplifier is connected to the corresponding first driver terminal. The controller also sends SSW_EN<4:1> to each of the four first shift switches SSW to control the four first shift switches to be closed, so that the first output terminal of each first amplifier is connected to the corresponding second driver terminal.

[0241] In addition, the controller sends a repair enable signal REP_AMP_EN to the repair enable terminal of each repair amplifier, thereby causing each repair amplifier to send a first drive signal to the corresponding first driver terminal via the repair output terminal and the repair switch RSW. The controller also sends a first enable signal AMP_EN to the first enable terminal of each first amplifier, thereby causing each first amplifier to send a second drive signal to the corresponding second driver terminal via the first output terminal and the first shift switch SSW.

[0242] In an exemplary embodiment, the first enable signal sent by the controller to the first enable terminal of each first amplifier is the same enable signal AMP_EN. <1> In the embodiment of the present application, there is no need to provide a different amplifier enable signal AMP_EN for each first amplifier, thereby reducing the number of circuits related to AMP_EN and further reducing the area of ​​the display driver and the chip where the display driver is located.

[0243] In the second case, the second driving signal is a signal provided by the M first data channels to other data channels in the display driver. The other data channels are used to provide other driving signals to the M second data channels. The other driving signals are used to repair a fault in at least one second data channel.

[0244] In this case, the M first data channels are not directly connected to the M second data channels, but are indirectly connected to the M second data channels. The M first data channels are directly connected to the other data channels, and the other data channels are directly or indirectly connected to the M second data channels. Thus, each first data channel provides a second drive signal to the corresponding other data channel, and each other data channel provides another drive signal to the corresponding second data channel.

[0245] Exemplarily, in addition to the aforementioned M first data channels and M second data channels, the display driver further includes Q channel groups, each of which includes M other data channels. Q can have various values, as detailed in the following two examples.

[0246] In the first example, Q is 1. That is, the display driver includes M first data channels, M second data channels, and one channel group (including M other data channels). The controller is configured to control the M first data channels to provide a second drive signal to the one channel group, and further to control the one channel group to provide other drive signals to the M second data channels. The other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0247] Furthermore, when Q is 1, the M first data channels correspond one-to-one with the M other data channels included in a channel group. Each first data channel is connected to the driver end of the corresponding other data channel via a first shift switch, which is closed in fault recovery mode. Furthermore, the M other data channels included in a channel group also correspond one-to-one with the M second data channels, and each other data channel is connected to the second driver end of the corresponding second data channel via a second shift switch, which is also closed in fault recovery mode.

[0248] For example, the M first data channels are data channels 1 to 4, the M other data channels are data channels 5 to 8, and the M second data channels are data channels 9 to 12. When at least one second data channel is faulty, the system enters a fault repair mode, where repair channels 1 to 4 provide first drive signals to data channels 1 to 4 (via closed repair switches), and data channels 1 to 4 provide second drive signals to data channels 5 to 8 (via closed first shift switches, for which the process can be found in the description of the first case above). Data channels 5 to 8 provide other drive signals to data channels 9 to 12 (via closed second shift switches), and the other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0249] In the second example, Q is a positive integer greater than 1. That is, the display driver includes M first data channels, M second data channels, and Q (i.e., at least two) channel groups, each channel group including M other data channels. Q-1 channel groups in the Q channel groups correspond to other channel groups, and 1 channel group in the Q channel groups corresponds to the M second data channels. The controller is used to control the M first data channels to provide a second drive signal to any one of the Q-1 channel groups, and is also used to control the Q-1 channel groups to provide a third drive signal to the corresponding channel group, and control the 1 channel group to provide other drive signals to the corresponding M second data channels. The other drive signals are used to drive the second pixel group corresponding to the M second data channels on the display panel to emit light.

[0250] Moreover, when Q is a positive integer greater than 1, the M first data channels are connected to any corresponding channel group through the first shift switch, Q-1 channel groups are connected to the corresponding other channel groups through the third shift switch, and 1 channel group is connected to the corresponding M second data channels through the fourth shift switch. The first shift switch, the third shift switch and the fourth shift switch are closed in the fault repair mode.

[0251] For example, when the value of Q is 2, the M first data channels are data channels 1 to 4, the M other data channels included in channel group X are data channels 5 to 8, the M other data channels included in channel group Y are data channels 9 to 12, and the M second data channels are data channels 13 to 16. When at least one second data channel is faulty, the system enters a fault repair mode, where repair channels 1 to 4 respectively provide first drive signals to data channels 1 to 4 (via closed repair switches), data channels 1 to 4 respectively provide second drive signals to data channels 5 to 8 (via closed first shift switches), data channels 5 to 8 respectively provide third drive signals to data channels 9 to 12 (via closed third shift switches), and data channels 9 to 12 respectively provide other drive signals to data channels 13 to 16 (via closed fourth shift switches). The other drive signals are used to drive the second pixel groups corresponding to the M second data channels on the display panel to emit light.

[0252] See below. Figure 13 , the number of data channels is recorded as N. N = M × K, K is a positive integer greater than or equal to 2. That is, the display driver includes K channel groups, each channel group includes M data channels. Based on this, combined with Figure 14 The fault testing mode and the fault repair mode are respectively illustrated with examples.

[0253] In fault test mode, power is turned on → the four repair channels for automatic source repair are all turned off (not operating) → all switches are turned off, including the repair switch RSW, direct-connect switch DSW, shift switch SSW, and test switch TEST → the bias circuit is turned on, which is used to provide the required operating voltages for the gamma circuit and each amplifier, so that the gamma circuit and each amplifier can operate normally → the gamma circuit is turned on to generate multiple analog voltages → each amplifier Amp is turned on (since the repair channels are all turned off, the repair amplifier remains off) → the comparator Comp is turned on → the decoder included in each data channel selects an analog voltage SRC_INPUT and inputs it to the corresponding amplifier. In addition, a reference signal for comparison is provided to the comparator Comp → TEST_EN <1> Control the corresponding test switch TEST to close → Check data channels 1, 5, 9, ..., N-3 for faults → TEST_EN <1> Control the corresponding test switch TEST to be disconnected, and TEST_EN <2> Control the corresponding test switch TEST to close → Check data channels 2, 6, 10, ..., N-2 for faults → TEST_EN <2> Control the corresponding test switch TEST to be disconnected, and TEST_EN <3> Control the corresponding test switch TEST to close → Check data channels 3, 7, 11, ..., N-1 for faults → TEST_EN <3> Control the corresponding test switch TEST to be disconnected, and TEST_EN <4> Control the corresponding test switch TEST to close → check whether data channels 4, 8, 12, ..., N have faults → comparator Comp is closed → each comparator sends the comparison result (indicating whether the corresponding data channel has faults) to the controller.

[0254] If there are no faults in all data channels, the display is turned on, the repair switch RSW, the test switch TEST and the shift switch SSW are all disconnected, and the direct connection switch DSW is closed, so that each data channel works normally to drive the corresponding sub-pixel column to emit light and realize content display on the display panel.

[0255] If there is a fault in at least one data channel, automatic source repair is required to repair the fault in the at least one data channel.

[0256] Taking the case where data channel 7 is faulty in the first scenario as an example, the repair process for data channel 7 is described as follows.

[0257] In fault repair mode, power on → all four repair channels of automatic source repair are turned off (not running) → all switches are turned off, including the repair switch RSW, direct connection switch DSW, shift switch SSW, and test switch TEST, and all comparators are turned off → bias circuit is turned on → gamma circuit is turned on → channel remapping is performed, that is, the analog signals that should be input to data channels 1 to 4 are remapped to repair channels 1 to 4, and the analog signals that should be input to data channels 5 to 8 are remapped to data channels 1 to 4 → the amplifier in the data channel with the fault is not turned on (AMP_EN <2> The amplifiers in data channels 5 to 8 are not enabled), and the amplifiers in the data channels without faults are turned on (AMP_EN <1> Enables the amplifiers in data channels 1 to 4, and AMP_EN <n 4:3>Enable the amplifiers in data channels 9 to N. N / 4:3 represents 3 to N / 4. The number of data channels is N. The amplifiers in every 4 data channels are enabled by the same AMP_EN, so there are N / 4 AMP_ENs in total. The repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the 4 repair switches RSW are closed according to the control of RSW_EN<4:1>, the 8 direct-connect switches DSW in data channels 1 to 8 are opened according to the control of DSW_EN<8:1>, the 4 shift switches SSW in data channels 1 to 4 are closed according to the control of SSW_EN<4:1>, and the N-8 direct-connect switches DSW in data channels 9 to N are closed according to DSW_EN <n:9>The control is closed, and the shift switches SSW in data channels 5 to N are set according to SSW_EN <n:5>The control is disconnected → As a result, repair channels 1 to 4 provide drive signals (i.e., the first drive signals mentioned above) to data channels 1 to 4 respectively, and data channels 1 to 4 provide drive signals (i.e., the second drive signals mentioned above) to data channels 5 to 8 respectively. Data channels 9 to N provide drive signals to themselves normally, thereby repairing the fault of data channel 7 → the display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0258] Taking the second situation where the data channel 11 is faulty as an example, an example is given below.

[0259] In fault repair mode, power on → all four repair channels of automatic source repair are turned off (not running) → all switches are turned off, including the repair switch RSW, direct connection switch DSW, shift switch SSW, and test switch TEST, and all comparators are turned off → bias circuit is turned on → gamma circuit is turned on → channel remapping is performed, that is, the analog signals that should be input to data channels 1 to 4 are remapped to repair channels 1 to 4, and the analog signals that should be input to data channels 5 to 8 are remapped to data channels 1 to 4, and the analog signals that should be input to data channels 9 to 12 are remapped to data channels 5 to 8 → the amplifier in the data channel with the fault is not turned on (AMP_EN <3> The amplifiers in data channels 9 to 12 are not enabled), and the amplifiers in the data channels without faults are turned on (AMP_EN <1> Enable the amplifiers in data channels 1 to 4, AMP_EN <2> Enables the amplifiers in data channels 5 to 8, and AMP_EN <n 4:4>Enable the amplifiers in data channels 13 to N. N / 4:4 represents 4 to N / 4, the number of data channels is N, and the amplifiers in every 4 data channels are enabled by the same AMP_EN, so there are N / 4 AMP_ENs in total). The repair channel is turned on (REP_AMP_EN enables the repair amplifier) ​​→ the 4 repair switches RSW are closed according to the control of RSW_EN<4:1>, the 12 direct-connect switches DSW in data channels 1 to 12 are opened according to the control of DSW_EN<8:1>, the 4 shift switches SSW in data channels 1 to 4 are closed according to the control of SSW_EN<4:1>, the 4 shift switches SSW in data channels 5 to 8 are closed according to the control of SSW_EN<8:5>, and the N-12 direct-connect switches DSW in data channels 13 to N are closed according to DSW_EN <n:13>In addition, the shift switches SSW in data channels 9 to N are closed according to SSW_EN <n:9>The control is disconnected → As a result, repair channels 1 to 4 provide driving signals for data channels 1 to 4 respectively (i.e., the first driving signals mentioned above), data channels 1 to 4 provide driving signals for data channels 5 to 8 respectively (i.e., the second driving signals mentioned above), data channels 5 to 8 provide driving signals for data channels 9 to 12 respectively (i.e., the other driving signals mentioned above), and data channels 13 to N provide driving signals for themselves normally, thereby repairing the fault of data channel 11 → the display is turned on to drive the corresponding sub-pixel columns to emit light, thereby realizing content display on the display panel.

[0260] Based on the above examples, it can be seen that the K channel groups in the embodiment of the present application are ordered. For example, in an example where the value of M is 4, data channels 1 to 4 are the first channel group, data channels 5 to 8 are the second channel group, data channels 9 to 12 are the third channel group, and so on. Data channels N-3 to N are the last channel group.

[0261] When the first channel group fails, the repair channel can be used to repair the fault. In fault repair mode, the repair switch in the repair channel closes, and the direct-connect switch and shift switch in the first channel group are opened. This allows the repair channel to provide a drive signal to the first channel group, thus repairing the fault in the first channel group. The direct-connect switches in the second through last channel groups close, and the shift switches open, allowing them to continue to provide drive signals normally.

[0262] When other channel groups except the first channel group fail, the failures in the other channel groups with failures can be repaired by repairing the channel and the channel groups before the other channel groups with failures. The repair switch in the repair channel is closed, the direct-connected switch from the first channel group to the previous channel group of the other channel groups with failures is disconnected, the shift switch is closed, and the direct-connected switch of the other channel groups with failures is disconnected and the shift switch is also disconnected. Thus, the repair switch provides a driving signal to the first channel group, the first channel group provides a driving signal to the second channel group, the second channel group provides a driving signal to the third channel group, and so on, until the previous channel group of the other channel groups with failures provides a driving signal to the other channel groups with failures, thereby repairing the failures of the other channel groups with failures. The direct-connected switch in the next channel group of the other channel groups with failures is closed, and the shift switch is disconnected, so as to provide a driving signal to itself normally.

[0263] It should be understood that in another example where the value of M is 4, data channels 1 to 4 may be the first channel group, data channels 9 to 12 may be the second channel group, and data channels 5 to 8 may be the third channel group. The embodiment of the present application does not limit the arrangement order of each channel group. By reasonably setting the shift switch according to actual needs, the arrangement order of each channel group can be set.

[0264] The embodiments of the present application have at least the following two technical effects.

[0265] On the one hand, the embodiments of the present application add fewer devices (less than the number of devices added in the second display driver). For example, the number of comparators required by the third display driver, the number of level shifters corresponding to the comparators, and the number of AMP_EN-related circuits are all smaller, thereby reducing the size of the display driver and the chip where the display driver is located.

[0266] As previously mentioned, a source driver may include thousands of data channels. Therefore, the present embodiment significantly reduces the number of comparators by multiplexing the comparators in an M:1 ratio, whereby M data channels share the same comparator. Therefore, even with an increased number of repair channels, the overall size of the display driver is still reduced, as is the size of the chip housing the display driver.

[0267] On the other hand, the embodiment of the present application performs repair in units of complete pixels. Compared with the first display driver which performs repair in units of sub-pixels, the third display driver simplifies the remapping process, has a simple design, has an appropriate granularity for repair, and is more practical and feasible.

[0268] The display driver provided in the embodiment of the present application can realize fault testing and fault repair of data channels while ensuring a small size. The product is highly competitive. Even if one or some data channels have faults, it can still drive the display panel to display content normally without directly replacing the display driver. This improves the yield of the display driver and reduces the cost of replacing the display driver, thereby improving the user experience.

[0269] The present application also provides a fourth display driver, see Figure 15 , based on the display driver provided by the related art, a dummy channel (1-channel) for automatic source repair is added, which is the repair channel mentioned above, and corresponding devices are added to each data channel for realizing automatic source repair. The added dummy channel and devices are Figure 16 The bold characters are indicated in the figure and are described below respectively.

[0270] In a pseudo channel, it includes a shift register, a level shifter, a decoder, a repair (REP) amplifier, and a repair switch (RSW). Figure 17 It can be seen that the repair switch RSW is used to connect the output end of the repair amplifier to the driving end SOUT of the first data channel <1> The repair switch is closed or opened by the repair switch enable signal (RSW_EN). Furthermore, the positive input of the repair amplifier is used to input the analog signal SRC_INPUT_REP to the repair amplifier, and the repair amplifier is enabled by the repair enable signal (REP_AMP_EN). The functions of the shift register, level shifter, decoder, and repair amplifier in the pseudo channel can be found in the functions of the shift register, level shifter, decoder, and amplifier in the data channel described above, and will not be further described here.

[0271] In each data channel, there is a shift switch (SSW), a comparator (Comp) and a level shifter corresponding to the comparator. The shift switch is used to connect the output end of the amplifier in the data channel where the shift switch is located to the driving end SOUT of the next data channel. For example, combined with Figure 17 It can be seen that the shift switch in the first data channel is used to connect the output end of the amplifier in the first data channel to the driving end SOUT of the second data channel <2> .

[0272] The comparator is used to compare the analog signal output by the amplifier in the data channel where the comparator is located with the reference signal to obtain a comparison result. The level shifter corresponding to the comparator is used to shift the comparison result. The shifted comparison result is used to determine whether there is a fault in the data channel.

[0273] In each group of four data channels, the opening or closing of each shift switch SSW is controlled by a shift switch enable signal (SSW_EN). Figure 17 The opening or closing of the four shift switches SSW included in the first group is controlled by SSW_EN<4:1>, where 4:1 represents 1 to 4. The opening or closing of the four shift switches SSW included in the second group is controlled by SSW_EN<8:5>, where 8:5 represents 5 to 8.

[0274] In each group of four data channels, the opening or closing of each direct-connect switch DSW is controlled by a direct-connect switch enable signal (DSW_EN), that is, compared with the related art, three DSW_ENs are added for each group of four data channels. Figure 17 The opening or closing of the four direct-connect switches DSW included in the first group is controlled by DSW_EN<4:1>, where 4:1 represents 1 to 4. The opening or closing of the four direct-connect switches DSW included in the second group is controlled by DSW_EN<8:5>, where 8:5 represents 5 to 8.

[0275] In each group of four data channels, each amplifier Amp is enabled by an amplifier enable signal (AMP_EN), that is, compared with the related art, three AMP_ENs are added for each group of four data channels. Figure 17 The enable of the four amplifiers Amp included in the first group is controlled by AMP_EN<4:1>, and the enable of the four amplifiers Amp included in the second group is controlled by AMP_EN<8:5>.

[0276] The fourth display driver provided in the present embodiment can perform fault testing, i.e., determine whether a data channel has a fault, by cooperating with a test switch TEST, a comparator Comp, and a level shifter corresponding to the comparator. If a data channel has a fault, the fault can be repaired by cooperating with a dummy channel and a shift switch SSW.

[0277] The process of determining whether a data channel has a fault can be referred to the description of the second display driver. The process of repairing a faulty data channel can be referred to the description of the first display driver. Figure 7 The corresponding instructions are not repeated here.

[0278] The embodiment of the present application further provides a chip, which includes any one or more display drivers described above. The chip may also be referred to as a mobile one chip.

[0279] The present application also provides an electronic device, which includes a display panel and the chip described above. For examples of the electronic device and the display panel, please refer to the above. Figure 1 and Figure 2 The corresponding instructions will not be repeated here.

[0280] It should be understood that the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the usual meanings understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" or "third" and similar words used in the specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. "One" or "one" and similar words do not indicate a quantity limitation, but rather indicate the presence of at least one. "Include" or "comprising" and similar words mean that the elements or objects appearing before "include" or "comprising" cover the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. "Connect" or "couple" refers to an electrical connection.

[0281] The above description is merely an exemplary embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the principles of the present application shall be included in the scope of protection of the present application. < / n> < / n> < / n> < / n> < / n> < / m> < / m>

Claims

1. A display driver, characterized in that: It includes a controller, a comparator, a repair channel and M data channels, where M is a positive integer greater than 1; The controller is configured to control each of the M data channels to send a test signal to the comparator respectively; The comparator is used to compare the test signal sent by each data channel with the reference signal to obtain a comparison result; The controller is further configured to, when the comparison result indicates that at least one of the M data channels has a fault, control the repair channel to provide a driving signal to the at least one data channel, wherein the driving signal is configured to drive at least one sub-pixel corresponding to the at least one data channel on the display panel to emit light, so as to repair the fault in the at least one data channel.

2. The display driver according to claim 1, wherein: Each data channel includes an amplifier, a direct connection switch, a test switch and a driving end, wherein the driving end is used to send the driving signal to the pixel group, and one of the M data channels further includes an access end; The controller is used to control each direct-connect switch to be disconnected in a fault test mode, so that the output end of each amplifier is disconnected from the driving end, and to control each test switch to be closed in sequence, so that each amplifier sends the test signal to the comparator through the output end, the test switch and the access end in sequence.

3. The display driver according to claim 1, wherein: The comparator includes a test input terminal, a reference input terminal and a result output terminal; The comparator is used to receive the test signal sent by each data channel in sequence through the test input end, receive the reference signal through the reference input end, compare the test signal sent by each data channel with the reference signal in sequence, obtain the comparison result, and send the comparison result to the controller through the result output end.

4. The display driver according to claim 3, wherein: Also included is a level shifter; The comparator is configured to send the comparison result to the level shifter via the result output terminal; The level shifter is configured to level-shift the comparison result to obtain a level-shifted comparison result, and send the level-shifted comparison result to the controller, wherein the level-shifted comparison result indicates whether each data channel has a fault.

5. A display driver, characterized in that: The device comprises a controller, M first comparators, M first data channels and M repair channels, where M is a positive integer greater than 1; Each of the first comparators is configured to compare the first test signal sent by the first data channel corresponding to the first comparator with a reference signal to obtain a first comparison result; The controller is configured to control the M repair channels to provide first drive signals to the M first data channels when the first comparison result indicates that at least one of the M first data channels has a fault, wherein the first drive signal is used to drive first pixel groups corresponding to the M first data channels on the display panel to emit light, so as to repair the fault of the at least one first data channel.

6. The display driver according to claim 5, wherein: The first pixel group includes M sub-pixel columns, the M first data channels correspond one-to-one to the M sub-pixel columns, and the first driving signal corresponding to each first data channel is used to drive the corresponding sub-pixel column to emit light.

7. The display driver according to claim 5 or 6, characterized in that: Each first data channel includes a first amplifier, a first direct switch, and a first driving end, wherein the first driving end is used to send the first driving signal to the first pixel group, and each repair channel includes a repair amplifier and a repair switch; The controller is used to control each first direct-connect switch to be disconnected in the fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end respectively, and control each repair switch to be closed, so that each repair amplifier sends the first driving signal to the corresponding first driving end through the repair switch.

8. The display driver according to claim 5 or 6, characterized in that: Also comprising M second comparators and M second data channels; Any one of the second comparators is configured to compare the second test signal sent by the corresponding second data channel with a reference signal to obtain a second comparison result; The controller is further configured to, if none of the M first data channels are faulty and the second comparison result indicates that at least one of the M second data channels is faulty, control the M repair channels to provide the first drive signals to the M first data channels, and control the M first data channels to provide the second drive signals; The second drive signal is a signal provided by the M first data channels to the M second data channels, and the second drive signal is used to repair a fault in at least one of the second data channels. Alternatively, the second drive signal is a signal provided by the M first data channels to other data channels in the display driver, and the other data channels are used to provide other drive signals to the M second data channels, and the other drive signals are used to repair a fault in at least one of the second data channels.

9. The display driver according to claim 8, wherein: Each first data channel includes a first amplifier, a first direct-connect switch, a first driving end, and a first shift switch, wherein the first driving end is used to send the first driving signal to the first pixel group; each repair channel includes a repair amplifier and a repair switch; each second data channel includes a second amplifier, a second direct-connect switch, and a second driving end, wherein the second driving end is used to send the second driving signal to the second pixel group; The controller is used to control each first direct-connected switch to be disconnected in the fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end respectively, control each second direct-connected switch to be disconnected, so that the second output end of each second amplifier is disconnected from the second driving end respectively, and control each repair switch and each first shift switch to be closed, so that each repair amplifier sends the first drive signal to the corresponding first driving end through the repair switch, and each first amplifier sends the second drive signal to the corresponding second driving end through the first shift switch.

10. The display driver according to claim 9, wherein: The second driving signal sent by each first amplifier is generated based on the same enable signal.

11. A display driver, characterized in that: The device comprises a controller, a first comparator, M first data channels and M repair channels, where M is a positive integer greater than 1; The controller is configured to control each of the M first data channels to send a first test signal to the first comparator respectively; The first comparator is configured to compare the first test signal sent by each first data channel with the reference signal to obtain a first comparison result; The controller is further configured to, when the first comparison result indicates that at least one of the M first data channels has a fault, control each of the M repair channels to provide a first drive signal to the corresponding first data channel, wherein the first drive signal is used to drive a first pixel group corresponding to the M first data channels on the display panel to emit light, so as to repair the fault of the at least one first data channel.

12. The display driver according to claim 11, wherein: Each first data channel includes a first amplifier, a first direct-connect switch, a first test switch, and a first driving end, wherein the first driving end is used to send the first driving signal to the first pixel group, and one of the M first data channels further includes a first access end; The controller is used to control each first direct-connect switch to be disconnected in a fault test mode, so that the first output end of each first amplifier is disconnected from the first driving end, and control each first test switch to be closed in sequence, so that each first amplifier sends the first test signal to the first comparator through the first output end, the first test switch and the first access end in sequence.

13. The display driver according to claim 11, wherein: The first comparator includes a test input terminal, a reference input terminal and a first result output terminal; The first comparator is used to receive the first test signal sent by each first data channel in sequence through the test input end, receive the reference signal through the reference input end, compare the first test signal sent by each first data channel with the reference signal in sequence, obtain the first comparison result, and send the first comparison result to the controller through the first result output end.

14. The display driver according to claim 13, wherein: Also included is a level shifter; The first comparator is configured to send the first comparison result to the level shifter via the first result output terminal; The level shifter is configured to level-shift the first comparison result to obtain a level-shifted first comparison result, and send the level-shifted first comparison result to the controller, wherein the level-shifted first comparison result indicates whether each first data channel has a fault.

15. The display driver according to claim 11, wherein: Each first data channel includes a first amplifier, a first direct-connect switch, a first test switch, and a first driving end, wherein the first driving end is used to send the first driving signal to the first pixel group, and each repair channel includes a repair amplifier and a repair switch. The controller is used to control each first direct-connect switch and each first test switch to be disconnected in the fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end and the first comparator respectively, and control each repair switch to be closed, so that each repair amplifier sends the first driving signal to the corresponding first driving end through the repair switch.

16. The display driver according to any one of claims 11 to 15, characterized in that: The first pixel group includes M sub-pixel columns, the M first data channels correspond one-to-one to the M sub-pixel columns, and the first driving signal corresponding to each first data channel is used to drive the corresponding sub-pixel column to emit light.

17. The display driver according to any one of claims 11 to 15, characterized in that: Also includes a second comparator and M second data channels; The controller is further configured to control the M second data channels to send second test signals to the second comparators respectively; The second comparator is configured to compare the second test signal sent by each of the M second data channels with the reference signal to obtain a second comparison result; The controller is further configured to, when the first comparison result indicates that none of the M first data channels are faulty and the second comparison result indicates that at least one of the M second data channels is faulty, control the M repair channels to provide the first drive signals to the M first data channels, and control the M first data channels to provide the second drive signals; The second drive signal is a signal provided by the M first data channels to the M second data channels, and the second drive signal is used to repair a fault in at least one of the second data channels. Alternatively, the second drive signal is a signal provided by the M first data channels to other data channels in the display driver, and the other data channels are used to provide other drive signals to the M second data channels, and the other drive signals are used to repair a fault in at least one of the second data channels.

18. The display driver according to claim 17, wherein: Each first data channel includes a first amplifier, a first direct-connect switch, a first test switch, a first driving end, and a first shift switch, wherein the first driving end is used to send the first driving signal to the first pixel group; each repair channel includes a repair amplifier and a repair switch; each second data channel includes a second amplifier, a second direct-connect switch, a second test switch, and a second driving end, wherein the second driving end is used to send the second driving signal to the second pixel group; The controller is used to control each first direct-connected switch and each first test switch to be disconnected in the fault repair mode, so that the first output end of each first amplifier is disconnected from the first driving end and the first comparator respectively, control each second direct-connected switch and each second test switch to be disconnected, so that the second output end of each second amplifier is disconnected from the second driving end and the second comparator respectively, and control each repair switch and each first shift switch to be closed, so that each repair amplifier sends the first drive signal to the corresponding first driving end through the repair switch, and each first amplifier sends the second drive signal to the corresponding second driving end through the first shift switch.

19. The display driver according to claim 18, wherein: The second driving signal sent by each first amplifier is generated based on the same enable signal.

20. A chip, characterized in that: The chip includes the display driver according to any one of claims 1-19.

21. An electronic device, characterized in that: The electronic device includes a display panel and the chip according to claim 20.

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