Brightness compensation method of display panel and display panel

Abstract

The invention provides a brightness compensation method of a display panel and the display panel. The display panel comprises a first sub-pixel and a second sub-pixel which are opposite in polarity, and a first liquid crystal capacitor and a first storage capacitor of the same first sub-pixel are connected with the same data voltage end and are connected with different common voltage ends respectively. The second liquid crystal capacitor and the second storage capacitor of the same second sub-pixel are connected with the same data voltage end and are respectively connected with different common voltage ends, and the second storage capacitor and the first storage capacitor are connected with different common voltage ends. The brightness compensation method comprises the steps of determining a first target common voltage and a second target common voltage in response to a condition that a vertical blanking period of a current frame meets a compensation condition; and in the vertical blanking period of the current frame, controlling and adjusting the common voltage applied to each first storage capacitor to be the corresponding first target common voltage, and adjusting the common voltage applied to each second storage capacitor to be the corresponding second target common voltage.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a brightness compensation method for a display panel and a display panel. Background Art

[0002] When displaying computer graphics, a mismatch between the frame rate output by the graphics card and the refresh rate of the display can cause issues like screen tearing or stuttering, impacting the user's visual experience. Currently, variable refresh rate (VRR) technology is commonly used to dynamically adjust the refresh rate to match the graphics card's output frame rate, thereby alleviating these issues.

[0003] In VRR technology, a frame is divided into the display time (vertical active period) and the pause time before entering the next frame (vertical blanking period). The vertical active period has a fixed duration, while the vertical blanking period is variable. By changing the duration of the vertical blanking period, the refresh rate can be adjusted. However, since the liquid crystal capacitor will leak after scanning and charging, the longer the vertical blanking period, the greater the leakage. When the duration of the vertical blanking period varies significantly between different frames, that is, when the refresh rate between different frames varies significantly, the leakage duration of the liquid crystal capacitor will also vary significantly, resulting in a large difference in brightness between different frames, causing the display to show obvious changes in brightness and flicker. Summary of the Invention

[0004] In order to solve the above technical problems, the present application provides a brightness compensation method for a display panel and a display panel.

[0005] In a first aspect, the present application provides a brightness compensation method for a display panel, wherein the display panel includes a plurality of first sub-pixels having the same polarity and a plurality of second sub-pixels having the same polarity, wherein the second sub-pixels have opposite polarity to the first sub-pixels. Each first sub-pixel includes a first liquid crystal capacitor and a first storage capacitor, wherein the first liquid crystal capacitor and the first storage capacitor of the same first sub-pixel are connected to the same data voltage terminal and are respectively connected to different common voltage terminals. Each second sub-pixel includes a second liquid crystal capacitor and a second storage capacitor, wherein the second liquid crystal capacitor and the second storage capacitor of the same second sub-pixel are connected to the same data voltage terminal and are respectively connected to different common voltage terminals, wherein the second storage capacitor and the first storage capacitor are connected to different common voltage terminals. The brightness compensation method includes: in response to the vertical blanking period of the current frame satisfying the compensation condition, determining the first target common voltage corresponding to each first storage capacitor and the second target common voltage corresponding to each second storage capacitor; controlling and adjusting the common voltage applied to each first storage capacitor to the corresponding first target common voltage during the vertical blanking period of the current frame to compensate for the brightness of the multiple first sub-pixels during the vertical blanking period of the current frame, and adjusting the common voltage applied to each second storage capacitor to the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels during the vertical blanking period of the current frame.

[0006] The brightness compensation method of the display panel provided in the present application adjusts the common voltage of the first storage capacitor and the second storage capacitor in the vertical blanking area of ​​the current frame, that is, performs brightness compensation on the multiple first sub-pixels and the multiple second sub-pixels in the current frame. This not only solves the problem of brightness changes and flickering of the picture caused by leakage, but also realizes that the compensation takes effect in the current frame. Compared with the related art in which the compensation is delayed by one frame to take effect, the compensation effect is better.

[0007] A second aspect of the present application provides a display panel, comprising a plurality of first sub-pixels having the same polarity, a plurality of second sub-pixels having the same polarity, a memory, and a processor. The second sub-pixels have opposite polarities to the first sub-pixels. Each first sub-pixel comprises a first liquid crystal capacitor and a first storage capacitor, wherein the first liquid crystal capacitor and the first storage capacitor of the same first sub-pixel are connected to the same data voltage terminal and to different common voltage terminals, respectively. The memory stores a computer program, and the processor executes the computer program to perform the brightness compensation method for the display panel provided in the first aspect.

[0008] The solution provided in the above-mentioned second aspect is used to implement the corresponding method provided in the above-mentioned first aspect, and therefore can achieve the same or corresponding beneficial effects as the corresponding method in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings required for use in the implementation. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0010] Figure 1 Schematic diagram of polarities of a plurality of first sub-pixels and a plurality of second sub-pixels of a display panel in the first embodiment of the present application.

[0011] Figure 2 Schematic diagram of the circuit structure of multiple first sub-pixels and multiple second sub-pixels of the display panel in the first embodiment of the present application.

[0012] Figure 3 This is a flow chart of a brightness compensation method for a display panel in some embodiments of the present application.

[0013] Figure 4 Schematic diagram of the circuit structure of multiple first sub-pixels and multiple second sub-pixels of the display panel in the second embodiment of the present application.

[0014] Figure 5 Schematic diagram of the circuit structure of multiple first sub-pixels and multiple second sub-pixels of the display panel in the third embodiment of the present application.

[0015] Figure 6 Schematic diagram of the circuit structure of multiple first sub-pixels and multiple second sub-pixels of the display panel in the fourth embodiment of the present application.

[0016] Figure 7 Schematic diagram of the planar structure of the display panel in some embodiments of the present application.

[0017] Figure 8 Flowchart of a brightness compensation method for a display panel in some other embodiments of the present application.

[0018] Figure 9 Schematic diagram of the planar structure of the display panel described in some other embodiments of the present application.

[0019] Figure 10 Schematic diagram of the circuit structure of multiple first sub-pixels and multiple second sub-pixels of the display panel in the fifth embodiment of the present application.

[0020] Figure 11 This is a schematic diagram of the length of a frame in some embodiments of the present application.

[0021] Figure 12 This is a flowchart of a brightness compensation method for a display panel in some further embodiments of the present application.

[0022] Figure 13 Flowchart of a brightness compensation method for a display panel in some other embodiments of the present application.

[0023] Figure 14 Flowchart of a brightness compensation method for a display panel in some other embodiments of the present application.

[0024] Figure 15 This is a structural block diagram of a display panel in some embodiments of the present application. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0026] In the description of this application, the terms "first", "second", "third", "fourth", "fifth", "sixth", etc. are used to distinguish different objects rather than to describe a specific order. The directions or positional relationships indicated by the terms "upper", "lower", "inner", "outer", etc. are based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limitations on this application.

[0027] In the description of this application, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, it can mean a fixed connection, a detachable connection, or an integral connection; it can mean a direct connection, an indirect connection through an intermediate medium, or internal communication between two components; it can mean a communication connection; or it can mean an electrical connection. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0028] In the related art, in order to solve the problem of brightness changes and flickering of the display screen, VGC technology (Voltage Gray-scale Compensation) is usually used to perform brightness compensation, that is, the compensated grayscale voltage is obtained based on the refresh rate of the current frame. Since the refresh rate of the current frame is determined by the rendering time of the next frame, the compensated grayscale voltage can only be output when the next frame is displayed to compensate for the brightness of the next frame. However, in this method, since the compensated grayscale voltage obtained based on the refresh rate of the first frame is applied to the second frame, the first frame cannot be compensated. Moreover, since the compensated grayscale voltage obtained based on the refresh rate of the Nth frame is applied to the N+1th frame instead of the Nth frame, it is equivalent to the compensation being delayed by one frame, resulting in erroneous compensation. In addition, there is a problem in the related art that effective compensation cannot be made due to inconsistent positive and negative polarity of sub-pixels.

[0029] See also Figure 1 and Figure 2 , Figure 1 Schematic diagram of polarities of a plurality of first sub-pixels 10 and a plurality of second sub-pixels 20 of a display panel in the first embodiment of the present application, Figure 2 Schematic diagram of the circuit structure of a plurality of first sub-pixels 10 and a plurality of second sub-pixels 20 of a display panel in the first embodiment of the present application. In some embodiments, such as Figure 1 and Figure 2 As shown, the display panel 100 includes a plurality of first sub-pixels 10 with the same polarity, and also includes a plurality of second sub-pixels 20 with the same polarity. The polarity of the second sub-pixels 20 is opposite to that of the first sub-pixels 10 .

[0030] like Figure 2 As shown, each first sub-pixel 10 includes a first liquid crystal capacitor 11 and a first storage capacitor 12, and each second sub-pixel 20 includes a second liquid crystal capacitor 21 and a second storage capacitor 22. The first liquid crystal capacitor 11 and the first storage capacitor 12 of the same first sub-pixel 10 are connected to the same data voltage terminal and are respectively connected to different common voltage terminals. The second liquid crystal capacitor 21 and the second storage capacitor 22 of the same second sub-pixel 20 are connected to the same data voltage terminal and are respectively connected to different common voltage terminals. The second storage capacitor 22 and the first storage capacitor 12 are connected to different common voltage terminals. The data voltage terminal is used to transmit a data voltage signal, and the common voltage terminal is used to transmit a common voltage signal.

[0031] See also Figure 3 , Figure 3 Flowchart of the brightness compensation method of the display panel in some embodiments of the present application. In some embodiments, such as Figure 3 As shown, the brightness compensation method of the display panel includes the steps of: S31 : In response to a vertical blanking period of a current frame satisfying a compensation condition, determining a first target common voltage corresponding to each first storage capacitor 12 and a second target common voltage corresponding to each second storage capacitor 22 .

[0032] S32: During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor 12 is controlled and adjusted to be the corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels 10 during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor 22 is controlled and adjusted to be the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels 20 during the vertical blanking period of the current frame.

[0033] When the common voltage applied to the first storage capacitor 12 is adjusted, the data voltage of the first storage capacitor 12 changes with a constant amplitude, since the voltage across the capacitor does not change suddenly, so that the voltage difference across the first storage capacitor 12 remains unchanged. When the data voltage of the first storage capacitor 12 changes, since the first liquid crystal capacitor 11 and the first storage capacitor 12 are connected to the same data voltage terminal, the data voltage of the first liquid crystal capacitor 11 also changes with a constant amplitude, thereby changing the voltage difference across the first liquid crystal capacitor 11. Therefore, by adjusting the common voltage applied to the first storage capacitor 12, the brightness of the first sub-pixel 10 can be adjusted. When the vertical blanking period of the current frame meets the compensation condition, the brightness of the multiple first sub-pixels 10 in the vertical blanking period of the current frame can be compensated by adjusting the common voltage applied to the first storage capacitor 12 during the vertical blanking period of the current frame, thereby achieving compensation in effect during the frame.

[0034] Similarly, when the common voltage applied to the second storage capacitor 22 is adjusted, the data voltage of the second storage capacitor 22 and the data voltage of the second liquid crystal capacitor 21 change with equal amplitude, thereby changing the voltage difference across the second liquid crystal capacitor 21. Thus, by adjusting the common voltage applied to the second storage capacitor 22, the brightness of the second sub-pixel 20 can be adjusted. When the vertical blanking period of the current frame meets the compensation condition, the brightness of the plurality of second sub-pixels 20 during the vertical blanking period of the current frame can be compensated by adjusting the common voltage applied to the second storage capacitor 22 during the vertical blanking period of the current frame, thereby ensuring that compensation takes effect during the current frame.

[0035] By setting the first storage capacitor 12 and the second storage capacitor 22 to be connected to different common voltage terminals respectively, and adjusting the common voltages applied to the first storage capacitor 12 and the second storage capacitor 22 respectively, brightness compensation is achieved for sub-pixels of different polarities, and by adjusting the common voltages of the first storage capacitor 12 and the second storage capacitor 22 in the vertical blanking area of ​​the current frame, that is, brightness compensation is performed on the multiple first sub-pixels 10 and the multiple second sub-pixels 20 in the current frame, which not only solves the problem of brightness changes and flickering of the picture caused by leakage, but also realizes that the compensation takes effect in the current frame. Compared with the related art in which the compensation is delayed for one frame to take effect, the compensation effect is better.

[0036] In some embodiments, the plurality of first sub-pixels 10 and the plurality of second sub-pixels 20 are arranged in multiple rows and columns, each row of sub-pixels includes at least one first sub-pixel 10 and / or at least one second sub-pixel 20, and each column of sub-pixels includes at least one first sub-pixel 10 and / or at least one second sub-pixel 20. The display panel further includes a plurality of data lines and a plurality of scan lines, each data line extending in a column direction, the plurality of data lines being arranged in a row direction, each scan line extending in a row direction, the plurality of scan lines being arranged in a column direction, the data lines being used to transmit data voltage signals, the aforementioned data voltage terminals being the data lines, and the scan lines being used to transmit scan drive signals to select the thin film transistors of the sub-pixels by row. Sub-pixels in the same row are connected to the same scan line, and sub-pixels in the same column can be connected to the same data line or to different data lines.

[0037] The first storage capacitors 12 of different first sub-pixels 10 can be connected to the same common voltage terminal or to different common voltage terminals. The second storage capacitors 22 of different second sub-pixels 20 can be connected to the same common voltage terminal or to different common voltage terminals. The first liquid crystal capacitor 11 and the second liquid crystal capacitor 21 can be connected to the same common voltage terminal or to different common voltage terminals.

[0038] In some embodiments, such as Figure 1 and Figure 2 As shown, each row of sub-pixels includes at least one first sub-pixel 10 and at least one second sub-pixel 20, and each column of sub-pixels includes at least one first sub-pixel 10 and at least one second sub-pixel 20. The first sub-pixels 10 and the second sub-pixels 20 are alternately arranged in each row and column of sub-pixels. The display panel includes data lines Sn, data line Sn+1, data line Sn+2, and data line Sn+3 arranged in sequence along the row direction, and scan lines Gn, scan line Gn+1, scan line Gn+2, and scan line Gn+3 arranged in sequence along the column direction.

[0039] In some embodiments, such as Figure 1 and Figure 2 As shown, all sub-pixels in the same row are connected to the same scan line and are each connected to a different data line. Sub-pixels with the same polarity in the same column are connected to the same data line, while sub-pixels with opposite polarity in the same column are connected to different data lines. For example, in a column of sub-pixels between data line Sn and data line Sn+1, all first sub-pixels 10 are connected to data line Sn+1, and all second sub-pixels 20 are connected to data line Sn.

[0040] See also Figure 4 , Figure 4 Schematic diagram of the circuit structure of a plurality of first sub-pixels 10 and a plurality of second sub-pixels 20 of a display panel in the second embodiment of the present application. In some embodiments, such as Figure 4 As shown, all sub-pixels in the same row are connected to the same scan line and are respectively connected to different data lines, and all sub-pixels in the same column are connected to the same data line.

[0041] See also Figure 5 , Figure 5 Schematic diagram of the circuit structure of a plurality of first sub-pixels 10 and a plurality of second sub-pixels 20 of a display panel in the third embodiment of the present application. In some embodiments, such as Figure 5 As shown, each row of sub-pixels includes at least two first sub-pixels 10 or at least two second sub-pixels 20. The polarity of all sub-pixels in each row of sub-pixels is the same, and the polarity of sub-pixels in two adjacent rows is opposite. Each column of sub-pixels includes at least one first sub-pixel 10 and at least one second sub-pixel 20. The first sub-pixels 10 and the second sub-pixels 20 in each column of sub-pixels are alternately arranged. In particular, all sub-pixels in the same row of sub-pixels are connected to the same scan line and are respectively connected to different data lines. Sub-pixels with the same polarity in the same column of sub-pixels are connected to the same data line, and sub-pixels with opposite polarity in the same column of sub-pixels are connected to different data lines. In other embodiments, all sub-pixels in the same column of sub-pixels are connected to the same data line.

[0042] See also Figure 6 , Figure 6 Schematic diagram of the circuit structure of a plurality of first sub-pixels 10 and a plurality of second sub-pixels 20 of a display panel in the fourth embodiment of the present application. In some embodiments, such as Figure 6As shown, each row of sub-pixels includes at least one first sub-pixel 10 and at least one second sub-pixel 20. The first sub-pixels 10 and the second sub-pixels 20 in each row of sub-pixels are alternately arranged. Each column of sub-pixels includes at least two first sub-pixels 10 or at least two second sub-pixels 20. The polarity of all sub-pixels in each column of sub-pixels is the same, and the polarity of sub-pixels in two adjacent columns is opposite. In particular, all sub-pixels in the same row of sub-pixels are connected to the same scan line and are respectively connected to different data lines, and all sub-pixels in the same column of sub-pixels are connected to the same data line. In other embodiments, all sub-pixels in the same column of sub-pixels are connected to different data lines.

[0043] In some embodiments, such as Figure 2 、 Figures 4 to 6 As shown, one end of the first liquid crystal capacitor 11 and the first storage capacitor 12 of the same first sub-pixel 10 are connected to the same data line, that is, to the same data voltage terminal, and one end of the second liquid crystal capacitor 21 and the second storage capacitor 22 of the same second sub-pixel 20 are connected to the same data line, that is, to the same data voltage terminal. The other end of the first liquid crystal capacitor 11 of each first sub-pixel 10 and the other end of the second liquid crystal capacitor 21 of each second sub-pixel 20 are connected to the first common voltage terminal Vcom_1, the other end of the first storage capacitor 12 of each first sub-pixel 10 is connected to the second common voltage terminal Vcom_2, and the other end of the second storage capacitor 22 of each second sub-pixel 20 is connected to the third common voltage terminal Vcom_3.

[0044] In some other embodiments, the plurality of first sub-pixels 10 and the plurality of second sub-pixels 20 may be arranged in any other manner, and the connection relationship between the plurality of first sub-pixels 10, the plurality of second sub-pixels 20 and the data lines and scan lines may also be flexibly configured.

[0045] See also Figure 7 , Figure 7 Schematic diagram of the planar structure of the display panel 100 in some embodiments of the present application. In some embodiments, such as Figure 7As shown, the display panel 100 includes a display area A1. The plurality of first sub-pixels 10 and the plurality of second sub-pixels 20 are arranged in the display area A1. The brightness compensation method further includes the step of obtaining the brightness of the display area A1 during the vertical active period and the vertical blanking period of the current frame. The aforementioned method of determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the vertical blanking period of the current frame satisfying the compensation condition comprises: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the brightness difference between the brightness of the display area during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range.

[0046] See also Figure 8 , Figure 8 Flowchart of the brightness compensation method of the display panel in some other embodiments of the present application. In some embodiments, such as Figure 8 As shown, the brightness compensation method of the display panel includes the steps of: S81: Obtain the brightness of the display area A1 during the vertical active period and the vertical blanking period of the current frame.

[0047] S82: In response to the acquired brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range, determine the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22.

[0048] S83: During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor 12 is controlled and adjusted to be the corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels 10 during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor 22 is controlled and adjusted to be the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels 20 during the vertical blanking period of the current frame.

[0049] By comparing the brightness of display area A1 during the vertical active period and the vertical blanking period of the current frame, when compensating the brightness of display panel 100, the brightness of display panel 100 during the vertical active period can be compensated to be consistent with the brightness during the vertical active period, thereby improving the accuracy of compensation. In addition, because the human eye is insensitive to brightness changes within a certain range, brightness compensation is only performed when the brightness difference between display area A1 during the vertical blanking period and the vertical active period of the current frame is within the preset brightness difference range. This not only ensures that the compensated image does not show obvious brightness changes to the human eye, but also reduces unnecessary compensation operations and reduces power consumption.

[0050] After the common voltage applied to each first storage capacitor 12 is adjusted to the corresponding first target common voltage and the common voltage applied to each second storage capacitor 22 is adjusted to the corresponding second target common voltage, steps S81 to S83 are repeated.

[0051] The preset brightness difference range can be set according to actual needs and is not limited here.

[0052] In some embodiments, the aforementioned response to the acquired brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 includes: in response to the acquired brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 according to the common voltage currently applied to each first storage capacitor 12 and the first preset voltage variable, and determining the second target common voltage corresponding to each second storage capacitor 22 according to the common voltage currently applied to each second storage capacitor 22 and the second preset voltage variable.

[0053] The target common voltage can be quickly determined based on the preset voltage variable, so that the common voltage applied to the storage capacitor can be quickly adjusted to the corresponding target common voltage, thereby achieving rapid compensation.

[0054] In some embodiments, the polarity of the first sub-pixel 10 is positive, the polarity of the second sub-pixel 20 is negative, and the first preset voltage variable and the second preset voltage variable are both positive. Determining the first target common voltage corresponding to each first storage capacitor 12 based on the common voltage currently applied to each first storage capacitor 12 and the first preset voltage variable includes: using the sum of the common voltage currently applied to each first storage capacitor 12 and the first preset voltage variable as the first target common voltage corresponding to each first storage capacitor 12. Determining the second target common voltage corresponding to each second storage capacitor 22 based on the common voltage currently applied to each second storage capacitor 22 and the second preset voltage variable includes: using the difference between the common voltage currently applied to each second storage capacitor 22 and the second preset voltage variable as the second target common voltage corresponding to each second storage capacitor 22.

[0055] In some other embodiments, the polarity of the first sub-pixel 10 is positive, the polarity of the second sub-pixel 20 is negative, the first preset voltage variable is a positive value, and the second preset voltage variable is a negative value. Determining the first target common voltage corresponding to each first storage capacitor 12 based on the common voltage currently applied to each first storage capacitor 12 and the first preset voltage variable includes: using the sum of the common voltage currently applied to each first storage capacitor 12 and the first preset voltage variable as the first target common voltage corresponding to each first storage capacitor 12. Determining the second target common voltage corresponding to each second storage capacitor 22 based on the common voltage currently applied to each second storage capacitor 22 and the second preset voltage variable includes: using the sum of the common voltage currently applied to each second storage capacitor 22 and the second preset voltage variable as the second target common voltage corresponding to each second storage capacitor 22.

[0056] The absolute value of the first preset voltage variable is equal to or different from the absolute value of the second preset voltage variable.

[0057] In some embodiments, the first preset voltage variable is 0.1 V, and the second preset voltage variable is 0.1 V. For example, if the common voltage currently applied to a first storage capacitor 12 is 6 V and the common voltage currently applied to a second storage capacitor 22 is 6 V, then the first target common voltage corresponding to the first storage capacitor 12 is 6.1 V, and the second target common voltage corresponding to the second storage capacitor 22 is 5.9 V; if the common voltage currently applied to a first storage capacitor 12 is 6.1 V and the common voltage currently applied to a second storage capacitor 22 is 5.9 V, then the first target common voltage corresponding to the first storage capacitor 12 is 6.2 V, and the second target common voltage corresponding to the second storage capacitor 22 is 5.8 V.

[0058] In other embodiments, the first preset voltage variable and the second preset voltage variable may be other values.

[0059] In some embodiments, the aforementioned response to the obtained brightness difference between the brightness of the display area A1 in the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 includes: in response to the obtained brightness difference between the brightness of the display area A1 in the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 according to the obtained brightness difference between the brightness of the display area A1 in the vertical blanking period of the current frame and the brightness during the vertical effective period.

[0060] By determining the target common voltage based on the brightness difference between the vertical blanking period and the vertical effective period of the display area A1 in the current frame, the determined target common voltage can be made to correspond to the brightness difference, thereby further improving the consistency between the brightness of the display panel 100 after compensation in the vertical blanking period and the brightness in the vertical effective period, thereby further improving the accuracy of brightness compensation.

[0061] In some embodiments, the above-mentioned determination of the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 based on the brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical effective period includes: determining the first target voltage variable and the second target voltage variable based on a preset correspondence between the brightness difference and the first voltage variable and the second voltage variable, and the brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical effective period; determining the first target common voltage corresponding to each first storage capacitor 12 based on the common voltage currently applied to each first storage capacitor 12 and the first target voltage variable, and determining the second target common voltage corresponding to each second storage capacitor 22 based on the common voltage currently applied to each second storage capacitor 22 and the second target voltage variable.

[0062] The preset correspondence between the brightness difference value and the first voltage variable and the second voltage variable includes a first preset correspondence between the brightness difference value and the first voltage variable and a second preset correspondence between the brightness difference value and the second voltage variable. The first preset correspondence defines a one-to-one correspondence between multiple brightness differences and multiple first voltage variables, and the second preset correspondence defines a one-to-one correspondence between multiple brightness differences and multiple second voltage variables.

[0063] In some embodiments, the polarity of the first sub-pixel 10 is positive, the polarity of the second sub-pixel 20 is negative, and the first voltage variable and the second voltage variable are both positive. Determining the first target common voltage corresponding to each first storage capacitor 12 based on the common voltage currently applied to each first storage capacitor 12 and the first target voltage variable includes: using the sum of the common voltage currently applied to each first storage capacitor 12 and the first target voltage variable as the first target common voltage corresponding to each first storage capacitor 12. Determining the second target common voltage corresponding to each second storage capacitor 22 based on the common voltage currently applied to each second storage capacitor 22 and the second target voltage variable includes: using the difference between the common voltage currently applied to each second storage capacitor 22 and the second target voltage variable as the second target common voltage corresponding to each second storage capacitor 22.

[0064] In some other embodiments, the polarity of the first sub-pixel 10 is positive, the polarity of the second sub-pixel 20 is negative, the first voltage variable is a positive value, and the second voltage variable is a negative value. Determining the first target common voltage corresponding to each first storage capacitor 12 based on the common voltage currently applied to each first storage capacitor 12 and the first target voltage variable includes: using the sum of the common voltage currently applied to each first storage capacitor 12 and the first target voltage variable as the first target common voltage corresponding to each first storage capacitor 12. Determining the second target common voltage corresponding to each second storage capacitor 22 based on the common voltage currently applied to each second storage capacitor 22 and the second target voltage variable includes: using the sum of the common voltage currently applied to each second storage capacitor 22 and the second target voltage variable as the second target common voltage corresponding to each second storage capacitor 22.

[0065] In some embodiments, the brightness difference is positively correlated with the absolute value of the first voltage variable and the absolute value of the second voltage variable.

[0066] In some embodiments, such as Figure 7As shown, the display panel 100 further includes at least one brightness detector 30 and a non-display area A2 surrounding the display area A1. The non-display area A2 can be closed or open surrounding the display area A1. The at least one brightness detector 30 is used to obtain the brightness of the display area A1.

[0067] In some embodiments, the at least one brightness detector 30 is disposed in the non-display area A2 to prevent the brightness detector 30 from affecting the brightness of the sub-pixels in the display area A1 , thereby improving the accuracy of the acquired brightness of the display area A1 .

[0068] In some other embodiments, the at least one brightness detector 30 is disposed in the display area A1. When there are at least two brightness detectors 30, they may be disposed in the non-display area A2 and the display area A1.

[0069] In some embodiments, such as Figure 2 、 Figures 4 to 6 As shown, the first storage capacitors 12 of the multiple first sub-pixels 10 are connected to the same common voltage terminal, namely the second common voltage terminal Vcom_2, and the second storage capacitors 22 of the multiple second sub-pixels 20 are connected to the same common voltage terminal, namely the third common voltage terminal Vcom_3.

[0070] The first target common voltages corresponding to the first storage capacitors 12 of the plurality of first sub-pixels 10 determined in the aforementioned step S31 or S82 are the same, and the second target common voltages corresponding to the second storage capacitors 22 of the plurality of second sub-pixels 20 determined in the aforementioned step S32 and S83 are the same. In the aforementioned steps S32 and S83, controlling and adjusting the common voltage applied to each first storage capacitor 12 to the corresponding first target common voltage during the vertical blanking period of the current frame includes: controlling and adjusting the common voltage output from the second common voltage terminal Vcom_2 to all first storage capacitors 12 to the first target common voltage during the vertical blanking period of the current frame. Adjusting the common voltage applied to each second storage capacitor 22 to the corresponding second target common voltage includes: controlling and adjusting the common voltage output from the third common voltage terminal Vcom_3 to all second storage capacitors 22 to the second target common voltage during the vertical blanking period of the current frame.

[0071] By setting all the first storage capacitors 12 to be connected to the second common voltage terminal Vcom_2, and all the second storage capacitors 22 to be connected to the third common voltage terminal Vcom_3, compensation can be achieved only by adjusting the voltages output by the second common voltage terminal Vcom_2 and the third common voltage terminal Vcom_3, which can reduce the amount of calculation and reduce power consumption.

[0072] In some other embodiments, the first storage capacitors 12 of the plurality of first sub-pixels 10 are connected to different common voltage terminals, and the second storage capacitors 22 of the plurality of second sub-pixels 20 are connected to different common voltage terminals. When controlling and adjusting the common voltage applied to each first storage capacitor 12, the common voltage output from the common voltage terminal connected to each first storage capacitor 12 is controlled and adjusted; when controlling and adjusting the common voltage applied to each second storage capacitor 22, the common voltage output from the common voltage terminal connected to each second storage capacitor 22 is controlled and adjusted.

[0073] See also Figure 9 , Figure 9 FIG. 1 is a schematic diagram of a planar structure of the display panel 100 in some other embodiments of the present application. Figure 9 As shown, the display area A1 includes multiple display subareas A11 , wherein the first storage capacitors 12 located in different display subareas A11 are connected to different common voltage terminals, and the second storage capacitors 22 located in different display subareas A11 are connected to different common voltage terminals.

[0074] In some embodiments, such as Figure 9 As shown, the plurality of display partitions A11 include a first display partition A111 and a second display partition A112. Obviously, the number of the plurality of display partitions A11 can also be other values, and the arrangement can also be any other arrangement.

[0075] In some embodiments, the aforementioned obtaining of the brightness of the display area A1 during the vertical active period and the vertical blanking period of the current frame includes: obtaining the brightness of each display partition A11 during the vertical active period and the vertical blanking period of the current frame. The aforementioned determining of the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the obtained brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range includes: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 of the display partition A11 in response to the obtained brightness difference between the brightness of any display partition A11 during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range.

[0076] By comparing the brightness of each display partition A11 during the vertical active period and the vertical blanking period of the current frame, the brightness of each display partition A11 during the vertical blanking period of the current frame is compensated, thereby achieving refined partition compensation for the display area A1 and achieving better compensation effect.

[0077] In some embodiments, the aforementioned response to the brightness difference between the brightness of any display partition A11 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 of the display partition A11 and the second target common voltage corresponding to each second storage capacitor 22 of the display partition A11 includes: in response to the brightness difference between the brightness of the display partition A11 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within the preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 of the display partition A11 according to the common voltage currently applied to each first storage capacitor 12 of the display partition A11 and the first preset voltage variable, and determining the second target common voltage corresponding to each second storage capacitor 22 of the display partition A11 according to the common voltage currently applied to each second storage capacitor 22 of the display partition A11 and the second preset voltage variable.

[0078] In some embodiments, the aforementioned response to the obtained brightness difference between the brightness of any display partition A11 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within a preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 of the display partition A11 and the second target common voltage corresponding to each second storage capacitor 22 of the display partition A11 includes: in response to the obtained brightness difference between the brightness of the display area A1 during the vertical blanking period of the current frame and the brightness during the vertical effective period being within the preset brightness difference range, determining the first target common voltage corresponding to each first storage capacitor 12 of the display partition A11 and the second target common voltage corresponding to each second storage capacitor 22 of the display partition A11 based on the obtained brightness difference between the brightness of the display partition A11 during the vertical blanking period of the current frame and the brightness during the vertical effective period.

[0079] In some embodiments, the first storage capacitors 12 located in the same display partition A11 are connected to the same common voltage terminal, the second storage capacitors 22 located in the same display partition A11 are connected to the same common voltage terminal, the first target common voltage corresponding to all the first storage capacitors 12 in the same display partition A11 is the same, and the second target common voltage corresponding to all the second storage capacitors 22 in the same display partition A11 is the same.

[0080] See also Figure 10 , Figure 10This is a schematic diagram of the circuit structure of multiple first sub-pixels 10 and multiple second sub-pixels 20 of a display panel in the fifth embodiment of the present application. In some embodiments, the second common voltage terminal Vcom_2 includes a first sub-common voltage terminal Vcom_21 and a second sub-common voltage terminal Vcom_22. The first storage capacitor 12 located in the first display sub-area A111 is connected to the first sub-common voltage terminal Vcom_21, and the first storage capacitor 12 located in the second display sub-area A112 is connected to the second sub-common voltage terminal Vcom_22. The third common voltage terminal Vcom_3 includes a third sub-common voltage terminal Vcom_31 and a fourth sub-common voltage terminal Vcom_32. The first storage capacitor 12 located in the first display sub-area A111 is connected to the third sub-common voltage terminal Vcom_31, and the first storage capacitor 12 located in the second display sub-area A112 is connected to the fourth sub-common voltage terminal Vcom_32.

[0081] By setting all the first storage capacitors 12 in the same display partition A11 to be connected to the same common voltage terminal, and all the second storage capacitors 22 in the same display partition A11 to be connected to the same common voltage terminal, it is possible to perform brightness compensation for all the first sub-pixels 10 / second sub-pixels 20 in a certain display partition A11 simply by adjusting the voltage output from the common voltage terminal to which all the first storage capacitors 12 / second storage capacitors 22 in the display partition A11 are connected, thereby reducing the amount of calculation and lowering power consumption.

[0082] In some embodiments, the display panel 100 includes at least two groups of brightness detectors 30 , each group of brightness detectors 30 includes at least one brightness detector 30 , and each group of brightness detectors 30 is disposed near a display partition A11 , and each group of brightness detectors 30 is used to obtain the brightness of the adjacent display partition A11 .

[0083] By arranging each group of brightness detectors 30 close to a display partition A11, the brightness of each display partition A11 during the vertical active period and the vertical blanking period of the current frame can be obtained, thereby facilitating targeted compensation for the brightness of each display partition A11 during the vertical blanking period of the current frame.

[0084] See also Figure 11 , Figure 11 This is a schematic diagram of a frame length in some embodiments of the present application. In some embodiments, such as Figure 11 As shown, a frame Z includes a frame start period S, a vertical active period Vactive, and a vertical blanking period Vblank. The display panel 100 is provided with a plurality of compensation nodes N.

[0085] The brightness compensation method further includes the step of determining the progress of the vertical blanking period of the current frame. The aforementioned step of determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the vertical blanking period of the current frame satisfying the compensation condition includes: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the progress of the vertical blanking period of the current frame reaching any compensation node.

[0086] See also Figure 12 , Figure 12 Flowchart of the brightness compensation method of the display panel in some embodiments of the present application. Figure 12 As shown, the brightness compensation method of the display panel includes the steps of: S121: Determine the process of the vertical blanking period of the current frame.

[0087] S122 : In response to the vertical blanking period of the current frame reaching any compensation node, determining a first target common voltage corresponding to each first storage capacitor 12 and a second target common voltage corresponding to each second storage capacitor 22 .

[0088] S123: During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor 12 is controlled and adjusted to be the corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels 10 during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor 22 is controlled and adjusted to be the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels 20 during the vertical blanking period of the current frame.

[0089] As the vertical blanking period of the current frame progresses, the liquid crystal capacitor will slowly leak electricity and the brightness of the sub-pixel will gradually decrease. By pre-setting multiple compensation nodes and determining the target common voltage for brightness compensation when the vertical blanking period of the current frame reaches the compensation node, the brightness of the display panel 100 during the vertical blanking period of the current frame can be compensated in time, avoiding excessive difference in brightness between the vertical blanking period of the current frame and the vertical effective period of the display panel 100, resulting in problems such as brightness changes and flickering.

[0090] In some embodiments, the display panel 100 includes a timing controller configured to output a clock signal at a preset interval during a vertical blanking period. The plurality of compensation nodes correspond to a plurality of sequentially increasing preset clock signal count values, wherein each compensation node corresponds to a preset clock signal count value, and different compensation nodes correspond to different preset clock signal count values.

[0091] In some embodiments, the aforementioned process of determining the vertical blanking period of the current frame includes: obtaining a count value of a clock signal output by the timing controller during the vertical blanking period of the current frame. The aforementioned process of determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the vertical blanking period of the current frame satisfying a compensation condition includes: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the count value of the clock signal output by the timing controller during the vertical blanking period of the current frame reaching any preset clock signal count value.

[0092] See also Figure 13 , Figure 13 Flowchart of the brightness compensation method of the display panel in some embodiments of the present application. Figure 13 As shown, the brightness compensation method of the display panel includes the steps of: S131: Acquire a count value of a clock signal output by the timing controller during a vertical blanking period of the current frame.

[0093] S132: In response to the count value of the clock signal output by the timing controller during the vertical blanking period of the current frame reaching any preset clock signal count value, determine a first target common voltage corresponding to each first storage capacitor 12 and a second target common voltage corresponding to each second storage capacitor 22.

[0094] S133: During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor 12 is controlled and adjusted to be the corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels 10 during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor 22 is controlled and adjusted to be the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels 20 during the vertical blanking period of the current frame.

[0095] By counting the clock signal output by the timing controller during the vertical blanking period of the current frame, the progress of the vertical blanking period of the current frame can be accurately obtained, and then it can be accurately determined whether the progress of the vertical blanking period of the current frame has reached the compensation node, so that brightness compensation can be performed in time when the compensation node is reached.

[0096] In some embodiments, the plurality of compensation nodes correspond to a plurality of successively increasing preset durations, wherein each compensation node corresponds to a preset duration, and different compensation nodes correspond to different preset durations.

[0097] In some embodiments, the aforementioned process of determining the vertical blanking period of the current frame includes: obtaining the duration of the vertical blanking period of the current frame. The aforementioned process of determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the vertical blanking period of the current frame satisfying the compensation condition includes: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 in response to the duration of the vertical blanking period of the current frame reaching any preset duration.

[0098] See also Figure 14 , Figure 14 Flowchart of the brightness compensation method of the display panel in some embodiments of the present application. Figure 14 As shown, the brightness compensation method of the display panel includes the steps of: S141: Obtain the duration of the vertical blanking period of the current frame.

[0099] S142 : In response to the duration of the vertical blanking period of the current frame reaching any preset duration, determining a first target common voltage corresponding to each first storage capacitor 12 and a second target common voltage corresponding to each second storage capacitor 22 .

[0100] S143: During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor 12 is controlled and adjusted to be the corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels 10 during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor 22 is controlled and adjusted to be the corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels 20 during the vertical blanking period of the current frame.

[0101] By timing the vertical blanking period of the current frame, the progress of the vertical blanking period of the current frame can be accurately obtained, and then it can be accurately determined whether the progress of the vertical blanking period of the current frame reaches the compensation node, so that brightness compensation can be performed in time when the compensation node is reached.

[0102] In some embodiments, the product of the maximum preset clock signal count value among the plurality of preset clock signal count values ​​and the preset interval duration is greater than or equal to the duration corresponding to the maximum refresh rate of the display panel 100. In some embodiments, the maximum preset duration among the plurality of preset durations is greater than or equal to the duration corresponding to the maximum refresh rate of the display panel 100. Thus, even when the display panel 100 displays the current frame at the maximum refresh rate, the plurality of compensation nodes N can cover the entire vertical blanking period of the current frame.

[0103] In some embodiments, the multiple compensation nodes can be set according to the operating parameters of the display panel 100. For example, the multiple compensation nodes are set according to the refresh rate range of the display panel 100. Specifically, multiple refresh rate intervals are set based on the refresh rate range, and each refresh rate interval is used as a compensation node, wherein the upper limit value and the lower limit value of the refresh rate range are the maximum refresh rate and the minimum refresh rate that can be adjusted by the display panel 100, respectively. The aforementioned process of determining the vertical blanking period of the current frame includes: obtaining the count value of the clock signal output by the timing controller during the vertical blanking period of the current frame or the duration of the vertical blanking period of the current frame; and determining the current refresh rate corresponding to the current frame based on the count value or duration of the acquired clock signal. The aforementioned process in response to the vertical blanking period of the current frame reaching any compensation node, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22, includes: in response to the current refresh rate corresponding to the current frame being in any refresh rate interval, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22.

[0104] In some embodiments, the aforementioned determination of the first target common voltage and the second target common voltage in response to the process of the vertical blanking period of the current frame reaching any compensation node includes: in response to the process of the vertical blanking period of the current frame reaching any compensation node, determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 according to the target compensation node reached by the process of the vertical blanking period of the current frame.

[0105] By determining the target common voltage according to the target compensation node reached during the vertical blanking period of the current frame, the determined target common voltage can correspond to the target compensation node currently reached, thereby making the compensation adaptable to the current process of the vertical blanker, and thus making the compensation more accurate.

[0106] In some embodiments, the aforementioned determination of the first target common voltage and the second target common voltage according to the target compensation node reached during the vertical blanking period of the current frame includes: determining the first target common voltage corresponding to each first storage capacitor 12 and the second target common voltage corresponding to each second storage capacitor 22 according to a preset correspondence between the compensation node and the first common voltage and the second common voltage and the target compensation node.

[0107] The preset correspondence between the compensation node and the first common voltage and the second common voltage includes a third preset correspondence between the compensation node and the first common voltage and a fourth preset correspondence between the compensation node and the second common voltage. The third preset correspondence defines a one-to-one correspondence between the plurality of compensation nodes and the plurality of first common voltages, and the fourth preset correspondence defines a one-to-one correspondence between the plurality of compensation nodes and the plurality of common voltages.

[0108] For example, Figure 11 As shown, the plurality of compensation nodes N include a first compensation node N1, a second compensation node N2, ..., and a sixth compensation node N6. As shown in Table 1, Table 1 illustrates the first common voltage and the second common voltage corresponding to the compensation node N.

[0109] Table 1

[0110] For example, when the target compensation node reached during the vertical blanking period of the current frame is the first compensation node N1 , the first target common voltage is 6.4V, and the second target common voltage is 6.4V.

[0111] In some embodiments, the compensation node corresponds to a preset clock signal count value, the third preset correspondence defines a one-to-one correspondence between multiple preset clock signal count values ​​and multiple first common voltages, and the fourth preset correspondence defines a one-to-one correspondence between multiple preset clock signal count values ​​and multiple second common voltages.

[0112] In other embodiments, the compensation node corresponds to a preset duration, the third preset correspondence defines a one-to-one correspondence between multiple preset durations and multiple first common voltages, and the fourth preset correspondence defines a one-to-one correspondence between multiple preset durations and multiple second common voltages.

[0113] In some embodiments, such as Figure 2 、 Figures 4 to 6 As shown, the first storage capacitors 12 of the multiple first sub-pixels 10 are connected to the same common voltage terminal, namely the second common voltage terminal Vcom_2, and the second storage capacitors 22 of the multiple second sub-pixels 20 are connected to the same common voltage terminal, namely the third common voltage terminal Vcom_3.

[0114] The first target common voltages corresponding to the first storage capacitors 12 of the plurality of first sub-pixels 10 determined in the aforementioned steps S31, S82, S122, S132, and S142 are the same, and the second target common voltages corresponding to the second storage capacitors 22 of the plurality of second sub-pixels 20 are the same. In the aforementioned steps S32, S83, S123, S133, and S143, controlling and adjusting the common voltage applied to each first storage capacitor 12 to the corresponding first target common voltage during the vertical blanking period of the current frame includes: controlling and adjusting the common voltage outputted from the second common voltage terminal Vcom_2 to all first storage capacitors 12 to the first target common voltage during the vertical blanking period of the current frame. Adjusting the common voltage applied to each second storage capacitor 22 to the corresponding second target common voltage includes: controlling and adjusting the common voltage outputted from the third common voltage terminal Vcom_3 to all second storage capacitors 22 to the second target common voltage during the vertical blanking period of the current frame.

[0115] By setting all the first storage capacitors 12 to be connected to the second common voltage terminal Vcom_2, and all the second storage capacitors 22 to be connected to the third common voltage terminal Vcom_3, compensation can be achieved only by adjusting the voltages output by the second common voltage terminal Vcom_2 and the third common voltage terminal Vcom_3, which can reduce the amount of calculation and reduce power consumption.

[0116] In some other embodiments, the first storage capacitors 12 of the plurality of first sub-pixels 10 are connected to different common voltage terminals, and the second storage capacitors 22 of the plurality of second sub-pixels 20 are connected to different common voltage terminals. When controlling and adjusting the common voltage applied to each first storage capacitor 12, the common voltage output from the common voltage terminal connected to each first storage capacitor 12 is controlled and adjusted; when controlling and adjusting the common voltage applied to each second storage capacitor 22, the common voltage output from the common voltage terminal connected to each second storage capacitor 22 is controlled and adjusted.

[0117] See also Figure 15 , Figure 15 FIG. 1 is a structural block diagram of a display panel 100 in some embodiments of the present application. Figure 15 As shown, the display panel 100 includes the aforementioned multiple first sub-pixels 10 with the same polarity, multiple second sub-pixels 20 with the same polarity, a processor 40 and a memory 50, the second sub-pixels 20 and the first sub-pixels 10 have opposite polarities, the memory 50 stores a computer program, and the processor 40 runs the computer program to execute the brightness compensation method of the display panel described in any of the aforementioned embodiments.

[0118] The processor 40 may include the aforementioned timing controller. The processor 40 may include a processing chip such as a single-chip microcomputer, a CPU (central processing unit), or a DSP (digital signal processing unit). The memory 50 may be a storage medium such as a flash drive, a read-only memory, a random access memory, a magnetic disk, or an optical disk.

[0119] In some embodiments, the display panel 100 may include the aforementioned brightness detector 30 .

[0120] The functional operations performed by the display panel 100 correspond to the aforementioned brightness compensation method. For example, the aforementioned steps S31-S32, S82-S83, S122-S123, S132-S133, S142-S143, and the step of determining the first target common voltage and the second target common voltage in any of the aforementioned embodiments may be performed by the processor 40, i.e., correspond to the functional operations performed by the processor 40. For a more detailed description, please refer to the contents of the various embodiments of the aforementioned brightness compensation method. The contents of the display panel 100 and the aforementioned brightness compensation method may also refer to each other.

[0121] The present application also provides a computer-readable storage medium storing a computer program, which is invoked and executed by a processor to implement the display panel brightness compensation method provided in any of the aforementioned embodiments. The computer-readable storage medium can be a flash drive, read-only memory, random access memory, magnetic disk, or optical disk, among other storage media.

[0122] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0123] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0124] The above is an implementation method of the embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the embodiment of the present application. These improvements and modifications are also considered to be within the scope of protection of the present application.

Claims

1. A brightness compensation method for a display panel, characterized in that: The display panel includes: a plurality of first sub-pixels having the same polarity, each first sub-pixel including a first liquid crystal capacitor and a first storage capacitor, the first liquid crystal capacitor and the first storage capacitor of the same first sub-pixel being connected to the same data voltage terminal and respectively connected to different common voltage terminals; a plurality of second sub-pixels having the same polarity, wherein the second sub-pixels have opposite polarity to the first sub-pixel, each second sub-pixel including a second liquid crystal capacitor and a second storage capacitor, the second liquid crystal capacitor and the second storage capacitor of the same second sub-pixel being connected to the same data voltage terminal and respectively connected to different common voltage terminals, wherein the second storage capacitor and the first storage capacitor are connected to different common voltage terminals; The brightness compensation method comprises: In response to a vertical blanking period of a current frame satisfying a compensation condition, determining a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor; During the vertical blanking period of the current frame, the common voltage applied to each first storage capacitor is controlled and adjusted to be a corresponding first target common voltage to compensate for the brightness of the multiple first sub-pixels during the vertical blanking period of the current frame, and the common voltage applied to each second storage capacitor is controlled to be a corresponding second target common voltage to compensate for the brightness of the multiple second sub-pixels during the vertical blanking period of the current frame.

2. The brightness compensation method of a display panel according to claim 1, wherein: The display panel further includes a display area, and the plurality of first sub-pixels and the plurality of second sub-pixels are disposed in the display area; the brightness compensation method further includes: Acquire the brightness of the display area during the vertical active period and the vertical blanking period of the current frame; The determining, in response to a vertical blanking period of a current frame satisfying a compensation condition, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, includes: In response to the acquired brightness difference between the brightness of the display area during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined.

3. The brightness compensation method of a display panel according to claim 2, wherein: The step of determining, in response to the acquired brightness difference between the brightness of the display area during the vertical blanking period of the current frame and the brightness of the display area during the vertical active period being within a preset brightness difference range, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, comprising: Determining a first target common voltage corresponding to each first storage capacitor based on the common voltage currently applied to each first storage capacitor and a first preset voltage variable, and determining a second target common voltage corresponding to each second storage capacitor based on the common voltage currently applied to each second storage capacitor and a second preset voltage variable; or A first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined based on the acquired brightness difference between the brightness of the display area during the vertical blanking period of the current frame and the brightness during the vertical active period.

4. The brightness compensation method for a display panel according to claim 2 or 3, wherein: The display area includes a plurality of display partitions, first storage capacitors located in different display partitions are connected to different common voltage terminals, and second storage capacitors located in different display partitions are connected to different common voltage terminals; and obtaining the brightness of the display area during the vertical active period and the vertical blanking period of the current frame includes: Obtaining the brightness of each display partition during the vertical active period and the vertical blanking period of the current frame; The step of determining, in response to the acquired brightness difference between the brightness of the display area during the vertical blanking period of the current frame and the brightness of the display area during the vertical active period being within a preset brightness difference range, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, comprising: In response to the acquired brightness difference between the brightness of any display partition during the vertical blanking period of the current frame and the brightness during the vertical active period being within a preset brightness difference range, the first target common voltage corresponding to each first storage capacitor of the display partition and the second target common voltage corresponding to each second storage capacitor are determined.

5. The brightness compensation method of a display panel according to claim 4, wherein: The first storage capacitors located in the same display partition are connected to the same common voltage terminal, the second storage capacitors located in the same display partition are connected to the same common voltage terminal, the first target common voltage corresponding to all the first storage capacitors in the same display partition is the same, and the second target common voltage corresponding to all the second storage capacitors in the same display partition is the same.

6. The brightness compensation method for a display panel according to claim 2 or 3, characterized in that: The display panel further includes at least one brightness detector and a non-display area surrounding the display area. The at least one brightness detector is disposed in the non-display area and is used to obtain the brightness of the display area.

7. The brightness compensation method of a display panel according to claim 1, wherein: The display panel is provided with a plurality of compensation nodes; the brightness compensation method further comprises: Determining a vertical blanking period of the current frame; The determining, in response to a vertical blanking period of a current frame satisfying a compensation condition, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, includes: In response to the vertical blanking period of the current frame reaching any compensation node, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined.

8. The brightness compensation method of a display panel according to claim 7, wherein: The display panel includes a timing controller configured to output a clock signal at a preset interval during a vertical blanking period. The plurality of compensation nodes correspond to a plurality of sequentially increasing preset clock signal count values, wherein each compensation node corresponds to a preset clock signal count value. The process of determining the vertical blanking period of the current frame includes: Obtaining a count value of a clock signal output by the timing controller during a vertical blanking period of the current frame; The determining, in response to a vertical blanking period of a current frame satisfying a compensation condition, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, includes: In response to the count value of the clock signal output by the timing controller during the vertical blanking period of the current frame reaching any preset clock signal count value, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined.

9. The brightness compensation method of a display panel according to claim 7, wherein: The plurality of compensation nodes correspond to a plurality of preset durations that increase in sequence, wherein each compensation node corresponds to a preset duration; and the process of determining the vertical blanking period of the current frame includes: Obtaining the duration of the vertical blanking period of the current frame; The determining, in response to a vertical blanking period of a current frame satisfying a compensation condition, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor, includes: In response to the duration of the vertical blanking period of the current frame reaching any preset duration, a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined.

10. The brightness compensation method for a display panel according to any one of claims 7 to 9, characterized in that: The determining of a first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor in response to the vertical blanking period of the current frame reaching any compensation node comprises: A first target common voltage corresponding to each first storage capacitor and a second target common voltage corresponding to each second storage capacitor are determined according to a target compensation node reached during the vertical blanking period of the current frame.

11. The brightness compensation method for a display panel according to any one of claims 2-3 and 7-9, characterized in that: The first storage capacitors of the multiple first sub-pixels are connected to the same common voltage terminal, the second storage capacitors of the multiple second sub-pixels are connected to the same common voltage terminal, the first target common voltages corresponding to the first storage capacitors of the multiple first sub-pixels are the same, and the second target common voltages corresponding to the second storage capacitors of the multiple second sub-pixels are the same.

12. A display panel, characterized in that: The display panel includes: a plurality of first sub-pixels having the same polarity, each first sub-pixel including a first liquid crystal capacitor and a first storage capacitor, the first liquid crystal capacitor and the first storage capacitor of the same first sub-pixel being connected to the same data voltage terminal and respectively connected to different common voltage terminals; a plurality of second sub-pixels having the same polarity, wherein the second sub-pixels have opposite polarity to the first sub-pixel, each second sub-pixel including a second liquid crystal capacitor and a second storage capacitor, the second liquid crystal capacitor and the second storage capacitor of the same second sub-pixel being connected to the same data voltage terminal and respectively connected to different common voltage terminals, wherein the second storage capacitor and the first storage capacitor are connected to different common voltage terminals; A processor and a memory, wherein the memory stores a computer program, and the processor runs the computer program to execute the brightness compensation method for a display panel according to any one of claims 1 to 11.

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