Magnetic disk device

Abstract

Provided is a magnetic disk device capable of reducing the frequency of occurrence of read errors of servo data. A magnetic disk device according to an embodiment includes: a magnetic disk in which a servo sector in which first servo data is recorded is formed; a magnetic head for writing and reading data to and from the magnetic disk; a first memory capable of storing data to be written and data read from the disk; a second memory for storing second servo data; and a controller that, on the basis of the first servo data read by the magnetic head when passing through the servo sector, acquires the second servo data corresponding to the first servo data from the second memory, and performs positioning control of the magnetic head using the first servo data and the second servo data.

Description

[0001] This application claims the benefit of priority based on Japanese Patent Application No. 2024-043039 (filing date: March 19, 2024), the entire contents of which are incorporated herein by reference. Technical Field

[0002] An embodiment of the present invention relates to a magnetic disk device. Background Art

[0003] In the past, in a magnetic disk drive, the magnetic head was positioned by making the magnetic head read the servo data stored on the magnetic disk. When a read error of the servo data occurred in the magnetic head, the magnetic disk would sometimes rotate once and attempt a retry process of reading the servo data again from the same position, resulting in a waiting time. Summary of the Invention

[0004] An embodiment of the present invention provides a magnetic disk device capable of reducing the frequency of servo data read errors.

[0005] The magnetic disk device of the embodiment comprises: a magnetic disk having servo sectors on which first servo data is recorded; a magnetic head for writing and reading data from the magnetic disk; a first memory capable of storing data to be written and data read from the magnetic disk; a second memory for storing second servo data; and a controller for obtaining, from the second memory, the second servo data corresponding to the first servo data based on the first servo data read by the magnetic head when passing over the servo sectors, and for performing positioning control of the magnetic head using the first servo data and the second servo data. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 This is a schematic diagram showing an example of the configuration of the magnetic disk device according to the first embodiment.

[0007] Figure 2 This is a schematic diagram showing an example of the structure of the magnetic disk according to the first embodiment.

[0008] Figure 3 This is a block diagram showing an example of the configuration of the SoC according to the first embodiment.

[0009] Figure 4 This is a flowchart showing an example of the flow of servo data acquisition processing in the first embodiment.

[0010] Figure 5 This is a block diagram showing an example of the configuration of a SoC according to the second embodiment.

[0011] Figure 6 This is a flowchart showing an example of the flow of servo data acquisition processing in the second embodiment.

[0012] Description of Reference Numerals

[0013] 1a, 1b disk device, 2 host, 11 disk, 12 spindle motor, 15 actuator arm, 16 VCM, 21 SVC, 22 head, 23 preamplifier, 24 FROM, 25a, 25b DRAM, 26 NAND, 31a, 31b SoC, 32a, 32b NAND interface, 33 DRAM controller, 34 HDC, 35 RWC, 36 CPU, 41 servo track, SV servo sector. DETAILED DESCRIPTION

[0014] Hereinafter, the magnetic disk device according to the embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to these embodiments.

[0015] (Implementation Method 1)

[0016] Figure 1 This is a schematic diagram showing an example of the configuration of the magnetic disk device 1 a according to the first embodiment.

[0017] The magnetic disk device 1a is connected to a host computer 2. The magnetic disk device 1a can receive access commands from the host computer 2. The access commands are, for example, write commands and read commands.

[0018] The magnetic disk device 1a includes a magnetic disk 11 having a magnetic layer formed on its surface. The magnetic disk device 1a accesses the magnetic disk 11 in response to an access command. Access includes writing and reading data. Specifically, writing and reading data are performed by a magnetic head 22.

[0019] In addition to the magnetic disk 11, the magnetic disk device 1a also includes a spindle motor (SPM) 12, a ramp 13, an actuator arm 15, a voice coil motor (VCM) 16, a magnetic head 22, a preamplifier 23, a FROM (Flash Read Only Memory) 24, a DRAM (Dynamic Random Access Memory) 25, a NAND-type flash memory (hereinafter referred to as NAND) 26, and a SoC (System-On-a-Chip) 31a.

[0020] The magnetic disk 11 is rotated at a predetermined rotational speed by the SPM 12 coaxially mounted thereon.

[0021] The magnetic head 22 includes a write head 22w and a read head 22r, which write and read data to and from the magnetic disk 11. The magnetic head 22 is mounted on the top end of the actuator arm 15. The magnetic head 22 is moved in the radial direction of the magnetic disk 11 by the VCM 16. A plurality of either the write head 22w or the read head 22r, or both, may be provided on a single magnetic head 22.

[0022] When the magnetic disk 11 stops rotating, the magnetic head 22 is moved onto the ramp 13. The ramp 13 holds the magnetic head 22 at a position away from the magnetic disk 11.

[0023] The preamplifier 23 is an integrated circuit that controls the writing and reading of data performed by the magnetic head 22. During a read operation, the preamplifier 23 amplifies the signal read from the magnetic disk 11 by the magnetic head 22 and supplies it to the SoC 31a. During a write operation, the preamplifier 23 amplifies the signal corresponding to the data to be written supplied from the SoC 31a and supplies it to the magnetic head 22.

[0024] The FROM 24 stores a firmware program and various setting information. Alternatively, the firmware program may be stored in the magnetic disk 11 .

[0025] DRAM 25a is a volatile memory. DRAM 25a is used as a buffer for data sent and received between various components. It is also used as memory for operations based on SoC 31a. DRAM 25a is used as an area for loading firmware programs and temporarily storing various management data. DRAM 25a is an example of a first memory.

[0026] Servo data for positioning control to move the magnetic head 22 to a target position on the magnetic disk 11 is stored in the NAND 26. The servo data is stored in a distributed manner in the NAND 26 and the magnetic disk 11. Details of the servo data will be described later. The NAND 26 is an example of a second memory.

[0027] SoC31a is an integrated circuit that performs overall control of the magnetic disk device 1a. SoC31a controls each part according to the firmware program stored in FROM24 or the magnetic disk 11. Specifically, for example, SoC31a performs the following servo processing: obtaining servo data stored in NAND26 and the magnetic disk 11, and positioning the magnetic head 22 based on the obtained servo data. Servo processing includes the acquisition of servo data and processing related to positioning control of the magnetic head 22 based on the servo data. Positioning control is the control in which SoC31a estimates the current position of the magnetic head 22 based on the servo data and brings the magnetic head 22 close to the target position based on the estimated current position. Positioning control includes the control of the seek action to move the magnetic head 22 toward the target track and the control of the tracking action to maintain the magnetic head 22 on the target track. SoC31a is an example of a controller.

[0028] Figure 2 This is a schematic diagram showing an example of the configuration of the magnetic disk 11 according to the first embodiment. Furthermore, this figure shows an example of the rotational direction of the magnetic disk 11. The magnetic head 22 moves relative to the magnetic disk 11 as the magnetic disk 11 rotates. Therefore, the write / read direction, i.e., the direction along the circumference in which data is written or read by the magnetic head 22, is opposite to the rotational direction of the magnetic disk 11.

[0029] In the radial direction, the direction from the edge toward the center of the magnetic disk 11 is the inner peripheral direction, and the direction from the center toward the edge of the magnetic disk 11 is the outer peripheral direction.

[0030] During the manufacturing process, servo data for positioning the magnetic head 22 is written to the magnetic disk 11 by, for example, a servo writer or self-servo writing. Figure 2 As an example of the arrangement of servo areas in which servo data is written, a plurality of servo areas SV are depicted, which are arranged radially in the radial direction and at predetermined intervals in the circumferential direction. The area between two consecutive servo areas SV in the circumferential direction is used as a data area DA for data writing.

[0031] A plurality of concentric servo tracks 41 are provided in the radial direction of the magnetic disk 11. Hereinafter, the areas divided by the servo regions SV on the servo tracks 41 will be referred to as servo sectors SV.

[0032] The preamble, servo mark, Gray code, and burst pattern are recorded in this order along the write / read direction in the servo sector SV. The preamble, servo mark, Gray code, and burst pattern are examples of first servo data. Hereinafter, the preamble, servo mark, Gray code, and burst pattern may be collectively referred to as first servo data. The first servo data is read when the magnetic head 22 passes over the servo sector SV.

[0033] The preamble is pattern data of a single period that changes periodically in the circumferential direction.

[0034] The servo mark is pattern data for determining the read timing of the first servo data. The read timing of various servo data can be determined based on the detection timing of the servo mark.

[0035] The Gray code includes a cylinder address for identifying each servo track 41 provided on the magnetic disk 11 and a sector address for identifying each servo sector SV on the servo track 41 .

[0036] The burst pattern is pattern data used to detect the position of the magnetic head 22. The offset from the track center of a servo track 41 (more precisely, the servo track 41 indicated by the cylinder address) is called a burst offset.

[0037] Gray codes and burst patterns are used to calculate the positional deviation of the magnetic head 22 from the track center of the servo track 41. The estimated radial position of the magnetic head 22 can be calculated based on the cylinder address and the positional deviation obtained from each burst pattern.

[0038] Figure 3 : is a block diagram showing an example of the configuration of SoC31a according to the first embodiment. Figure 3 As shown, SoC31a has a servo controller (SVC) 21, a NAND interface 32a, a DRAM controller 33, a hard disk controller (HDC) 34, a read write channel (RWC) 35, a CPU (Central Processing Unit) 36, a bus 37, and a line cache controller 38.

[0039] Part or all of the operations of the components of the SoC 31 a described below can be realized by the CPU 36 executing a firmware program.

[0040] The NAND interface 32 a is connected to the NAND 26 .

[0041] NAND 26 stores a post-code. The post-code is an example of the second servo data. Hereinafter, the post-code may be referred to as the second servo data.

[0042] The post-code is data indicating the amount of RRO (Repeatable Runout) correction. More specifically, the post-code is data used to correct the positional deviation from the track center of the servo track 41, which is defined by the Gray code and burst pattern. The degree of this positional deviation varies synchronously with the rotation of the magnetic disk 11.

[0043] During the manufacturing process of the magnetic disk device 1a, the RRO is measured. Specifically, during the manufacturing process of the magnetic disk device 1a, the RRO is learned for each servo track 41, and the learned RRO value for each servo track 41 is stored as a postcode in the NAND 26. In other words, the postcode is configured to include the learned RRO value specified for each servo track 41. Addresses are assigned to the postcodes stored in the NAND 26.

[0044] When the magnetic head 22 is positioned and controlled during use of the magnetic disk device 1a, the first servo data read from the magnetic disk 11 and the second servo data read from the NAND 26 are used. Specifically, the estimated radial position of the magnetic head 22 calculated based on the cylinder address and the burst offset is corrected using the RRO correction value. In this way, the estimated radial position of the magnetic head 22 is corrected. The magnetic head 22 can be moved to the target data track based on the corrected estimated position.

[0045] Here, the technical significance of storing the second servo data in the NAND 26 in this embodiment will be described in comparison with a comparative example.

[0046] In the magnetic disk device of the comparative example, the second servo data is recorded on the magnetic disk. Specifically, in the magnetic disk device of the comparative example, the second servo data is recorded on the servo sectors of the magnetic disk in the order following the first servo data. The first and second servo data are read by the magnetic head as they pass over the servo sectors and are used for positioning control.

[0047] Magnetic disk drives sometimes experience disk read errors. For example, when a servo data read error occurs, a retry process occurs, where the disk rotates once and attempts to read the servo data again from the same location. This rotational wait degrades disk access performance. In the comparative magnetic disk drive, all servo data is recorded on the servo sector, so read errors occur quite frequently.

[0048] In contrast, in the magnetic disk device 1a of the first embodiment, the second servo data, which is part of the servo data, is stored in the NAND 26. This prevents at least read errors related to the second servo data. This reduces the frequency of read errors compared to the magnetic disk device of the comparative example, thereby improving disk access performance.

[0049] Furthermore, data other than the second servo data may be stored in the NAND 26. For example, when the power supplied from the host 2 is cut off due to a power outage or the like, the data stored in the DRAM 25a may be saved to the NAND 26.

[0050] The NAND interface 32a is an interface circuit that controls the operation of the NAND 26. For example, the NAND interface 32a reads the second servo data from the NAND 26 in accordance with a read request from the CPU 36, and transfers the read second servo data to the DRAM 25a.

[0051] Specifically, the NAND interface 32 a includes a register 321 a , a buffer memory 322 , a buffer memory management 323 a , and a DMA controller 324 .

[0052] The register 321 a holds the head address value of the second servo data to be read, the size of one track, and the address of the DRAM 25 a to which the second servo data is to be transferred.

[0053] The buffer memory 322 temporarily holds the second servo data read from the NAND 26 .

[0054] The buffer memory management 323a manages the buffer memory 322. When detecting that the second servo data to be read is held in the buffer memory 322, the buffer memory management 323a outputs a data transfer request to the DMA controller 324.

[0055] The DMA controller 324 obtains from the register 321a the leading address value of the second servo data, the size of the second servo data (one track), and the address of the DRAM 25a to which the second servo data is to be transferred. The DMA controller 324 executes a read request for the second servo data to the NAND 26. Furthermore, upon receiving a data transfer request from the buffer memory management 323a, the DMA controller 324 begins transferring the second servo data from the buffer memory 322 to the DRAM 25a. When the transfer of the second servo data is complete, the DMA controller 324 notifies the CPU 36 of the completion of the transfer.

[0056] The DRAM controller 33 is an interface circuit that controls the operation of the DRAM 25 a and performs read / write processing on the DRAM 25 a in accordance with a read request / write request from the CPU 36 .

[0057] The DRAM controller 33 includes an arbiter 331. When contention arises between accesses to the DRAM 25a from various components, the arbiter 331 arbitrates access rights to the DRAM 25a using a predetermined method, thereby controlling the order of access to the DRAM 25a.

[0058] The DRAM controller 33 is connected to the DRAM 25 a .

[0059] The DRAM 25 a includes a user data buffer 251 and a second servo data buffer 253 .

[0060] The user data buffer 251 is used as a buffer for data transmitted and received with the host 2. Specifically, the user data buffer 251 is configured to temporarily store data to be written and data read from the magnetic disk 11.

[0061] Furthermore, the second servo data buffer 253 is configured to temporarily store the second servo data transferred from the NAND 26 .

[0062] HDC34 communicates with host 2 (refer to Figure 1 ) and the control of data transmission and reception between DRAM25a, etc.

[0063] The RWC 35 modulates the data to be written supplied from the HDC 34 and transmits the modulated data to the preamplifier 23 (see Figure 1 ) is supplied. Furthermore, the RWC 35 demodulates the signal read from the magnetic disk 11 and supplied from the preamplifier 23 and outputs it as digital data to the HDC 34. Furthermore, the RWC 35 outputs the signal read from the magnetic disk 11 and supplied from the preamplifier 23 to the CPU 36 via the SVC 21. Specifically, for example, the RWC 35 receives the first servo data read from the magnetic disk 11 from the preamplifier 23 and outputs it to the CPU 36.

[0064] The HDC 34 and the RWC 35 are connected to the DRAM controller 33 so as to be communicable therewith using a communication protocol conforming to the SATA (Serial ATA) or SAS (Serial Attached SCSI) standards, for example.

[0065] The SVC 21 is an integrated circuit that functions as a driver for driving the SPM 12 and the VCM 16. The SVC 21 controls the rotation of the SPM 12 and the rotation of the VCM 16. The SCV 21 also outputs the first servo data and the like output from the RWC 35 to the CPU 36.

[0066] The CPU 36 controls the entire SoC 31a according to the firmware program. The CPU 36 includes a Tightly-Coupled Memory (TCM) 361, which serves as a dedicated storage area. The CPU 36 can access various commands and data stored in the TCM 361. For example, the CPU 36 controls the positioning of the magnetic head 22 using first servo data read from the magnetic disk 11 and stored in the TCM 361 via the RWC 35, and second servo data read from the NAND 26 and stored in the TCM 361 via the DRAM 25a.

[0067] The CPU 36 is communicatively connected to each unit via a bus 37 using a communication protocol such as AXI (Advanced eXtensible Interface).

[0068] The line buffer controller 38 is provided between the bus 37 and the DRAM controller 33. The line buffer controller 38 has a line buffer function for temporarily storing addresses corresponding to various commands from the CPU 36 to the DRAM 25a, such as reading servo data. The servo data read from the DRAM 25a is transmitted to the TCM 361 via the line buffer controller 38 and the bus 37.

[0069] also, Figure 3 The structure of SoC31a shown is an example, and it is also possible to set it as not including Figure 3 For example, the SoC 31a may include a DMA controller (not shown) between the DRAM controller 33 and the CPU 36, and the DMA controller (not shown) may read the second servo data from the DRAM 25a instead of the CPU 36.

[0070] Next, use Figure 4 The flow of the servo data acquisition process in Embodiment 1 will be described. The servo data acquisition process is performed as part of the servo process.

[0071] Figure 4 This is a flowchart showing an example of the flow of servo data acquisition processing in the first embodiment.

[0072] Before the processing of step 11, the magnetic head 22 begins a seek operation. As described above, servo sectors SV are arranged at predetermined intervals in the circumferential direction of the magnetic disk 11. When the magnetic head 22 passes over a servo sector SV, it reads the first servo data recorded in that servo sector SV. The read first servo data is stored in the TCM 361 of the CPU 36 via the RWC 35 and the SVC 21.

[0073] The CPU 36 obtains the first servo data from the TCM 361 (step S11 ).

[0074] In the processing after the next step S12 , the CPU 36 acquires the second servo data corresponding to the first servo data from the NAND 26 based on the first servo data.

[0075] Specifically, the CPU 36 identifies the servo track 41 to be corrected for the RRO based on the first servo data (step S12 ). More specifically, the CPU 36 identifies the servo track 41 to be corrected based on the Gray code.

[0076] Furthermore, the servo track 41 may be determined, for example, at the timing of command reordering of access commands received from the host 2 .

[0077] The CPU 36 specifies the head address value, the size of one track, and the address of the DRAM 25a to be transferred of the second servo data corresponding to the servo track 41 to be corrected, to the register 321a of the NAND interface 32a (step S13).

[0078] The CPU 36 activates the DMA controller 324 (step S14 ).

[0079] The DMA controller 324 issues a read request to the NAND 26 for the second servo data (step S15 ).

[0080] The buffer memory 322 temporarily holds the read second servo data (step S16 ).

[0081] When detecting that the second servo data to be read is held in the buffer memory 322 , the buffer memory management 323 a outputs a data transfer request to the DMA controller 324 (step S17 ).

[0082] When receiving the data transfer request, the DMA controller 324 transfers the second servo data from the buffer memory 322 to the DRAM 25a (step S18). When the transfer of the second servo data is completed, the DMA controller 324 notifies the CPU 36 of the completion of the transfer.

[0083] The CPU 36 receives the notification of the transfer completion and detects the interruption to the DRAM 25a (step S19). The CPU 36 uses the line buffer function to issue a read request to the DRAM 25a (step S20). As a result, the second servo data read from the DRAM 25a is transferred to the TCM 361 (step S21). The CPU 36 obtains the second servo data (step S22).

[0084] The above-described processing completes the servo data acquisition processing of Embodiment 1. The CPU 36 performs positioning control of the magnetic head 22 using the acquired first servo data and second servo data.

[0085] (Summary)

[0086] The magnetic disk device 1a of the first embodiment includes a magnetic disk 11 that stores first servo data in servo sectors SV, a NAND 26 that stores second servo data, a magnetic head 22 that writes and reads data from the magnetic disk 11, a DRAM 25a that can store data to be written and data read from the magnetic disk, and an SoC 31a. When the magnetic head 22 passes over the servo sector SV, the SoC 31a reads the first servo data and obtains second servo data corresponding to the first servo data from the NAND 26. The SoC 31a performs positioning control of the magnetic head 22 using the first and second servo data.

[0087] By storing the second servo data in the NAND 26, the SoC 31a can obtain the second servo data without accessing the magnetic disk 11. This reduces the amount of servo data read from the magnetic disk 11, thereby reducing the frequency of read errors. As a result, stable servo processing can be achieved.

[0088] (Implementation Method 2)

[0089] Below, use Figure 5 The magnetic disk device 1b of the second embodiment will be described. The magnetic disk device 1a of the first embodiment performs servo processing by causing the DRAM 25a to store the second servo data read from the NAND 26 and transferring the second servo data from the DRAM 25a to the TCM 361. The magnetic disk device 1b of the second embodiment differs from the first embodiment in that the second servo data read from the NAND 26 is transferred directly to the TCM 361 without passing through the DRAM.

[0090] Figure 5 This is a block diagram showing an example of the configuration of the SoC 31b according to Embodiment 2. In the following, when a configuration and function are the same as those of the above-described Embodiment 1, their description may be omitted.

[0091] like Figure 5 As shown, in the SoC 31b of the second embodiment, the DRAM 25b does not have a second servo data buffer. As described above, the user data buffer 251 stores data to be read / written.

[0092] The NAND interface 32 b performs a read process of the second servo data on the NAND 26 , and transfers the read second servo data to the TCM 361 without passing through the DRAM 25 a .

[0093] Specifically, the register 321 b of the NAND interface 32 b holds the head address value of the second servo data to be read, the size of one track, and the address of the TCM 361 to which the second servo data is to be transferred.

[0094] Upon detecting that the second servo data to be read is held in the buffer memory 322 , the buffer memory management 323 b outputs a data transfer request to the DMA controller 324 .

[0095] The DMA controller 324 obtains from the register 321b the leading address value of the second servo data, the size of the second servo data (one track), and the address of the TCM 361 to which the second servo data is to be transferred. The DMA controller 324 executes a read request for the second servo data to the NAND 26. Furthermore, upon receiving a data transfer request from the buffer memory management 323b, the DMA controller 324 begins transferring the second servo data from the buffer memory 322 to the TCM 361. When the transfer of the second servo data is complete, the DMA controller 324 notifies the CPU 36 of the completion of the transfer.

[0096] Next, use Figure 6 The flow of the servo data acquisition process in the second embodiment will be described.

[0097] Figure 6 This is a flowchart showing an example of the flow of servo data acquisition processing in the second embodiment.

[0098] Before the process of step 31 , the magnetic head 22 starts a seek operation. The first servo data read by the magnetic head 22 is stored in the TCM 361 of the CPU 36 .

[0099] The CPU 36 obtains the first servo data from the TCM 361 (step S31 ).

[0100] In the processing after the next step S22 , the CPU 36 acquires the second servo data corresponding to the first servo data from the NAND 26 based on the first servo data.

[0101] Specifically, the CPU 36 specifies the servo track 41 to be corrected for the RRO based on the first servo data (step S32 ).

[0102] The CPU 36 specifies the head address value, the size of one track, and the address of the TCM 361 as the storage destination of the second servo data corresponding to the servo track 41 to be corrected to the register 321 a of the NAND interface 32 a (step S33 ).

[0103] The following steps S34 to S37 are processed in the same manner as Figure 4 Since the processing corresponds to the processing of steps S14 to S17, its description is omitted.

[0104] Following step S37, upon receiving a data transfer request from the buffer memory management 323b, the DMA controller 324 transfers the second servo data from the buffer memory 322 to the TCM 361 without passing through the DRAM 25b (step S38). Upon completion of the transfer of the second servo data, the DMA controller 324 notifies the CPU 36 of the transfer completion.

[0105] The CPU 36 receives the notification of the end of the transfer and detects the interruption to the TCM 361 (step S39). The CPU 36 obtains the second servo data (step S40).

[0106] The above-described processing completes the servo data acquisition processing of Embodiment 2. The CPU 36 performs positioning control of the magnetic head 22 using the acquired first servo data and second servo data.

[0107] (Summary)

[0108] When multiple modules access the DRAM, read / write processing latency may occur. Furthermore, DRAM itself has latency as a characteristic. Therefore, when accesses to the DRAM for acquiring servo data overlap with accesses for normal operations other than acquiring servo data, the servo processing speed may decrease.

[0109] The magnetic disk device 1b of the second embodiment obtains the second servo data read from the NAND 26 without passing through the DRAM 25b and uses it for positioning control of the magnetic head 22. This avoids the occurrence of waiting time in the DRAM 25b, thereby enabling high-speed servo processing.

[0110] (Other Embodiments)

[0111] In the above embodiment, the second servo data is described as being stored in the NAND 26 . However, the storage location of the second servo data is not limited to the NAND 26 , and the second servo data may be stored in other nonvolatile memories.

[0112] In the above embodiment, the magnetic disk device may be provided with a cache memory such as SRAM (Static Random Access Memory). For example, if the storage capacity of the TCM 361 is insufficient, the SRAM may be used as a secondary cache memory.

[0113] While the embodiments of the present invention have been described above, the embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their variations are included within the scope and gist of the invention, and are included in the invention described in the claims and their equivalents.

Claims

1. A magnetic disk device comprising: The magnetic disk has a servo sector on which first servo data is recorded; A magnetic head for writing and reading data from the magnetic disk; a first memory capable of storing data to be written and data read from the magnetic disk; a second memory storing second servo data; and The controller obtains the second servo data corresponding to the first servo data from the second memory based on the first servo data read by the magnetic head when passing over the servo sector, and performs positioning control of the magnetic head using the first servo data and the second servo data.

2. The magnetic disk device according to claim 1, the controller, storing the second servo data obtained from the second memory in the first memory, Positioning control of the magnetic head is performed using the first servo data and the second servo data stored in the first memory.

3. The magnetic disk device according to claim 1, The controller acquires the second servo data from the second memory without passing through the first memory to perform positioning control of the magnetic head.

4. The magnetic disk device according to claim 3, the controller, An interface circuit for controlling the operation of the second memory, causing the interface circuit to read the second servo data, The second servo data is acquired from the interface circuit without passing through the first memory.

5. The magnetic disk device according to claim 1, The second servo data is data indicating the correction amount of the RRO.

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