Software-defined two-dimensional splicing array surface beam control method and system

Through the software-defined two-dimensional splicing array beam control method, the client computer and communication network are used to transmit the wave control code configuration table, which solves the problems of difficult iteration, long maintenance, high customization and inflexible design of modular array beam control systems, and achieves rapid response and simplified maintenance.

CN120675595APending Publication Date: 2025-09-19SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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Patent Information

Application Number
CN202510869383.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-26
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

In the existing technology, the beam control method of the modular arbitrarily splicable array wave control system has problems such as difficult update and iteration, long maintenance cycle, high degree of customization, inflexible design, and many computing nodes.

Method used

By modifying the beam control code configuration table of the client computer and using the communication network to transmit the beam control code configuration table to controllers at all levels, the array antenna beam control function can be quickly updated and iterated. This includes the connection between the client computer, the first-level beam routing controller FPGA, the beam control interface board FPGA, the modular sub-array controller FPGA, and the RF front-end delay device components, and adopts a software-defined two-dimensional splicing array beam control method.

Benefits of technology

It achieves fast response and simple update of array beam control, reduces system maintenance cycle, improves design flexibility and R&D efficiency, and reduces dependence on FPGA.

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Abstract

The invention discloses a software-defined two-dimensional splicing array surface wave beam control method and system, and belongs to the field of phased array wave beam control, and the method comprises the steps: modifying the data of a wave control code memory in a manner of modifying a wave control code configuration table of a client computer for a wave control system of a modular arbitrary splicable array antenna, the method is used for realizing rapid updating iteration of an array antenna beam control function. According to the method, the problems of difficulty in wave control updating iteration, long maintenance period, high customization degree, inflexible design and multiple computational nodes caused by complex design of a modular arbitrary splicable array plane are solved.
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Description

Technical Field

[0001] The present invention relates to the field of phased array beam control, and more specifically, to a software-defined two-dimensional spliced ​​array beam control method and system. Background Art

[0002] Ultra-wideband, large-aperture array antenna technology, with its wide coverage, strong reception capability, wide operating frequency bandwidth, high signal transmission quality, and precise beam pointing, can meet the needs of integrated multifunctional designs for communications, radar, electronic warfare, remote sensing, and electronic countermeasures. However, its disadvantage is its large array size and the need to stitch together multiple subarrays, which complicates beam control.

[0003] Existing technologies involving broadband phased array design and large-scale array beam control methods, such as the broadband two-dimensional active time-controlled array with two-stage delay proposed in Publication No. CN114336055A and the dynamic optimal allocation algorithm for control codes of a broadband active phased array multi-stage delay device proposed in Publication No. CN118869024A, all aim to solve the problems of complex wave control code solution, poor beam pointing accuracy, and long beam switching time caused by the delay of the RF circuit by using a multi-stage wave control layered calculation method. For example, the existing solution has a modular ultra-wideband large-aperture phased array antenna integration design method with a brick-and-tile blind-plug hybrid structure. It can be spliced ​​and restored from any direction up, down, left, and right to form a large array, achieving a lightweight and low-profile design. It can meet the problem of redesigning the array due to changes in user needs and changes in array scale, but the entire beam control link is still implemented using a multi-stage wave control layered calculation method.

[0004] The beam steering method, which uses multi-level beam control and hierarchical calculation, requires that each beam control chip participate in the calculation and control. The multi-level beam control cascade utilizes a control interface such as optical, Ethernet, serial, or other bus interfaces. Due to the large array size, the beam control chip is typically implemented using an FPGA. However, these chips are difficult to update and iterate, have long maintenance cycles, require a high degree of customization, have an inflexible design, and require numerous computing nodes. If user requirements change and the array size changes, it will require significant time and labor to update and iterate the beam control chip (FPGA) at each level. Summary of the Invention

[0005] The purpose of the present invention is to overcome the shortcomings of the existing technology and provide a software-defined two-dimensional splicing array beam control method and system based on the beam control system of modular arbitrarily splicing array antennas to solve the problems of difficult wave control update iteration, long maintenance cycle, high degree of customization, inflexible design and many computing nodes caused by the complex design of modular arbitrarily splicing array antennas.

[0006] The object of the present invention is achieved through the following solutions: A software-defined two-dimensional splicing array beam control method comprises the following steps: The beam control system for modular arbitrarily splicable array antennas modifies the beam control code memory data by modifying the client computer's beam control code configuration table to achieve rapid update and iteration of the array antenna beam control function.

[0007] Furthermore, the method of modifying the wave control code memory data by modifying the wave control code configuration table of the client computer specifically includes the following sub-steps: S1, the client computer calculates the wave control code configuration table according to the array size; S2, the client computer uses the communication network to send the beam control code configuration table to the first-level beam routing controller FPGA; S3, the first-level beam routing controller FPGA uses the communication network to forward the beam control code configuration table to the beam control interface board FPGA; S4, the FPGA of the wave control interface board uses the communication network to forward the wave control code configuration table to the modular sub-array controller FPGA and stores it in the internal storage FLASH; S5, the client computer sends beam control information to the first-level beam controller FPGA through the communication network; S6, the first-level beam controller FPGA forwards the beam control information to the beam control interface board FPGA through the communication network; In step S7, the beam control interface board FPGA forwards the beam control information to the modular sub-array controller FPGA through the communication network. The FPGA queries the internal storage FLASH, indexes the beam control code corresponding to the current beam control information, and converts it into SPI format configuration information. The information is then sent to the RF front-end delay component to implement beam control.

[0008] Furthermore, in step S1, the calculation of the wave control code configuration table specifically includes the following sub-steps: The wave control code configuration table is divided into a three-layer structure, namely the physical address layer, the angle address layer, and the wave control code layer. The physical address and angle address are generated according to the array arrangement, azimuth angle, and pitch angle respectively. The phase delay value is calculated according to the azimuth angle and pitch angle, and quantized according to the minimum step of the delay device to obtain the phase delay value wave control code. Finally, the physical address, angle address, and wave control code are combined in order to generate the total wave control code configuration table.

[0009] Furthermore, in step S1, before the wave control code configuration table is calculated, the following steps are included: Divide the array into modular sub-arrays, each sub-array has a channel number of , then the total number of array elements is ;in, Indicates the number of sub-arrays in each row of the array. Indicates the number of sub-arrays in each column of the array, represents the number of elements in each row of the modular sub-array, Indicates the number of elements in each column of the modular sub-array.

[0010] Furthermore, in step S1, the client computer calculates the wave control code configuration table according to the array size, which specifically includes the following sub-steps: S1.1: Generate physical address code: Using the perspective of observing from the back of the array in the direction of radiation toward the array, with the center of the array as the coordinate zero point, determine the coordinates of each modular sub-array, convert the corresponding decimal value into binary, and then perform bit width splicing; S1.2: Generate angle address code: and pitch angle Step by angle Mapped to 、 , the mapping relationship is: ; S1.3: Calculate the phase delay value of the wave control code: The phase delay of each array element is synthesized by the azimuth dimension delay and the pitch dimension delay. The calculation formula is: , in, is the array element spacing, The azimuth is , the pitch angle is , the first Column, No. Delay value of row array element; S1.4: Generate wave control code configuration table: When assembling the wave control code configuration table, divide the table into Pages , according to the angle address, each page Divide indivual , each block Fill in the array element position in sequence A delay value wave control code.

[0011] Furthermore, the communication network includes Ethernet.

[0012] Furthermore, in step S1.1, the generating of the physical address code further includes the following sub-steps: Let the horizontal axis be , the vertical axis is , the physical address is ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the physical address after coordinate splicing is .

[0013] Furthermore, in step S1.2, the generating of the angle address code further includes the following sub-steps: Convert the corresponding decimal value into binary number, and then perform bit width splicing; let the angle address code be ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the angle address after coordinate splicing is .

[0014] Furthermore, in step S1.3, the calculation of the phase delay value wave control code further includes the following sub-steps: The delay value is quantized according to the minimum step of the RF front-end delay component and converted into a binary number. The quantization formula is: ; in, is the minimum step of the delay device, The azimuth is , the pitch angle is , the first Column, No. The delay value of the row array element is the wave control code.

[0015] A software-defined two-dimensional splicing array beam control system includes: a client computer, a first-level beam routing controller FPGA, a beam control interface board FPGA, a modular sub-array controller FPGA, a FLASH, and a radio frequency front-end delay component connected in sequence; a connection between the client computer and the first-level beam routing controller FPGA; a connection between the first-level beam routing controller FPGA and the beam control interface board FPGA. When the array needs to be spliced ​​in the horizontal dimension, more beam control interface board FPGAs are connected via network cables; a connection between the beam control interface board FPGA and the modular sub-array controller FPGA. When the array needs to be spliced ​​in the vertical dimension, more modular sub-array controller FPGAs are connected; and each modular sub-array controller FPGA is connected to the FLASH and radio frequency front-end delay component. The control information and beam control code configuration table output by the client computer are sent to the first-level beam routing controller FPGA. The first-level beam routing controller FPGA forwards it to all lower-level beam control interface board FPGAs. The beam control interface board FPGA forwards it to the modular sub-array FPGA via the network cable. The modular sub-array FPGA stores the configuration table in FLASH, and reads it as required after receiving the control information, and sends the corresponding beam control code to the RF front-end component to configure the antenna array.

[0016] The beneficial effects of the present invention include: (1) Two-dimensional splicing: In the control system described in the present invention, the wave control interface board and the modular sub-array controller are responsible for the array expansion in the horizontal and vertical dimensions respectively, providing a basis for the development of standardized control programs for the system. Therefore, after the array surface is changed in any dimension, no additional program development is required. Only the wave control interface board or the modular sub-array controller needs to be added.

[0017] (2) Fast beam response: The present invention implements beam control by using a control instruction index to query a beam control configuration table, which saves real-time calculation time and thus enables fast beam response.

[0018] (3) Simple update and iteration: The present invention transfers complex calculations to the client computer for implementation. When there are changes in requirements such as scanning range and array size, the wave control code configuration table can be quickly regenerated and configured online through the network without the need for additional FPGA program development.

[0019] (4) Simple system: The client computer, the first-level beam routing controller, the beam control interface board and the modular sub-array controller included in the control system of the present invention are relatively independent, and the control programs of the controllers are not tightly coupled.

[0020] (5) Short maintenance cycle: Due to the independence of the system, the standard design of the program, and the forward shift of complex calculations, the present invention simplifies the update of the array wave control code and system maintenance.

[0021] (6) Correction function: The wave control code configuration table generated by the present invention can make a wave control code offset according to the phase consistency condition of the entire array, thereby realizing the correction function synchronously. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1This is a schematic structural diagram of a software-defined two-dimensional splicing array beam control system according to the present invention; Figure 2 Schematic diagram of the steps of a beam steering method according to an embodiment of the present invention; Figure 3 Schematic diagram of the array composition according to an embodiment of the present invention; Figure 4 This is an example diagram of a wave control code configuration table file according to an embodiment of the present invention. DETAILED DESCRIPTION

[0024] All features disclosed in all embodiments in this specification, or steps in all methods or processes implicitly disclosed, except for mutually exclusive features and / or steps, can be combined and / or expanded or replaced in any manner.

[0025] In an embodiment of the present invention, a software-defined two-dimensional splicing array beam control method is proposed, comprising the steps of: modifying the beam control code memory data by modifying the client computer beam control code configuration table without modifying the FPGA code, thereby achieving rapid update and iteration of the array antenna beam control function, thereby solving problems such as difficult beam control update and iteration, long maintenance cycle, high degree of customization, inflexible design, and large number of computing nodes, and greatly improving R&D efficiency.

[0026] In other embodiments of the present invention, a software-defined two-dimensional splicing array beam control system is provided, comprising: a client computer, a primary beam routing controller FPGA, a beam control interface board FPGA, a modular sub-array controller FPGA, FLASH, and a radio frequency front-end delay component connected in sequence. Figure 1 As shown, this control system uses FPGA and FLASH to implement antenna array control. The beam control interface board and antenna subarray can be arbitrarily expanded via network cables, achieving two-dimensional splicing. The control signal flow relationship is as follows: the control information and beam control code configuration table output by the client computer are sent to the first-level beam routing controller FPGA via the network cable. The first-level beam routing controller FPGA forwards it to all lower-level beam control interface board FPGAs via the network cable. The beam control interface board FPGA forwards it to the modular subarray FPGA via the network cable. The modular subarray FPGA stores the configuration table in FLASH via the SPI bus. After receiving the control information, it reads it out via the SPI bus as required and sends the corresponding beam control code to the RF front-end component via the SPI bus to configure the antenna array.

[0027] In other embodiments of the present invention, a software-defined two-dimensional splicing array beam control method is provided, such as Figure 2 As shown, the specific steps include: Setp1: The client computer calculates the wave control code configuration table using the wave control code calculation formula according to the array size; Step 2: The client computer uses Ethernet to send the beam control code configuration table to the first-level beam routing controller FPGA; Step 3: The first-level beam routing controller FPGA uses Ethernet to forward the beam control code configuration table to the beam control interface board FPGA; Step 4: The FPGA on the wave control interface board uses Ethernet to forward the wave control code configuration table to the modular subarray controller FPGA and stores it in the internal FLASH. Step 5: The client computer sends beam control information to the first-level beam controller FPGA via Ethernet; Step 6: The primary beam controller FPGA forwards the beam control information to the beam control interface board FPGA via Ethernet. Step 7: The beam control interface board FPGA forwards the beam control information to the modular sub-array controller FPGA via Ethernet. The FPGA queries the internal FLASH, indexes the beam control code corresponding to the current beam control information, converts it into SPI format configuration information, and sends it to the RF front-end delay component to implement beam control.

[0028] In step Setp1, the wave control code configuration table is divided into a three-layer structure, namely the physical address layer, the angle address layer, and the wave control code layer, and the physical address and angle address are generated according to the array arrangement, azimuth angle, and pitch angle respectively. Then, the phase delay value is calculated according to the azimuth angle and pitch angle, and quantized according to the minimum step of the delay device to obtain the phase delay value wave control code. Finally, the physical address, angle address, and wave control code are combined in order to generate the total wave control code configuration table.

[0029] In step Setp1, if Figure 3 As shown, the array is divided into modular sub-arrays, each sub-array has a channel number of The total number of array elements is ;in Indicates the number of sub-arrays in each row of the array. Indicates the number of sub-arrays in each column of the array, represents the number of elements in each row of the modular sub-array, Indicates the number of elements in each column of the modular sub-array.

[0030] In further implementation, step 1 includes the following steps: Step 1.1: Generate physical address code: Take the direction of radiation from the back of the array as the viewing angle, and the center of the array as the coordinate zero point, determine the coordinates of each modular sub-array, and convert the corresponding decimal value into binary number, and then perform bit width splicing. In this embodiment, there are 9 sub-arrays, and the horizontal coordinate is , the vertical axis is , the physical address is ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the physical address after coordinate splicing is ,For example: , , , ; Step 1.2: Generate angle address code: In this embodiment, the azimuth and pitch angle Step by angle Mapped to 、 , the mapping relationship is: , In further implementation, the corresponding decimal value is converted into a binary number, and then the bit width is spliced. Assume that the angle address code is ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the angle address after coordinate splicing is For example, the azimuth , pitch angle When , the angle address is ; Step 1.3: Calculate the phase delay value of the wave control code: The phase delay of each array element is composed of the azimuth dimension delay and the pitch dimension delay. The calculation formula is: , in, is the array element spacing, The azimuth is , the pitch angle is , the first Column, No. The delay value of the row element.

[0031] In further implementation, the delay value is quantized according to the minimum step of the RF front-end delay component and converted into a binary number. The quantization formula is: , in, is the minimum step of the delay device, The azimuth is , the pitch angle is , the first Column, No. Delay value wave control code of row array element; In this embodiment, the array element spacing , the minimum step of the delay device , azimuth , pitch angle , the delay value wave control code of the 12th column and 9th row of the array is ; Step 1.4: Generate wave control code configuration table: Figure 4 As shown, in this embodiment, when combining the wave control code configuration table, the table is divided into 4 in total , according to the angle address, each Divide A total of 441 , each Fill in the array element position in sequence There are 48 delay value wave control codes in total.

[0032] The above steps can realize antenna array beam control.

[0033] In summary, the technical solution of the present invention can be well implemented.

[0034] The units involved in the embodiments of the present invention may be implemented in software or hardware, and the units described may also be provided in a processor. In some cases, the names of these units do not limit the units themselves.

[0035] According to one aspect of an embodiment of the present invention, a computer program product or computer program is provided, comprising computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the methods provided in the various optional implementations described above.

[0036] As another aspect, embodiments of the present invention further provide a computer-readable medium, which may be included in the electronic device described in the above embodiments, or may exist independently and not incorporated into the electronic device. The computer-readable medium carries one or more programs, and when executed by the electronic device, the electronic device implements the methods described in the above embodiments.

Claims

1. A software-defined two-dimensional splicing array beam steering method, characterized in that: The steps include: The beam control system for modular arbitrarily splicable array antennas modifies the beam control code memory data by modifying the client computer's beam control code configuration table to achieve rapid update and iteration of the array antenna beam control function.

2. The software-defined two-dimensional splicing array beam control method according to claim 1, characterized in that: The method of modifying the wave control code memory data by modifying the wave control code configuration table of the client computer specifically includes the following sub-steps: S1, the client computer calculates the wave control code configuration table according to the array size; S2, the client computer uses the communication network to send the beam control code configuration table to the first-level beam routing controller FPGA; S3, the first-level beam routing controller FPGA uses the communication network to forward the beam control code configuration table to the beam control interface board FPGA; S4, the FPGA of the wave control interface board uses the communication network to forward the wave control code configuration table to the modular sub-array controller FPGA and stores it in the internal storage FLASH; S5, the client computer sends beam control information to the first-level beam controller FPGA through the communication network; S6, the first-level beam controller FPGA forwards the beam control information to the beam control interface board FPGA through the communication network; In step S7, the beam control interface board FPGA forwards the beam control information to the modular sub-array controller FPGA through the communication network. The FPGA queries the internal storage FLASH, indexes the beam control code corresponding to the current beam control information, and converts it into SPI format configuration information. The information is then sent to the RF front-end delay component to implement beam control.

3. The software-defined two-dimensional stitching array beam control method according to claim 2, characterized in that: In step S1, the calculation of the wave control code configuration table specifically includes the following sub-steps: The wave control code configuration table is divided into a three-layer structure, namely the physical address layer, the angle address layer, and the wave control code layer. The physical address and angle address are generated according to the array arrangement, azimuth angle, and pitch angle respectively. The phase delay value is calculated according to the azimuth angle and pitch angle, and quantized according to the minimum step of the delay device to obtain the phase delay value wave control code. Finally, the physical address, angle address, and wave control code are combined in order to generate the total wave control code configuration table.

4. The software-defined two-dimensional splicing array beam control method according to claim 2, characterized in that: In step S1, before the wave control code configuration table is calculated, the following steps are included: Divide the array into modular sub-arrays, each sub-array has a channel number of , then the total number of array elements is ;in, Indicates the number of sub-arrays in each row of the array. Indicates the number of sub-arrays in each column of the array, represents the number of elements in each row of the modular sub-array, Indicates the number of elements in each column of the modular sub-array.

5. The software-defined two-dimensional splicing array beam control method according to claim 2, characterized in that: In step S1, the client computer calculates the wave control code configuration table according to the array size, which specifically includes the following sub-steps: S1.1: Generate physical address code: Using the perspective of observing from the back of the array in the direction of radiation toward the array, with the center of the array as the coordinate zero point, determine the coordinates of each modular sub-array, convert the corresponding decimal value into binary, and then perform bit width splicing; S1.2: Generate angle address code: and pitch angle Step by angle Mapped to 、 , the mapping relationship is: , S1.3: Calculate the phase delay value of the wave control code: The phase delay of each array element is synthesized by the azimuth dimension delay and the pitch dimension delay. The calculation formula is: , in, is the array element spacing, The azimuth is , the pitch angle is , the first Column, No. Delay value of row array element; S1.4: Generate wave control code configuration table: When assembling the wave control code configuration table, divide the table into Pages , according to the angle address, each page Divide indivual , each block Fill in the array element position in sequence A delay value wave control code.

6. The software-defined two-dimensional splicing array beam control method according to claim 2, characterized in that: The communication network includes Ethernet.

7. The software-defined two-dimensional stitching array beam control method according to claim 5, characterized in that: In step S1.1, the generation of the physical address code further includes the following sub-steps: Let the horizontal axis be , the vertical axis is , the physical address is ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the physical address after coordinate splicing is .

8. The software-defined two-dimensional splicing array beam control method according to claim 5, characterized in that: In step S1.2, the generation of the angle address code further includes the following sub-steps: Convert the corresponding decimal value into binary number, and then perform bit width splicing; let the angle address code be ,Will 、 According to the corresponding decimal values ​​converted to binary numbers are 、 , the angle address after coordinate splicing is .

9. The software-defined two-dimensional splicing array beam control method according to claim 5, characterized in that: In step S1.3, the calculation of the phase delay value wave control code further includes the following sub-steps: The delay value is quantized according to the minimum step of the RF front-end delay component and converted into a binary number. The quantization formula is: ; in, is the minimum step of the delay device, The azimuth is , the pitch angle is , the first Column, No. The delay value of the row array element is the wave control code.

10. A software-defined two-dimensional splicing array beam control system, characterized in that: include: The client computer, the first-level beam routing controller FPGA, the beam control interface board FPGA, the modular sub-array controller FPGA, the FLASH, and the RF front-end delay device components are connected in sequence; the client computer is connected to the first-level beam routing controller FPGA; the first-level beam routing controller FPGA is connected to the beam control interface board FPGA. When the array needs to be spliced ​​in the horizontal dimension, more beam control interface board FPGAs are connected via network cables; the beam control interface board FPGA is connected to the modular sub-array controller FPGA. When the array needs to be spliced ​​in the vertical dimension, more modular sub-array controller FPGAs are connected; each modular sub-array controller FPGA is connected to the FLASH and the RF front-end delay device components; The control information and beam control code configuration table output by the client computer are sent to the first-level beam routing controller FPGA. The first-level beam routing controller FPGA forwards it to all lower-level beam control interface board FPGAs. The beam control interface board FPGA forwards it to the modular sub-array FPGA via the network cable. The modular sub-array FPGA stores the configuration table in FLASH, and reads it as required after receiving the control information, and sends the corresponding beam control code to the RF front-end component to configure the antenna array.

Citation Information

Patent Citations

  • Broadband two-dimensional active time control array based on two-stage time delay

    CN114336055A

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