F-doped SiOx CBRAM device and preparation method thereof

Abstract

The invention discloses an F-doped SiOx CBRAM device and a preparation method thereof.The CBRAM device is internally provided with a bottom electrode, a resistive layer and a top electrode, the resistive layer is located on the surface of one side of the bottom electrode, and the top electrode is located on the surface of the side, away from the bottom electrode, of the resistive layer; wherein the resistive layer is made of fluorine-containing silicon oxide. The preparation method comprises the following steps: providing a bottom electrode; preparing a resistive layer on the surface of the bottom electrode; preparing a top electrode on the surface of one side, far away from the bottom electrode, of the resistive layer; wherein the material of the resistive layer is fluorine-containing silicon oxide, and F-doped SiOx is adopted to replace traditional SiOx to prepare a CBRAM, so that the resistance distribution of high and low resistance states is more concentrated, and the stability of the device performance is further improved.

Description

Technical Field

[0001] The present invention relates to the field of information storage technology, in particular to a F-doped SiO x CBRAM device and preparation method thereof. Background Art

[0002] It's important to note that the rapid development of computer technology, the internet, and new, popular electronic products has led to a rapidly increasing demand for electronic information storage and processing products, creating an urgent need for breakthroughs in memory materials and technologies. Flash-based non-volatile memory is widely used in daily life due to its high read / write capacity and non-volatility. However, as device sizes continue to shrink, the physical limitations of flash memory remain difficult to overcome.

[0003] New non-volatile memory devices are attracting widespread attention due to their superior performance, simple structure, CMOS compatibility, and ability to meet the demands of high-density storage. RRAM (resistive random access memory), which has attracted considerable attention as a next-generation non-volatile memory, is poised to become a core memory. RRAM offers advantages such as simple fabrication, fast erase and write speeds, and high storage density. Its speed rivals that of SRAM (static random access memory) and its cost is comparable to that of NAND flash memory.

[0004] CBRAM (Conductive Bridging Random Access Memory), a type of RRAM, typically has a sandwich structure, with an active electrode, typically Cu or Ag, at one end and an inert electrode, such as Pt or TiN, at the other. The middle switching layer is a solid electrolyte, typically an oxide or sulfide. The switching mechanism of CBRAM is generally believed to be that metal oxide ions from the active electrode migrate through the middle resistive switching layer, forming a conductive bridge connecting the top and bottom electrodes. Under the influence of an electric field, the conductive bridge forms and breaks, causing the device to switch between resistive states. However, most materials used in CBRAM devices lack full compatibility with CMOS manufacturing technology. Summary of the Invention

[0005] The purpose of the present invention is to provide a F-doped SiO x A CBRAM device and a preparation method thereof are provided to solve the problem in the prior art that it is difficult to improve the stability of device performance.

[0006] In order to solve the above technical problems, the present invention provides a F-doped SiO x A method for preparing a CBRAM device comprises the following steps:

[0007] providing a bottom electrode;

[0008] preparing a resistive switching layer on the surface of the bottom electrode;

[0009] A top electrode is formed on a surface of the resistive layer away from the bottom electrode;

[0010] Wherein, the material of the resistive switching layer is fluorine-containing silicon oxide.

[0011] In one embodiment, the preparing the resistive switching layer on the surface of the bottom electrode includes: using silicon oxide and fluorine-containing silicon oxide as targets, and depositing fluorine-containing silicon oxide as the resistive switching layer on the surface of the bottom electrode by magnetron sputtering.

[0012] In one embodiment, the method of depositing fluorine-containing silicon oxide as a resistive switching layer on the surface of the bottom electrode by magnetron sputtering using silicon oxide and fluorine-containing silicon oxide as target materials comprises:

[0013] Introducing an inert gas into a vacuum chamber of a magnetron sputtering device, and controlling the pressure in the vacuum chamber of the magnetron sputtering device to a first target pressure;

[0014] The magnetron sputtering power is controlled to be a first target power, and silicon oxide and fluorine-containing silicon oxide are used as target materials to be sputtered and deposited on the bottom electrode to obtain a resistive switching layer.

[0015] In one embodiment, the step of preparing a top electrode on a surface of the resistive switching layer away from the bottom electrode comprises:

[0016] introducing an inert gas into a vacuum chamber of a magnetron sputtering device, and controlling the pressure in the vacuum chamber of the magnetron sputtering device to a second target pressure;

[0017] The magnetron sputtering power is controlled to be a second target power, and metal copper is used as a target material to be sputtered and deposited on the resistive switching layer to obtain a top electrode.

[0018] In one embodiment, the magnetron sputtering used in preparing the resistive switching layer is AC magnetron sputtering, and the magnetron sputtering used in preparing the top electrode is DC magnetron sputtering.

[0019] The present invention also provides a F-doped SiO x The CBRAM device comprises: a substrate, a bottom electrode, a resistive switching layer and a top electrode; wherein,

[0020] The bottom electrode is located on one surface of the substrate, the resistive layer is located on the side of the bottom electrode away from the substrate, and the top electrode is located on the side of the resistive layer away from the bottom electrode;

[0021] The material of the resistive switching layer is fluorine-containing silicon oxide.

[0022] In one embodiment, the material of the top electrode is Cu or Ag, and the material of the bottom electrode is one of Ti, Pt, Au, Al, W, and TiN.

[0023] In one embodiment, the thickness of the resistive switching layer is 10 to 200 nm.

[0024] In one embodiment, the top electrode is rectangular or circular in shape. If it is rectangular, the side length thereof is 1 to 900 μm; if it is circular, the diameter thereof is 1 to 900 μm.

[0025] The present invention provides a F-doped SiO x The CBRAM device and its preparation method are provided in the CBRAM device, wherein a bottom electrode, a resistive switching layer and a top electrode are provided, wherein the resistive switching layer is located on one side of the bottom electrode, and the top electrode is located on the side of the resistive switching layer away from the bottom electrode; wherein the resistive switching layer material is fluorine-containing silicon oxide. x Replace traditional SiO x The prepared CBRAM makes the resistance distribution of high and low resistance states more concentrated, further improving the stability of device performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 The F-doped SiO x A schematic structural diagram of an embodiment of a CBRAM device;

[0027] Figure 2 The F-doped SiO x SEM diagram of CBRAM device;

[0028] Figure 3 The F-doped SiO x A schematic flow chart of an embodiment of a method for preparing a CBRAM device;

[0029] Figure 4 The present invention is based on F-doped SiO x Flow chart of the preparation of CBRAM device;

[0030] Figure 5 The present invention is based on F-doped SiO x IV curve of CBRAM device;

[0031] Figure 6 The present invention is based on F-doped SiO x The resistance state distribution of CBRAM devices;

[0032] Figure 7 The present invention is based on F-doped SiO x Forming curve diagram of CBRAM device;

[0033] Figure 8 The F-doped SiO x A flow chart of another embodiment of a method for preparing a CBRAM device. DETAILED DESCRIPTION

[0034] The following is a F-doped SiO x The CBRAM device and its fabrication method are further described in detail. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are greatly simplified and not to exact scale, and are only used to facilitate and clearly illustrate the embodiments of the present invention.

[0035] Example 1

[0036] The present invention provides a F-doped SiO x The structure of a CBRAM device in one embodiment is as follows Figure 1 As shown, it includes: a substrate 40, a bottom electrode 30, a resistive layer 20 and a top electrode 10; wherein, the bottom electrode 30 is located on one surface of the substrate 40, the resistive layer 20 is located on the side of the bottom electrode 30 away from the substrate 40, and the top electrode 10 is located on the side of the resistive layer 20 away from the bottom electrode 30; wherein, the material of the resistive layer 20 is fluorine-containing silicon oxide.

[0037] During the experiment, a F-doped SiO x The CBRAM device includes a bottom electrode 30, a resistive switching layer 20, and a top electrode 10. The bottom electrode 30 is made of Pt; the resistive switching layer 20 is made of F-doped SiO x The material of the top electrode 10 is Cu. The thickness of the resistive layer 20 is 133 nm, and the shape of the top electrode 10 is rectangular. Figure 2 This is a SEM diagram of the CBRAM device.

[0038] It should be understood that the material of the bottom electrode 30 can be one of Ti, Pt, W, and TiN, the material of the resistive layer 20 can be a fluorine-containing silicon oxide material, and the material of the top electrode 10 can be Cu or Ag; the thickness of the resistive layer 20 can be 10 to 200 nm, and the shape of the top electrode 10 can be rectangular or circular, the side length of the rectangle can be 1 to 900 μm, and the diameter of the circle can be 1 to 900 μm. In practice, the top electrode 10 can be arranged in an array on the resistive layer 20.

[0039] In this embodiment, a bottom electrode, a resistive switching layer and a top electrode are provided in the CBRAM device. The resistive switching layer is located on the surface of one side of the bottom electrode, and the top electrode is located on the surface of the resistive switching layer away from the bottom electrode. The resistive switching layer material is fluorine-containing silicon oxide. F-doped SiO xReplace traditional SiO x The prepared CBRAM makes the resistance distribution of high and low resistance states more concentrated, further improving the stability of device performance.

[0040] Example 2

[0041] Figure 3 The F-doped SiO x A flow chart of an embodiment of a method for preparing a CBRAM device.

[0042] In this embodiment, F-doped SiO x The CBRAM device preparation method includes:

[0043] Step S10: providing a bottom electrode.

[0044] It should be understood that the execution subject of this embodiment is F-doped SiO x CBRAM device fabrication equipment, the F-doped SiO x The CBRAM device preparation equipment has functions such as data processing, data communication and program running.

[0045] In the specific implementation, such as Figure 4 The figure shows the F-doped SiO x The fabrication flow chart for a CBRAM device is shown in Figure 1. The first step is to grow Pt on the surface of a Si / SiO2 / Ti substrate to form a bottom electrode. The specific growth method can be chemical vapor deposition (CVD), physical vapor deposition (PVD), or other methods. In this embodiment, CVD is used to grow Pt. The substrate material with the Pt bottom electrode is ultrasonically cleaned in acetone, ethanol, and deionized water for 30 minutes. The substrate is then removed and air-dried. Insulating adhesive is then applied to one edge of the substrate, leaving room for the bottom electrode.

[0046] It should be noted that the present invention is based on F-doped SiO x The CBRAM device has the following advantages over the prior art: F-doped SiO x Replace traditional SiO x The resistance distribution of the high and low resistance states of the prepared CBRAM device is more concentrated, which further improves the stability of the device performance. The resistance value of the device at 0.08V, R HRS / R LRS About 10 2 , which can stably maintain the resistance state switching without attenuation, and its stability is greatly improved compared with traditional CBRAM devices.

[0047] Step S20: preparing a resistive switching layer on the surface of the bottom electrode.

[0048] In this preparation, silicon oxide targets and fluorine-containing silicon oxide targets were installed on the magnetron sputtering equipment. Argon was introduced into the vacuum chamber of the magnetron sputtering equipment as an inert gas. The AC sputtering power supply was turned on. The system pressure in the vacuum chamber was controlled to be 3.6×10 -1 Pa, under the conditions of a silicon oxide target sputtering power of 30W and a fluorine-containing silicon oxide target sputtering power of 40W, co-sputtering is carried out on the surface of the bottom electrode Pt layer. The sputtering deposition time is 1800s. After the deposition is completed, the AC sputtering power is turned off to obtain the resistive switching layer.

[0049] Step S30: preparing a top electrode on the surface of the resistive layer away from the bottom electrode.

[0050] In the specific implementation, a copper target was installed on the magnetron sputtering device, argon was introduced as an inert gas into the vacuum chamber of the magnetron sputtering device, a DC sputtering power supply was turned on, and the system pressure in the vacuum chamber was controlled to be 3.6×10 -1 Pa, under the condition that the copper target sputtering power is 10W, sputtering is carried out on the surface of the resistive layer, and the sputtering deposition time is 1800s. After the deposition is completed, the DC sputtering power is turned off to obtain the top electrode.

[0051] It should be clear that in actual preparation, the preparation method of the top electrode is: control the pressure in the vacuum chamber of the magnetron sputtering equipment to be 3.5~3.8×10 -1 Pa, with metal copper as the target and the sputtering power controlled at 10 to 20 W, the top electrode can be prepared on the surface of the resistive layer away from the bottom electrode by using magnetron sputtering.

[0052] After the preparation was completed, performance tests were also carried out to prove that the technical problem of the present invention could be solved. The process was as follows:

[0053] The prepared CBRAM device was subjected to corresponding performance tests. All tests were conducted on the Agilent B1500A semiconductor parameter analyzer test platform. First, before the test, the insulating tape on the resistive random access memory was removed to expose the bottom electrode. Then it was placed on the probe station and two probes were used to contact the bottom electrode and top electrode of the device respectively. A DC sweep voltage of -2V to 4V was applied to the top electrode, and the bottom electrode was grounded. The sweep voltage cycle test was performed 100 times. The IV curve obtained is shown as follows: Figure 5 shown.

[0054] from Figure 5As can be seen from the figure, the IV curve exhibits a clear bipolar resistance transition characteristic, and a scan voltage cycle consists of four parts: first, scanning from 0V to -2V, then from -2V to 0V, then from 0V to 4V, and finally from 4V to 0V, completing a scan cycle. The number of scan steps in each part is 101. To prevent excessive current from breaking down the device during the test, a current limit of 1mA is required when applying a negative voltage. When the voltage is scanned from 0V to -2V, the current flowing through the device gradually increases. When the voltage reaches around -0.5V, the current suddenly decreases, and the device transitions from a low-resistance state to a high-resistance state. This process is called the reset process. When the voltage is scanned from 0V to 4V, the current flowing through the device first increases. When the voltage reaches a certain value, the current flowing through the device suddenly increases, and the device transitions from a high-resistance state back to a low-resistance state. This process is called the set process. The resistance values ​​of the CBRAM device in the high-resistance state and the low-resistance state are read at a voltage of -0.08V to obtain the resistance distribution diagram of the device, as shown in FIG. Figure 6 shown.

[0055] A scanning voltage from 0V to 8V is applied to the top electrode of the prepared CBRAM device, and a current limit of 1mA is set. It can be observed that when the voltage is scanned to about 4.6V, the current reaches the current limit. This process is the forming process, as shown in Figure 7 shown.

[0056] As can be seen from the above, based on F-doped SiO x The stability of CBRAM devices is greatly improved compared with traditional CBRAM devices.

[0057] In this embodiment, a bottom electrode is provided; a resistive switching layer is prepared on the surface of the bottom electrode; a top electrode is prepared on the surface of the resistive switching layer away from the bottom electrode; wherein the resistive switching layer material is fluorine-containing silicon oxide, thereby successfully preparing F-doped SiO x The stability of CBRAM devices is greatly improved compared with traditional CBRAM devices.

[0058] Example 3

[0059] Figure 8 The F-doped SiO x A flow chart of another embodiment of a method for preparing a CBRAM device, based on the above Figure 3 F-doped SiO x The first embodiment of the CBRAM device preparation method of the present invention proposes F-doped SiO x A second embodiment of the method for preparing a CBRAM device.

[0060] Step S20 in the second embodiment includes:

[0061] Step S201: introducing an inert gas into a vacuum chamber of a magnetron sputtering device, and controlling the pressure in the vacuum chamber of the magnetron sputtering device to a first target pressure.

[0062] It should be noted that the resistive switching layer is made of fluorine-containing silicon oxide material, and the pressure in the vacuum chamber of the magnetron sputtering equipment is controlled to be 3.5 to 3.8×10 -1 Pa.

[0063] Step S202: controlling the magnetron sputtering power to be a first target power, and using silicon oxide and fluorine-containing silicon oxide as targets to perform sputtering deposition on the bottom electrode to obtain a resistive switching layer.

[0064] It should be noted that the sputtering power of the silicon oxide target and the fluorine-containing silicon oxide target is 30-40W. The silicon oxide target and the fluorine-containing silicon oxide target are sputtered simultaneously to prepare a resistive switching layer on the surface of the bottom electrode.

[0065] In the specific implementation, silicon oxide targets and fluorine-containing silicon oxide targets were installed on the magnetron sputtering equipment. Argon was introduced as an inert gas into the vacuum chamber of the magnetron sputtering equipment. The AC sputtering power supply was turned on. The system pressure in the vacuum chamber was controlled to be 3.6×10 -1 Pa, under the conditions of a silicon oxide target sputtering power of 30W and a fluorine-containing silicon oxide target sputtering power of 40W, co-sputtering is carried out on the surface of the bottom electrode Pt layer. The sputtering deposition time is 1800s. After the deposition is completed, the AC sputtering power is turned off to obtain the resistive switching layer.

[0066] In the third embodiment, a bottom electrode is provided; an inert gas is introduced into the vacuum chamber of the magnetron sputtering device, and the pressure in the vacuum chamber of the magnetron sputtering device is controlled to a first target pressure; the magnetron sputtering power is controlled to the first target power, and silicon oxide and fluorine-containing silicon oxide are used as targets to sputter and deposit a resistive switching layer on the bottom electrode; a top electrode is prepared on the surface of the resistive switching layer away from the bottom electrode. Thus, F-doped SiO x Replace traditional SiO x The resistance distribution of the high and low resistance states of the prepared CBRAM device is more concentrated, which further improves the stability of the device performance. The resistance value of the device at 0.08V, R HRS / R LRS About 10 2 , which can stably maintain the resistance state switching without attenuation, and its stability is greatly improved compared with traditional CBRAM devices.

[0067] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A F-doped SiO x A method for preparing a CBRAM device, characterized in that, The following steps are involved: providing a bottom electrode; preparing a resistive switching layer on the surface of the bottom electrode; A top electrode is formed on a surface of the resistive layer away from the bottom electrode; Wherein, the material of the resistive switching layer is fluorine-containing silicon oxide.

2. The F-doped SiO according to claim 1 x A method for preparing a CBRAM device, characterized in that, The method of preparing the resistive switching layer on the bottom electrode surface includes: using silicon oxide and fluorine-containing silicon oxide as target materials, and depositing fluorine-containing silicon oxide on the bottom electrode surface by magnetron sputtering to obtain the resistive switching layer.

3. The F-doped SiO according to claim 2 x A method for preparing a CBRAM device, characterized in that, The method uses silicon oxide and fluorine-containing silicon oxide as target materials and deposits fluorine-containing silicon oxide on the surface of the bottom electrode by magnetron sputtering to obtain the resistive switching layer, including: Introducing an inert gas into a vacuum chamber of a magnetron sputtering device, and controlling the pressure in the vacuum chamber of the magnetron sputtering device to a first target pressure; The magnetron sputtering power is controlled to be a first target power, and silicon oxide and fluorine-containing silicon oxide are used as target materials to be sputtered and deposited on the bottom electrode to obtain a resistive switching layer.

4. The F-doped SiO according to claim 1 x A method for preparing a CBRAM device, characterized in that, The step of preparing a top electrode on a surface of the resistive layer away from the bottom electrode comprises: introducing an inert gas into a vacuum chamber of a magnetron sputtering device, and controlling the pressure in the vacuum chamber of the magnetron sputtering device to a second target pressure; The magnetron sputtering power is controlled to be a second target power, and metal copper is used as a target material to be sputtered and deposited on the resistive switching layer to obtain a top electrode.

5. The F-doped SiO according to claim 1 x A method for preparing a CBRAM device, characterized in that: The magnetron sputtering method used in preparing the resistive switching layer is AC magnetron sputtering, and the magnetron sputtering method used in preparing the top electrode is DC magnetron sputtering.

6. A F-doped SiO obtained based on the above preparation method x The CBRAM device is characterized in that include: substrate, bottom electrode, resistive switching layer and top electrode; wherein, The bottom electrode is located on one surface of the substrate, the resistive layer is located on the side of the bottom electrode away from the substrate, and the top electrode is located on the side of the resistive layer away from the bottom electrode; The material of the resistive switching layer is fluorine-containing silicon oxide.

7. The F-doped SiO according to claim 6 x The CBRAM device is characterized in that The material of the top electrode is Cu or Ag, and the material of the bottom electrode is one of Ti, Pt, Au, Al, W, and TiN.

8. The F-doped SiO according to claim 6 x The CBRAM device is characterized in that The thickness of the resistive switching layer is 10-200 nm.

9. The F-doped SiO according to claim 6 x The CBRAM device is characterized in that The top electrode is in a rectangular or circular shape. If it is a rectangle, the side length thereof is 1 to 900 μm; if it is a circle, the diameter thereof is 1 to 900 μm.

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