Large dynamic range charge time measuring circuit, device and system

Abstract

The invention discloses a large-dynamic-range charge time measuring circuit, device and system. A front-end shunt circuit outputs an input large-dynamic-range electric signal in a shunt way with different gains; the N filtering and shaping circuits are used for amplifying, filtering and shaping the signals with different gains output by the front-end shunt circuit, and outputting multiple paths of quasi-Gaussian waveforms with staggered peak positions; the switch switching circuit receives N paths of amplified and formed waveforms, switches are switched among different filtering and forming circuits under the control of a control signal, and one path of formed waveform is selected to be output through a driver; the digital circuit quantifies the output analog waveform of the switch switching circuit and is used for data analysis to obtain charge time information. The circuit is switched among formed waveforms of different time constants through a switch, one path is selected for output, large-dynamic-range signal measurement is completed, a digital circuit is multiplexed, and resource consumption is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a large dynamic range charge-time measurement circuit, device and system. Background Art

[0002] High-energy physics experiments use detectors to detect particles. The detectors output electrical signals carrying information such as the particle's charge and time. Readout electronics receive and process these signals, converting them into digital signals that are then transmitted to a data processing system to retrieve these information. Many experiments require electronic readout of detector signals with a wide dynamic range. One such detector is the photomultiplier tube (PMT), which converts light signals into current outputs with a dynamic range exceeding thousands of photons. A solution based on analog amplification, filtering, and shaping combined with digital circuit quantization is widely used for charge-time measurement of PMT signals with a wide dynamic range. Data processing of the digitized waveform allows for the extraction of information such as the signal's charge and arrival time.

[0003] To achieve wide dynamic range signal measurement, the traditional approach uses segmented measurement technology, splitting the PMT signal into multiple channels with varying gain levels. Each channel requires its own amplifier, shaping, and digitization circuits. This approach utilizes multiple channels to measure a single signal, resulting in increased chip complexity, area, and power consumption in the application-specific integrated circuit (ASIC) space. Summary of the Invention

[0004] The purpose of the present invention is to provide a large dynamic range charge-time measurement circuit, device and system. The circuit switches between shaped waveforms with different time constants through a switch and selects one of the outputs, thereby completing large dynamic range signal measurement, multiplexing digital circuits, and reducing resource consumption.

[0005] The purpose of the present invention is achieved through the following technical solutions: A large dynamic range charge-time measurement circuit, comprising a front-end shunt circuit, a filter shaping circuit, a switch switching circuit, and a digitizing circuit, wherein: The front-end branch circuit divides the input electrical signal with a large dynamic range into branches with different gains and outputs them; The filtering and shaping circuits have a total of N paths, corresponding to the front-end shunt circuits, and are used to amplify and filter the signals of different gains output by the front-end shunt circuits, and output multiple quasi-Gaussian waveforms with staggered peak positions; The switch switching circuit receives N amplified and shaped waveforms and switches between filter shaping circuits with different time constants under the control of a control signal, selecting one of the shaped waveforms to be output through a driver; The digitizing circuit quantizes the output analog waveform of the switching circuit for subsequent data analysis to obtain charge-time information.

[0006] It can be seen from the technical solution provided by the present invention that the above-mentioned circuit switches between shaped waveforms with different time constants through a switch and selects one of the outputs, thereby completing the measurement of large dynamic range signals, multiplexing digital circuits, reducing resource consumption, and providing a broad and practical solution for charge-time measurement of large dynamic range signals in high-energy physics experiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0008] Figure 1 A schematic diagram of the structure of a large dynamic range charge-time measurement circuit provided by an embodiment of the present invention; Figure 2 A schematic diagram of the overall circuit structure of an example of the present invention; Figure 3 This is a simulation diagram of the output waveform under the input signal of Example 21PE of the present invention; Figure 4 This is a simulation diagram of the output waveform under the 2000PE input signal of the example given in the present invention. DETAILED DESCRIPTION

[0009] The following is a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments, and do not constitute a limitation of the present invention. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0010] like Figure 1 FIG. 1 is a schematic diagram of a large dynamic range charge-time measurement circuit according to an embodiment of the present invention. The circuit includes a front-end shunt circuit, a filter shaping circuit, a switch switching circuit, and a digitization circuit, wherein: The front-end branch circuit divides the input electrical signal with a large dynamic range into different gain branches and outputs them to meet the requirements of a large dynamic range; The filtering and shaping circuits have a total of N paths, corresponding to the front-end shunt circuits, and are used to amplify and filter the signals of different gains output by the front-end shunt circuits, and output multiple quasi-Gaussian waveforms with staggered peak positions; The switch switching circuit receives N amplified and shaped waveforms and switches between filter shaping circuits with different time constants under the control of a control signal, selecting one of the shaped waveforms to be output through a driver; The digitizing circuit quantizes the output analog waveform of the switching circuit for subsequent data analysis to obtain charge-time information.

[0011] In a specific implementation, the front-end branch circuit receives the electrical signal of the detector with a large dynamic range, and outputs N signals with different gains, with the gain from the first to the Nth channel being from high to low.

[0012] In addition, the filter shaping circuit adopts RC (Resistance and Capacitance) low-pass filtering, and uses a closed-loop operational amplifier for gain compensation after each stage of filtering. The RC time constant of each filter shaping circuit is different, and the RC time constant increases from small to large from the first to the Nth path.

[0013] like Figure 1 As shown, the switch switching circuit is composed of a comparator, a switch control circuit, a switch and a driver, wherein: Except for the last filter shaping circuit, the other filter shaping circuits are all connected to a comparator, one input end of each comparator is connected to the output of the corresponding filter shaping circuit, and the other input end is connected to an adjustable potential, and the output ends of all comparators are connected to the switch control circuit; The control signal output by the switch control circuit is connected to the enable terminal of the switch; The input end of the switch is connected to the output of all filter shaping circuits, and the output end is connected to the input end of the driver; The output of the driver is connected to the input of the digitizing circuit.

[0014] In a specific implementation, the switch control circuit in the switch switching circuit receives the signal output by the comparator and widens the signal output to control the switching of the switch. The specific process of the switch switching is: When the first comparator is not flipped, the switch is connected to the output of the first filter shaping circuit; When the first comparator flips, the control signal output by the switch control circuit causes the switch to switch from the output of the first filter shaping circuit to the output of the second filter shaping circuit; When the second comparator flips, the control signal output by the switch control circuit causes the switch to switch from the output of the second filter shaping circuit to the output of the third filter shaping circuit; The process repeats in sequence, and finally the switch switches to the output of the Nth filter shaping circuit.

[0015] In addition, the signal stretching time of the switch control circuit is designed to be adjustable to ensure that the trailing edge of the waveform signal after the switch is switched is complete.

[0016] In a specific implementation, the input end of the digitization circuit receives the output of the switch switching circuit, and the output end is a quantized digital signal, and the quantized digital signal is sent to a data processing system for analysis to obtain charge-time information.

[0017] It is worth noting that any content not described in detail in the embodiments of the present invention is prior art known to those skilled in the art. For example, while this embodiment may provide parameter examples with specific values, the parameters do not need to be exactly equal to the corresponding values, but can be approximated to the corresponding values ​​within an acceptable error tolerance or design constraints.

[0018] Based on the above circuit, an embodiment of the present invention further provides an electronic device, which includes the above circuit.

[0019] An embodiment of the present invention further provides an integrated circuit system, in which the above-mentioned circuit is integrated.

[0020] The circuit of the embodiment of the present invention is described below with a specific example. This example is a complete example based on a 180nm CMOS process and can perform charge and time measurement of a PMT signal with a dynamic range of 2000 PE.

[0021] like Figure 2 The figure shows a schematic diagram of the overall circuit structure of an example of the present invention. In this example, the front-end shunt circuit receives the PMT current signal input and outputs two high- and low-gain current signals in a branched manner. The mirror ratio of the high-gain output current is 1:1, and the mirror ratio of the low-gain output current is 20:1. The high-gain and low-gain output currents are converted into voltage signals through 50Ω and 150Ω pull-up resistors, respectively, and sent to the high- and low-gain filter shaping circuits, respectively.

[0022] The high-gain filter shaping circuit completes the signal measurement in the dynamic range of 1-20 PE, and the low-gain filter shaping circuit completes the signal measurement in the dynamic range of 20-2000 PE.

[0023] The high-gain filter shaping circuit uses two 10kΩ resistors and a 2pF capacitor to form a second-order RC filter with a time constant of 20ns. The low-gain filter shaping circuit uses two 10kΩ resistors and a 5pF capacitor to form a second-order RC filter with a time constant of 50ns. Using different time constants can offset the peak positions of the two shaped outputs, ensuring that the waveform after switching contains sufficient low-gain waveform information.

[0024] In the switching circuit, the comparator threshold is configured using an 8-bit, 1.8V DAC. One terminal of the comparator is fed with a high-gain shaped negative pulse signal with a baseline of approximately 1.4V. The DAC is used to adjust the other terminal of the comparator to a voltage of 0.3V, called the threshold voltage. This ensures that, for input signals up to 20PE, the high-gain shaped negative pulse signal never falls below the threshold voltage, preventing the comparator from flipping and outputting a low level. For input signals exceeding 20PE, when the high-gain shaped negative pulse signal crosses the threshold (from above the threshold voltage to below), the comparator flips, and the output transitions to a high level. When the switch enable terminal is low, it connects to the high-gain shaped output; when the enable terminal is high, it connects to the low-gain shaped output. The switching control circuit utilizes a monostable circuit that stretches the high-level output of the comparator to approximately 600 ns and uses this signal to control switching. This stretching time can be adjusted by varying the delay of each delay unit in the monostable circuit, ensuring that the high-level duration covers the trailing edge of the low-gain shaped waveform after the switch is switched.

[0025] In a monostable circuit, the D flip-flop's clock terminal receives the comparator's output, the D terminal is connected to a 1.8V high level, and the Q terminal outputs the switch-enable control signal. After a low-level reset, the monostable circuit begins operation, with the Q terminal outputting a low level. This means the switch enable terminal is low, and the switch is connected to the high-gain shaped output. When the comparator output signal rises, the Q terminal follows the D terminal and transitions to a high level, switching the switch to a low-gain shaped output. Simultaneously, the Q terminal is connected to the D flip-flop's reset terminal via a combinational logic circuit. This delays the Q terminal from transitioning to a high level for a specified period of time. Resetting the Q terminal causes the Q terminal to return to a low level, reconnecting the switch to the high-gain shaped output. This circuit can also adjust the delay time by varying the bias current of the delay cell.

[0026] In the digital circuit, ADC is used to quantize the analog waveform and send the output data to the data processing system for analysis to obtain charge-time information.

[0027] This example uses a PMT waveform as input, such as Figure 3 The output waveform simulation diagram of the embodiment 21PE input signal of the present invention is shown as follows: Figure 4The figure shows the output waveform simulation diagram under the 2000PE input signal of the example of the present invention. It can be seen from the waveform simulation results that the switch completes the switching, and the low-gain shaping waveform part after switching is relatively complete, which can complete the charge-time information measurement.

[0028] In summary, the circuit described in the embodiment of the present invention uses a single channel to process signals with a large dynamic range and sends them to a single-channel digitization circuit for quantization. Compared with traditional circuits that use multiple channels to complete large dynamic range signal measurement, the quantization circuit is reused, the circuit structure is simplified, and the area and power consumption are reduced, providing a broad and practical solution for charge-time measurement of large dynamic range signals in high-energy physics experiments.

[0029] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims. The information disclosed in the background technology section of this article is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art.

Claims

1. A large dynamic range charge-time measurement circuit, characterized in that: The circuit includes a front-end shunt circuit, a filter shaping circuit, a switch switching circuit and a digitization circuit, wherein: The front-end branch circuit divides the input electrical signal with a large dynamic range into branches with different gains and outputs them; The filtering and shaping circuits have a total of N paths, corresponding to the front-end shunt circuits, and are used to amplify and filter the signals of different gains output by the front-end shunt circuits, and output multiple quasi-Gaussian waveforms with staggered peak positions; The switch switching circuit receives N amplified and shaped waveforms and switches between filter shaping circuits with different time constants under the control of a control signal, selecting one of the shaped waveforms to be output through a driver; The digitizing circuit quantizes the output analog waveform of the switching circuit for subsequent data analysis to obtain charge-time information.

2. The large dynamic range charge-time measurement circuit according to claim 1, characterized in that: The front-end branch circuit receives the electrical signal of the detector with a large dynamic range and outputs N signals with different gains, with the gain from the first to the Nth channel being from high to low.

3. The large dynamic range charge-time measurement circuit according to claim 1, characterized in that: The filter shaping circuit adopts RC low-pass filtering, and uses a closed-loop operational amplifier for gain compensation after each level of filtering. The RC time constant of each filter shaping circuit is different, and the RC time constant increases from small to large from the first to the Nth path.

4. The large dynamic range charge-time measurement circuit according to claim 1, characterized in that: The switch switching circuit is composed of a comparator, a switch control circuit, a switch and a driver, wherein: Except for the last filter shaping circuit, the other filter shaping circuits are all connected to a comparator, one input end of each comparator is connected to the output of the corresponding filter shaping circuit, and the other input end is connected to an adjustable potential, and the output ends of all comparators are connected to the switch control circuit; The control signal output by the switch control circuit is connected to the enable terminal of the switch; The input end of the switch is connected to the output of all filter shaping circuits, and the output end is connected to the input end of the driver; The output of the driver is connected to the input of the digitizing circuit.

5. The large dynamic range charge-time measurement circuit according to claim 4, characterized in that: The switch control circuit in the switch switching circuit receives the signal output by the comparator, and stretches the signal and outputs it to control the switching of the switch.

6. The large dynamic range charge-time measurement circuit according to claim 5, characterized in that: The specific process of switching is as follows: When the first comparator is not flipped, the switch is connected to the output of the first filter shaping circuit; When the first comparator flips, the control signal output by the switch control circuit causes the switch to switch from the output of the first filter shaping circuit to the output of the second filter shaping circuit; When the second comparator flips, the control signal output by the switch control circuit causes the switch to switch from the output of the second filter shaping circuit to the output of the third filter shaping circuit; The process repeats in sequence, and finally the switch switches to the output of the Nth filter shaping circuit.

7. The large dynamic range charge-time measurement circuit according to claim 5, characterized in that: The signal stretching time of the switch control circuit is designed to be adjustable to ensure that the trailing edge of the waveform signal after the switch is switched is complete.

8. The large dynamic range charge-time measurement circuit according to claim 1, characterized in that: The input end of the digitization circuit receives the output of the switch switching circuit, and the output end is a quantized digital signal, and the quantized digital signal is sent to a data processing system for analysis to obtain charge time information.

9. An electronic device, characterized in that: The electronic device comprises the circuit according to any one of claims 1 to 8.

10. An integrated circuit system, characterized in that: The circuit according to any one of claims 1 to 8 is integrated into the integrated circuit system.

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