A dimming data transmission method, a backlight system and a display device

Abstract

The application discloses a dimming data transmission method, a backlight system and a display device. The method comprises the following steps: in a display period of a frame image, after a dimming controller sends a frame start identifier to a dimmer, the dimming controller continuously sends a plurality of dimming data packets to the dimmer, each dimming data packet comprises a synchronization signal and N-bit dimming data, N is a positive integer, and N is greater than or equal to 2; and the dimmer determines target dimming data based on a sampling control signal and the dimming data packet received by the dimmer. By sending the dimming data packet comprising the N-bit dimming data, the transmission of multiple bits of dimming data can be simultaneously performed for each dimming data packet, so that the overall transmission time length of the dimming data is shortened, the transmission efficiency is improved, the probability of level jump in the transmission process is reduced, the EMI problem of the system is alleviated, and the display performance is improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a method for transmitting dimming data, a backlight system, and a display device. Background Technology

[0002] With the rapid development of image display technology, high frame rates and high resolutions have become the core directions for upgrading the performance of display devices. However, while high-performance display devices achieve smoothness, detail, and high contrast in images, they also increase the complexity of image data processing and transmission, which places higher demands on the internal data transmission efficiency of display devices.

[0003] In existing technologies, to simplify the internal hardware connections of display devices, a single signal line is typically used to connect the dimming controller and the dimmer. In this architecture, when using local dimming technology for backlight control, the dimming controller sends local dimming data to the dimmer bit by bit. The dimmer determines the transmitted value by identifying the value corresponding to the sampling point in the single bit of data. To ensure the accuracy of sampling point identification, boundary times are set on both sides of the single-bit data detection interval to distinguish the detection intervals corresponding to different data values.

[0004] However, this mechanism significantly increases the time required for single-bit data transmission. When processing the massive amounts of local dimming data required by high-performance display devices, the overall transmission time is long and the transmission efficiency is low. This restricts the real-time performance and response speed of local dimming, resulting in display defects such as brightness adjustment delay and dynamic scene dimming inaccuracy, thus degrading the performance of the display device. Summary of the Invention

[0005] This invention provides a method for transmitting dimming data, a backlight system, and a display device to solve the problems of long overall transmission time and low transmission efficiency in existing local dimming data transmission methods.

[0006] In a first aspect, embodiments of the present invention provide a method for transmitting dimming data, applied to a backlight system, the backlight system including a dimming controller and a dimmer, the dimmer being electrically connected to the dimming controller via a single signal line, the method comprising:

[0007] Within the display cycle of one frame of image, after the dimming controller sends a frame start identifier to the dimmer, it continuously sends multiple dimming data packets to the dimmer. Each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2.

[0008] The dimmer determines the target dimming data based on the sampling control signal and the dimming data packet it receives, wherein the sampling control signal includes at least a first clock signal generated by the dimmer itself.

[0009] In the dimming data transmission method provided in this embodiment of the invention, the dimming controller sends a dimming data packet containing N bits of dimming data to the dimmer. In this way, each dimming data packet can transmit multiple bits of dimming data simultaneously. Compared with the traditional method of transmitting dimming data by single bit, the overall transmission time of dimming data can be shortened and the overall transmission efficiency of dimming data can be improved. Especially in high-resolution, high-frame-rate display devices, the improved dimming data transmission efficiency can enhance the response speed of the backlight system under local dimming technology and improve the display performance of the display device. In addition, by packaging and transmitting multiple bits of dimming data continuously and setting a synchronization signal in each dimming data packet, it is not necessary to set a synchronization signal for each bit of dimming data. In this way, the level transition frequency is reduced during the overall transmission of dimming data, thereby mitigating the EMI (Electromagnetic Interference) problem of the system and improving the system performance of the display device.

[0010] In some embodiments, the sampling control signal further includes a clock mode signal, which is generated by the dimming controller;

[0011] The dimmer determines the target dimming data based on the sampling control signal and the dimming data packets it receives, including:

[0012] The dimmer determines multiple target sampling positions based on the clock mode signal and the first clock signal;

[0013] The dimmer samples the dimming data packet at the multiple target sampling locations to obtain N sampling data.

[0014] The dimmer generates the target dimming data based on its own determined sampling data.

[0015] In the above embodiment, the dimmer uses a clock mode signal and a first clock signal to determine multiple target sampling positions. At these multiple target sampling positions, it samples multi-bit dimming data from a dimming data packet to obtain multiple sampled data, thereby enabling the parsing of the dimming data packet containing multi-bit dimming data. Since the target sampling positions are determined in real-time based on the clock mode signal and the first clock signal, even if the frequency of the first clock signal generated by the oscillator inside the dimmer has a partial deviation due to semiconductor process errors, the accuracy of the determined target sampling positions can be guaranteed, thus ensuring the accuracy of the sampled data obtained at the target sampling positions.

[0016] In some embodiments, the dimmer determines a plurality of target sampling positions based on the clock mode signal and the first clock signal, including:

[0017] The dimmer determines multiple target count values ​​based on the first clock signal and the clock mode signal, wherein the period of the first clock signal is shorter than the period of the clock mode signal;

[0018] The dimmer determines the target sampling position based on any two adjacent target count values ​​among the plurality of target count values.

[0019] In the above embodiment, the dimmer uses a first clock signal and a clock mode signal to determine multiple target count values, and determines a target sampling position based on every two adjacent target count values, thereby achieving accurate determination of the target sampling position and ensuring that the target sampling position is located in the middle of the 1-bit dimming data, thus ensuring the accuracy of sampling.

[0020] In some embodiments, the dimmer determines a plurality of target count values ​​based on the first clock signal and the clock mode signal, including:

[0021] The dimmer counts the period of the first clock signal by taking the time corresponding to the first level transition edge of the clock mode signal as the starting time.

[0022] The dimmer determines the plurality of target count values ​​based on the period count values ​​of the first clock signal corresponding to the plurality of target times, wherein the plurality of target times are the times corresponding to the non-first level transition edge of the clock mode signal.

[0023] In the above embodiment, a first clock signal is used to count the time length between the first level transition edge of the clock mode signal and each subsequent level transition edge to obtain multiple target count values. Thus, even if the frequency of the first clock signal deviates slightly during display, the target sampling position can be accurately determined by real-time determination of multiple target count values, eliminating the need to set a separate fixed sampling position. Regardless of the circumstances, as long as the interval between each target sampling position meets the minimum sampling interval, the accuracy of the sampling data obtained at the target sampling position can be guaranteed.

[0024] In some embodiments, the dimmer determines the target sampling position based on any two adjacent target count values ​​among the plurality of target count values, including:

[0025] The dimmer determines a third target count value based on the average of the first target count value and the second target count value, wherein the first target count value and the second target count value are any two adjacent target count values ​​among the plurality of target count values, and the first target count value is less than the second target count value;

[0026] The dimmer determines the target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to one cycle of the third target count value of the first clock signal, and the starting position is determined by the dimmer based on the synchronization signal in the dimming data packet.

[0027] In the above embodiment, since multiple target count values ​​are determined in real time based on the clock mode signal and the first clock signal, a target sampling position is determined by using every two adjacent target count values. This ensures that the target sampling position always corresponds to the middle position of the 1 bit of dimming data in the dimming data packet. In this way, in the subsequent process, data sampling of the dimming data packet at the target sampling position can ensure the accuracy of the sampling results and achieve accurate parsing of the dimming data packet.

[0028] In some embodiments, after the dimming controller sends the frame start identifier and before continuously sending multiple dimming data packets, the method further includes:

[0029] The dimming controller sends the clock mode signal to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.

[0030] In the above embodiment, by setting the interval between any two adjacent level transition edges in the clock mode signal to be consistent with the interval corresponding to 1 bit of dimming data, and by ensuring that the target sampling position determined by the clock mode signal always corresponds to the middle position of two adjacent level transition edges in the clock mode signal, sampling the dimming data packet at the target sampling position can guarantee that the sampled data is obtained at the middle position of the 1 bit of dimming data, which has higher accuracy and stronger versatility.

[0031] In some embodiments, the dimmer determines target dimming data based on a sampling control signal and dimming data packets it receives, including:

[0032] The dimmer detects the dimming data packets it receives, and after detecting the synchronization signal, it samples the dimming data packets at multiple preset sampling positions based on the first clock signal to obtain N sampled data.

[0033] The dimmer generates the target dimming data based on its own determined sampling data;

[0034] The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold. The second clock signal is generated by the dimming controller and is used to send the dimming data packet.

[0035] In the above embodiment, the first clock signal generated by the dimmer itself can be used to sample the dimming data packet at a preset sampling position. In this case, by ensuring that the frequency error between the first clock signal and the second clock signal generated by the dimmer controller meets the preset error threshold, it is possible to ensure the correct reception and parsing of continuous multi-bit dimming data and ensure the accuracy of the sampled data.

[0036] In some embodiments, in the dimming data packet, the synchronization signal is located before the N bits of dimming data;

[0037] In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; where M is a positive integer and M≥6.

[0038] The above embodiments, by setting the minimum time interval required for synchronization of each bit of dimming data, that is, setting the time length corresponding to 1 bit of dimming data to be consistent with the time length of M cycles of the first clock signal, can effectively improve the overall transmission speed of dimming data while ensuring stable detection of dimming data, avoiding dimming data recognition errors by the dimmer, and improving the system performance of the display device.

[0039] In a second aspect, embodiments of the present invention provide a backlight system, including a dimming controller and a dimming device, wherein:

[0040] The dimmer is electrically connected to the dimmer controller via a single signal line;

[0041] The dimming controller is used to: send a frame start identifier to the dimming controller within the display cycle of a frame image, and then continuously send multiple dimming data packets to the dimming controller, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2;

[0042] The dimmer is used to: determine target dimming data based on a sampling control signal and dimming data packets received by itself, wherein the sampling control signal includes at least a first clock signal generated by the dimmer itself.

[0043] In some embodiments, the sampling control signal further includes a clock mode signal, which is generated by the dimming controller. The dimming controller is specifically used for:

[0044] Based on the clock mode signal and the first clock signal, multiple target sampling positions are determined;

[0045] At the multiple target sampling locations, the dimming data packet is sampled to obtain N sampling data;

[0046] The target dimming data is generated based on the sampling data determined by itself.

[0047] In some embodiments, the dimmer is specifically used for:

[0048] Based on the first clock signal and the clock mode signal, multiple target count values ​​are determined, wherein the period of the first clock signal is less than the period of the clock mode signal;

[0049] The target sampling position is determined based on any two adjacent target count values ​​among the plurality of target count values.

[0050] In some embodiments, the dimmer is specifically used for:

[0051] The period of the first clock signal is counted, starting from the moment corresponding to the first level transition edge of the clock mode signal.

[0052] The multiple target count values ​​are determined based on the period count values ​​of the first clock signal corresponding to the multiple target times, wherein the multiple target times are the times corresponding to the non-first level transition edge of the clock mode signal.

[0053] In some embodiments, the dimmer is specifically used for:

[0054] A third target count value is determined based on the average of the first target count value and the second target count value, wherein the first target count value and the second target count value are any two adjacent target count values ​​among the plurality of target count values, and the first target count value is less than the second target count value.

[0055] Based on the third target count value and the dimming data packet, the target sampling position is determined, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to one cycle of the third target count value of the first clock signal, and the starting position is determined by the dimmer based on the synchronization signal in the dimming data packet.

[0056] In some embodiments, the dimming controller is further configured to:

[0057] The clock mode signal is sent to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.

[0058] In some embodiments, the dimmer is specifically used for:

[0059] The dimming data packet received by itself is detected, and after the synchronization signal is detected, the dimming data packet is sampled at multiple preset sampling positions based on the first clock signal to obtain N sampled data.

[0060] The target dimming data is generated based on the sampling data determined by itself;

[0061] The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold. The second clock signal is generated by the dimming controller and is used to send the dimming data packet.

[0062] In some embodiments, in the dimming data packet, the synchronization signal is located before the N bits of dimming data;

[0063] In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; where M is a positive integer and M≥6.

[0064] Thirdly, embodiments of the present invention provide a display device including a backlight system as described in any of the embodiments of the second aspect above.

[0065] For the technical effects that the backlight system disclosed in the second aspect and the display device disclosed in the third aspect may achieve, please refer to the above description of the technical effects that can be achieved for the first aspect or the various possible solutions in the first aspect, and will not be repeated here. Attached Figure Description

[0066] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0067] Figure 1A A schematic diagram illustrating an image display device provided for related technologies;

[0068] Figure 1B A schematic diagram of the structure of a backlight system inside a display device, provided for related technologies;

[0069] Figure 1C A schematic diagram of the structure of another backlight system inside a display device provided for related technologies;

[0070] Figure 2 A schematic diagram illustrating a local dimming data transmission method for related technologies;

[0071] Figure 3 This is a schematic diagram of a backlight system provided in an embodiment of the present invention;

[0072] Figure 4 A schematic diagram illustrating the workflow of a dimming data transmission method provided in an embodiment of the present invention;

[0073] Figure 5 This is a schematic diagram of the structure of a dimming controller transmitting signals according to an embodiment of the present invention;

[0074] Figure 6A This is a schematic diagram of another dimming controller transmitting signals according to an embodiment of the present invention;

[0075] Figure 6B This is a schematic diagram of another dimming controller transmitting signals according to an embodiment of the present invention;

[0076] Figure 7 This is a schematic diagram illustrating multiple preset sampling positions provided in an embodiment of the present invention;

[0077] Figure 8A This is a schematic diagram of the structure of a clock mode signal provided in an embodiment of the present invention;

[0078] Figure 8B This is a schematic diagram illustrating multiple target sampling locations provided in an embodiment of the present invention;

[0079] Figure 9 This is a schematic diagram of a time interval for 1 bit dimming data provided in an embodiment of the present invention;

[0080] Figure 10 This is a schematic diagram of another backlight system provided in an embodiment of the present invention;

[0081] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0082] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0083] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the invention as detailed in the appended claims.

[0084] With the rapid development of image display technology, high frame rates and high resolutions have become the core directions for upgrading the performance of display devices. Current display devices, such as televisions (TVs) and liquid crystal displays (LCDs), generally increase frame rates to 120Hz or even higher, and adopt ultra-high-definition resolution standards such as 4K and 8K to achieve smooth and detailed image display. Furthermore, to meet the high-performance requirements of display devices, local dimming technology is typically used for backlight control. This involves dividing the multiple light-emitting units on the backlight panel into different backlight zones, independently controlling the brightness of the light-emitting units within each backlight zone to improve the contrast of the displayed image.

[0085] However, the improvement in display quality will inevitably lead to an increase in the amount of data processing and transmission of image data and local dimming data, which places higher demands on the data transmission efficiency inside the display device.

[0086] Figure 1A A schematic diagram illustrating image display using a display device provided by related technologies is shown. For example... Figure 1A As shown, the display device 10 includes a display panel 11 and a backlight panel 12, with the display panel 11 and the backlight panel 12 positioned opposite each other. The backlight panel 12 has a plurality of light-emitting units 121 arranged in an array. The light-emitting units 121 can be light-emitting diodes (LEDs), mini light-emitting diodes (Mini LEDs), or similar devices.

[0087] like Figure 1A As shown, during image display, local dimming technology is used to control the brightness of different light-emitting units 121 to be different. Figure 1A Different fillings of the light-emitting unit 121 (meaning different brightness of the light-emitting unit 121) allow the light-emitting unit 121 on the backlight panel 12 to project light onto the display panel 11, thus displaying the corresponding image on the display panel 11.

[0088] Figure 1B This illustrates one of the structural schematic diagrams of the backlight system inside a display device provided by related technologies. Figure 1C This is the second schematic diagram of the backlight system inside a display device provided by related technologies.

[0089] Reference Figure 1B and Figure 1C The backlight system may include a processor 13, a dimming controller 14 (also known as an LED controller), a dimmer 122 (also known as an LED driver), and light-emitting units 121. The processor 13 and the dimming controller 14 can communicate via the SPI (Serial Peripheral Interface) protocol. The dimming controller 14 is electrically connected to multiple dimmers 122. The dimmers 122 and light-emitting units 121 can be disposed on the backlight panel 12, with one dimmer 122 connected to one or more light-emitting units 121. Specifically, the processor 13 may be a SoC (System on Chip), a TELD (Timing Controller Embedded Local Dimming), or similar technology.

[0090] Reference Figure 1B and Figure 1C The processor 13 can generate local dimming data based on the image data corresponding to a frame of image, and send the local dimming data to the dimming controller 14 via the SPI protocol. The dimming controller 14 will send the local dimming data to each dimmer 122 connected to it. The dimmer 122 drives the light-emitting unit 121 connected to it to emit light according to the local dimming data it receives, so as to realize backlight control.

[0091] However, current high-performance display devices typically have a large number of dimmers on the backlight panel. To ensure that the internal hardware connections of the display device are not overly complex, a single signal line is usually used to connect the dimmer controller and the dimmers. (Refer to...) Figure 1CThe dimming controller 14 and the dimmer 122 are electrically connected via a single signal line 15. In this design architecture, a single signal line is required to transmit local dimming data. Therefore, the current method of transmitting local dimming data bit by bit is mostly adopted. That is, the dimming controller sends 1 bit of dimming data to the dimmer each time, and the dimmer determines the transmitted value by identifying the value corresponding to the sampling position in the 1 bit of dimming data.

[0092] Figure 2 A schematic diagram illustrating the transmission method of local dimming data provided by related technologies is shown. For example... Figure 2 As shown, the dimming controller transmits local dimming data to the dimmer in units of 1 bit. Within the interval corresponding to the 1-bit dimming data, the value of the 1-bit dimming data is detected at the sampling position; if the value at the sampling position of the 1-bit dimming data is detected as "0", it means that the value transmitted by this 1-bit dimming data is "0"; if the value at the sampling position of the 1-bit dimming data is detected as "1", it means that the value transmitted by this 1-bit dimming data is "1".

[0093] Under this scheme, such as Figure 2 As shown, to ensure the accuracy of sampling detection, a detection interval is set to distinguish data values, and boundary times are set on both sides of the detection interval, namely the Pre interval and the Post interval. The Pre interval is the interval from the start position of the current 1-bit dimming data to the start position of the detection interval, and is used for resynchronizing each bit of dimming data. The Post interval is the interval from the end position of the detection interval to the start position of the next 1-bit dimming data, and is used to distinguish the next single-bit dimming data. However, this increases the time length corresponding to a single bit of dimming data, and the transmission time required also increases accordingly. Therefore, the overall transmission speed of local dimming data will be slower. Especially when processing the massive amounts of local dimming data required by high-performance display devices, the existing transmission mechanism will restrict the real-time performance and response speed of local dimming, leading to display defects such as brightness adjustment delay and dynamic scene dimming inaccuracy, resulting in degraded display device performance.

[0094] Currently, while multiple signal lines are used to connect the dimming controller and dimmer to increase the transmission rate of local dimming data, this undoubtedly increases the complexity of the circuit structure and internal connections, leading to higher product costs. Therefore, there is an urgent need for a method to improve the data transmission speed of local dimming without complicating the circuit structure or increasing product costs.

[0095] Based on this, embodiments of the present invention provide a method for transmitting dimming data, a backlight system, and a display device. Based on a single transmission line connection architecture, a new method for transmitting dimming data is designed to shorten the overall transmission time of dimming data, improve the overall transmission efficiency of dimming data, reduce EMI problems, and improve the overall performance of the display device.

[0096] The objectives, functional features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustrative and explanatory purposes only and are not intended to limit the invention. Furthermore, the embodiments and features described herein can be combined with each other without conflict.

[0097] The method for transmitting dimming data provided in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings:

[0098] The dimming data transmission method provided in this embodiment of the invention can be applied to a backlight system. Therefore, the backlight system provided in this embodiment of the invention will be introduced first, as follows:

[0099] Figure 3 A schematic diagram of the backlight system provided in an embodiment of the present invention is shown. Figure 3 As shown, the backlight system 20 includes a dimming controller 21 and multiple dimmers 22, wherein the multiple dimmers 22 are disposed on a backlight panel 23 and arranged in an array on the backlight panel 23. Each dimmer 22 is electrically connected to one or more backlight sources 24 and is used to control the brightness of the backlight source 24 connected to it. For example, in Figure 3 In the example shown, one dimmer 22 connects to four backlights 24. Furthermore, multiple backlights 24 are also disposed on the backlight panel 23, and are arranged in an array on the backlight panel 23 accordingly. It should be understood that the specific number of dimming controllers 21, the specific number of dimmers 22, and the specific number of backlights 24 connected to one dimmer 22 are not limited in this embodiment of the invention. These numbers can be flexibly adjusted according to actual application requirements and actual architecture design. For example, the number of dimmers 22 can be determined based on the size of the backlight panel 23; the number of dimmer controllers 21 can be determined based on the number and arrangement of the dimmers 22.

[0100] Furthermore, such as Figure 3 As shown, among the multiple dimmers 22 arranged in an array, multiple dimmers 22 located in the same row are connected in series via a single signal line 25. The dimming controller 21 is then connected via multiple single signal lines 25 to the dimmer in each row that is closest to the dimming controller 21 (i.e., the one closest to the dimming controller 21). Figure 3The dimmers 22-A in each row are electrically connected to the dimmer controller 21 in parallel. For example, a dimmer controller 21 can be electrically connected to each of the eight dimmers 22 in each row via eight single signal lines 25, and these eight dimmers 22-A are connected in parallel. It should be understood that the number of single signal lines 25 connected to the dimmer controller 21 can also be flexibly designed according to actual application requirements, and the embodiments of the present invention do not impose any limitations on this.

[0101] Furthermore, it should be understood that, Figure 3 This is merely an illustrative example. In practical applications, the specific connection method between the dimming controller and the dimmers can be flexibly configured according to the architecture design of the display device, and this embodiment of the invention does not impose any limitations on this. For example, multiple dimmers located in the same column can be connected in series through a single signal line, and the dimming controller can be electrically connected to the dimmer closest to the dimming controller in each of the multiple columns through multiple single signal lines.

[0102] Based on such Figure 3 The architecture of the backlight system shown is as follows: Figure 4 A schematic diagram illustrating the workflow of the dimming data transmission method provided in an embodiment of the present invention is shown. Figure 4 As shown, the dimming data transmission method of this embodiment of the invention may specifically include the following steps:

[0103] In step S401, within the display cycle of one frame of image, after the dimming controller sends a frame start identifier to the dimmer, it continuously sends multiple dimming data packets to the dimmer. Each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2.

[0104] In some embodiments, after receiving local dimming data corresponding to the current image frame from a front-end device (such as a SoC, TCON, etc.), the dimming controller constructs multiple dimming data packets based on the local dimming data. Each dimming data packet includes a synchronization signal and multiple bits of dimming data. When displaying the current image frame, the dimming controller first sends a frame start identifier to the dimmer, and then continuously sends multiple dimming data packets to the dimmer. By repeatedly transmitting dimming data packets to the dimmer, the transmission of all dimming data corresponding to one image frame can be achieved.

[0105] Figure 5 This diagram illustrates one of the structural schematics of a dimming controller transmitting signals according to an embodiment of the present invention. Figure 5As shown, the dimming controller first sends a frame start identifier, which indicates the starting position of the time frame in which an image frame is formed. After receiving the frame start identifier, the dimming controller can determine that the dimming data received subsequently is the dimming data of a new image frame, so as to perform overall synchronization operation.

[0106] For example, refer to Figure 5 A consecutive set of "1"s can be used to represent the start of a frame. It should be understood that... Figure 5 The frame start identifier in this example is only one example. In practical applications, other forms can also be used to represent the frame start identifier. This embodiment of the invention does not impose any restrictions on this.

[0107] In some embodiments, the synchronization signal in the dimming data packet precedes the N bits of dimming data.

[0108] For ease of explanation, and Figure 5 The example of the dimming data packet shown is consistent with the following embodiments, which will all use 8-bit dimming data as an example: After the dimming controller sends the frame start identifier, it will continuously send multiple dimming data packets to the dimmer. For example... Figure 5 As shown, a dimming data packet includes a synchronization signal and 8 bits of dimming data, wherein:

[0109] like Figure 5 As shown, the data volume of the synchronization signal is 2 bits. In the 2-bit synchronization signal, the first bit has a signal value of "0" and the last bit has a signal value of "1". When the dimmer detects a change in signal value from "0" to "1", it can be considered that it has received the synchronization signal in the dimming data packet. At this time, the dimmer will use the jump position of the signal value from "0" to "1" in the synchronization signal as the reference position to perform a synchronization operation on a single dimming data packet, which facilitates the accuracy of subsequent data parsing operations (see the following embodiments for details of the implementation).

[0110] like Figure 5 As shown, the 8 bits of dimming data are set continuously, therefore, there is no need to set boundary time for each bit of dimming data. This effectively reduces the length of each bit of dimming data, shortens the time required for dimming data transmission, and improves the transmission efficiency of dimming data. In traditional single-bit data transmission methods, 1M to 4M bits of dimming data can typically be transmitted per second; while using the multi-bit data transmission method provided in this embodiment of the invention, approximately 2M to 8M bits of dimming data can be transmitted per second, doubling the transmission speed.

[0111] Furthermore, in this embodiment of the invention, by setting multiple bits of dimming data in a dimming data packet, the frequency of signal value fluctuations can be effectively reduced, as follows:

[0112] If traditional single-bit data transmission is used, boundary time needs to be set on both sides of the detection interval during each bit data transmission process. This results in two signal value transitions within the transmission cycle of one bit of data, such as... Figure 2 As shown, the first signal value transition occurs at the beginning of the 1-bit dimming data interval, and the second signal value transition occurs at the boundary between the Pre interval and the detection interval, or at the boundary between the detection interval and the Post interval. Therefore, if the traditional single-bit data transmission method is used to transmit 8 bits of dimming data, 16 signal value transitions will occur.

[0113] Figure 6A The second schematic diagram shows the structure of the dimming controller transmitting signals according to an embodiment of the present invention. Figure 6B The third schematic diagram shows the structure of the dimming controller transmitting signals according to an embodiment of the present invention.

[0114] The dimming data transmission method provided in the embodiments of the present invention

[0115] like Figure 6A As shown, for the case where the 8-bit dimming data in the dimming data packet has a value of "11111111", there are only two signal value transitions during the transmission of the dimming data packet. That is, the first signal value transition occurs within the corresponding interval of the synchronization signal of the dimming data packet, and the second signal value transition occurs at the end position of the dimming data packet.

[0116] like Figure 6B As shown, this example considers the case where the 8-bit dimming data in the dimming data packet has a value of "01010101". During the transmission of this dimming data packet, there are a total of 10 signal value transitions. Specifically, the first signal value transition occurs within the corresponding interval of the synchronization signal in the dimming data packet, the second signal value transition occurs at the beginning of the 8-bit dimming data, and multiple more signal value transitions occur within the corresponding interval of the 8-bit dimming data as the data value changes, until the 10th signal value transition occurs at the end of the dimming data packet.

[0117] Therefore, by using the multi-bit dimming data transmission method in this embodiment of the invention to transmit 8 bits of dimming data, there are at least 2 signal value jumps and at most 10 signal value jumps.

[0118] The following is an example of the signal value transitions corresponding to different dimming data transmission methods:

[0119]

[0120]

[0121] Table 1

[0122] As shown in Table 1, when transmitting 8-bit dimming data, the traditional single-bit transmission method results in 16 signal value transitions, while the multi-bit transmission method provided in this embodiment of the invention results in an average of 6 signal value transitions, reducing the frequency of signal value transitions by approximately 38%. This reduction in signal value transition frequency effectively lowers the electromagnetic interference intensity of the system and improves system performance.

[0123] Next, the dimmer receives 8 bits of dimming data and parses it, as follows:

[0124] In step S402, the dimmer determines the target dimming data based on the sampling control signal and the dimming data packet it receives, wherein the sampling control signal includes at least the first clock signal generated by the dimmer itself.

[0125] In this embodiment of the invention, the dimming controller sends a dimming data packet containing N bits of dimming data to the dimmer. This allows for the simultaneous transmission of multiple bits of dimming data with each dimming data packet. Compared to the traditional single-bit transmission method, this shortens the overall transmission time of the dimming data and improves its overall transmission efficiency. Especially in high-resolution, high-frame-rate display devices, improved dimming data transmission efficiency can enhance the response speed of the backlight system under local dimming technology and improve the display performance. Furthermore, by continuously transmitting multiple bits of dimming data in packets and including a synchronization signal in each dimming data packet, it is no longer necessary to set a synchronization signal for each bit of dimming data. This reduces the frequency of level transitions during the overall transmission of the dimming data, thereby mitigating EMI issues and improving the system performance of the display device.

[0126] In some embodiments, the dimmer can use a first clock signal and a synchronization signal in the dimming data packet to parse N bits of dimming data in the dimming data packet, and generate target dimming data based on the parsing result, wherein the first clock signal is generated by the dimmer using its own internal oscillator.

[0127] Furthermore, in this embodiment of the invention, the synchronization signal in the dimming data packet is used to control the initialization operation of the period count value of the first clock signal, so as to realize the synchronization of each dimming data packet and ensure the accurate reception of the dimming data packet. The specific implementation method of the synchronization signal controlling the initialization of the period count value of the first clock signal can be found in subsequent embodiments.

[0128] Understandably, because the dimming controller and the dimmer are connected via a single signal line, the dimmer cannot receive the synchronization clock signal used to parse dimming data packets. To enable the dimmer to parse dimming data packets containing multi-bit dimming data, this embodiment of the invention provides at least two implementation methods, as follows:

[0129] Method 1:

[0130] In some embodiments, the dimmer can directly use its own generated first clock signal to parse the dimming data packet, which can be achieved in the following ways:

[0131] The dimmer detects the dimming data packets it receives, and after detecting the synchronization signal, it samples the dimming data packets at multiple preset sampling positions based on the first clock signal to obtain N sampled data; and generates target dimming data based on the sampled data it determines.

[0132] In practical implementation, multiple preset sampling positions can be set in advance. After the dimmer detects the synchronization signal in the dimming data packet, that is, the signal value change from "0" to "1" at the beginning of the dimming data packet, it starts counting the period of the first clock signal it generates and determines whether the preset sampling position has been reached based on the period count value. When the preset sampling position is reached, the dimming data packet is sampled at the preset sampling position to obtain the data value of each bit of dimming data in order to generate the target dimming data.

[0133] Figure 7 A schematic diagram illustrating multiple preset sampling locations provided in an embodiment of the present invention is shown. For example... Figure 7 As shown, for a dimming data packet containing 8 bits of dimming data, 9 preset sampling positions are set. Among them, the first preset sampling position (i.e. Figure 7 The preset sampling positions corresponding to the synchronization signal interval are used to detect the signal value change from "0" to "1" at the beginning of the optical data packet. When the signal value change from "0" to "1" is confirmed, it is considered that a synchronization signal has been detected. Then, the first clock signal is used to detect the signal value change at the remaining preset sampling positions (i.e., ... Figure 7 Sampled data is obtained at the preset sampling position corresponding to the 8-bit dimming data range in the middle, thereby realizing the parsing of the dimming data packet.

[0134] Furthermore, in Method 1, the frequency difference between the first clock signal and the second clock signal is required to meet a preset error threshold, wherein the second clock signal is generated by the dimming controller.

[0135] In specific implementation, such as Figure 3As shown, the dimming controller 21 uses an external oscillator to generate a second clock signal, and uses this second clock signal to send multiple dimming data packets to the dimmer 22 one by one. Furthermore, due to the single-signal-line connection architecture, the dimmer 22 does not receive the clock signal sent by the dimming controller 21, but instead uses an internal oscillator (…). Figure 3 The first clock signal (not shown) is used to receive and parse dimming data packets. For normal reception of continuous multi-bit dimming data, the first clock signal and the second clock signal must maintain stable synchronization.

[0136] In this embodiment of the invention, the stable synchronization of the first clock signal and the second clock signal is ensured by setting the frequency difference between the first clock signal and the second clock signal to be less than or equal to a preset error threshold. In specific implementation, since the dimming controller uses an external oscillator to generate the second clock signal, and the clock frequency of the external oscillator is relatively accurate, this embodiment of the invention can employ Trimming and a rigorous Final Test (FT) to correct the frequency of the dimmer's internal oscillator. The corrected frequency of the dimmer's internal oscillator is then compared with the frequency of the dimmer controller's external oscillator to ensure that the error between the frequency of the dimmer's internal oscillator and the frequency of the external oscillator connected to the dimmer controller does not exceed the preset error threshold. This ensures that the frequency synchronization error between the first clock signal generated by the dimmer's internal oscillator and the second clock signal is less than or equal to the preset error threshold.

[0137] Furthermore, it is understood that in practical applications, the preset error threshold can be an empirical value, or it can be flexibly set and adjusted according to actual business needs. This embodiment of the invention does not impose any limitations on this. For example, the preset error threshold can be set to 3%, which requires the frequency difference between the first clock signal and the second clock signal to be ≤3%.

[0138] In the above embodiment, the dimming data packet is sampled at a preset sampling position using a first clock signal generated by the dimmer itself. In this case, by ensuring that the frequency error between the first clock signal and the second clock signal generated by the dimmer controller meets a preset error threshold, it is possible to correctly receive and parse continuous multi-bit dimming data, thus ensuring the accuracy of the sampled data.

[0139] However, in the first method described above, fine-tuning the first clock signal and performing Fourier Transition (FT) testing increases product costs. Therefore, this embodiment of the invention also provides another feasible method for parsing dimming data, as follows:

[0140] Method 2:

[0141] In some embodiments, the sampling control signal may include a clock mode signal and a first clock signal; the dimmer may use the clock mode signal and the first clock signal to parse the dimming data packet. The clock mode signal is generated by the dimming controller, and the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.

[0142] In the above embodiments, by setting the interval between any two adjacent level transition edges in the clock mode signal to be consistent with the interval corresponding to 1 bit of dimming data, the target sampling position determined by the subsequent embodiments can always correspond to the middle position of each 1 bit of dimming data in the dimming data packet. Sampling the dimming data packet at the target sampling position can ensure that the sampled data is obtained at the middle position of the 1 bit of dimming data, which has higher accuracy and stronger versatility.

[0143] In some embodiments, after the dimming controller sends the frame start identifier and before continuously sending multiple dimming data packets, it may also send a clock mode signal to the dimmer. Specifically, the dimming controller may send a clock mode signal once within the display period corresponding to one frame of image.

[0144] In some embodiments, after receiving a clock mode signal, the dimmer can parse the received dimming data packets in the following ways, including the following steps:

[0145] Step 1: The dimmer can determine multiple target sampling positions based on the clock mode signal and the first clock signal.

[0146] In some embodiments, during the execution of step 1, the dimmer can determine multiple target sampling locations in the following manner:

[0147] Step 1-1: The dimmer determines multiple target count values ​​based on the first clock signal and the clock mode signal, wherein the period of the first clock signal is less than the period of the clock mode signal.

[0148] In some embodiments, during the execution of step 1-1, the dimmer can determine multiple target count values ​​in the following manner: the dimmer counts the period of the first clock signal with the time corresponding to the first level transition edge of the clock mode signal as the starting time; and determines multiple target count values ​​based on the period count values ​​of the first clock signal corresponding to multiple target times, wherein the multiple target times are the times corresponding to non-first level transition edges of the clock mode signal.

[0149] Figure 8A A schematic diagram of the clock mode signal provided in an embodiment of the present invention is shown. Figure 8AAs shown, the dimmer starts continuously counting the period of the first clock signal at the starting position of detecting the clock mode signal, that is, at the first level transition edge of the clock mode signal. The period count value obtained when the second level transition edge of the clock mode signal is detected is taken as the first target count value count-0; then, the period count value obtained when the third level transition edge of the clock mode signal is detected is taken as the third target count value count-2; and so on, the period count value obtained when the tenth level transition edge of the clock mode signal is detected is taken as the ninth target count value count-8.

[0150] Therefore, when a dimming data packet includes N bits of dimming data, the dimmer will determine N+1 target count values ​​based on the first clock signal and the clock mode signal.

[0151] For example, suppose the frequency of the oscillator inside the dimmer is 50MHz, and the period of the first clock signal clock it generates is 20ns; and suppose that when the clock mode signal is counted using the first clock signal clock, the first target count value count-0 is 20 clocks, the second target count value count-1 is 40 clocks, the third target count value count-2 is 60 clocks, and so on.

[0152] Step 1-2: The dimmer determines the target sampling position based on any two adjacent target count values ​​among multiple target count values.

[0153] In practical implementation, the dimmer can determine a target sampling position based on every two adjacent target count values ​​from the N+1 target count values ​​obtained in step 1-1. Therefore, N target sampling positions can be obtained. Specifically:

[0154] In some embodiments, the dimmer determines a third target count value based on the average of a first target count value and a second target count value, wherein the first target count value and the second target count value are any two adjacent target count values ​​among a plurality of target count values, and the first target count value is less than the second target count value.

[0155] In practical implementation, taking a dimming data packet containing 8 bits of dimming data as an example, the dimmer will obtain 9 target count values, namely count-0, count-1, count-2, ..., count-8. In determining the third target count value: first, count-0 is used as the first target count value, and count-1 as the second target count value. By calculating the average of count-0 and count-1, a third target count value, count-a0, is obtained. Then, count-1 is used as the first target count value, and count-2 as the second target count value. By calculating the average of count-1 and count-2, another third target count value, count-a1, is obtained. This process is repeated, resulting in a total of 8 third target count values: count-a0, count-a1, count-a2, ..., count-a7.

[0156] For example, assuming the target count value count-0 = 20 clocks, the target count value count-1 = 40 clocks, the target count value count-2 = 60 clocks, and so on, then the third target count value count-a0 = 30 clocks, the third target count value count-a1 = 50 clocks, and so on.

[0157] In some embodiments, after obtaining multiple third target count values, for any third target count value, the dimmer determines a target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to each cycle of the third target count value of the first clock signal, and the starting position is determined by the dimmer based on the synchronization signal in the dimming data packet.

[0158] In practical implementation, after the dimmer determines multiple third target count values, during the reception of dimming data packets, multiple target sampling positions are determined in real time using a synchronization signal and multiple third target count values. At the target sampling positions, data sampling operations are performed on the dimming data packets to obtain multiple sampled data, as follows:

[0159] The dimmer detects the dimming data packets. When it detects the synchronization signal carried in the dimming data packet, it takes the level transition edge of the synchronization signal as the starting position. At the starting position, it clears the period count value of the first clock signal to zero and then starts counting again. When the period count value of the first clock signal reaches the third target count value, it takes the position corresponding to that moment in the dimming data packet as the target sampling position.

[0160] Figure 8BA schematic diagram illustrating multiple target sampling locations provided in an embodiment of the present invention is shown. For example... Figure 8B As shown, the counting of the first clock signal's period begins again, starting from the level transition edge of the synchronization signal from "0" to "1". When the count reaches the count-a0th period of the first clock signal, the position corresponding to the third target count value count-a0 on the dimming data packet is taken as a target sampling position. Then, the counting of the first clock signal's period continues. When the count reaches the count-a1th period of the first clock signal, the position corresponding to the third target count value count-a1 on the dimming data packet is taken as another target sampling position, and so on, until the level transition edge of the synchronization signal in the next dimming data packet is detected. At this point, the period count value of the first clock signal is cleared to zero, and the counting starts again.

[0161] Reference Figure 8A and Figure 8B Since the time length between two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data in the dimming data packet, the multiple target sampling positions determined by the above method will always correspond to the middle position of 1 bit of dimming data. In this way, when sampling the dimming data packet at the target sampling position in the subsequent process, it can be guaranteed that the sampled data is the signal value at the middle position of 1 bit of dimming data, thereby ensuring the accuracy of the sampling results and achieving accurate parsing of the dimming data packet.

[0162] Step 2: The dimmer samples the dimming data packet at multiple target sampling locations to obtain N sampled data.

[0163] In practice, the dimmer samples N bits of dimming data from the dimming data packet at multiple target sampling positions determined in real time, obtaining N sampled data. Specifically, based on the period count value of the synchronization signal and the first clock signal, the dimmer samples the N bits of dimming data at each target sampling position it detects, obtaining one sampled data, until the sampling of the dimming data packet is completed.

[0164] In practical applications, the frequency of the clock signal generated by the oscillator inside the dimmer may shift to a certain extent due to factors such as temperature changes or semiconductor process errors. For example, the oscillator frequency may change from the ideal 50MHz to 51MHz. However, in this embodiment of the invention, since the target sampling position is determined in real time based on the clock mode signal and the first clock signal, even if there is a slight shift in the frequency of the first clock signal, the target sampling position can be accurately determined by determining multiple target count values ​​in real time. This ensures that the target sampling position always corresponds to the middle position of the 1-bit dimming data, eliminating the need to set a fixed sampling position separately and improving sampling accuracy. Furthermore, regardless of the situation, as long as the interval between each target sampling position meets the minimum sampling interval, the accuracy of the sampling data obtained at the target sampling position can be guaranteed.

[0165] Step 3: The dimmer generates target dimming data based on its own determined sampling data.

[0166] In some embodiments, the dimmer can select R consecutive sampled data points from a set dimming precision, and generate target dimming data based on these R sampled data points, where R is a positive integer and is determined according to the dimming precision. Specifically, if the dimming precision is R bits, the dimmer will determine a target dimming data point from every R sampled data points.

[0167] For example, assuming the dimming precision is 8 bits (i.e., the target dimming data can be any value within the range [0, 255]), if the dimmer obtains 8 sampled data points after sampling the dimming data packet, the dimmer can directly generate 1 target dimming data point based on these 8 sampled data points. If the dimmer obtains 4 sampled data points after sampling the dimming data packet, the dimmer needs to parse 2 dimming data packets to obtain 8 sampled data points, and then generate 1 target dimming data point.

[0168] Furthermore, in this embodiment of the invention, in order to achieve a balance between data transmission speed and data detection stability, the time length corresponding to 1 bit of dimming data in the dimming data packet is limited as follows:

[0169] In some embodiments, in N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; where M is a positive integer and M≥6.

[0170] Figure 9 A schematic diagram illustrating the time interval of 1 bit dimming data provided in an embodiment of the present invention is shown. For example... Figure 9As shown, within the interval corresponding to 1 bit dimming data, there needs to be a signal variation interval of 1 clock interval at both the start and end positions. Clock represents one period of the first clock signal. Since the sampling position corresponds to the middle position of the 1 bit dimming data, in order to ensure stable detection, a margin of 2 clock intervals is needed on both sides of the sampling position. Therefore, 1 bit dimming data requires a time length interval of at least 6 clock intervals.

[0171] For example, assuming the frequency of the oscillator inside the dimmer is 50MHz and the period of the first clock signal it generates is 20ns, then the time length corresponding to 1 bit of dimming data is: 6 × 20ns = 120ns. Therefore, the amount of dimming data that can be transmitted per second is 8.33Mbps (=1s / 120ns), which significantly improves the transmission speed.

[0172] The above embodiments, by setting the minimum time interval required for synchronization of each bit of dimming data, that is, setting the time length corresponding to 1 bit of dimming data to be consistent with the time length of M cycles of the first clock signal, can effectively improve the overall transmission speed of dimming data while ensuring stable detection of dimming data, avoiding dimming data recognition errors by the dimmer, and improving the system performance of the display device.

[0173] Based on the same concept, this invention also provides a backlight system. Since the principle of this backlight system in solving the problem is similar to the aforementioned dimming data transmission method, the implementation of this backlight system can refer to the implementation of the aforementioned dimming data transmission method, and the repeated parts will not be described again.

[0174] like Figure 10 As shown, the backlight system 20 provided in this embodiment of the invention may include a dimming controller 21 and a dimmer 22, wherein:

[0175] The dimmer 22 is electrically connected to the dimmer controller 21 via a single signal line 23;

[0176] The dimming controller 21 is used to: send a frame start identifier to the dimmer 22 within the display cycle of a frame image, and then continuously send multiple dimming data packets to the dimmer 22. Each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2.

[0177] The dimmer 22 is used to: determine target dimming data based on a sampling control signal and dimming data packets received by itself, wherein the sampling control signal includes at least a first clock signal generated by the dimmer itself.

[0178] In some embodiments, the sampling control signal further includes a clock mode signal, which is generated by the dimming controller; the dimmer 22 is specifically used for:

[0179] Multiple target sampling locations are determined based on the clock mode signal and the first clock signal;

[0180] At multiple target sampling locations, the dimming data packet is sampled to obtain N sampling data;

[0181] Based on the sampling data determined by itself, target dimming data is generated.

[0182] In some embodiments, the dimmer 22 is specifically used for:

[0183] Based on a first clock signal and a clock mode signal, multiple target count values ​​are determined, wherein the period of the first clock signal is less than the period of the clock mode signal;

[0184] The target sampling location is determined based on any two adjacent target counts from a plurality of target counts.

[0185] In some embodiments, the dimmer 22 is specifically used for:

[0186] The period of the first clock signal is counted, starting from the moment corresponding to the first level transition edge of the clock mode signal.

[0187] Based on the period count value of the first clock signal corresponding to multiple target times, multiple target count values ​​are determined, wherein the multiple target times are the times corresponding to the non-first level transition edge of the clock mode signal.

[0188] In some embodiments, the dimmer 22 is specifically used for:

[0189] The third target count value is determined based on the average of the first target count value and the second target count value, wherein the first target count value and the second target count value are any two adjacent target count values ​​among a plurality of target count values, and the first target count value is less than the second target count value;

[0190] Based on the third target count value and the dimming data packet, the target sampling position is determined. The time length between the target sampling position and the starting position is equal to the time length corresponding to one cycle of the third target count value of the first clock signal. The starting position is determined by the dimmer based on the synchronization signal in the dimming data packet.

[0191] In some embodiments, the dimming controller 21 is further configured to:

[0192] A clock mode signal is sent to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.

[0193] In some embodiments, the dimmer 22 is specifically used for:

[0194] The dimming data packets received by itself are detected, and after the synchronization signal is detected, the dimming data packets are sampled at multiple preset sampling positions based on the first clock signal to obtain N sampled data.

[0195] Based on the sampling data determined by itself, generate target dimming data;

[0196] The frequency difference between the first clock signal and the second clock signal meets a preset error threshold. The second clock signal is generated by the dimming controller and is used to send dimming data packets.

[0197] In some embodiments, in a dimming data packet, a synchronization signal precedes the N bits of dimming data;

[0198] In N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; where M is a positive integer and M≥6.

[0199] Based on the same concept, this invention also provides a display device. Since the principle of this display device in solving the problem is similar to that of the aforementioned backlight system, the implementation of this display device can refer to the implementation of the aforementioned backlight system, and the repeated parts will not be described again.

[0200] like Figure 11 As shown, the display device 30 provided in the embodiments of the present invention may include a backlight system 20 as provided in any of the above embodiments.

[0201] In specific implementations, the display device in this invention embodiment can be a smart terminal, smart mobile terminal, tablet computer, laptop computer, smart handheld device, personal computer (PC), computer, smart screen, display device, in-vehicle device, various wearable devices, personal digital assistant (PDA), etc.; among which, wearable devices include virtual reality (VR) devices, augmented reality (AR) devices, etc. Furthermore, other essential components of this display device are those that should be understood by those skilled in the art, and will not be described in detail here, nor should they be construed as limiting the invention.

[0202] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0203] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for transmitting dimming data, characterized in that, Applied to a backlight system, the backlight system including a dimming controller and a dimmer, the dimmer being electrically connected to the dimming controller via a single signal line, the method includes: Within the display cycle of one frame of image, after the dimming controller sends a frame start identifier to the dimmer, it continuously sends multiple dimming data packets to the dimmer. Each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2. The dimmer determines the target dimming data based on the sampling control signal and the dimming data packets it receives. The sampling control signal includes a first clock signal generated by the dimmer itself and a clock mode signal generated by the dimming controller. The clock mode signal is sent to the dimmer by the dimming controller after sending the frame start identifier and before continuously sending the multiple dimming data packets. The time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data. The target dimming data is determined as follows: the dimmer determines multiple target sampling positions based on the clock mode signal and the first clock signal; at the multiple target sampling positions, the dimming data packet is sampled to obtain N sampled data; and the target dimming data is generated based on the sampled data determined by itself.

2. The method as described in claim 1, characterized in that, The dimmer determines multiple target sampling positions based on the clock mode signal and the first clock signal, including: The dimmer determines multiple target count values ​​based on the first clock signal and the clock mode signal, wherein the period of the first clock signal is shorter than the period of the clock mode signal; The dimmer determines the target sampling position based on any two adjacent target count values ​​among the plurality of target count values.

3. The method as described in claim 2, characterized in that, The dimmer determines multiple target count values ​​based on the first clock signal and the clock mode signal, including: The dimmer counts the period of the first clock signal by taking the time corresponding to the first level transition edge of the clock mode signal as the starting time. The dimmer determines the plurality of target count values ​​based on the period count values ​​of the first clock signal corresponding to the plurality of target times, wherein the plurality of target times are the times corresponding to the non-first level transition edge of the clock mode signal.

4. The method as described in claim 2, characterized in that, The dimmer determines the target sampling position based on any two adjacent target count values ​​from the plurality of target count values, including: The dimmer determines a third target count value based on the average of the first target count value and the second target count value, wherein the first target count value and the second target count value are any two adjacent target count values ​​among the plurality of target count values, and the first target count value is less than the second target count value; The dimmer determines the target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to one cycle of the third target count value of the first clock signal, and the starting position is determined by the dimmer based on the synchronization signal in the dimming data packet.

5. The method as described in claim 1, characterized in that, The frequency difference between the first clock signal and the second clock signal meets a preset error threshold. The second clock signal is generated by the dimming controller and is used to send the dimming data packet.

6. The method according to any one of claims 1 to 5, characterized in that, In the dimming data packet, the synchronization signal is located before the N bits of dimming data; In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal, where M is a positive integer and M≥6.

7. A backlight system, characterized in that, Includes a dimming controller and a dimmer, wherein: The dimmer is electrically connected to the dimmer controller via a single signal line; The dimming controller is used to: send a frame start identifier to the dimming controller within the display cycle of a frame image, and then continuously send multiple dimming data packets to the dimming controller, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2; The dimmer is used to: determine target dimming data based on a sampling control signal and dimming data packets received by itself, wherein the sampling control signal includes a first clock signal generated by the dimmer itself and a clock mode signal generated by the dimming controller, and the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data. The dimming controller is further configured to: send the clock mode signal to the dimmer after sending the frame start identifier and before continuously sending the plurality of dimming data packets; Specifically, the dimmer is used to: determine multiple target sampling positions based on the clock mode signal and the first clock signal; sample the dimming data packet at the multiple target sampling positions to obtain N sampled data; and generate the target dimming data based on the sampled data it determines.

8. A display device, characterized in that, Includes the backlight system as described in claim 7.

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