Display device

Abstract

A display device includes a plurality of pixels arranged along a first direction and a second direction intersecting the first direction, each of the plurality of pixels including a first sub-pixel that emits light of a first color, a second sub-pixel that emits light of a second color different from the first color, and a third sub-pixel that emits light of a third color different from the first color and the second color. The plurality of pixels includes a first pixel in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are arranged in a first arrangement, and a second pixel in which the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a second arrangement, the first arrangement being an arrangement in which the first sub-pixel and the second sub-pixel are arranged in the first direction with respect to the third sub-pixel, and the second arrangement being an arrangement in which the first sub-pixel and the second sub-pixel are arranged in the second direction with respect to the third sub-pixel. The second array is an array linearly symmetric to the first array with respect to an axis parallel to the first direction, and the first pixels and the second pixels are alternately arranged in the first direction.

Description

[0001] Cross-reference of related applications

[0002] This application claims priority based on Japanese Patent Application No. 2024-039899, ​​filed on March 14, 2024, and incorporates by reference all the contents described in that Japanese Patent Application. Technical Field

[0003] Embodiments of the present invention relate to a display device. Background Art

[0004] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put into practical use. In such display devices, technology that can improve display quality is required. Summary of the Invention

[0005] Generally speaking, according to an embodiment, a display device includes a plurality of pixels arranged along a first direction and a second direction intersecting the first direction, each of the plurality of pixels including a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color different from the first color, and a third sub-pixel emitting light of a third color different from the first color and the second color. The plurality of pixels include a first pixel in which the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a first arrangement, and a second pixel in which the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a second arrangement. The first arrangement is an arrangement in which the first sub-pixel and the second sub-pixel are arranged along the second direction and the first sub-pixel and the second sub-pixel are arranged in the first direction relative to the third sub-pixel. The second arrangement is an arrangement that is line-symmetrical to the first arrangement with respect to an axis parallel to the first direction. The first pixel and the second pixel are alternately arranged in the first direction.

[0006] According to the embodiment, a display device capable of improving display quality can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A diagram showing a configuration example of a display device according to one embodiment.

[0008] Figure 2 It is a schematic plan view showing an example of the arrangement of sub-pixels in a pixel.

[0009] Figure 3 It is a schematic plan view showing an example of the structure of a pixel.

[0010] Figure 4 yes Figure 3 A schematic plan view of the rib layer.

[0011] Figure 5 It is along Figure 3 A schematic cross-sectional view of the display device taken along line AA in FIG.

[0012] Figure 6 It is a schematic plan view showing an example of the layout of pixels in the display area.

[0013] Figure 7 It will Figure 6 The pixels shown are enlarged schematic plan views.

[0014] Figure 8 It is a schematic plan view of a display device of a comparative example.

[0015] Figure 9 This is a plan view for explaining the effects of the display device according to one embodiment.

[0016] Figure 10 It is a schematic plan view showing another example of the layout of pixels in the display area.

[0017] Figure 11 It is a schematic plan view showing still another example of the layout of pixels in the display area. DETAILED DESCRIPTION

[0018] Refer to the attached Figure 1 Several implementation methods are described.

[0019] The disclosed content is merely an example, and those skilled in the art will readily conceive of appropriate modifications that maintain the spirit of the invention, which are naturally also included in the scope of the present invention. In addition, in order to make the description clearer, there are cases where the drawings schematically show the width, thickness, shape, etc. of each part compared to the actual state, but this is merely an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, structural elements that perform the same or similar functions as structural elements described above with respect to the already appeared figures are sometimes marked with the same reference numerals, and repeated detailed descriptions are appropriately omitted.

[0020] In the drawings, mutually orthogonal X-axis, Y-axis, and Z-axis are shown as needed for ease of understanding. The direction along the X-axis is referred to as the X-direction (first direction), the direction along the Y-axis is referred to as the Y-direction (second direction), and the direction along the Z-axis is referred to as the Z-direction. Furthermore, viewing various elements parallel to the Z-direction is referred to as planar viewing.

[0021] The display device of each embodiment is an organic electroluminescent display device having an organic light-emitting diode (OLED) as a display element, and can be installed in various electronic devices such as televisions, personal computers, vehicle-mounted equipment, tablet terminals, smartphones, mobile phone terminals, and wearable terminals.

[0022] Figure 1 This diagram shows an example configuration of a display device DSP according to one embodiment. The display device DSP includes an insulating substrate 10. The substrate 10 includes a display area DA for displaying an image and a peripheral area SA surrounding the display area DA. The substrate 10 may be made of glass or a flexible resin film.

[0023] In this embodiment, the shape of the substrate 10 when viewed in plan view is a rectangle. However, the shape of the substrate 10 when viewed in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0024] The display area DA includes a plurality of pixels PX arranged in a matrix along the X and Y directions. Each pixel PX includes a plurality of sub-pixels SP that emit light of different colors. In this embodiment, a pixel PX includes a sub-pixel SP1 (first sub-pixel) that emits red (first color), a sub-pixel SP2 (second sub-pixel) that emits green (second color), and a sub-pixel SP3 (third sub-pixel) that emits blue (third color). However, the pixel PX may also include sub-pixels SP of other colors, such as white, in addition to or instead of the sub-pixels SP1, SP2, and SP3.

[0025] The colors of light emitted by sub-pixels SP1, SP2, and SP3 are not limited to the above examples. For example, sub-pixel SP1 may emit green light, sub-pixel SP2 may emit red light, and sub-pixel SP3 may emit blue light. Alternatively, sub-pixel SP1 may emit red light, sub-pixel SP2 may emit blue light, and sub-pixel SP3 may emit green light.

[0026] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements formed of, for example, thin film transistors.

[0027] In the display area DA, a plurality of scanning lines GL for supplying scanning signals to the pixel circuits 1 of the sub-pixels SP, a plurality of signal lines SL for supplying image signals to the pixel circuits 1 of the sub-pixels SP, and a plurality of power supply lines PL are arranged. Figure 1 In the example of FIG, the scanning lines GL and the power supply lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0028] The gate electrode of the pixel switch 2 is connected to the scanning line GL. The source electrode of the pixel switch 2 is connected to the signal line SL. The drain electrode of the pixel switch 2 is connected to the gate electrode of the drive transistor 3 and the capacitor 4. The source electrode of the drive transistor 3 is connected to the power line PL and the capacitor 4. The drain electrode of the drive transistor 3 is connected to the display element DE.

[0029] The structure of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0030] Figure 2 1 is a schematic plan view showing an example of the arrangement of sub-pixels SP1, SP2, and SP3 in a pixel PX. Figure 2 (a) to Figure 2 As shown in (d), the plurality of pixels PX arranged in the display area DA include pixels PX1, PX2, PX3, and PX4. In the pixels PX1, PX2, PX3, and PX4, the arrangement of the sub-pixels SP1, SP2, and SP3 is different.

[0031] Figure 2 (a) is a schematic plan view showing an example of the arrangement of sub-pixels SP1, SP2, and SP3 in pixel PX1. Figure 2 As shown in (a), in pixel PX1 (first pixel), subpixels SP1, SP2, and SP3 are arranged in arrangement PT1 (first arrangement). Arrangement PT1 is an arrangement in which subpixels SP1 and SP2 are arranged along the Y direction, and subpixels SP1 and SP2 are arranged in the X direction relative to subpixel SP3.

[0032] Figure 2 (b) is a schematic plan view showing an example of the arrangement of sub-pixels SP1, SP2, and SP3 in pixel PX2. Figure 2 As shown in (b), in pixel PX2 (second pixel), sub-pixels SP1, SP2, and SP3 are arranged in an arrangement PT2 (second arrangement). The arrangement PT2 is parallel to the axis in the X direction. Figure 2 The arrangement PT1 shown in (a) is a line-symmetrical arrangement.

[0033] Figure 2 (c) is a schematic plan view showing an example of the arrangement of sub-pixels SP1, SP2, and SP3 in pixel PX3. Figure 2 As shown in (c), in pixel PX3 (the third pixel), sub-pixels SP1, SP2, and SP3 are arranged in an arrangement PT3 (the third arrangement). The arrangement PT3 is parallel to the axis in the Y direction. Figure 2 The arrangement PT1 shown in (a) is a line-symmetrical arrangement.

[0034] Figure 2 (d) is a schematic plan view showing an example of the arrangement of sub-pixels SP1, SP2, and SP3 in pixel PX4. Figure 2 As shown in (d), in pixel PX4 (the fourth pixel), sub-pixels SP1, SP2, and SP3 are arranged in an arrangement PT4 (the fourth arrangement). The arrangement PT4 is parallel to the axis in the X direction. Figure 2 The arrangement PT3 shown in (c) is a line-symmetric arrangement.

[0035] Figure 3 : is a schematic plan view showing an example of the structure of the pixel PX1. A rib layer 5 is arranged in the display area DA. The rib layer 5 has pixel openings AP1, AP2, and AP3 (first to third pixel openings) that overlap with the sub-pixels SP1, SP2, and SP3, respectively. Figure 3 In the example, pixel opening AP1 is smaller than pixel opening AP2, and both pixel openings AP1 and AP2 are smaller than pixel opening AP3. That is, among sub-pixels SP1, SP2, and SP3, sub-pixel SP1 has the smallest aperture ratio, while sub-pixel SP3 has the largest aperture ratio. Furthermore, the sizes of pixel openings AP1, AP2, and AP3 are not limited to this example. For example, pixel openings AP1 and AP2 may be the same size.

[0036] Subpixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1, each overlapping pixel opening AP1. Subpixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2, each overlapping pixel opening AP2. Subpixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3, each overlapping pixel opening AP3.

[0037] The lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 that overlaps with the pixel opening AP1 constitute the display element DE1 of subpixel SP1. The lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 that overlaps with the pixel opening AP2 constitute the display element DE2 of subpixel SP2. The lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 that overlaps with the pixel opening AP3 constitute the display element DE3 of subpixel SP3. The display elements DE1, DE2, and DE3 may further include an overlying layer, described later. The rib layer 5 surrounds each of the display elements DE1, DE2, and DE3.

[0038] The partition wall 6 is arranged in the display area DA. The partition wall 6 is located above the rib layer 5 and overlaps the rib layer 5 as a whole. Figure 3In the example shown, the partition wall 6 has the same planar shape as the rib layer 5. Specifically, the partition wall 6 has openings at each of the sub-pixels SP1, SP2, and SP3. From another perspective, the rib layer 5 and the partition wall 6 form a grid pattern when viewed in plan, surrounding each of the display elements DE1, DE2, and DE3. Furthermore, the partition wall 6 surrounds the pixel openings AP1, AP2, and AP3 when viewed in plan. The partition wall 6 serves as wiring for supplying a common voltage to the upper electrodes UE1, UE2, and UE3.

[0039] Figure 4 yes Figure 3 A schematic plan view of the rib layer 5 is shown. As shown, the four sides surrounding the pixel opening AP1 of sub-pixel SP1 are defined as sides S1a, S1b, S1c, and S1d; the four sides surrounding the pixel opening AP2 of sub-pixel SP2 are defined as sides S2a, S2b, S2c, and S2d; and the four sides surrounding the pixel opening AP3 of sub-pixel SP3 are defined as sides S3a, S3b, S3c, and S3d. Sides S1a, S1b, S2a, S2b, S3a, and S3b are parallel to the X direction. Sides S1c, S1d, S2c, S2d, S3c, and S3d are parallel to the Y direction.

[0040] Pixel opening AP1 has a width W1x along the X direction and a width W1y along the Y direction. Width W1x is equal to the distance between side S1c and side S1d along the X direction. Width W1y is equal to the distance between side S1a and side S1b along the Y direction. Pixel opening AP2 has a width W2x along the X direction and a width W2y along the Y direction. Width W2x is equal to the distance between side S2c and side S2d along the X direction. Width W2y is equal to the distance between side S2a and side S2b along the Y direction. Pixel opening AP3 has a width W3x along the X direction and a width W3y along the Y direction. Width W3x is equal to the distance between side S3c and side S3d along the X direction. Width W3y is equal to the distance between side S3a and side S3b along the Y direction.

[0041] exist Figure 4 In the example shown, width W1x is equal to width W2x (W1x=W2x). Width W1y is smaller than width W2y (W1y<W2y). The sum of widths W1y and W2y is smaller than width W3y (W1y+W2y<W3y).

[0042] The pixel opening AP1 has a center P1 (first center). Figure 4In the example shown, the distance between center P1 and side S1c along the X direction is equal to the distance between center P1 and side S1d along the X direction. In other words, the distance between center P1 and side S1c along the X direction, and the distance between center P1 and side S1d along the X direction, are equivalent to half of width W1x. Similarly, the distance between center P1 and side S1a along the Y direction is equal to the distance between center P1 and side S1b along the Y direction. In other words, the distance between center P1 and side S1a along the Y direction, and the distance between center P1 and side S1b along the Y direction, are equivalent to half of width W1y.

[0043] The pixel opening AP2 has a center P2 (second center). Figure 4 In the example shown, the distance between center P2 and side S2c along the X direction is equal to the distance between center P2 and side S2d along the X direction. That is, the distance between center P2 and side S2c along the X direction, and the distance between center P2 and side S2d along the X direction, are equal to half of width W2x. Similarly, the distance between center P2 and side S2a along the Y direction is equal to the distance between center P2 and side S2b along the Y direction. That is, the distance between center P2 and side S2a along the Y direction, and the distance between center P2 and side S2b along the Y direction, are equal to half of width W2y.

[0044] The pixel opening AP3 has a center P3 (third center). Figure 4 In the example shown, the distance between center P3 and side S3c along the X direction is equal to the distance between center P3 and side S3d along the X direction. That is, the distance between center P3 and side S3c along the X direction, and the distance between center P3 and side S3d along the X direction, are equivalent to half of width W3x. Similarly, the distance between center P3 and side S3a along the Y direction is equal to the distance between center P3 and side S3b along the Y direction. That is, the distance between center P3 and side S3a along the Y direction, and the distance between center P3 and side S3b along the Y direction, are equivalent to half of width W3y.

[0045] Figure 5 It is along Figure 3 A schematic cross-sectional view of the display device DSP taken along line AA in FIG. A circuit layer 11 is provided on the substrate 10. The circuit layer 11 includes Figure 1 The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 functions as a planarizing film that flattens the unevenness generated by the circuit layer 11.

[0046] The lower electrodes LE1, LE2, and LE3 are arranged on the organic insulating layer 12. The rib layer 5 is arranged on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the rib layer 5. Figure 5 The cross section is not shown, but the lower electrodes LE1, LE2, and LE3 are connected to the pixel circuit 1 ( Figure 1 The drain electrode of the driving transistor 3 shown is connected.

[0047] The partition wall 6 includes a conductive lower portion 61 disposed on the rib layer 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a greater width than the lower portion 61. As a result, both ends of the upper portion 62 protrude beyond the side surfaces of the lower portion 61. This shape of the partition wall 6 is called an overhang.

[0048] exist Figure 5 In the example, the lower portion 61 has a bottom layer 63 and a shaft layer 64. The bottom layer 63 is located between the shaft layer 64 and the rib layer 5 and is formed thinner than the shaft layer 64. Figure 5 In the example shown in FIG. 5 , both end portions of the bottom layer 63 protrude from the side surfaces of the shaft layer 64 .

[0049] The organic layer OR1 passes through the pixel opening AP1 and covers the lower electrode LE1. The upper electrode UE1 covers the organic layer OR1 and is opposite to the lower electrode LE1. The organic layer OR2 passes through the pixel opening AP2 and covers the lower electrode LE2. The upper electrode UE2 covers the organic layer OR2 and is opposite to the lower electrode LE2. The organic layer OR3 passes through the pixel opening AP3 and covers the lower electrode LE3. The upper electrode UE3 covers the organic layer OR3 and is opposite to the lower electrode LE3. The upper electrodes UE1, UE2, and UE3 are in contact with the side surface of the lower portion 61 of the partition wall 6.

[0050] Display element DE1 includes an upper cover layer CP1 covering upper electrode UE1. Display element DE2 includes an upper cover layer CP2 covering upper electrode UE2. Display element DE3 includes an upper cover layer CP3 covering upper electrode UE3. The upper cover layers CP1, CP2, and CP3 respectively function as optical adjustment layers, improving the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3.

[0051] In the following description, the multilayer body including the organic layer OR1, the upper electrode UE1 and the upper covering layer CP1 is referred to as the stacked film FL1 (the first stacked film), the multilayer body including the organic layer OR2, the upper electrode UE2 and the upper covering layer CP2 is referred to as the stacked film FL2 (the second stacked film), and the multilayer body including the organic layer OR3, the upper electrode UE3 and the upper covering layer CP3 is referred to as the stacked film FL3 (the third stacked film).

[0052] A portion of the laminate film FL1 is located above the upper portion 62. This portion is separated from the portion of the laminate film FL1 surrounding the partition wall 6 (the portion constituting the display element DE1). Similarly, a portion of the laminate film FL2 is located above the upper portion 62 and is separated from the portion of the laminate film FL2 surrounding the partition wall 6 (the portion constituting the display element DE2). Furthermore, a portion of the laminate film FL3 is located above the upper portion 62 and is separated from the portion of the laminate film FL3 surrounding the partition wall 6 (the portion constituting the display element DE3).

[0053] Sealants SE11, SE12, and SE13 (first to third sealants) are provided in sub-pixels SP1, SP2, and SP3, covering the laminate films FL1, FL2, and FL3, respectively. Specifically, sealant SE11 continuously covers the overcoat layer CP1 and the partition wall 6 surrounding sub-pixel SP1. Sealant SE12 continuously covers the overcoat layer CP2 and the partition wall 6 surrounding sub-pixel SP2. Sealant SE13 continuously covers the overcoat layer CP3 and the partition wall 6 surrounding sub-pixel SP3.

[0054] exist Figure 5 In the example shown in FIG1 , the laminated film FL1 and the sealing layer SE11 on the partition wall 6 between the sub-pixels SP1 and SP2 are separated from the laminated film FL2 and the sealing layer SE12 on the partition wall 6. Furthermore, the laminated film FL1 and the sealing layer SE11 on the partition wall 6 between the sub-pixels SP1 and SP3 are separated from the laminated film FL3 and the sealing layer SE13 on the partition wall 6.

[0055] Sealing layers SE11, SE12, and SE13 are covered by resin layer RS1. Resin layer RS1 is covered by sealing layer SE2. Sealing layer SE2 is covered by resin layer RS2. Resin layers RS1, RS2, and sealing layer SE2 are continuously provided at least throughout the display area DA, and a portion thereof also reaches the peripheral area SA.

[0056] A cover member such as a polarizing plate, a protective film, or a cover glass may be further disposed on the resin layer RS2. Such a cover member may be bonded to the resin layer RS2 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0057] The organic insulating layer 12 is formed of an organic insulating material such as polyimide. The rib layer 5 and the sealing layers SE11, SE12, SE13, and SE2 are formed of inorganic insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON). In one example, the rib layer 5 is formed of silicon oxynitride, and the sealing layers SE11, SE12, SE13, and SE2 are formed of silicon nitride. The resin layers RS1 and RS2 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin.

[0058] The lower electrodes LE1, LE2, and LE3 include a reflective layer and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. The reflective layer can be formed of a metal material with excellent light reflectivity, such as silver. Each conductive oxide layer can be formed of a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0059] The upper electrodes UE1, UE2, and UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg). For example, the lower electrodes LE1, LE2, and LE3 correspond to anodes, and the upper electrodes UE1, UE2, and UE3 correspond to cathodes.

[0060] The organic layers OR1, OR2, and OR3 are composed of multiple thin films including a light-emitting layer. In one example, the organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer are stacked in this order along the Z direction. However, the organic layers OR1, OR2, and OR3 may also have other structures, such as a so-called tandem structure including multiple light-emitting layers.

[0061] The upper covering layers CP1, CP2, and CP3 have, for example, a laminated structure composed of multiple overlapping transparent layers. These transparent layers can include layers formed from inorganic materials and layers formed from organic materials. Furthermore, these transparent layers have different refractive indices. For example, the refractive indices of these transparent layers differ from those of the upper electrodes UE1, UE2, and UE3 and the sealing layers SE11, SE12, and SE13. Furthermore, at least one of the upper covering layers CP1, CP2, and CP3 may be omitted.

[0062] The base layer 63 and the shaft layer 64 of the partition wall 6 are formed of a metal material. Examples of metal materials for the base layer 63 include molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW), or molybdenum-niobium alloy (MoNb). Examples of metal materials for the shaft layer 64 include aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY), or aluminum-silicon alloy (AlSi). Alternatively, the shaft layer 64 may be formed of an insulating material.

[0063] For example, the upper portion 62 of the partition wall 6 has a laminated structure comprising a lower layer formed of a metal material and an upper layer formed of a conductive oxide. Examples of the metal material forming the lower layer include titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy. Examples of the conductive oxide forming the upper layer include ITO or IZO. Alternatively, the upper portion 62 may have a single-layer structure of a metal material. Furthermore, the upper portion 62 may include a layer formed of an insulating material.

[0064] A common voltage is supplied to the partition wall 6. This common voltage is supplied to the upper electrodes UE1, UE2, and UE3, which are in contact with the side surfaces of the lower portion 61. The lower electrodes LE1, LE2, and LE3 are supplied with pixel voltages corresponding to the video signals on the signal lines SL via the pixel circuits 1 of the sub-pixels SP1, SP2, and SP3, respectively.

[0065] The organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, when a potential difference is established between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer of the organic layer OR1 emits light in the red wavelength range. When a potential difference is established between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer of the organic layer OR2 emits light in the green wavelength range. When a potential difference is established between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer of the organic layer OR3 emits light in the blue wavelength range.

[0066] As another example, the light-emitting layers of the organic layers OR1, OR2, and OR3 may emit light of the same color (e.g., white). In this case, the display device DSP may include a color filter that converts the light emitted by the light-emitting layer into light of the colors corresponding to the sub-pixels SP1, SP2, and SP3. Alternatively, the display device DSP may include a layer containing quantum dots that are excited by the light emitted by the light-emitting layer to generate light of the colors corresponding to the sub-pixels SP1, SP2, and SP3.

[0067] In addition, Figures 3 to 5 The structure of the pixel PX1 is described in detail in Figure 2 The same structure as that of the pixel PX1 can also be applied to the pixels PX2 , PX3 , and PX4 shown.

[0068] Figure 61 is a schematic plan view showing an example of the layout of pixels PX1 to PX4 in the display area DA. Figure 6 In the example shown, pixels PX1 and PX2 are arranged alternately in the X direction, and pixels PX3 and PX4 are arranged alternately in the X direction. Furthermore, pixels PX1 and PX3 are arranged alternately in the Y direction, and pixels PX2 and PX4 are arranged alternately in the Y direction. In the display area DA, the columns in which pixels PX1 and PX2 are arranged alternately in the X direction, and the columns in which pixels PX3 and PX4 are arranged alternately in the X direction, are arranged alternately in the Y direction. From another perspective, in the display area DA, the columns in which pixels PX1 and PX3 are arranged alternately in the Y direction, and the columns in which pixels PX2 and PX4 are arranged alternately in the Y direction, are arranged alternately in the X direction.

[0069] Figure 7 It will Figure 6 The diagram shows an enlarged schematic plan view of pixels PX1 to PX4. In one example, the center P1 of one of two pixels PX adjacent in the X direction and the center P2 of the other pixel PX are arranged on a straight line parallel to the X direction. Furthermore, the center P3 of each of two pixels PX adjacent in the X direction is arranged on a straight line parallel to the X direction.

[0070] exist Figure 7 In the example shown, pixels PX1 and PX2 are adjacent to each other along the X direction, and the center P1 of pixel PX1 and the center P2 of pixel PX2 are arranged on a straight line LX1 parallel to the X direction. Furthermore, the center P3 of each pixel PX1 and PX2 is arranged on a straight line LX2 parallel to the X direction. Furthermore, the center P1 of pixel PX2 and the center P2 of pixel PX1 are arranged on a straight line LX3 parallel to the X direction.

[0071] exist Figure 7 In the example shown, pixels PX3 and PX4 are adjacent to each other along the X direction, and the center P1 of pixel PX3 and the center P2 of pixel PX4 are arranged on a straight line LX4 parallel to the X direction. Furthermore, the center P3 of each pixel PX3 and PX4 is arranged on a straight line LX5 parallel to the X direction. Furthermore, the center P1 of pixel PX4 and the center P2 of pixel PX3 are arranged on a straight line LX6 parallel to the X direction.

[0072] In one example, centers P1 and P2 of one pixel PX and center P3 of the other pixel PX of two pixels PX adjacent to each other in the Y direction are arranged on a straight line parallel to the Y direction.

[0073] exist Figure 7In the example shown, pixels PX1 and PX3 are adjacent to each other along the Y direction, and the centers P1 and P2 of pixel PX1 and the center P3 of pixel PX3 are arranged on a straight line LY1 parallel to the Y direction. Furthermore, the centers P1 and P2 of pixel PX3 and the center P3 of pixel PX1 are arranged on a straight line LY2 parallel to the Y direction.

[0074] exist Figure 7 In the example shown, pixels PX2 and PX4 are adjacent to each other along the Y direction, and the centers P1 and P2 of pixels PX2 and the center P3 of pixel PX4 are arranged on a straight line LY3 ​​parallel to the Y direction. Furthermore, the centers P1 and P2 of pixels PX4 and the center P3 of pixel PX2 are arranged on a straight line LY4 parallel to the Y direction.

[0075] Here, use Figure 8 and Figure 9 The effects achieved by this embodiment will be described.

[0076] Figure 8 FIG. 1 is a schematic plan view of a display device DSP of a comparative example. In this comparative example, a plurality of pixels PX1 are arranged in a display area DA. Figure 8 In the example shown, a plurality of pixels PX1 displaying white (the four central pixels PX1) and a plurality of pixels PX1 surrounding these pixels PX1 and displaying black (the pixels PX1 marked with a dot pattern) are shown. The area between the sub-pixels SP1 and SP3 of the pixel PX1 displaying white and the sub-pixels SP2 and SP3 of the pixel PX1 displaying black is defined as the first area AR1. Similarly, the area between the sub-pixels SP2 and SP3 of the pixel PX1 displaying white and the sub-pixels SP1 and SP3 of the pixel PX1 displaying black is defined as the second area AR2. The area between the sub-pixels SP1 and SP2 of the pixel PX1 displaying white and the sub-pixel SP3 of the pixel PX1 displaying black is defined as the third area AR3. The area between the sub-pixel SP3 of the pixel PX1 displaying white and the sub-pixels SP1 and SP2 of the pixel PX1 displaying black is defined as the fourth area AR4.

[0077] In the structure of this comparative example, the red sub-pixel SP1 and the blue sub-pixel SP3 overlap with the first area AR1, the green sub-pixel SP2 and the blue sub-pixel SP3 overlap with the second area AR2, the red sub-pixel SP1 and the green sub-pixel SP2 overlap with the third area AR3, and the blue sub-pixel SP3 overlaps with the fourth area AR4. According to such a structure, there is a concern that magenta, a mixture of red and blue, may be visually recognized in the first area AR1. Similarly, there is a concern that cyan, a mixture of green and blue, may be visually recognized in the second area AR2, yellow, a mixture of red and green, may be visually recognized in the third area AR3, and blue may be visually recognized in the fourth area AR4. In this way, if an unintended color is visually recognized at the boundary between the area displaying white and the area displaying black, the display quality of the display device DSP may be reduced.

[0078] Figure 9 1 is a diagram for explaining the effect of the DSP of the display device of this embodiment. Figure 9 In the example shown, pixels PX1 to PX4 displaying white (the four pixels PX1 to PX4 in the center) and pixels PX1 to PX4 surrounding the pixels PX1 to PX4 and displaying black (the pixels PX1 to PX4 marked with a dot pattern) are shown. Figure 9 In the example shown, the area between pixels PX1 and PX2 displaying white and pixels PX3 and PX4 displaying black is defined as a first area AR1. Similarly, the area between pixels PX3 and PX4 displaying white and pixels PX1 and PX2 displaying black is defined as a second area AR2. The area between pixels PX1 and PX3 displaying white and pixels PX2 and PX4 displaying black is defined as a third area AR3. The area between pixels PX2 and PX4 displaying white and pixels PX1 and PX3 displaying black is defined as a fourth area AR4.

[0079] In this embodiment, the red sub-pixel SP1, the green sub-pixel SP2, and the blue sub-pixel SP3 overlap with each of the first to fourth areas AR1 to AR4. This structure allows for a white color, a mixture of red, green, and blue, to be visually recognized within the first to fourth areas AR1 to AR4. This sharpens the boundary between white and black, improving the display quality of the display device DSP.

[0080] In the display device DSP of this embodiment, the center P1 of one of two pixels PX adjacent in the X direction and the center P2 of the other pixel PX are arranged on a straight line parallel to the X direction. Furthermore, the centers P1 and P2 of one of two pixels PX adjacent in the Y direction and the center P3 of the other pixel PX are arranged on a straight line parallel to the Y direction. This makes the boundary between white and black more distinct, improving the display quality of the display device DSP.

[0081] Figure 10 1 is a schematic plan view showing another example of the layout of the pixels PX1 and PX2 in the display area DA. Figure 10 In the example shown, pixels PX1 and PX2 are arranged alternately in the X direction. Within the display area DA, the columns of pixels PX1 and PX2 arranged alternately in the X direction are repeated in the Y direction. From another perspective, pixels PX1 are repeated in the Y direction, and pixels PX2 are repeated in the Y direction. Furthermore, within the display area DA, the columns of pixels PX1 repeated in the Y direction and the columns of pixels PX2 repeated in the Y direction are alternately arranged in the X direction.

[0082] exist Figure 10 In the pixel layout shown, Figure 8 In the illustrated first region AR1 and second region AR2 , the same effects as those described above can be obtained.

[0083] Figure 11 1 is a schematic plan view showing still another example of the layout of the pixels PX1 and PX3 in the display area DA. Figure 11 In the example shown, pixels PX1 and PX3 are arranged alternately in the Y direction. Within the display area DA, the columns of pixels PX1 and PX3 arranged alternately in the Y direction are repeated in the X direction. From another perspective, pixels PX1 are repeatedly arranged in the X direction, and pixels PX3 are repeatedly arranged in the X direction. Furthermore, within the display area DA, the columns of pixels PX1 repeatedly arranged in the X direction and the columns of pixels PX3 repeatedly arranged in the X direction are alternately arranged in the Y direction.

[0084] exist Figure 11 In the pixel layout shown, Figure 8 In the third area AR3 and the fourth area AR4 shown, the same effects as those described above can be obtained.

[0085] Any display device that can be implemented by those skilled in the art by appropriately changing the design based on the display device described above as the embodiment of the present invention also falls within the scope of the present invention as long as it includes the gist of the present invention.

[0086] Within the scope of the present invention, those skilled in the art will be able to conceive of various variations, and such variations are also considered to fall within the scope of the present invention. For example, with respect to the above-described embodiments, those skilled in the art may appropriately add, delete, or modify the design of structural elements, or add, omit, or modify the conditions of processes, and as long as they retain the gist of the present invention, such variations are included within the scope of the present invention.

[0087] Furthermore, regarding other effects brought about by the solutions described in the above embodiments, effects that are clear from the description of this specification or solutions that can be appropriately conceived by those skilled in the art are of course also interpreted as brought about by the present invention.

Claims

1. A display device, characterized in that: A plurality of pixels are arranged along a first direction and a second direction intersecting the first direction. Each of the plurality of pixels comprises: a first sub-pixel emitting light of a first color; a second sub-pixel emitting light of a second color different from the first color; and a third sub-pixel emitting light of a third color different from the first color and the second color, The plurality of pixels comprises: A first pixel in which the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a first arrangement; and The first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a second arrangement. The first arrangement is an arrangement in which the first sub-pixel and the second sub-pixel are arranged along the second direction, and the first sub-pixel and the second sub-pixel are arranged in the first direction relative to the third sub-pixel. The second arrangement is an arrangement that is line-symmetrical to the first arrangement with respect to an axis parallel to the first direction. The first pixels and the second pixels are alternately arranged in the first direction.

2. The display device according to claim 1, wherein The rows in which the first pixels and the second pixels are alternately arranged in the first direction are repeatedly arranged along the second direction.

3. The display device according to claim 2, wherein: The first pixels are repeatedly arranged in the second direction, The second pixels are repeatedly arranged in the second direction.

4. The display device according to claim 1, wherein further comprising a rib layer having a first pixel opening overlapping with the first sub-pixel, a second pixel opening overlapping with the second sub-pixel, and a third pixel opening overlapping with the third sub-pixel, The first pixel opening has a first center, The second pixel opening has a second center, The first center of one of the two pixels adjacent to each other in the first direction and the second center of the other pixel are arranged on a straight line parallel to the first direction.

5. The display device according to claim 4, wherein: The third pixel opening has a third center, The third centers of the two pixels adjacent to each other in the first direction are arranged on a straight line parallel to the first direction.

6. The display device according to claim 5, wherein: further comprising a partition wall including a lower portion disposed above the rib layer and an upper portion having an end portion protruding from a side surface of the lower portion, The partition walls are formed in a lattice shape surrounding the first pixel opening, the second pixel opening, and the third pixel opening in a plan view.

7. The display device according to claim 1, wherein The plurality of pixels further comprises: a third pixel in which the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a third arrangement; and The first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a fourth arrangement to form a fourth pixel. The third arrangement is an arrangement that is line-symmetrical to the first arrangement with respect to an axis parallel to the second direction. The fourth arrangement is an arrangement that is line-symmetrical to the third arrangement with respect to an axis parallel to the first direction. The third pixels and the fourth pixels are alternately arranged in the first direction.

8. The display device according to claim 7, wherein: The columns in which the first pixels and the second pixels are alternately arranged in the first direction and the columns in which the third pixels and the fourth pixels are alternately arranged in the first direction are alternately arranged along the second direction.

9. The display device according to claim 8, wherein The first pixels and the third pixels are alternately arranged in the second direction, The second pixels and the fourth pixels are alternately arranged in the second direction.

10. The display device according to claim 7, wherein: further comprising a rib layer having a first pixel opening overlapping with the first sub-pixel, a second pixel opening overlapping with the second sub-pixel, and a third pixel opening overlapping with the third sub-pixel, The first pixel opening has a first center, The second pixel opening has a second center, The first center of one of the two pixels adjacent to each other in the first direction and the second center of the other pixel are arranged on a straight line parallel to the first direction.

11. The display device according to claim 10, wherein: The third pixel opening has a third center, The third centers of the two pixels adjacent to each other in the first direction are arranged on a straight line parallel to the first direction.

12. The display device according to claim 11, wherein The first center and the second center of one of the two pixels adjacent to each other in the second direction and the third center of the other pixel are arranged on a straight line parallel to the second direction.

13. The display device according to claim 4, wherein: A width of the first pixel opening along the second direction is smaller than a width of the second pixel opening along the second direction.

14. The display device according to claim 4, wherein: A width of the first pixel opening along the first direction is equal to a width of the second pixel opening along the first direction.

15. The display device according to claim 4, wherein A total width of the first pixel opening and the second pixel opening along the second direction is smaller than a width of the third pixel opening along the second direction.

16. The display device according to claim 4, wherein The first pixel opening is smaller than the second pixel opening.

17. The display device according to claim 16, wherein: The first pixel opening and the second pixel opening are smaller than the third pixel opening.

18. The display device according to any one of claims 1 to 17, characterized in that The first color is red, the second color is green, and the third color is blue.

19. The display device according to any one of claims 1 to 17, characterized in that The first color is green, the second color is red, and the third color is blue.

20. The display device according to any one of claims 1 to 17, characterized in that The first color is red, the second color is blue, and the third color is green.

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