Dynamic power supply reconstruction self-adaptive sampling electric energy quality monitoring system
Through dynamic power management and adaptive sampling technology, combined with harmonic analysis accelerator and dual-path interrupt processing, the problems of insufficient sampling accuracy, excessive power consumption and poor data security in the power quality monitoring system are solved, and efficient and reliable power quality monitoring is achieved.
Patent Information
- Application Number
- CN202511233553.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-01
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-09-01
AI Technical Summary
Existing power quality monitoring systems have difficulty balancing sampling accuracy and power consumption control. They suffer from severe power ripple interference, slow response speed, and poor data security, making it impossible to achieve dynamic power management and adaptive sampling.
It adopts a dynamic power management core, an adaptive analog-to-digital conversion module, a harmonic analysis accelerator, and a dual-path interrupt processing module, combined with an electrically erasable programmable read-only memory to achieve dynamic power reconfiguration, adaptive sampling, and fast harmonic analysis, enhancing data security.
It improves sampling accuracy and anti-interference ability, enhances response speed and data security, and optimizes the reliability and stability of power quality monitoring.
Smart Images

Figure CN120722247A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of power system monitoring, and relates to a dynamic power supply reconstruction adaptive sampling power quality monitoring system. Background Art
[0002] As power systems operate, power quality directly impacts the safe and stable operation of power equipment and the user experience. Harmonic distortion is one of the primary factors contributing to power quality degradation. Real-time, accurate monitoring of parameters such as the amplitude of the fundamental wave and individual harmonics is crucial for promptly identifying power system anomalies and implementing targeted remediation measures.
[0003] Existing power quality monitoring systems struggle to balance sampling accuracy and power consumption. To improve sampling accuracy, the oversampling rate is typically set and maintained at a fixed high level, increasing system power consumption and hindering long-term stable operation. Furthermore, power supply ripple can interfere with the sampled signal, and existing systems lack effective dynamic compensation mechanisms, making it difficult to ensure sampling accuracy under varying operating conditions.
[0004] Furthermore, traditional systems employ a rigid power management approach, with each functional module constantly powered. This prevents dynamic adjustment of power domains based on computational tasks, resulting in energy waste. Furthermore, regarding the real-time nature of harmonic analysis and data security, existing systems suffer from slow interrupt response speeds, and critical distortion waveform data is susceptible to tampering, impacting the reliability of monitoring results and the effectiveness of subsequent analysis.
[0005] Therefore, there is an urgent need for a power quality monitoring system that can realize dynamic power management, adaptive sampling adjustment, fast harmonic analysis and secure data storage to solve the problems of insufficient sampling accuracy, excessive power consumption, slow response and poor data security in the existing technology. Summary of the Invention
[0006] In order to solve the problems existing in the background technology, the present invention proposes a dynamic power supply reconstruction adaptive sampling power quality monitoring system, which aims to solve the problems existing in the prior art such as insufficient sampling accuracy, excessive power consumption, slow response and poor data security.
[0007] A first aspect of the present application provides a dynamic power reconfiguration adaptive sampling power quality monitoring system, comprising: a dynamic power management core, an adaptive analog-to-digital conversion module, a harmonic analysis accelerator, a dual-path interrupt processing module, and a data storage and communication module; The dynamic power management core divides the system into three independent power supply domains: the microcontroller core, the analog-to-digital conversion domain, and the communication domain, so that the system can control the power supply of each independent power supply domain and calculate the compensation coefficient according to the voltage change; The adaptive analog-to-digital conversion module includes a programmed gain amplifier, which transmits the compensation coefficient generated by the dynamic power management core to the programmed gain amplifier for dynamically adjusting the gain level, offsetting the interference of power ripple on sampling, and generating a sampling sequence; The harmonic analysis accelerator performs Blackman-Harris window processing on the received sampling sequence to generate a target sequence, pre-processes the target sequence, and then calculates the abnormal harmonic amplitude using an amplitude correction formula to generate a harmonic amplitude limit-exceeding signal; The dual-path interrupt processing module includes a non-maskable interrupt channel, which receives a harmonic amplitude exceeding limit signal and triggers a power quality abnormality alarm of the system; The data storage and communication module includes an electrically erasable programmable read-only memory (EEPROM), which includes a protected storage area and is associated with a physical fuse circuit.
[0008] Optionally, the dynamic power management core is configured with a voltage tracking circuit, and the voltage tracking circuit further includes a compensation coefficient generator, and the compensation coefficient generator is calculated according to the formula Calculate the compensation coefficient, where is the compensation coefficient, ΔV is the difference between the input voltage and the reference voltage, and α is a function of the load current of the low dropout regulator.
[0009] Optionally, the adaptive analog-to-digital conversion module further includes an oversampling rate dynamic regulator, wherein the oversampling rate dynamic regulator is calculated according to the formula OSR=\left [ {\frac {{f}_{s}} {2.5\times {f}_{in}}} \right ] Automatically configure the oversampling ratio, where The sampling frequency is 125 kilosamples per second. is the input signal frequency, OSR is the oversampling rate.
[0010] Optionally, the adjustment rules of the oversampling rate dynamic regulator are: when the input signal frequency is ≤50Hz, the oversampling rate = 64; when 50Hz<input signal frequency ≤1000Hz, the oversampling rate = 32; when the input signal frequency is >1000Hz, the oversampling rate OSR = 8 and the 8th-order anti-aliasing digital filter is started.
[0011] Optionally, the formula for calculating the abnormal harmonic amplitude is {A}_{k}=\frac {2\left | {x\left [ {k} \right ]} \right |} {N{\Sigma}^{N-1}_{n=0}w\left [ {n} \right ]} ,in, is the amplitude of the kth harmonic, X\left [ {} \right ]\left [ {k} \right ] is the Fourier transform output value, N is the number of sampling points, \omega \left [ {n} \right ] is a sequence of window functions.
[0012] Optionally, the dual-path interrupt processing module further includes the maskable interrupt channel, which receives an external trigger signal and is connected to the interrupt controller via a programmable frequency divider.
[0013] Optionally, the data storage and communication module further includes a communication domain, and the communication domain includes a protocol conversion and level adaptation circuit.
[0014] Optionally, when the communication domain is activated, the dynamic power management core adjusts the supply voltage to a range specified by the protocol.
[0015] Optionally, in the initial state of the system, the dynamic power management core only keeps the micro control unit core powered, and the analog-to-digital conversion domain and the communication domain are in a power-off state.
[0016] Optionally, the dynamic power management core immediately turns off the power supply to the analog-to-digital conversion domain after sampling is completed; when Fourier transform needs to be performed, only the microcontroller core and the harmonic analysis accelerator are kept powered.
[0017] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a dynamic power reconfiguration adaptive sampling power quality monitoring system, comprising: a dynamic power management core, an adaptive analog-to-digital conversion module, a harmonic analysis accelerator, a dual-path interrupt processing module, and a data storage and communication module; the dynamic power management core is divided into three power supply domains and calculates compensation coefficients; the adaptive analog-to-digital conversion module uses the coefficients to adjust the gain to offset interference; the harmonic analysis accelerator generates an over-limit signal after processing; the dual-path interrupt processing module receives the signal and triggers an alarm; the data storage and communication module contains an electrically erasable programmable read-only memory with a protected storage area and an associated fuse circuit.
[0018] The present invention combines dynamic power management with adaptive analog-to-digital conversion to improve sampling anti-interference capability and accuracy. Harmonic analysis is processed and corrected through professional windows to enhance the accuracy of abnormal harmonic identification. Dual-path interruption ensures timely triggering of abnormal alarms and improves real-time response speed. The data storage area is equipped with protection and fuse circuits to enhance data security and anti-tampering capabilities, thereby optimizing the reliability and stability of power quality monitoring as a whole. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 12 is a schematic diagram of a power quality monitoring system for dynamic power supply reconstruction and adaptive sampling according to an embodiment of the present invention. DETAILED DESCRIPTION
[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0021] In one embodiment, if Figure 1 As shown, a dynamic power reconfiguration adaptive sampling power quality monitoring system is provided. The dynamic power reconfiguration adaptive sampling power quality monitoring system includes: a dynamic power management core, an adaptive analog-to-digital conversion module, a harmonic analysis accelerator, a dual-path interrupt processing module, and a data storage and communication module. The functional modules are described in detail as follows: The dynamic power management core divides the system into three independent power supply domains: the microcontroller core, the analog-to-digital conversion domain, and the communication domain. This allows the system to control the power supply of each independent power supply domain and calculate compensation coefficients based on voltage changes. In the system's initial state, the dynamic power management core only maintains power to the microcontroller core, while the analog-to-digital conversion domain and the communication domain are powered off. After sampling is completed, the dynamic power management core immediately shuts off power to the analog-to-digital conversion domain. When Fourier transform is required, only the microcontroller core and the harmonic analysis accelerator remain powered.
[0022] The dynamic power management core is configured with a voltage tracking circuit, and the voltage tracking circuit also includes a compensation coefficient generator, and the compensation coefficient generator is configured according to the formula Calculate the compensation coefficient, where is the compensation coefficient, ΔV is the difference between the input voltage and the reference voltage, and α is a function of the load current of the low-dropout regulator. The dynamic power management core also includes a load prediction circuit that can preemptively power the target domain based on the computational task. This circuit, in conjunction with the priority arbiter, can restore power to the corresponding domain in response to an interrupt, ensuring that the system can quickly start relevant modules when needed, while balancing response speed and energy consumption.
[0023] The adaptive analog-to-digital conversion module includes a programmable gain amplifier that transmits the compensation coefficient generated by the dynamic power management core to the programmable gain amplifier for dynamically adjusting the gain level, offsetting the interference of power supply ripple on sampling, and generating a sampling sequence. The adaptive analog-to-digital conversion module also includes a dynamic oversampling rate regulator, which is calculated according to the formula OSR=\left [ {\frac {{f}_{s}} {2.5\times {f}_{in}}} \right ] Automatically configure the oversampling ratio, where The sampling frequency is 125 kilosamples per second. is the input signal frequency, OSR is the oversampling rate.
[0024] The adaptive analog-to-digital conversion module also includes an oversampling rate dynamic regulator, and the adjustment rule of the oversampling rate dynamic regulator is: when the input signal frequency is ≤50Hz, the oversampling rate = 64; when 50Hz<input signal frequency ≤1000Hz, the oversampling rate = 32; when the input signal frequency is >1000Hz, the oversampling rate OSR = 8 and the 8th-order anti-aliasing digital filter is started.
[0025] The adaptive analog-to-digital conversion module also includes a synchronous timing controller that adjusts the sampling clock phase to coincide with the power supply ripple valley. Sampling during the power supply ripple valley minimizes the impact of ripple on the sampled signal, further improving sampling accuracy and providing high-quality sampled data for subsequent harmonic analysis.
[0026] The adaptive analog-to-digital conversion module collaboratively achieves high-precision sampling and conversion of electric energy analog signals through the above-mentioned functions such as dynamic adjustment of oversampling rate, dynamic adjustment of gain, and synchronous timing control, laying a solid foundation for the stable operation and accurate analysis of the entire power quality monitoring system.
[0027] The harmonic analysis accelerator performs Blackman-Harris windowing on the received sampling sequence to generate a target sequence, preprocesses the target sequence, and then calculates the harmonic amplitude using an amplitude correction formula. If an abnormality is found, a harmonic amplitude exceedance signal is generated. The formula for calculating abnormal harmonic amplitude is {A}_{k}=\frac {2\left | {x\left [ {k} \right ]} \right |} {N{\Sigma}^{N-1}_{n=0}w\left [ {n} \right ]} ,in, is the amplitude of the kth harmonic, X\left [ {} \right ]\left [ {k} \right ] is the Fourier transform output value, N is the number of sampling points, \omega \left [ {n} \right ] is a sequence of window functions.
[0028] The harmonic analysis accelerator in this invention is used to rapidly process sampled data and accurately calculate the harmonic amplitudes in the power signal, thereby determining the power quality. The harmonic analysis accelerator creates a dedicated buffer in the microcontroller's memory to process the sample sequence transmitted from the analog-to-digital conversion module.
[0029] The harmonic analysis accelerator described in the present invention first performs a Blackman-Harris window on the sampling sequence to obtain the target sequence. The windowing operation can reduce spectrum leakage, making subsequent analysis more accurate. Then, a radix-4 butterfly algorithm is performed on the target sequence to complete a 128-point fast Fourier transform. This algorithm can quickly convert the sampling signal in the time domain to the frequency domain, greatly improving the computational efficiency. Finally, the amplitude correction formula is used Calculate the amplitudes of the fundamental wave and 2nd to 15th harmonics.
[0030] In power quality monitoring systems, the harmonic analysis accelerator accurately calculates harmonic amplitudes, helping personnel promptly identify harmonic issues in the power system. For example, if the third harmonic content exceeds a threshold, the harmonic analysis accelerator triggers a non-maskable interrupt, enabling the system to quickly respond, such as activating an alarm to notify personnel, preventing harmonic damage to power equipment and ensuring stable power system operation.
[0031] The dual-path interrupt processing module includes a non-maskable interrupt channel, which receives a harmonic amplitude exceeding limit signal and triggers the system's power quality anomaly alarm. The dual-path interrupt processing module also includes a maskable interrupt channel. After receiving an external trigger signal, the signal is processed by a programmable frequency divider and then connected to the interrupt controller. This allows for flexible response to external triggers based on system requirements. During this response, the load prediction circuit cooperates with the priority arbiter to restore power to the corresponding power supply domain, ensuring timely interrupt processing.
[0032] Through the dual-path design, the dual-path interrupt processing module can not only respond extremely quickly to harmonic excesses that endanger system operation, but also flexibly handle external trigger signals. It takes into account the system's ability to quickly handle emergencies and its adaptability to external interactions, and is an important support for the system to achieve real-time monitoring and dynamic response.
[0033] The data storage and communication module includes an electrically erasable programmable read-only memory, which contains a protected storage area and is associated with a physical fuse circuit to prohibit tampering with the data and ensure the security and non-tamperability of key monitoring data. The data storage and communication module also includes a communication domain, which contains a protocol conversion and level adaptation circuit. When the communication domain is activated, the dynamic power management core adjusts the power supply voltage to the range specified by the protocol. That is, the power supply of the communication domain is controlled by the dynamic power management core. When the harmonic data meets the upload conditions, the dynamic power management core activates the communication domain and adjusts the power supply voltage to the range specified by the protocol, so that the communication domain can adapt to the corresponding protocol to complete data transmission; after the data transmission is completed, the power supply of the communication domain is turned off, and the system returns to a low-power state, realizing efficient energy consumption control during the communication process.
[0034] The data storage and communication module ensures the reliability and transmissibility of monitoring data through the collaboration of secure storage and adaptive communication, and is an important link for the system to achieve closed-loop data management.
[0035] In this embodiment, the entire signal interaction process of the present invention is discussed in detail. The present invention is based on a four-stage closed-loop development of dynamic power supply reconstruction, adaptive sampling, real-time analysis, and secure storage and communication. The modules achieve collaborative work through orderly signal transmission. The details are as follows: During the dynamic power reconfiguration phase, the system initially maintains power only to the MCU core, while the analog-to-digital conversion and communication domains are powered down. Upon receiving an external sampling command, the command signal triggers the dynamic power management core, activating the analog-to-digital conversion domain. Simultaneously, the load prediction circuit pre-configures the power path based on the computational task, preparing for subsequent sampling.
[0036] After entering the adaptive sampling phase, the voltage tracking circuit uses a differential amplifier to collect the difference between the input voltage and the reference voltage. This difference signal is transmitted to the compensation coefficient generator, which calculates the compensation coefficient. The compensation coefficient signal is then sent to the programmed gain amplifier in the adaptive analog-to-digital conversion module, which dynamically adjusts the gain level to offset power supply ripple. Simultaneously, the oversampling rate dynamic regulator detects the input signal frequency and generates a corresponding oversampling rate configuration signal based on the input signal frequency. The synchronous timing controller receives this signal and adjusts the sampling clock phase to coincide with the power supply ripple valley. Finally, the analog-to-digital conversion module outputs the processed sampling sequence signal to the harmonic analysis accelerator.
[0037] During the real-time harmonic analysis and interrupt response phase, the harmonic analysis accelerator receives the sampled sequence signal, windowing it and performing a fast Fourier transform (FFT) to calculate the fundamental and 2nd-15th harmonic amplitude signals. If the 3rd harmonic amplitude exceeds the limit, the harmonic amplitude excess signal is sent to the non-maskable interrupt channel of the dual-path interrupt processing module, triggering an interrupt response and activating the general-purpose input and output alarm signal. Furthermore, the external trigger signal, received via the maskable interrupt channel, is processed by a programmable frequency divider to generate an interrupt control signal, which is then fed into the interrupt controller. The priority arbiter then generates a power restoration signal to restore power to the corresponding domain.
[0038] During the data storage and communication phase, the distorted waveform data signal obtained through harmonic analysis is written to the protected storage area of the electrically erasable programmable read-only memory (EEPROM), triggering a physical fuse to lock the data. When the harmonic data meets the upload conditions, the trigger signal causes the dynamic power management core to activate the communication domain and simultaneously generate a voltage regulation signal to adjust the communication domain's supply voltage to the protocol-specified range. After the data transmission signal is completed, the communication domain shuts off the power supply signal, and the system returns to a low-power state.
[0039] Each module in the above-described dynamic power reconfiguration adaptive sampling power quality monitoring system can be implemented in whole or in part through software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in hardware form, or stored in a computer device memory in software form, so that the processor can call and execute the corresponding operations of each module.
[0040] Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art will appreciate that they may modify the technical solutions described in the aforementioned embodiments or substitute equivalents for some of the technical features. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.
Claims
1. A dynamic power supply reconstruction adaptive sampling power quality monitoring system, characterized in that: Includes dynamic power management core, adaptive analog-to-digital conversion module, harmonic analysis accelerator, dual-path interrupt processing module, and data storage and communication module; The dynamic power management core divides the system into three independent power supply domains: the microcontroller core, the analog-to-digital conversion domain, and the communication domain, to control the power supply of each independent power supply domain and calculate the compensation coefficient according to the voltage change; The adaptive analog-to-digital conversion module includes a programmed gain amplifier, which transmits the compensation coefficient to the programmed gain amplifier for dynamically adjusting the gain level and generating a sampling sequence; The harmonic analysis accelerator performs Blackman-Harris window processing on the received sampling sequence to generate a target sequence, pre-processes the target sequence, and then calculates the abnormal harmonic amplitude using an amplitude correction formula to generate a harmonic amplitude limit-exceeding signal; The dual-path interrupt processing module is used to receive the harmonic amplitude exceeding limit signal and trigger the power quality abnormality alarm of the system; The data storage and communication module is used to protect the storage area and is associated with a physical fuse circuit.
2. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 1 is characterized in that: The dynamic power management core is configured with a voltage tracking circuit, and the voltage tracking circuit also includes a compensation coefficient generator, and the compensation coefficient generator is configured according to the formula Calculate the compensation coefficient, where is the compensation coefficient, ΔV is the difference between the input voltage and the reference voltage, and α is a function of the load current of the low dropout regulator.
3. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 1 is characterized in that: The adaptive analog-to-digital conversion module also includes an oversampling rate dynamic regulator, which is calculated according to the formula Automatically configure the oversampling ratio, where The sampling frequency is 125 kilosamples per second. is the input signal frequency, OSR is the oversampling rate.
4. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 3 is characterized in that: The adjustment rule of the oversampling rate dynamic regulator is: when the input signal frequency is ≤50Hz, the oversampling rate = 64; when 50Hz<input signal frequency ≤1000Hz, the oversampling rate = 32; when the input signal frequency is >1000Hz, the oversampling rate OSR = 8 and the 8th-order anti-aliasing digital filter is started.
5. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 1 is characterized in that: The formula for calculating the abnormal harmonic amplitude is: ,in, is the kth harmonic amplitude, is the Fourier transform output value, N is the number of sampling points, is a sequence of window functions.
6. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 1 is characterized in that: The dual-path interrupt processing module further includes a maskable interrupt channel, which receives an external trigger signal and is connected to an interrupt controller via a programmable frequency divider.
7. The dynamic power supply reconfiguration adaptive sampling power quality monitoring system according to claim 1, characterized in that: The data storage and communication module further includes a communication domain, which includes a protocol conversion and level adaptation circuit.
8. The dynamic power supply reconfiguration adaptive sampling power quality monitoring system according to claim 1 is characterized in that: When the communication domain is activated, the dynamic power management core adjusts the supply voltage to the range specified by the protocol.
9. The dynamic power supply reconstruction adaptive sampling power quality monitoring system according to claim 1, characterized in that: In the initial state of the system, the dynamic power management core only keeps the micro control unit core powered, and the analog-to-digital conversion domain and the communication domain are in a power-off state.
10. The dynamic power supply reconfiguration adaptive sampling power quality monitoring system according to claim 1, characterized in that: The dynamic power management core immediately turns off the power supply of the analog-to-digital conversion domain after sampling is completed; when Fourier transform needs to be performed, only the microcontroller core and the harmonic analysis accelerator are kept powered.
Citation Information
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