LED display screen performance simulation method based on digital twinning
By constructing a three-dimensional geometric model and digital twin of the LED display, combining it with light and thermal cycle environmental loads, and simulating the component stress and strain distribution and solder joint damage of the LED display, the problem of inaccurate performance prediction in existing technologies is solved, and more accurate performance evaluation and reliability prediction are achieved.
Patent Information
- Application Number
- CN202510878207.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-27
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-06-27
AI Technical Summary
Existing technologies fail to deeply consider the complex internal physical properties and material microscopic behavior of actual devices during performance simulation, resulting in performance prediction results that are difficult to reflect the response characteristics of real devices in complex environments.
The digital twin-based LED display performance simulation method constructs a three-dimensional geometric model of the LED display, defines the topological structure of the lamp array and the physical parameters of the materials, combines the lighting and thermal cycle environmental loads, iteratively calculates the stress and strain distribution of the components, obtains the cumulative damage value of the solder joints, determines the failure state of the pixel unit, and updates the luminous distribution.
It achieves accurate performance prediction of LED displays, improves the authenticity and accuracy of performance prediction results, and enhances the assessment of equipment reliability and risk prediction.
Smart Images

Figure CN120724760A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of performance simulation technology, and in particular to a method for simulating the performance of an LED display screen based on digital twins. Background Art
[0002] Performance simulation technology is a technical means to simulate and predict the performance of equipment or systems under various actual working conditions by establishing a virtual environment, mathematical models and digital platforms.
[0003] Existing performance simulation techniques typically rely solely on virtual environments to achieve performance simulation and prediction, without deeply considering the complex internal physical properties and material microscopic behavior of actual devices. This results in predicted performance results that are difficult to reflect the response characteristics of real devices under actual complex environmental conditions. Therefore, improvements are needed. Summary of the Invention
[0004] The purpose of the present invention is to solve the shortcomings of the existing technology and propose a performance simulation method of LED display screen based on digital twin.
[0005] To achieve the above objectives, the present invention adopts the following technical solution: a method for simulating LED display screen performance based on digital twins, comprising the following steps:
[0006] Construct the 3D geometry of the LED display and define the topology of the LED array. Specify the bidirectional reflectance distribution function for the display surface, specify the thermal expansion coefficient and elastic modulus for the internal solder joints, and establish a digital twin of the LED display.
[0007] Based on the digital twin of the LED display, the lighting parameters of the CIE standard sky and the upper and lower temperature limits of the thermal cycle are set to obtain a time-varying environmental load sequence. Based on the time-varying environmental load sequence, the lighting and temperature changes are applied to the digital twin of the LED display, and the internal stress and strain distribution of the component caused by the thermal expansion mismatch is iteratively calculated to generate the component stress and strain response field;
[0008] Extracting the stress tensor and strain tensor of a single solder joint during each thermal cycle based on the stress-strain response field of the component to obtain a stress-strain record of the single solder joint, and obtaining a cumulative damage value of the solder joint based on the stress-strain record of the single solder joint;
[0009] Based on the cumulative damage value of the solder joint, the cumulative damage value of each solder joint is compared with a preset failure threshold, the luminous state of the corresponding pixel unit is determined to be failed, and a pixel failure state diagram is generated. Based on the pixel failure state diagram, the luminous distribution of the digital twin of the LED display is updated to obtain the simulation visual effect performance index.
[0010] Preferably, the steps for obtaining the digital twin of the LED display screen are:
[0011] The outer contour of the LED display surface and the position of the internal solder joints are mapped in spatial coordinates. The three-dimensional geometric shapes of the display and the internal solder joints are determined by spatial coordinate gridding to obtain a three-dimensional geometric model of the LED display.
[0012] Based on the three-dimensional geometric model of the LED display screen and the regular arrangement of the LED lamp bead array, the spatial positions of the lamp beads on the display screen surface are set, and the topological connection relationship between each lamp bead and the adjacent lamp beads in the lamp bead array is determined to obtain the topological structure of the LED lamp bead array;
[0013] Based on the topological structure of the LED lamp bead array, the optical parameters of the display surface and the mechanical properties of the internal solder joints are specified respectively, and each facet of the display surface is associated with a bidirectional reflectance distribution function. The internal solder joints are assigned preset thermal expansion coefficients and elastic moduli one by one to obtain a digital twin of the LED display.
[0014] Preferably, the step of acquiring the time-varying environmental load sequence is:
[0015] Based on the digital twin of the LED display, the sky diffuse radiation distribution in the illumination model is set, and the sky brightness distribution curve of the CIE standard sky and the direct solar radiation intensity value are mapped one by one to each facet on the surface of the digital twin of the display to form an illumination parameter set;
[0016] Based on the illumination parameter set, the upper and lower temperature limits of the thermal cycle are set. By defining the periodic change rules of the upper and lower temperature limits, the temperature change rate and duration within each cycle are determined one by one, and the temperature values at each time node are recorded to form a thermal cycle temperature parameter set;
[0017] Based on the thermal cycle temperature parameter set, the sky radiation intensity at each moment in the illumination parameter set and the temperature parameter at the corresponding moment are called, and they are combined one by one to form environmental load change points arranged in time sequence. All environmental load change points are connected to form a complete time-varying environmental load sequence.
[0018] Preferably, the steps of acquiring the stress-strain response field of the component are:
[0019] Extracting the light intensity value and the corresponding temperature value at each time node from the time-varying environmental load sequence, mapping the light intensity value and the temperature value to each surface element of the LED display digital twin one by one, and forming a surface element time-by-time environmental boundary load sequence;
[0020] Based on the hourly environmental boundary load sequence of the bin, the temperature value of each solder point in the digital twin of the LED display screen at each time node is calculated, the thermal expansion coefficient value and elastic modulus value of each solder point are called, and the thermal expansion deformation of each solder point is calculated one by one by multiplying the temperature difference and the thermal expansion coefficient value to form a solder point thermal expansion deformation sequence;
[0021] Based on the solder joint thermal expansion deformation sequence, the deformation differences between each solder joint are calculated point by point and time by calling the elastic modulus value and the spatial geometric topological relationship between the solder joints, and the stress and strain numerical distribution caused by the deformation differences inside the solder joint connection is calculated point by point and layer by layer to generate the component stress and strain response field.
[0022] Preferably, the steps for obtaining the stress and strain record of a single welding point are:
[0023] Based on the component stress-strain response field, the data layer of each time node in the component stress-strain response field is traversed one by one, the stress tensor components and strain tensor components corresponding to all solder joint positions are extracted for each time node, and the stress tensor components and strain tensor components are numbered according to the order of the time nodes to obtain a set of solder joint time series stress and strain components arranged in chronological order;
[0024] According to the solder point time series stress and strain component set, all time node data in the solder point time series stress and strain component set are periodically grouped according to the time interval division method of the thermal cycle period, and the stress tensor components and strain tensor components of all time nodes at the same solder point position in each cycle are aggregated and sorted to obtain the solder point periodic stress and strain component set within the thermal cycle period;
[0025] Based on the set of periodic stress and strain components of the solder joints within the thermal cycle, the cycle number, stress tensor component, and strain tensor component of a single solder joint within each thermal cycle are archived item by item, and the complete stress tensor component and strain tensor component of each solder joint within each thermal cycle are recorded cycle by cycle to generate a single solder joint stress and strain record.
[0026] Preferably, the steps for obtaining the cumulative damage value of the solder joint are:
[0027] Based on the stress and strain record of the single solder point, the maximum principal strain component and the minimum principal strain component of the strain tensor corresponding to the single solder point in each thermal cycle are extracted one by one, the difference between the maximum principal strain component and the minimum principal strain component is calculated and divided by two to form the strain amplitude of the single solder point in each thermal cycle, and the maximum principal stress component and the minimum principal stress component of the principal stress tensor corresponding to the single solder point in each thermal cycle are simultaneously extracted, the difference between the maximum principal stress component and the minimum principal stress component is calculated and divided by two to form the stress amplitude of the single solder point in each thermal cycle, and a stress amplitude and strain amplitude sequence of the single solder point is obtained;
[0028] Calculating the normalized cyclic strain energy damage factor of each thermal cycle of the single solder joint based on the stress amplitude and strain amplitude sequence of the single solder joint;
[0029] Based on the normalized cyclic strain energy damage factor of each thermal cycle of a single solder joint, all normalized cyclic strain energy damage factors are accumulated and summed in the order of the thermal cycle numbers to form the cumulative damage value of the single solder joint under the current full life cycle.
[0030] Preferably, the steps of obtaining the pixel failure status map are:
[0031] Based on the solder point cumulative damage value, extract the solder point cumulative damage value corresponding to each solder point one by one, and simultaneously read the pixel unit number associated with each solder point, bind the solder point cumulative damage value to the corresponding pixel unit one by one, and form a solder point cumulative damage value mapping table;
[0032] Calculating the failure determination factor of each solder joint according to the solder joint cumulative damage value mapping table;
[0033] Based on the failure determination factor, when the failure determination factor is greater than or equal to zero, the corresponding pixel unit is marked as a failure state, and when the failure determination factor is less than zero, the corresponding pixel unit is marked as a normal state, and a pixel failure state map is generated.
[0034] Preferably, the steps of obtaining the simulation visual effect performance index are:
[0035] Based on the pixel failure state map, for each surface bin, first retrieve the pixel unit state corresponding to the bin, set the luminous radiation brightness to zero when the pixel unit is in a failed state, and read the original luminous radiation brightness when the pixel unit is in a normal state, and perform spatial mapping on the luminous radiation brightness of all bins to form a luminous distribution map;
[0036] Based on the luminous distribution diagram, the radiant brightness of the exit point of the digital twin of the LED display screen in the target observation direction is calculated;
[0037] Based on the radiant brightness of the exit point, all valid observation points in the digital twin of the LED display are traversed, and the radiant brightness of the highest exit point and the radiant brightness of the lowest exit point in the target display area are extracted. When the radiant brightness of the lowest exit point is not equal to zero, the radiant brightness of the highest exit point is subtracted from the radiant brightness of the lowest exit point and then divided by the radiant brightness of the lowest exit point to obtain the simulation visual effect performance index.
[0038] Compared with the prior art, the advantages and positive effects of the present invention are:
[0039] Based on the defined three-dimensional geometric structure, the present invention sets the topological relationship of the lamp array and the physical parameters of the materials to achieve precise mapping between the digital model and the real device, providing a performance response basis that is closer to reality; by introducing the real environmental light distribution and thermal cycle temperature range, the environmental load conditions that change with time are obtained, the degree of restoration of the actual service conditions of the display screen is improved, and the authenticity of the performance prediction results is effectively improved; the stress and strain tensor data at the solder joints are further extracted to form solder joint damage records, and quantitative evaluation of material damage is achieved; based on the cumulative damage value, the failure threshold is clearly set to determine the actual failure state of the pixel unit corresponding to each solder joint, and the digital luminous distribution map is updated to accurately simulate the visual performance of the display screen and achieve a comprehensive evaluation of the visual performance; effectively improve the accuracy and applicability of the digital simulation performance evaluation results, enhance the reliability prediction capability of the actual equipment and reduce the risk of equipment operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 Schematic diagram of the steps of the present invention. DETAILED DESCRIPTION
[0041] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0042] See also Figure 1 The present invention provides a technical solution, a method for simulating the performance of an LED display screen based on digital twins, comprising the following steps:
[0043] Construct the 3D geometry of the LED display and define the topology of the LED array. Specify the bidirectional reflectance distribution function for the display surface, specify the thermal expansion coefficient and elastic modulus for the internal solder joints, and establish a digital twin of the LED display.
[0044] Based on the digital twin of the LED display, the lighting parameters of the CIE standard sky and the upper and lower temperature limits of the thermal cycle are set to obtain a time-varying environmental load sequence. Based on this time-varying environmental load sequence, the lighting and temperature changes are applied to the digital twin of the LED display. The internal stress and strain distribution of the component caused by the thermal expansion mismatch is iteratively calculated to generate the component stress and strain response field.
[0045] Based on the stress-strain response field of the component, the stress tensor and strain tensor of a single solder point in each thermal cycle are extracted to obtain the stress-strain record of the single solder point. Based on the stress-strain record of the single solder point, the cumulative damage value of the solder point is obtained.
[0046] Based on the cumulative damage value of the solder joint, the cumulative damage value of each solder joint is compared with the preset failure threshold, and the luminous state of the corresponding pixel unit is determined to be failed. A pixel failure status map is generated. Based on the pixel failure status map, the luminous distribution of the digital twin of the LED display is updated to obtain the simulation visual performance index.
[0047] The steps to obtain the digital twin of the LED display are as follows:
[0048] The outer contour of the LED display surface and the position of the internal solder joints are mapped in spatial coordinates. The three-dimensional geometric shapes of the display and the internal solder joints are determined by spatial coordinate gridding to obtain a three-dimensional geometric model of the LED display.
[0049] Based on the three-dimensional geometric model of the LED display, the spatial position of the LED beads on the display surface is set according to the regular arrangement of the LED lamp bead array, and the topological connection relationship between each lamp bead and the adjacent lamp beads in the lamp bead array is determined to obtain the topological structure of the LED lamp bead array;
[0050] Based on the topological structure of the LED lamp bead array, the optical parameters of the display surface and the mechanical properties of the internal solder joints are specified respectively. The bidirectional reflectance distribution function is associated with each facet of the display surface, and the internal solder joints are assigned preset thermal expansion coefficients and elastic moduli one by one to obtain the digital twin of the LED display.
[0051] Specifically, first use a 3D laser scanner or industrial computed tomography equipment to scan the physical entity of the actual LED display screen to obtain its outer surface, PCB board, and key internal components, especially the point cloud data of the solder joints. Based on the point cloud coordinates, the outline of the frame, mask, and PCB board of the display module is outlined, and the central 3D coordinates (X, Y, Z) of each solder joint are calibrated. Then, the drawn geometric outline is spatially gridded. For areas with gentle geometric shape changes, such as the flat surface of the display screen, a basic grid size is set. The size is determined according to the minimum outer dimensions of the display screen. For example, for a 0.5-meter-long For a display screen, the basic grid size can be set to 1 mm, while in critical areas with complex geometric structures or stress concentration, such as the fillet transition area of the solder joint and the connection interface between the solder joint and the PCB pad, a finer grid size is used. This fine size is set according to the diameter of the solder joint, and its calculation method is one tenth of the solder joint diameter. If the solder joint diameter is 0.5 mm, the grid size of this area is set to 0.05 mm. In this way, a non-uniform finite element grid composed of tetrahedral or hexahedral units is generated at all key positions and surfaces. The collection of these grid nodes and their connection relationships together constitute a three-dimensional geometric model of the LED display screen with precise geometric features.
[0052] Based on the three-dimensional geometric model of the LED display screen, the two-dimensional surface of the effective display area of the display screen is first extracted from the model, and the origin of the coordinate system of the area is determined. For example, the upper left corner vertex is defined as (0, 0). According to the pixel spacing parameters clearly specified in the design specification document of the display screen, such as the horizontal spacing is 2.5 mm and the vertical spacing is 2.5 mm, a virtual two-dimensional grid is generated on the surface of the display screen in a programmatic manner. Each intersection of the grid is the theoretical center position of an LED lamp bead. Then, these theoretical positions are mapped one by one to the surface grid nodes of the outermost layer of the three-dimensional geometric model, and the grid node with the closest Euclidean distance to each theoretical position is found. The precise three-dimensional coordinates of the node are assigned to the corresponding LED lamp bead to complete all the calculations. The spatial position of the lamp beads on the display screen surface is set. On this basis, in order to establish the topological connection relationship between the lamp beads, an eight-neighborhood connection model is adopted. For each lamp bead in the array, the eight adjacent lamp beads around it are identified by its row and column index (i, j) in the two-dimensional grid, that is, the lamp beads with indexes of (i-1, j-1), (i-1, j), (i-1, j+1), (i, j-1), (i, j+1), (i+1, j-1), (i+1, j), and (i+1, j+1). The unique identifier of each lamp bead is associated with the identifiers of its eight adjacent lamp beads and stored in an adjacency table. The adjacency table records in detail the direct adjacent relationship between all lamp beads in the entire array, thereby obtaining the topological structure of the LED lamp bead array.
[0053] Based on the topological structure of the LED lamp bead array, the optical parameters of the display surface are first processed. Specifically, each surface grid unit, namely the facet, in the three-dimensional geometric model of the LED display is traversed. According to the physical component to which the facet belongs, a bidirectional reflectance distribution function model is matched for it from the preset material optical property library. For example, for the epoxy resin encapsulation part of the LED lamp bead, the Cook-Torrance microfacet model containing the Fresnel term is selected to simulate its specular reflection characteristics, while for the black matte plastic part of the display mask, the Lambertian model is selected to simulate its ideal diffuse reflection characteristics. The corresponding model parameters, such as diffuse reflectivity and highlight roughness, are assigned to each facet. Then, the mechanical properties of the internal solder joints are processed. For each solder joint geometry calibrated in the three-dimensional geometric model, according to the solder model used in the production process, such as SAC305 lead-free solder, its thermal expansion coefficient and elastic modulus at different temperatures are queried and extracted from the technical specification provided by the material supplier or the standard material mechanical properties database. For example, a reference thermal expansion coefficient and an elastic modulus are assigned to the SAC305 solder, and these specific mechanical parameter values are assigned one by one to the corresponding solder joint grid unit. Finally, all data including the precise three-dimensional geometric shape, LED lamp bead array topology, surface optical parameters and internal solder joint mechanical properties are integrated to form a unified, multi-physics field attribute coupled data model to obtain the LED display digital twin.
[0054] The steps for obtaining the time-varying environmental load sequence are:
[0055] Based on the digital twin of the LED display, the sky diffuse radiation distribution in the lighting model is set, and the sky brightness distribution curve of the CIE standard sky and the direct solar radiation intensity value are mapped one by one to each facet on the surface of the digital twin of the display to form a set of lighting parameters;
[0056] Based on the illumination parameter set, the upper and lower temperature limits of the thermal cycle are set. By defining the periodic change rules of the upper and lower temperature limits, the temperature change rate and duration within each cycle are determined one by one, and the temperature values at each time node are recorded to form a thermal cycle temperature parameter set;
[0057] Based on the thermal cycle temperature parameter set, the sky radiation intensity at each moment in the illumination parameter set and the temperature parameter at the corresponding moment are called, and they are combined one by one to form environmental load change points arranged in time sequence. All environmental load change points are connected to form a complete time-varying environmental load sequence.
[0058] Specifically, based on the digital twin of the LED display screen, first select a specific CIE standard sky model. For example, the CIE standard cloudy model is selected based on the simulated typical outdoor cloudy weather conditions. This model defines the relationship between the brightness of any point on the sky dome and the zenith angle and the position of the sun at that point. Then, set a specific geographical location and simulation time, such as 30 degrees north latitude and 12 noon on the summer solstice, to calculate the solar altitude and azimuth at that moment, and set a reference value for direct solar radiation intensity based on parameters such as atmospheric transparency. For example, it is set to 1000 watts per square meter under clear and cloudless conditions. Subsequently, the entire sky dome is discretized into hundreds of light source directions, and for each facet on the surface of the digital twin of the display screen, the angle between its normal vector and each discrete light source direction, as well as the angle between its normal vector and the direct direction of the sun are calculated one by one. The brightness distribution function of the CIE standard cloudy model is used to calculate the incident radiation brightness from each sky light source direction, and combined with the direct solar radiation intensity value, the radiation contribution from all visible light source directions is numerically integrated to finally calculate the total radiation illuminance projected onto the facet. Each facet and its corresponding total radiation illuminance value are stored to form a set of lighting parameters.
[0059] Based on the illumination parameter set, the upper and lower temperature limits of the thermal cycle are first set according to the industry-standard environmental adaptability testing standards for electronic equipment. Specifically, the minimum temperature is set to -40 degrees Celsius and the maximum temperature is set to 85 degrees Celsius. Then, a specific periodic temperature change function is defined to describe the temperature fluctuation pattern between the upper and lower limits. For example, a complete sine function cycle is used, and the complete cycle duration of each thermal cycle is set to 4 hours, including a 1-hour heating phase from -40 degrees Celsius to 85 degrees Celsius, a 1-hour high-temperature hold phase, a 1-hour cooling phase from 85 degrees Celsius to -40 degrees Celsius, and a 1-hour low-temperature hold phase. Based on this function, the average temperature change rate during the heating and cooling phases is calculated to be approximately 2.08 degrees Celsius per minute. Finally, the temperature change function of the entire cycle is sampled at a fixed time step, for example, every 60 seconds, and the temperature value at each discrete time node is recorded. These chronologically arranged temperature data points are aggregated to form the thermal cycle temperature parameter set.
[0060] Based on the thermal cycle temperature parameter set, a total simulation time span is first determined, such as simulating 720 hours of continuous operation, and a uniform time step, such as 10 minutes, is set to discretize the entire process. Then, in a time loop, each time step node from 0 to 720 hours is traversed one by one. At each time node, the ambient temperature parameter at that moment is first queried from the thermal cycle temperature parameter set or calculated through interpolation. At the same time, the lighting parameter set is called, and the sun's position parameters, namely the solar altitude and azimuth, are dynamically adjusted according to the current time node's position in the day. The sky brightness distribution and direct solar radiation intensity are recalculated to obtain the sky radiation intensity mapped to each facet of the display digital twin at that moment. Subsequently, the two environmental factors, the current temperature parameter and the sky radiation intensity, are combined into a data pair, which is an environmental load change point at this time node. The environmental load change points calculated for all time nodes are arranged in chronological order and finally connected to form a complete time-varying environmental load sequence.
[0061] The steps for obtaining the component stress-strain response field are:
[0062] Extract the light intensity value and the corresponding temperature value of each time node from the time-varying environmental load sequence, and map the light intensity value and temperature value to each surface element of the LED display digital twin one by one to form a surface element time-by-time environmental boundary load sequence;
[0063] Based on the hourly environmental boundary load sequence of the surface element, the temperature value of each solder point at each time node in the digital twin of the LED display is calculated. The thermal expansion coefficient and elastic modulus value of each solder point are called, and the thermal expansion deformation of each solder point is calculated one by one by multiplying the temperature difference and the thermal expansion coefficient value to form a solder point thermal expansion deformation sequence;
[0064] Based on the thermal expansion deformation sequence of solder points, the deformation differences between each solder point are calculated point by point and hour by hour. By calling the elastic modulus value and the spatial geometric topological relationship between solder points, the stress and strain numerical distribution caused by the deformation difference inside the solder point connection is calculated point by point and layer by layer to generate the component stress and strain response field.
[0065] Specifically, a time stepping loop is started in sequence from the time-varying environmental load sequence, and each time node in the sequence is traversed. At each time node, the ambient temperature value at that moment is first extracted. For example, at the Nth time step, the extracted temperature is 35 degrees Celsius, and a complete set of light intensity values corresponding to that moment is obtained. This light intensity value is not a single value, but includes the specific direct sunlight and diffuse sky radiation flux projected onto each surface element of the digital twin of the LED display. For example, for the surface element facing the sun, the light intensity value is 950 watts per square meter, while for the surface element facing the sun or with a large angle to the sun, the light intensity value is 950 watts per square meter. The value of the load may be as low as 150 watts per square meter. These load values are then applied as thermal boundary conditions to the finite element model of the digital twin. Specifically, the ambient temperature value is used to define the convective heat transfer boundary condition, and a convective heat transfer coefficient based on the air flow rate is set. For example, it is set to 10 watts per square meter per Kelvin in still air and applied to all surface elements exposed to the atmosphere. At the same time, the light intensity value corresponding to each element is directly applied to the element as a heat flux density boundary condition. All element boundary conditions of all time nodes are aggregated in time sequence to form an element-by-element environmental boundary load sequence.
[0066] Based on the time-series of surface element-by-time environmental boundary loads, a complete multi-physics coupled transient thermal analysis is performed. This analysis uses the finite element method to solve the heat conduction equation of the entire LED display digital twin. Before the analysis begins, an initial temperature field is set, usually the reference ambient temperature at the time of assembly completion, such as 25 degrees Celsius. This temperature also serves as the zero-stress reference temperature for calculating thermal expansion. During the analysis, the software solver calculates the thermal conductivity of the PCB board at each time step based on the applied time-series of surface element-by-time environmental boundary loads and the preset thermal physical properties of each material in the digital twin. For example, the thermal conductivity of the PCB board is 0.3 watts per meter per Kelvin, and the thermal conductivity of the solder joint is 50 watts per meter per Kelvin. The precise temperature distribution of all nodes within the entire model at the current time node is iteratively calculated. After the analysis is completed, the temperature values of all grid nodes within each solder point geometry at each time node are extracted from the obtained three-dimensional temperature field data. Then, the thermal expansion coefficient value assigned to each solder point when building the digital twin is called, and the temperature value of the solder point at each time node is subtracted from the zero stress reference temperature to obtain the temperature difference. This temperature difference is then multiplied by the thermal expansion coefficient value, and the theoretical thermal expansion deformation of each solder point without any external constraints is calculated one by one. The calculation results of all solder points at all time nodes are recorded in chronological order to form a solder point thermal expansion deformation sequence.
[0067] Based on the complete three-dimensional temperature field of all components at each time node obtained in the previous step, rather than just the thermal expansion deformation sequence of the solder joints, a quasi-static thermal-structural coupling analysis is performed. At each time node, the three-dimensional temperature field at that moment is applied to the digital twin model of the entire LED display as a body load for structural analysis. The mechanical properties defined for all components in the digital twin are called, including the elastic modulus, Poisson's ratio, and thermal expansion coefficient values of the FR-4 substrate, electronic component package, and solder joints. Due to the differences in thermal expansion coefficient values of different materials, for example, the thermal expansion coefficient value of the FR-4 substrate is approximately 14 times 10 to the negative sixth power per degree Celsius. , while the thermal expansion coefficient of the solder joint is 22 times 10 to the negative sixth power per degree Celsius. Under a uniform temperature change, the deformation trends of the connected components are inconsistent, resulting in internal stress at the joints such as the solder joint. By solving the equilibrium equations based on elastic mechanics and material constitutive relations (for solder, the Anand viscoplastic constitutive model that can describe its creep and plastic behavior is used), the complete stress tensor and strain tensor of each grid element in the model at the current time node are calculated. This process is repeated at all time nodes, and finally a four-dimensional data set containing the time evolution of the stress and strain states of all points in the model throughout the entire simulation cycle is generated, namely the component stress-strain response field.
[0068] The steps for obtaining stress and strain records of a single solder joint are as follows:
[0069] Based on the component stress-strain response field, the data layer of each time node in the component stress-strain response field is traversed one by one. The stress tensor components and strain tensor components corresponding to all solder joint positions are extracted for each time node. The stress and strain tensor components are numbered according to the order of the time nodes to obtain a set of solder joint time series stress and strain components arranged in chronological order.
[0070] Based on the solder joint time series stress and strain component set, all time node data in the solder joint time series stress and strain component set are grouped into periods according to the time interval division method of the thermal cycle period. The stress tensor components and strain tensor components of all time nodes at the same solder joint position in each period are aggregated and sorted to obtain the solder joint periodic stress and strain component set within the thermal cycle period.
[0071] Based on the set of periodic stress and strain components of the solder joints within the thermal cycle, the cycle number, stress tensor component and strain tensor component of a single solder joint within each thermal cycle are archived item by item. The complete stress tensor component and strain tensor component of each solder joint in each thermal cycle are recorded cycle by cycle to generate a single solder joint stress and strain record.
[0072] Specifically, based on the component stress-strain response field, a post-processing script for data extraction is first defined. The goal of this script is to traverse all time nodes in the entire four-dimensional data field. At each time node, the script will lock the finite element set pre-labeled as "weld point" in the digital twin model. For all units within a single weld point, the volume-weighted average method is used to calculate its equivalent stress and strain state. Specifically, for each weld point, all internal finite element units are traversed, and the six independent components of the stress tensor and the six independent components of the strain tensor of each unit are read. Each component value is multiplied by the volume of the unit in which it is located. The product of all units is then accumulated and summed, and finally divided by the total volume of the weld point to obtain an average stress tensor and an average strain tensor for the weld point at that time node. Subsequently, the integer serial number of the time node, for example, starting from 1 and increasing, is associated and stored with the average stress tensor components and average strain tensor components of all extracted weld points. This process is repeated for all time nodes to obtain a set of weld point time-series stress and strain components arranged in chronological order.
[0073] According to the solder joint time series stress and strain component set, the total duration of a single thermal cycle, for example, 4 hours, is first read from the thermal cycle temperature parameter set. Combined with the time step used for the simulation, for example, 10 minutes, the number of time nodes contained in each thermal cycle is calculated, which is 24 nodes in this case. Then, all data entries in the solder joint time series stress and strain component set are grouped according to their time node numbers. The grouping logic is to subtract 1 from the time node number and then divide it by the number of nodes contained in each cycle, 24. The quotient plus 1 is the cycle number to which the data belongs. For example, data with time node numbers ranging from 1 to 24 are classified into the first cycle, data with time node numbers ranging from 25 to 48 are classified into the second cycle, and so on. After completing the cycle attribution determination of all time node data, the data in each cycle are secondary aggregated according to the unique identifier of the solder joint. The stress tensor components and strain tensor components of all time nodes of the same solder joint in the same cycle are reorganized into a sequence in the original time order to obtain the solder joint cycle stress and strain component set within the thermal cycle.
[0074] Based on the set of cyclic stress and strain components of the solder joints within the thermal cycle, all unique solder joint identifiers are traversed. For each solder joint, all its thermal cycle numbers are traversed, for example, from the first cycle to the last simulation cycle. In each cycle, an independent structured data record is created. The record contains three core fields. The first field is the unique identifier of the single solder joint currently being processed, the second field is the number of the current thermal cycle, and the third field is an array or list, which completely contains the complete stress tensor components and strain tensor components of the solder joint at each time node in the thermal cycle, arranged in chronological order. This process formats and entries the previously aggregated data to ensure that the stress and strain history of each solder joint in each cycle is an independent and complete unit. Such structured data records for all solder joints and all cycles are collected to generate a single solder joint stress and strain record.
[0075] The steps to obtain the cumulative damage value of the solder joint are:
[0076] Based on the stress and strain records of a single solder point, the maximum principal strain component and the minimum principal strain component of the strain tensor corresponding to the single solder point in each thermal cycle are extracted one by one, the difference between the maximum principal strain component and the minimum principal strain component is calculated and divided by two to form the strain amplitude of the single solder point in each thermal cycle. At the same time, the maximum principal stress component and the minimum principal stress component of the principal stress tensor corresponding to the single solder point in each thermal cycle are extracted synchronously, the difference between the maximum principal stress component and the minimum principal stress component is calculated and divided by two to form the stress amplitude of the single solder point in each thermal cycle, and the stress amplitude and strain amplitude sequence of the single solder point are obtained;
[0077] Based on the stress amplitude and strain amplitude sequence of a single solder joint, the normalized cyclic strain energy damage factor of each thermal cycle of a single solder joint is calculated. The calculation formula is:
[0078] ;
[0079] in, For the Normalized cyclic strain energy damage factor of a single solder joint within a thermal cycle, For the The stress amplitude of a single solder joint during a thermal cycle, For the The strain amplitude of a single solder joint during a thermal cycle, is the fatigue strength coefficient of the single weld material, is the fatigue ductility coefficient of the single weld material, is the energy damage conversion index;
[0080] Based on the normalized cyclic strain energy damage factor of each thermal cycle of a single solder joint, all normalized cyclic strain energy damage factors are accumulated and summed in the order of the thermal cycle numbers to form the cumulative damage value of the single solder joint under the current full life cycle.
[0081] Specifically, based on the stress and strain records of a single solder point, the records of each solder point in each thermal cycle are processed. First, for a specific thermal cycle, such as the 5th cycle, the stress tensor and strain tensor sequences recorded at all time nodes in the cycle are extracted, and the stress tensor at each time node in the sequence is subjected to eigenvalue decomposition to obtain the three principal stress components at that moment. At the same time, the corresponding strain tensor is subjected to the same eigenvalue decomposition to obtain the three principal strain components. All principal stress components calculated at all time nodes in the cycle are collected, and the global maximum and global minimum are found from them. For example, in one cycle, all The maximum value of the principal stress component is 30 MPa and the minimum value is negative 15 MPa. The stress amplitude of this cycle is calculated to be 22.5 MPa by subtracting the minimum value from the maximum value and dividing by two. The same processing flow is used to find the global maximum and global minimum values of all principal strain components in this cycle. For example, the maximum value is 0.005 and the minimum value is negative 0.002. The strain amplitude of this cycle is calculated to be 0.0035. This calculation process is performed independently for each solder joint and each thermal cycle. Finally, the stress amplitude and strain amplitude of each solder joint in each cycle are recorded in pairs to form a single solder joint stress amplitude and strain amplitude sequence.
[0082] formula: The benefit of the formula is that it adopts a damage model based on cyclic strain energy. By taking the product of stress amplitude and strain amplitude as the core damage parameter, it can more accurately reflect the energy dissipation and damage accumulation process of the material under complex loading conditions than a single stress or strain model. In particular, for materials such as welds that have significant elastic-plastic and creep behaviors, it can better capture their fatigue mechanism. At the same time, the formula normalizes the damage factor by the fatigue strength coefficient and fatigue ductility coefficient, so that the calculation results have a clear physical meaning, that is, the fatigue life fraction consumed by a single cycle. The existence of the exponential term provides the model with flexibility in fitting the fatigue behavior of different materials.
[0083] For the The stress amplitude of a single solder joint in a thermal cycle. This parameter is directly derived from the single solder joint stress amplitude and strain amplitude sequence generated in the previous step, according to the currently processed solder joint number and cycle number. The value extracted reflects half of the maximum stress variation range experienced by the solder joint in a complete temperature cycle, representing the intensity level of the cyclic loading. For example, for solder joint numbered 158, the stress amplitude extracted from the sequence at the 200th thermal cycle is 28 MPa.
[0084] For the The strain amplitude of a single solder joint within a thermal cycle is obtained in the same way as the stress amplitude. It is directly extracted from the stress amplitude and strain amplitude sequence of a single solder joint. It represents half of the maximum strain variation range experienced by the solder joint within the same cycle and reflects the degree of deformation under cyclic loading. For example, for solder joint numbered 158, the strain amplitude extracted at the 200th thermal cycle is 0.004.
[0085] The fatigue strength coefficient of a single solder joint material is an indicator of the material's inherent fatigue performance. It is determined by subjecting the solder used (e.g., SAC305) to a standardized uniaxial strain-controlled fatigue test (according to ASTM E606). The number of cycles to failure at different strain amplitudes is recorded, and a curve plotting the relationship between stress amplitude and the number of failure reversals is used in a logarithmic coordinate system. The intercept of this curve is the fatigue strength coefficient. For SAC305 solder, a typical value of its fatigue strength coefficient is 78 MPa, as determined by consulting public material performance databases or test reports provided by suppliers.
[0086] is the fatigue ductility coefficient of the single solder joint material. This parameter is also an inherent fatigue property of the material and is determined through the same test as the fatigue strength coefficient. The relationship between the plastic strain amplitude and the number of failure reversals is plotted in a double logarithmic coordinate system. The intercept of this curve is the fatigue ductility coefficient, which characterizes the material's ability to plastically deform during fatigue. For SAC305 solder, a typical value of its fatigue ductility coefficient is 0.42, obtained from the same material performance data source.
[0087] The energy damage conversion index is an empirical fitting constant used to correlate cyclic strain energy with fatigue life. Its value also depends on the fatigue test data of the material. The strain energy (the product of stress amplitude and strain amplitude) of each cycle in the test is subjected to double logarithmic linear regression analysis with the corresponding number of failure cycles. The slope of the resulting straight line is the reciprocal of the index. This index reflects the material's sensitivity to energy damage. For solders such as SAC305, the energy damage conversion index is set to 1.75.
[0088] Calculation process:
[0089] For the solder joint numbered 158, calculate its thermal cycle at the 200th thermal cycle (i.e. ) is the normalized cyclic strain energy damage factor ,
[0090] First, substitute the obtained parameters into the formula:
[0091] MPa;
[0092] ;
[0093] MPa;
[0094] ;
[0095] ;
[0096] Calculate the cyclic strain energy term:
[0097] ;
[0098] Compute the normalized energy term:
[0099] ;
[0100] Calculate the damage factor:
[0101] ;
[0102] ;
[0103] ;
[0104] The results show that the damage amount of solder joint No. 158 in the 200th thermal cycle is approximately .
[0105] Based on the normalized cyclic strain energy damage factor of each thermal cycle of a single solder joint, damage accumulation calculation is performed on each independent solder joint. This process follows the linear damage accumulation law. The specific operation is to first initialize a cumulative damage value variable for each solder joint and set it to zero. Then, according to the thermal cycle number, starting from the first cycle, the normalized cyclic strain energy damage factor calculated for the solder joint in each cycle is read in sequence, and the value is added to the corresponding cumulative damage value variable. For example, for a certain solder joint, its damage factor in the first cycle is , the damage factor of the second cycle is , then after two cycles, the cumulative damage value is This accumulation process continues until all simulated thermal cycles are completed. The final value of the cumulative damage value variable of each solder joint is the cumulative damage value of the solder joint in the current full life cycle.
[0106] The steps to obtain the pixel failure status map are:
[0107] Based on the solder point cumulative damage value, the corresponding solder point cumulative damage value of each solder point is extracted one by one, and the pixel unit number associated with each solder point is read at the same time, and the solder point cumulative damage value is bound to the corresponding pixel unit one by one to form a solder point cumulative damage value mapping table;
[0108] According to the solder joint cumulative damage value mapping table, the failure determination factor of each solder joint is calculated. The calculation formula is:
[0109] ;
[0110] in, For the The failure determination factor of each solder joint is For the The cumulative damage value of each solder joint is is the failure threshold;
[0111] Based on the failure determination factor, when the failure determination factor is greater than or equal to zero, the corresponding pixel unit is marked as a failure state, and when the failure determination factor is less than zero, the corresponding pixel unit is marked as a normal state, and a pixel failure state map is generated.
[0112] Specifically, based on the cumulative damage value of the solder joints, first traverse the unique identifiers of all solder joints in the entire LED display digital twin. For each solder joint identifier, extract its corresponding solder joint cumulative damage value from the final result calculated in the previous step. At the same time, query the unique number of the pixel unit associated with the solder joint identifier from the topological structure information established when constructing the digital twin. Usually, a pixel unit is composed of three sub-pixel lamp beads of red, green, and blue, and each lamp bead has at least two solder joints. Therefore, it is necessary to clarify which pin of which pixel unit each solder joint belongs to. The extracted solder joint cumulative damage value and the queried pixel unit number are constructed into a key-value pair, where the key is the solder joint identifier and the value is a composite structure containing the solder joint cumulative damage value and the pixel unit number. Such key-value pairs of all solder joints are stored to form a solder joint cumulative damage value mapping table.
[0113] formula: middle;
[0114] For the The cumulative damage value of the solder joint of each solder joint is the final output of all the previous calculation steps. It is directly derived from the cumulative damage value of the solder joint generated in the previous key step, according to the number of the solder joint currently being processed. Extracted, it comprehensively reflects the The sum of all fatigue damage sustained by a solder joint due to repeated thermal expansion and contraction during the entire simulated service life is a dimensionless value. For example, for solder joint numbered 305, after 50,000 simulated thermal cycles, the calculated cumulative damage value of the solder joint is 1.25.
[0115] The failure threshold is a key engineering judgment benchmark. Its setting directly determines the conservatism or aggressiveness of the simulation results. When the cumulative damage value reaches 1, the material will fail due to fatigue. In actual engineering applications, in order to introduce a certain safety margin and consider factors such as model uncertainty and material performance dispersion, a value less than 1 will be selected. The determination of this value is based on a comparative analysis of a large amount of accelerated life test data and actual product failure statistics. For example, a batch of LED displays are subjected to long-term high-temperature and high-humidity cycle tests, and the average number of cycles when the first pixel fails is recorded, and the cumulative damage value of the key solder joint at this time is calculated. Through statistical analysis of multiple groups of such test data, it is found that when the cumulative damage value reaches 0.8, the probability of product failure increases significantly. Therefore, the failure threshold is set to 0.8.
[0116] Calculation process:
[0117] For the solder joint numbered 305 (ie ), calculate its failure determination factor ,
[0118] First, substitute the obtained parameters into the formula:
[0119] ;
[0120] ;
[0121] Calculate the failure determination factor:
[0122] ;
[0123] ;
[0124] The results show that the failure determination factor of solder joint numbered 305 is 0.45. Since this value is greater than zero, according to the determination rule, the solder joint is determined to have failed. The size of this positive value can, to a certain extent, reflect the degree of its overshoot, that is, the amount by which its cumulative damage exceeds the failure threshold. This calculation provides a direct basis for the subsequent generation of a pixel failure status map.
[0125] Based on the failure determination factor, a status marking program is started. This program traverses the failure determination factors of all solder joints. For each solder joint, the failure determination factor value is first read and a conditional judgment is performed. The judgment logic is that if the failure determination factor value is greater than or equal to zero, such as 0.45 calculated above, the status of the pixel unit associated with the solder joint is marked as "failed". If there are multiple solder joints in a pixel unit, as long as the failure determination factor of any solder joint is greater than or equal to zero, the pixel unit is marked as failed. If the failure determination factor of a solder joint is less than zero, such as the calculated value of -0.2, the corresponding pixel unit remains in the "normal" state. The program sets the initial state of all pixel units on the display to "normal" and then updates them one by one according to the above logic. Finally, all pixel units and their final state ("normal" or "failed") are organized and stored in the form of a two-dimensional matrix. The row and column indices of the matrix correspond to the physical location of the pixel unit on the display screen, and the value of the matrix element is the state of the pixel unit, thus generating a pixel failure status map.
[0126] The steps to obtain the simulation visual effects performance indicators are as follows:
[0127] Based on the pixel failure state map, for each surface bin, the pixel unit state corresponding to the bin is first retrieved. When the pixel unit is in a failed state, the luminous radiation brightness is set to zero. When the pixel unit is in a normal state, the original luminous radiation brightness is read. The luminous radiation brightness of all bins is spatially mapped to form a luminous distribution map.
[0128] Based on the luminous distribution diagram, the radiant brightness of the LED display digital twin at the exit point in the target observation direction is calculated using the following formula:
[0129] ;
[0130] in, for point Along the viewing direction The brightness of the outgoing radiation, for point Along the viewing direction The spontaneous radiance of is the hemispherical integration domain representing all incident directions, for point In the incident direction and emission direction The bidirectional reflectance distribution function under for point Along the incident direction The incident radiance, is the incident direction vector and the surface normal vector The dot product of represents the angle correction factor in Lambert's cosine law;
[0131] Based on the radiant brightness of the exit point, all valid observation points in the digital twin of the LED display are traversed to extract the radiant brightness of the highest exit point and the radiant brightness of the lowest exit point in the target display area. When the radiant brightness of the lowest exit point is not equal to zero, the radiant brightness of the highest exit point minus the radiant brightness of the lowest exit point is divided by the radiant brightness of the lowest exit point to obtain the simulation visual performance index.
[0132] Specifically, based on the pixel failure state diagram, we first need to define an original luminous radiation brightness benchmark, which represents the luminous condition of the display screen when displaying a specific picture under ideal conditions. For example, in order to evaluate the visual impact in the worst case, the display screen is set to a full white field, and according to the product specification of the display screen, the original luminous radiation brightness of each pixel unit is uniformly set to 1200 watts per square meter per steradian. Then, a brightness update program is started, which traverses each face element that constitutes the luminous surface in the digital twin model of the LED display screen. For each face element, it is first queried through its geometric position index. The pixel unit number to which it belongs is then retrieved in the pixel failure status map using the pixel unit number to obtain the status of the pixel unit. If the retrieved status is "failed", the program will force the luminous radiation brightness value of the current element to be set to zero. If the status is "normal", the program will read the original luminous radiation brightness value from the previously set benchmark, that is, 1200 watts per square meter per steradian, and assign it to the current element. After this process is completed for all surface elements associated with the pixel unit, a data set containing the latest luminous radiation brightness values of all elements is generated. This data set is the luminous distribution map.
[0133] formula: The benefit of the formula is that it can simulate the complex interaction between light and the display surface, decomposing the visual performance of the display into two parts: self-luminous and ambient light reflection. By using the self-luminous distribution containing aging failure information calculated in the previous step As input, the bidirectional reflectance distribution function of the display surface With real environment lighting Combined, they can generate simulated images with a high degree of physical realism, showing not only the bad pixels themselves, but also the visual impact of bad pixels under different lighting and viewing angles due to the reflective properties of the surface material, such as a "bright" bad pixel against a dark screen or a "dark" bad pixel against a bright screen;
[0134] for point Along the viewing direction The self-luminous radiation brightness, this parameter value is directly from the luminous distribution map generated in the previous step, according to the current calculation point It reflects the actual luminous ability of the pixel after considering fatigue failure. For example, if the point Located on a pixel unit that is judged to be normal and is simulating a full white screen, its value is the original luminous radiation brightness of the pixel, set to 1200 watts per square meter per steradian. If it is located on a disabled pixel unit, its value is 0.
[0135] for point In the incident direction and emission direction The bidirectional reflectance distribution function under this condition is used to construct the digital twin of the LED display screen. The material type at the location is specified, for example, if the point The Cook-Torrance model is used for the epoxy resin encapsulation surface of the LED lamp bead, and its parameters are set according to the optical measurement experimental data. For the black mask between the lamp beads, the Lambertian model is used, and its diffuse reflectivity The sample is measured by spectrophotometer. For example, if the diffuse reflectance of the mask material is 0.05, the value of its bidirectional reflectance distribution function is ,Right now .
[0136] for point Along the incident direction The incident radiation brightness is determined by the set ambient illumination model, that is, the illumination parameter from the time-varying environmental load sequence. When performing visual simulation, a specific environmental condition is selected, such as the CIE standard cloudy day, and the total horizontal plane illuminance is set to 20,000 lux. The sky brightness distribution model is used to calculate the illumination of any direction on the sky dome. For example, the incident radiance from the zenith direction is 20 watts per square meter per steradian.
[0137] is the incident direction vector and the surface normal vector The dot product of the point The normal vector data at is obtained by performing a dot product operation with the given incident direction vector. It describes the angular relationship between the incident light and the surface. For example, when the light is incident vertically, the value is 1.
[0138] Calculation process:
[0139] The Monte Carlo path tracing method is used for numerical solution to calculate the outgoing radiant brightness of normal pixels and failed pixels under uniform diffuse ambient light. The ambient light is assumed to be a uniform Lambertian light source with a constant radiant brightness of 20 watts per square meter per steradian in all directions.
[0140] Calculate the invalid pixel point (point ), which is located on the black mask,
[0141] ;
[0142] The bidirectional reflectance distribution function of this point is the Lambertian model. ;
[0143] Integral Item Represents a point Total irradiance received , for isotropic incident radiance , irradiance ;
[0144] Watts per square meter;
[0145] The radiance of the reflected part is Watts per square meter per steradian;
[0146] Watts per square meter per steradian.
[0147] Calculate normal pixel points (points ) at the point on the luminous wick;
[0148] Watts per square meter per steradian;
[0149] There is also reflection on the surface of the wick. If its diffuse reflectivity is set to 0.2, then ,
[0150] The irradiance it receives is the same as that at the failure point. Watts per square meter,
[0151] The radiance of the reflected part is Watts per square meter per steradian,
[0152] Watts per square meter per steradian.
[0153] The results show that under given ambient light conditions, the outgoing radiation brightness of a failure point is not zero due to the reflection of ambient light, but is 1 watt per square meter per steradian. For a normal luminous point, the total outgoing radiation brightness is the sum of its own light and reflected light, which is 1204 watts per square meter per steradian. These calculated outgoing point radiation brightness values are the basis for generating the final simulation image.
[0154] Based on the emission point radiation brightness, first define a target display area for evaluation. For example, exclude 5% of the pixels at the edge of the screen and only consider the central 90% area to avoid the influence of edge optical distortion. Then, within the target display area, with a certain sampling density, for example, sampling one point every other pixel, traverse all these sampling points and read the emission point radiation brightness value calculated in the previous step for each point. During the traversal process, set two variables, one for recording the highest emission point radiation brightness currently encountered, and the other for recording the lowest emission point radiation brightness, and continuously update them. After the traversal is completed, the area can be obtained. The highest exit point radiance within the domain, for example, 1204 watts per square meter per steradian, is compared to the lowest exit point radiance, for example, 1 watt per square meter per steradian. The program then checks whether the lowest exit point radiance is zero. In this case, due to ambient light reflection, its value is 1, not zero. Therefore, the calculation continues, subtracting the lowest value from the highest value and dividing the difference by the lowest value: (1204 - 1) / 1 = 1203. This result is a quantitative contrast ratio metric. The simulated visual performance metric provides an objective, quantitative evaluation standard for the visual quality degradation of LED displays after long-term service. This goes beyond simply predicting the physical failure of individual pixels. By establishing a complete simulation chain from microscopic solder joint stress damage to macroscopic visual performance, the program deeply couples physical reliability issues with application-level visual effects. This indicator comprehensively reflects the appearance of failed pixels (black spots) caused by cumulative damage from solder joint fatigue, as well as the visual interference these failed spots cause to overall image contrast and uniformity due to their surface reflective properties under complex ambient lighting. This allows for quantitative prediction of common display aging phenomena such as "flowering" and "pitting." Using this simulated visual performance indicator, designers can quickly conduct virtual testing and comparative evaluation of different structural designs, material selections (for example, PCB substrates with different thermal expansion coefficients or solders with different fatigue properties), and heat dissipation solutions in the early stages of product development. By comparing the simulated visual performance indicator decay curves of different design solutions over the entire simulated life cycle, it is possible to iteratively optimize the solution with the slowest visual performance degradation and the highest reliability over the expected service life at a very low cost and in a very short cycle.
[0155] The above are merely preferred embodiments of the present invention and do not limit the present invention in any other form. Any technician familiar with the profession may use the technical content disclosed above to change or modify it into an equivalent embodiment with equivalent changes and apply it to other fields. However, any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the scope of protection of the technical solution of the present invention.
Claims
1. The LED display performance simulation method based on digital twin is characterized by: The following steps are involved: Construct the 3D geometry of the LED display and define the topology of the LED array. Specify the bidirectional reflectance distribution function for the display surface, specify the thermal expansion coefficient and elastic modulus for the internal solder joints, and establish a digital twin of the LED display. Based on the digital twin of the LED display, the lighting parameters of the CIE standard sky and the upper and lower temperature limits of the thermal cycle are set to obtain a time-varying environmental load sequence. Based on the time-varying environmental load sequence, the lighting and temperature changes are applied to the digital twin of the LED display, and the internal stress and strain distribution of the component caused by the thermal expansion mismatch is iteratively calculated to generate the component stress and strain response field; Extracting the stress tensor and strain tensor of a single solder joint during each thermal cycle based on the stress-strain response field of the component to obtain a stress-strain record of the single solder joint, and obtaining a cumulative damage value of the solder joint based on the stress-strain record of the single solder joint; Based on the cumulative damage value of the solder joint, the cumulative damage value of each solder joint is compared with a preset failure threshold, the luminous state of the corresponding pixel unit is determined to be failed, and a pixel failure state diagram is generated. Based on the pixel failure state diagram, the luminous distribution of the digital twin of the LED display is updated to obtain the simulation visual effect performance index.
2. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the digital twin of the LED display are as follows: The outer contour of the LED display surface and the position of the internal solder joints are mapped in spatial coordinates. The three-dimensional geometric shapes of the display and the internal solder joints are determined by spatial coordinate gridding to obtain a three-dimensional geometric model of the LED display. Based on the three-dimensional geometric model of the LED display screen and the regular arrangement of the LED lamp bead array, the spatial positions of the lamp beads on the display screen surface are set, and the topological connection relationship between each lamp bead and the adjacent lamp beads in the lamp bead array is determined to obtain the topological structure of the LED lamp bead array; Based on the topological structure of the LED lamp bead array, the optical parameters of the display surface and the mechanical properties of the internal solder joints are specified respectively, and each facet of the display surface is associated with a bidirectional reflectance distribution function. The internal solder joints are assigned preset thermal expansion coefficients and elastic moduli one by one to obtain a digital twin of the LED display.
3. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the time-varying environmental load sequence are: Based on the digital twin of the LED display, the sky diffuse radiation distribution in the illumination model is set, and the sky brightness distribution curve of the CIE standard sky and the direct solar radiation intensity value are mapped one by one to each facet on the surface of the digital twin of the display to form an illumination parameter set; Based on the illumination parameter set, the upper and lower temperature limits of the thermal cycle are set. By defining the periodic variation pattern of the upper and lower temperature limits, the temperature variation rate and duration within each cycle are determined one by one, and the temperature values at each time node are recorded to form a thermal cycle temperature parameter set. Based on the thermal cycle temperature parameter set, the sky radiation intensity at each moment in the illumination parameter set and the temperature parameter at the corresponding moment are called, and they are combined one by one to form environmental load change points arranged in time sequence. All environmental load change points are connected to form a complete time-varying environmental load sequence.
4. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the stress-strain response field of the component are: Extracting the light intensity value and the corresponding temperature value at each time node from the time-varying environmental load sequence, mapping the light intensity value and the temperature value to each surface element of the LED display digital twin one by one, and forming a surface element time-by-time environmental boundary load sequence; Based on the hourly environmental boundary load sequence of the bin, the temperature value of each solder point in the digital twin of the LED display screen at each time node is calculated, the thermal expansion coefficient value and elastic modulus value of each solder point are called, and the thermal expansion deformation of each solder point is calculated one by one by multiplying the temperature difference and the thermal expansion coefficient value to form a solder point thermal expansion deformation sequence; Based on the solder joint thermal expansion deformation sequence, the deformation differences between each solder joint are calculated point by point and time by calling the elastic modulus value and the spatial geometric topological relationship between the solder joints, and the stress and strain numerical distribution caused by the deformation differences inside the solder joint connection is calculated point by point and layer by layer to generate the component stress and strain response field.
5. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the stress and strain record of a single solder joint are as follows: Based on the component stress-strain response field, the data layer of each time node in the component stress-strain response field is traversed one by one, the stress tensor components and strain tensor components corresponding to all solder joint positions are extracted for each time node, and the stress tensor components and strain tensor components are numbered according to the order of the time nodes to obtain a set of solder joint time series stress and strain components arranged in chronological order; According to the solder point time series stress and strain component set, all time node data in the solder point time series stress and strain component set are periodically grouped according to the time interval division method of the thermal cycle period, and the stress tensor components and strain tensor components of all time nodes at the same solder point position in each cycle are aggregated and sorted to obtain the solder point periodic stress and strain component set within the thermal cycle period; Based on the set of periodic stress and strain components of the solder joints within the thermal cycle, the cycle number, stress tensor component, and strain tensor component of a single solder joint within each thermal cycle are archived item by item, and the complete stress tensor component and strain tensor component of each solder joint within each thermal cycle are recorded cycle by cycle to generate a single solder joint stress and strain record.
6. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the cumulative damage value of the solder joint are as follows: Based on the stress and strain record of the single solder point, the maximum principal strain component and the minimum principal strain component of the strain tensor corresponding to the single solder point in each thermal cycle are extracted one by one, the difference between the maximum principal strain component and the minimum principal strain component is calculated and divided by two to form the strain amplitude of the single solder point in each thermal cycle, and the maximum principal stress component and the minimum principal stress component of the principal stress tensor corresponding to the single solder point in each thermal cycle are simultaneously extracted, the difference between the maximum principal stress component and the minimum principal stress component is calculated and divided by two to form the stress amplitude of the single solder point in each thermal cycle, and a stress amplitude and strain amplitude sequence of the single solder point is obtained; Calculating the normalized cyclic strain energy damage factor of each thermal cycle of the single solder joint based on the stress amplitude and strain amplitude sequence of the single solder joint; Based on the normalized cyclic strain energy damage factor of each thermal cycle of a single solder joint, all normalized cyclic strain energy damage factors are accumulated and summed in the order of the thermal cycle numbers to form the cumulative damage value of the single solder joint under the current full life cycle.
7. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the pixel failure status map are: Based on the solder point cumulative damage value, extract the solder point cumulative damage value corresponding to each solder point one by one, and simultaneously read the pixel unit number associated with each solder point, bind the solder point cumulative damage value to the corresponding pixel unit one by one, and form a solder point cumulative damage value mapping table; Calculating the failure determination factor of each solder joint according to the solder joint cumulative damage value mapping table; Based on the failure determination factor, when the failure determination factor is greater than or equal to zero, the corresponding pixel unit is marked as a failure state, and when the failure determination factor is less than zero, the corresponding pixel unit is marked as a normal state, and a pixel failure state map is generated.
8. The LED display performance simulation method based on digital twin according to claim 1 is characterized in that: The steps for obtaining the simulation visual effect performance index are as follows: Based on the pixel failure state map, for each surface bin, first retrieve the pixel unit state corresponding to the bin, set the luminous radiation brightness to zero when the pixel unit is in a failed state, and read the original luminous radiation brightness when the pixel unit is in a normal state, and perform spatial mapping on the luminous radiation brightness of all bins to form a luminous distribution map; Based on the luminous distribution diagram, the radiant brightness of the exit point of the digital twin of the LED display screen in the target observation direction is calculated; Based on the radiant brightness of the exit point, all valid observation points in the digital twin of the LED display are traversed, and the radiant brightness of the highest exit point and the radiant brightness of the lowest exit point in the target display area are extracted. When the radiant brightness of the lowest exit point is not equal to zero, the radiant brightness of the highest exit point is subtracted from the radiant brightness of the lowest exit point and then divided by the radiant brightness of the lowest exit point to obtain the simulation visual effect performance index.
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