Switch self-locking circuit

Abstract

The invention provides a switch self-locking circuit, which comprises a power supply, a power-on signal receiving module, a first divider resistor module, a silicon controlled rectifier, a triode, a driving optocoupler module and an output module, and is characterized in that the first end of the power-on signal receiving module is connected with the power supply, and the second end of the power-on signal receiving module is electrically connected with the control end of the silicon controlled rectifier; the anode of the silicon controlled rectifier is electrically connected with the output end of the first divider resistor module, and the cathode of the starting signal receiving module is grounded; a first input end of the first divider resistor module is connected with a power supply, and a second input end of the first divider resistor module is electrically connected with a base electrode of the triode; the emitter of the triode is connected with a power supply; the collector of the triode is electrically connected with the input end of the driving optocoupler module; the first output end of the driving optocoupler module is grounded, the second output end of the driving optocoupler module is electrically connected with the first input end of the output module, and the third output end of the driving optocoupler module is electrically connected with the second input end of the output module. And the reliability of the switch self-locking circuit is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of switch self-locking technology, and in particular to a switch self-locking circuit. Background Art

[0002] Switch control is the technology that uses electrical signals or physical switches to control whether the current in a circuit is interrupted or conducted, thereby controlling the operating state of the device. Currently, to improve operational convenience and reduce the power consumption required to maintain the control signal, more and more switch self-locking technologies are being discovered and applied.

[0003] However, traditional switch control circuits require continuous control and drive to maintain the on state, resulting in high power consumption and low reliability. The control signal is also susceptible to interference, which can easily lead to false triggering. With the development of science and technology, the reliability, stability, and control circuit requirements of power circuits have become more stringent. During use, not only must the output voltage be stable, but the control self-locking circuit must also be controlled. This necessitates a switch self-locking circuit to meet customer and social needs. Summary of the Invention

[0004] The present invention aims to provide a switch self-locking circuit to solve the above technical problems and improve the reliability of the switch self-locking circuit.

[0005] In order to solve the above technical problems, the present invention provides a switch self-locking circuit, comprising: a power supply, a power-on signal receiving module, a first voltage-dividing resistor module, a thyristor, a transistor, a driving optical coupler module and an output module, wherein:

[0006] A first terminal of the power-on signal receiving module is connected to a power supply, and a second terminal of the power-on signal receiving module is electrically connected to a control terminal of a thyristor;

[0007] The anode of the thyristor is electrically connected to the output end of the first voltage-dividing resistor module, and the cathode of the power-on signal receiving module is grounded;

[0008] The first input end of the first voltage-dividing resistor module is connected to a power supply, and the second input end of the first voltage-dividing resistor module is electrically connected to the base of the transistor;

[0009] The emitter of the transistor is connected to a power supply, and the collector of the transistor is electrically connected to the first end of the driving optical coupling module;

[0010] The second end of the driving optical coupling module is electrically connected to the input end of the output module.

[0011] In the above scheme, the self-locking characteristics of the thyristor are utilized, and the power-on signal receiving module is used to trigger the control end of the thyristor once, so that the thyristor can be continuously maintained in the on state by utilizing its own characteristics, thereby achieving the goal of maintaining the on state of the switch without the need for continuous control drive, improving control efficiency and reducing energy consumption; after the thyristor is turned on, the first voltage divider resistor module provides a stable bias for the transistor to achieve the conduction of the transistor, thereby converting the self-locking state of the thyristor into a signal that can stably drive the subsequent system; based on the conduction of the transistor, the driving optocoupler module is also turned on, thereby achieving electrical isolation between the output module and other modules, avoiding interference caused by electromagnetic interference, etc., and improving the safety and stability of the self-locking circuit, and by driving the on state of the optocoupler module, it is easier to identify the current circuit self-locking state, compared with only voltage or current detection, the stability and reliability are better.

[0012] Furthermore, the power-on signal receiving module includes a voltage dividing module, a first switch submodule and a second switch submodule, wherein:

[0013] The first end of the first switch submodule is connected to a power supply, and the second end of the first switch submodule is electrically connected to the first input end of the voltage divider module;

[0014] A first end of the second switch submodule is connected to a power supply, and a second end of the second switch submodule is electrically connected to the second input end of the voltage divider module;

[0015] The output end of the voltage divider module is electrically connected to the control end of the thyristor.

[0016] In the above solution, the reliability of the circuit is improved by providing two switch submodules.

[0017] Furthermore, the first switch submodule includes a first DC power switch, a first capacitor, a first resistor, a second resistor, a first optocoupler, and a first voltage regulator diode, wherein:

[0018] The first resistor is connected in parallel with the second resistor;

[0019] One end of the first resistor is connected to the first DC power switch, and the other end of the first resistor is electrically connected to the first end of the first capacitor;

[0020] The second end of the first capacitor is grounded;

[0021] The positive terminal of the primary side of the first optocoupler is electrically connected to the first end of the first capacitor, the negative terminal of the primary side of the first optocoupler is electrically connected to the negative electrode of the first voltage-stabilizing diode, the positive terminal of the secondary side of the first optocoupler is connected to a power supply, and the negative terminal of the secondary side of the first optocoupler is electrically connected to the first input end of the voltage divider module, wherein the positive terminal of the secondary side of the first optocoupler serves as the first end of the first switch sub-module;

[0022] The anode of the first voltage stabilizing diode is grounded.

[0023] In the above solution, the first switch submodule provides a signal for driving the optocoupler to turn on through the first DC power switch, uses the first capacitor, the first resistor, the second resistor and the first voltage regulator diode to protect the circuit, and uses the first optocoupler to turn on to drive the thyristor to turn on.

[0024] Furthermore, the second switch submodule includes a second DC power switch, a second capacitor, a third resistor, a fourth resistor, a second optocoupler and a second voltage regulator diode, wherein:

[0025] The third resistor is connected in parallel with the fourth resistor;

[0026] One end of the third resistor is connected to the second DC power switch, and the other end of the third resistor is electrically connected to the first end of the second capacitor;

[0027] The second terminal of the second capacitor is grounded;

[0028] The positive terminal of the primary side of the second optocoupler is electrically connected to the first terminal of the second capacitor, the negative terminal of the primary side of the second optocoupler is electrically connected to the negative electrode of the second voltage-stabilizing diode, the positive terminal of the secondary side of the second optocoupler is connected to the power supply, and the negative terminal of the secondary side of the second optocoupler is electrically connected to the second input terminal of the voltage divider module, wherein the positive terminal of the secondary side of the second optocoupler serves as the first terminal of the second switch sub-module;

[0029] An anode of the second voltage stabilizing diode is grounded.

[0030] In the above scheme, the second switch submodule provides a signal for driving the optocoupler to turn on through the second DC power switch, uses the second capacitor, third resistor, fourth resistor and second voltage regulator diode to protect the circuit, and uses the second optocoupler to turn on to drive the thyristor to turn on.

[0031] Furthermore, the switch self-locking circuit further includes a shutdown signal receiving module, wherein:

[0032] One end of the shutdown signal receiving module is electrically connected to the output end of the first voltage-dividing resistor module, and the other end of the shutdown signal receiving module is grounded.

[0033] In the above solution, a design is provided for allowing the thyristor to interrupt the anode and cathode transmission circuits.

[0034] Furthermore, the shutdown signal receiving module includes a third capacitor, a fifth resistor, a sixth resistor, a third optocoupler and a third voltage-stabilizing diode, wherein:

[0035] The fifth resistor and the sixth resistor are connected in parallel;

[0036] One end of the fifth resistor is connected to the shutdown interface, and the other end of the fifth resistor is electrically connected to the first end of the third capacitor;

[0037] The second end of the third capacitor is grounded;

[0038] The positive terminal of the primary side of the third optocoupler is electrically connected to the first end of the third capacitor, the negative terminal of the primary side of the third optocoupler is electrically connected to the negative electrode of the third voltage-stabilizing diode, the positive terminal of the secondary side of the third optocoupler is electrically connected to the output end of the first voltage-dividing resistor module, and the negative terminal of the secondary side of the third optocoupler is grounded;

[0039] The anode of the third voltage stabilizing diode is connected to the third external cathode interface.

[0040] In the above scheme, the shutdown signal receiving module provides a signal for driving the optocoupler to turn on through the shutdown interface, uses the third capacitor, the fifth resistor, the sixth resistor and the third voltage-stabilizing diode to protect the circuit, and uses the third optocoupler to turn on to short-circuit the thyristor, so that the conduction of the anode and cathode of the thyristor is interrupted.

[0041] Furthermore, the voltage divider module includes a seventh resistor, a fourth capacitor and an eighth resistor, wherein:

[0042] The first end of the seventh resistor is electrically connected to the second end of the first switch sub-module;

[0043] The first end of the fourth capacitor is electrically connected to the second end of the seventh resistor, and the second end of the fourth capacitor is grounded;

[0044] A first end of the eighth resistor is electrically connected to a second end of the seventh resistor, and a second end of the eighth resistor is grounded.

[0045] In the above solution, the seventh resistor, the fourth capacitor and the eighth resistor are used to divide the voltage of the thyristor and absorb the peak to prevent interference.

[0046] Furthermore, the driving optical coupling module includes a ninth resistor, a fifth capacitor, a second voltage-dividing resistor module, a tenth resistor, a fourth voltage-stabilizing diode and a fourth optical coupler, wherein:

[0047] A first end of the ninth resistor is electrically connected to the collector of the transistor, and a second end of the ninth resistor is grounded;

[0048] A first end of the fifth capacitor is electrically connected to the collector of the transistor, and a second end of the fifth capacitor is grounded;

[0049] A first end of the second voltage-dividing resistor module is electrically connected to the collector of the transistor, and a second end of the second voltage-dividing resistor module is electrically connected to the first end of the tenth resistor;

[0050] The primary side positive terminal of the fourth optocoupler is electrically connected to the second end of the tenth resistor, the primary side negative terminal of the fourth optocoupler is electrically connected to the cathode of the fourth voltage stabilizing diode, the secondary side positive terminal of the fourth optocoupler is electrically connected to the second input pin of the output module, and the secondary side negative terminal of the fourth optocoupler is electrically connected to the third input pin of the output module;

[0051] The anode of the fourth voltage stabilizing diode is grounded.

[0052] In the above solution, the ninth resistor, the fifth capacitor, the second voltage-dividing resistor module, the tenth resistor, and the fourth voltage-stabilizing diode are used to protect the circuit, and the output of the output module is controlled by the conduction of the fourth optocoupler.

[0053] Furthermore, the output module includes an input filter submodule, a negative logic chip and an output filter submodule, wherein:

[0054] The first input terminal of the input filter submodule is connected to the power supply, the first output terminal of the input filter submodule is grounded, the second output terminal of the input filter submodule is electrically connected to the first input pin of the negative logic chip, and the third output terminal of the input filter submodule is electrically connected to the third input pin of the negative logic chip;

[0055] The second input pin of the negative logic chip is electrically connected to the positive terminal of the secondary side of the fourth optocoupler, the first output pin of the negative logic chip is electrically connected to the first input terminal of the output filter submodule, the second output pin is electrically connected to the second input terminal of the output filter submodule, the third output pin is electrically connected to the third input terminal of the output filter submodule, and the fourth output pin is electrically connected to the fourth input terminal of the output filter submodule.

[0056] In the above solution, the input filter submodule and the output filter submodule are used to filter the input signal.

[0057] Furthermore, the input filter submodule includes a sixth capacitor, a common-mode inductor, a parallel capacitor module, a seventh capacitor and an eighth capacitor, wherein:

[0058] A first end of the sixth capacitor is connected to a power supply, and a second end of the sixth capacitor is grounded;

[0059] The first end of the common-mode inductor is electrically connected to the first end of the sixth capacitor, and the second end of the common-mode inductor is electrically connected to the first input end of the parallel capacitor module;

[0060] The first output end of the parallel capacitor module is grounded, the second output end of the parallel capacitor module is electrically connected to the first input pin of the negative logic chip, and the third output end of the parallel capacitor module is electrically connected to the third input pin of the negative logic chip;

[0061] A first end of the seventh capacitor is electrically connected to the second output end of the parallel capacitor module, and a second end of the seventh capacitor is grounded;

[0062] A first end of the eighth capacitor is electrically connected to the third output end of the parallel capacitor module, and a second end of the eighth capacitor is grounded.

[0063] In the above solution, the input signal is filtered through the sixth capacitor, the common-mode inductor, the parallel capacitor module, the seventh capacitor and the eighth capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A schematic diagram of a partial structure of a switch self-locking circuit provided by one embodiment of the present invention;

[0065] Figure 2 A schematic diagram of a portion of the structure of an output module in a switch self-locking circuit provided in one embodiment of the present invention;

[0066] Figure 3 This is a schematic diagram of another portion of the structure of an output module in a switch self-locking circuit provided by one embodiment of the present invention.

[0067] Reference numerals:

[0068] The power-on signal receiving module 100 , the first switch submodule 110 , the second switch submodule 120 , the power-off signal receiving module 400 , the first voltage-dividing resistor module 200 , the driving optocoupler module 300 , the second voltage-dividing resistor module 310 , the input filter submodule 510 , and the output filter submodule 520 . DETAILED DESCRIPTION

[0069] The following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0070] See Figure 1 This embodiment provides a switch self-locking circuit, including: a power supply, a power-on signal receiving module 100, a first voltage-dividing resistor module 200, a thyristor, a transistor, a driving optical coupler module 300, and an output module, wherein:

[0071] The first terminal of the power-on signal receiving module 100 is connected to the power supply, and the second terminal of the power-on signal receiving module 100 is electrically connected to the control terminal of the thyristor;

[0072] The anode of the thyristor is electrically connected to the output end of the first voltage-dividing resistor module 200, and the cathode of the power-on signal receiving module 100 is grounded;

[0073] The first input end of the first voltage-dividing resistor module 200 is connected to a power supply, and the second input end of the first voltage-dividing resistor module 200 is electrically connected to the base of the transistor;

[0074] The emitter of the transistor is connected to the power supply, and the collector of the transistor is electrically connected to the first end of the driving optical coupler module 300;

[0075] The second end of the driving optical coupling module 300 is electrically connected to the input end of the output module.

[0076] In the above scheme, the self-locking characteristics of the thyristor are utilized, and the power-on signal receiving module 100 is used to trigger the control end of the thyristor once, so that the thyristor can be continuously maintained in the on state by utilizing its own characteristics, thereby achieving the goal of maintaining the on state of the switch without the need for continuous control drive, improving control efficiency and reducing energy consumption; after the thyristor is turned on, the first voltage divider resistor module 200 provides a stable bias for the transistor to achieve the conduction of the transistor, thereby converting the self-locking state of the thyristor into a signal that can stably drive the subsequent system; based on the conduction of the transistor, the driving optocoupler module 300 is also turned on, thereby achieving electrical isolation between the output module and other modules, avoiding interference caused by electromagnetic interference, etc., and improving the safety and stability of the self-locking circuit, and by driving the on state of the optocoupler module 300, it is easier to identify the current circuit self-locking state, compared with only voltage or current detection, the stability and reliability are better.

[0077] In another embodiment, the power-on signal receiving module 100 includes a voltage divider module, a first switch submodule 110 and a second switch submodule 120, wherein:

[0078] A first terminal of the first switch submodule 110 is connected to a power supply, and a second terminal of the first switch submodule 110 is electrically connected to a first input terminal of the voltage divider module;

[0079] A first end of the second switch submodule 120 is connected to the power supply, and a second end of the second switch submodule 120 is electrically connected to the second input end of the voltage divider module;

[0080] The output end of the voltage divider module is electrically connected to the control end of the thyristor.

[0081] It should be noted that the current generated by the power supply needs to pass through the voltage divider module to reach the control end of the thyristor after passing through the first switch sub-module 110 and / or the second switch sub-module 120. Because the control end of the thyristor only requires a very small current to be triggered, the voltage divider module is used to limit the current and protect the circuit.

[0082] In another embodiment, the voltage divider module includes a seventh resistor, a fourth capacitor, and an eighth resistor, wherein:

[0083] A first end of the seventh resistor is electrically connected to the second end of the first switch submodule 110;

[0084] A first end of the fourth capacitor is electrically connected to the second end of the seventh resistor, and a second end of the fourth capacitor is grounded;

[0085] The first end of the eighth resistor is electrically connected to the second end of the seventh resistor, and the second end of the eighth resistor is grounded. It should be noted that the first end of the seventh resistor is also electrically connected to the second end of the second switch submodule 120. The current generated by the power supply passes through the first switch submodule 110 and / or the second switch submodule 120, then passes through the seventh resistor (R7), and then passes through the fourth capacitor (C4) and the eighth resistor (R8) connected in parallel. The seventh and eighth resistors prevent +27V from being directly connected to the control end of the thyristor, thereby preventing the control end of the thyristor from being burned due to overcurrent. In addition, the thyristor requires the voltage between the control end and the cathode to be greater than a certain threshold to be triggered. Therefore, the seventh and eighth resistors are used to divide the voltage so that the voltage at the control end of the thyristor can reach the threshold. In addition, high-frequency spike interference may exist in the first switch submodule 110 and the second switch submodule 120 in the on state. Such interference may cause the control end of the thyristor to be triggered before reaching the triggering threshold. Therefore, the fourth capacitor is used to direct such interference to the ground, thereby achieving spike absorption and anti-interference.

[0086] In another embodiment, the first switch submodule 110 includes a first DC power switch, a first capacitor, a first resistor, a second resistor, a first optocoupler, and a first Zener diode, wherein:

[0087] The first resistor is connected in parallel with the second resistor;

[0088] One end of the first resistor is connected to the first DC power switch, and the other end of the first resistor is electrically connected to the first end of the first capacitor;

[0089] The second terminal of the first capacitor is grounded;

[0090] The positive terminal of the primary side of the first optocoupler is electrically connected to the first end of the first capacitor, the negative terminal of the primary side of the first optocoupler is electrically connected to the negative electrode of the first voltage-stabilizing diode, the positive terminal of the secondary side of the first optocoupler is connected to the power supply, and the negative terminal of the secondary side of the first optocoupler is electrically connected to the first input terminal of the voltage divider module, wherein the positive terminal of the secondary side of the first optocoupler serves as the first end of the first switch sub-module 110;

[0091] The anode of the first Zener diode is grounded.

[0092] It should be noted that the first DC power switch ( Figure 1 The DC power supply 1 switch in the circuit is an external input and can be a button, a PLC output pin, etc., and is used to output a high-level pulse signal for power on. The high-level pulse signal for power on then passes through a first resistor (R1) and a second resistor (R2) connected in parallel. The first resistor and the second resistor are used to limit the current to prevent the external power supply from being too large, thereby protecting subsequent components. Secondly, they are also used for voltage division, thereby determining the magnitude of the current subsequently flowing through the first optocoupler. The first capacitor (C1) is used to direct the interference carried by the high-level pulse signal for power on to the ground, thereby achieving peak absorption and anti-interference. A high-level pulse signal for power on then flows through the primary side of the first optocoupler (U1). The primary side of the first optocoupler is composed of a light-emitting diode (LED), and the secondary side is composed of a phototransistor. After the high-level pulse signal for power on is input from the positive terminal of the primary side of the first optocoupler (terminal A of U1) and output from the negative terminal of the primary side of the first optocoupler (terminal K of U1), the LED lights up, causing the secondary side of the first optocoupler to be affected by light and then turned on. This in turn causes power to be input from the positive terminal of the secondary side of the first optocoupler (terminal C of U1) and output from the negative terminal of the secondary side of the first optocoupler (terminal E of U1). At the same time, voltage clamping is achieved through the first voltage regulator diode (D1) to prevent excessive voltage from burning out the LED.

[0093] In another embodiment, the second switch submodule 120 includes a second DC power switch, a second capacitor, a third resistor, a fourth resistor, a second optocoupler, and a second Zener diode, wherein:

[0094] The third resistor is connected in parallel with the fourth resistor;

[0095] One end of the third resistor is connected to the second DC power switch, and the other end of the third resistor is electrically connected to the first end of the second capacitor;

[0096] The second terminal of the second capacitor is grounded;

[0097] The positive terminal of the primary side of the second optocoupler is electrically connected to the first end of the second capacitor, the negative terminal of the primary side of the second optocoupler is electrically connected to the negative electrode of the second voltage-stabilizing diode, the positive terminal of the secondary side of the second optocoupler is connected to the power supply, and the negative terminal of the secondary side of the second optocoupler is electrically connected to the second input terminal of the voltage divider module, wherein the positive terminal of the secondary side of the second optocoupler serves as the first end of the second switch sub-module 120;

[0098] The anode of the second Zener diode is grounded.

[0099] It should be noted that the second DC power switch ( Figure 1 The DC power supply 2 switch in the circuit) belongs to an external input and can be a button, a PLC output pin, etc., which is used to output a high-level pulse signal for power on. It can be seen that the components of the first switch submodule 110 and the second switch submodule 120 are the same, and the functions produced by the components are also the same, specifically: the power-on high-level pulse signal output by the second DC power switch passes through the third resistor (R3) and the fourth resistor (R4) connected in parallel, wherein the third resistor and the fourth resistor are used to limit the current to prevent the external power supply current from being too large, thereby protecting the subsequent components. Secondly, they are also used for voltage division, thereby determining the size of the current flowing through the second optocoupler subsequently. The second capacitor (C2) is used to lead the interference carried by the power-on high-level pulse signal to the ground, thereby achieving peak absorption and anti-interference. A high-level power-on pulse signal then flows through the primary side of the second optocoupler (U2). The primary side of the second optocoupler is composed of a light-emitting diode (LED), and the secondary side is composed of a phototransistor. After the high-level power-on pulse signal is input from the positive terminal of the primary side of the second optocoupler (terminal A of U2) and output from the negative terminal of the primary side of the second optocoupler (terminal K of U2), the LED lights up, causing the secondary side of the second optocoupler to be affected by light and then turn on. This allows power to be input from the positive terminal of the secondary side of the second optocoupler (terminal C of U2) and output from the negative terminal of the secondary side of the second optocoupler (terminal E of U2). At the same time, voltage clamping is achieved through the second voltage regulator diode (D2) to prevent excessive voltage from burning the LED. By setting up two similar modules, multiple control source access can be achieved. For example, the first DC power switch and the second DC power switch can use different types of external inputs. For example, the first DC power switch can be connected to a PLC input, and the second DC power switch can be connected to a remote wireless module. The input sides of the first switch submodule 110 and the second switch submodule 120 are completely electrically isolated, preventing interference between them. As long as either DC power switch issues a high-level pulse signal to activate power-on, the power-on signal receiving module 100 can be triggered to turn on. Furthermore, this increases fault tolerance; even if one optocoupler fails, the power-on signal receiving module 100 remains operational.

[0100] It should be noted that the purpose of the power-on signal receiving module 100 is to turn on the thyristor (Q2). Due to the inherent characteristics of the thyristor, as long as the control terminal (Q2's G terminal) of the thyristor is triggered, the anode (Q2's A terminal) and cathode (Q2's K terminal) of the thyristor will remain in a conductive state. Even if the current at the control terminal is disconnected, the conductive state of the anode and cathode will not be affected. This is the self-locking nature of the thyristor. Therefore, under such a circuit structure setting, the power-on high-level pulse signal output by the DC power supply 1 switch or the DC power supply 2 switch is a short pulse used to trigger the control terminal (Q2's G terminal) and does not require continuous control and driving.

[0101] In another embodiment, the switch self-locking circuit further includes a shutdown signal receiving module 400, wherein:

[0102] One end of the shutdown signal receiving module 400 is electrically connected to the output end of the first voltage-dividing resistor module 200 , and the other end of the shutdown signal receiving module 400 is grounded.

[0103] It should be noted that due to the inherent characteristics of the thyristor, disconnecting the anode and cathode of the thyristor requires reducing the current between the anode and cathode of the thyristor (Q2) to zero. Therefore, a shutdown signal receiving module 400 is introduced to allow the current output by the power supply to flow through the first voltage-dividing resistor module 200, then through the shutdown signal receiving module 400, and then directly to ground. This short-circuits the thyristor, reducing its current to zero and thus allowing the thyristor to exit the self-locking state.

[0104] In another embodiment, the shutdown signal receiving module 400 includes a third capacitor, a fifth resistor, a sixth resistor, a third optocoupler, and a third voltage-stabilizing diode, wherein:

[0105] The fifth resistor and the sixth resistor are connected in parallel;

[0106] One end of the fifth resistor is electrically connected to the shutdown interface, and the other end of the fifth resistor is electrically connected to the first end of the third capacitor;

[0107] A second terminal of the third capacitor is grounded;

[0108] The positive terminal of the primary side of the third optocoupler is electrically connected to the first terminal of the third capacitor, the negative terminal of the primary side of the third optocoupler is electrically connected to the negative electrode of the third voltage-regulating diode, the positive terminal of the secondary side of the third optocoupler is electrically connected to the output terminal of the first voltage-dividing resistor module 200, and the negative terminal of the secondary side of the third optocoupler is grounded;

[0109] The anode of the third voltage stabilizing diode is connected to the third external cathode interface.

[0110] It should be noted that the shutdown interface ( Figure 1The shutdown (in the shutdown) belongs to an external input and can be a button, a PLC output pin, etc., which is used to output a shutdown high-level pulse signal. The shutdown high-level pulse signal output by the shutdown interface passes through the fifth resistor (R5) and the sixth resistor (R6) connected in parallel, wherein the fifth resistor and the sixth resistor are used to limit the current to prevent the external power supply current from being too large, thereby protecting the subsequent components. Secondly, they are also used for voltage division, thereby determining the size of the current subsequently flowing through the third optocoupler. The third capacitor (C3) is used to lead the interference carried by the shutdown high-level pulse signal to the ground, thereby achieving peak absorption and anti-interference. A high-level shutdown pulse signal then flows through the primary side of the third optocoupler (U3). The primary side of the third optocoupler is composed of a light-emitting diode (LED), and the secondary side is composed of a phototransistor. After the high-level startup pulse signal is input from the positive terminal of the primary side of the third optocoupler (terminal A of U3) and output from the negative terminal of the primary side of the third optocoupler (terminal K of U3), the LED lights up, causing the secondary side of the third optocoupler to be affected by light and turn on. In turn, power is input from the positive terminal of the secondary side of the third optocoupler (terminal C of U3) and output from the negative terminal of the secondary side of the third optocoupler (terminal E of U3). At the same time, voltage clamping is achieved through the third voltage regulator diode (D3) to prevent excessive voltage from burning out the LED.

[0111] It should be noted that the first voltage divider resistor module 200 includes R11, R12, and R13, wherein R11 and R13 are connected in parallel, the first end of R12 is connected to the power supply, the second end of R12 is electrically connected to the first end of R11, and the second end of R11 is electrically connected to the anode of Q2. The emitter of the transistor (terminal E of Q1) is connected to the power supply, the collector of the transistor (terminal C of Q1) is electrically connected to the input of the driver optocoupler module 300, and the base of the transistor (terminal B of Q1) is electrically connected to the first end of R11. After the anode and cathode of the thyristor are turned on, the base of Q1 is connected to ground (0V reference) through R11, R13, and the cathode of Q2. R12 pulls up current to the base of Q1, causing the emitter voltage to be 0.7V higher than the base (0V), thereby establishing the transistor Vbe (Vbe refers to the base-emitter voltage of the transistor), biasing Q1, and thus turning on Q1.

[0112] In another embodiment, the driving optical coupling module 300 includes a ninth resistor, a fifth capacitor, a second voltage-dividing resistor module 310, a tenth resistor, a fourth voltage-stabilizing diode, and a fourth optical coupler, wherein:

[0113] A first end of the ninth resistor is electrically connected to the collector of the transistor, and a second end of the ninth resistor is grounded;

[0114] A first end of the fifth capacitor is electrically connected to the collector of the transistor, and a second end of the fifth capacitor is grounded;

[0115] A first end of the second voltage-dividing resistor module 310 is electrically connected to the collector of the transistor, and a second end of the second voltage-dividing resistor module 310 is electrically connected to the first end of the tenth resistor;

[0116] The primary side positive terminal of the fourth optocoupler is electrically connected to the second end of the tenth resistor, the primary side negative terminal of the fourth optocoupler is electrically connected to the cathode of the fourth voltage stabilizing diode, the secondary side positive terminal of the fourth optocoupler is electrically connected to the second input pin of the output module, and the secondary side negative terminal of the fourth optocoupler is electrically connected to the third input pin of the output module;

[0117] The anode of the fourth voltage stabilizing diode is grounded.

[0118] It should be noted that the reference Figure 1 and Figure 2 , after Q1 and Q2 are both turned on, the power current flows through Q1, is output from the collector of Q1 to the ninth resistor (R9) and then grounded, and current limiting is performed by R9. The fifth capacitor (C5) is connected in parallel with R9, and C5 is used to achieve peak absorption and anti-interference. The second voltage-dividing resistor module 310 includes R14, R15, and R16, wherein R14, R15, and R16 are connected in parallel, the first end of R14 is electrically connected to the collector of the transistor, and the second end of R14 is electrically connected to the first end of the tenth resistor. The current output by the collector of Q1 flows through the second voltage-dividing resistor module 310 and the tenth resistor (R10) in sequence, playing the role of voltage division, thereby protecting the fourth optocoupler (U4). At the same time, voltage clamping is achieved by the fourth voltage-stabilizing diode (D4) to prevent the LED in the fourth optocoupler from being burned due to excessive voltage. Q1, Q2, the ninth resistor, the fifth capacitor, the second voltage-dividing resistor module 310, the tenth resistor, the fourth voltage-stabilizing diode, and the fourth optocoupler form a loop, so that the power supply current output by the collector flows through the second voltage-dividing resistor module 310 and the tenth resistor and is input to the positive terminal of the primary side of the fourth optocoupler (terminal A of U4), and flows out from the negative terminal of the primary side of the fourth optocoupler (terminal K of U4), thereby making the positive terminal (terminal C of U4) and the negative terminal (terminal E of U4) of the secondary side of the fourth optocoupler conductive. It can be understood that Figure 1 K+5 is the positive terminal interface of the secondary side of the fourth optocoupler, and K-5 is the negative terminal interface of the secondary side of the fourth optocoupler. Through these two interfaces, K+5 and K-5, the control signal is sent to the negative logic chip (MK1) of the output module.

[0119] In another embodiment, the output module includes an input filter submodule 510, a negative logic chip, and an output filter submodule 520, wherein:

[0120] The first input terminal of the input filter submodule 510 is connected to the power supply, the first output terminal of the input filter submodule 510 is grounded, the second output terminal of the input filter submodule 510 is electrically connected to the first input pin of the negative logic chip, and the third output terminal of the input filter submodule 510 is electrically connected to the third input pin of the negative logic chip;

[0121] The second input pin of the negative logic chip is electrically connected to the positive terminal of the secondary side of the fourth optocoupler, the first output pin of the negative logic chip is electrically connected to the first input terminal of the output filter sub-module 520, the second output pin is electrically connected to the second input terminal of the output filter sub-module 520, the third output pin is electrically connected to the third input terminal of the output filter sub-module 520, and the fourth output pin is electrically connected to the fourth input terminal of the output filter sub-module 520.

[0122] It should be noted that in order to remove unnecessary frequency components in the signal and retain useful signals, an input filtering submodule 510 and an output filtering submodule 520 are provided, thereby improving the reliability of the final output result.

[0123] In another embodiment, the input filter submodule 510 includes a sixth capacitor, a common-mode inductor, a parallel capacitor module, a seventh capacitor, and an eighth capacitor, wherein:

[0124] A first terminal of the sixth capacitor is connected to a power supply, and a second terminal of the sixth capacitor is grounded;

[0125] The first end of the common-mode inductor is electrically connected to the first end of the sixth capacitor, and the second end of the common-mode inductor is electrically connected to the first input end of the parallel capacitor module;

[0126] The first output end of the parallel capacitor module is grounded, the second output end of the parallel capacitor module is electrically connected to the first input pin of the negative logic chip, and the third output end of the parallel capacitor module is electrically connected to the third input pin of the negative logic chip;

[0127] A first end of the seventh capacitor is electrically connected to the second output end of the parallel capacitor module, and a second end of the seventh capacitor is grounded;

[0128] A first end of the eighth capacitor is electrically connected to the third output end of the parallel capacitor module, and a second end of the eighth capacitor is grounded.

[0129] It should be noted that the reference Figure 2 and Figure 3, set the VI+ terminal of the negative logic chip (MK1) to input pin 1 (first input pin), the ON / OFF terminal to input pin 2 (second input pin), and the VI- terminal to input pin 3 (third input pin). On the output side, the VO+ terminal is output pin 8, the SE+ terminal is output pin 7, the Trim terminal is output pin 6, the SE- terminal is output pin 5, and the VO- terminal is output pin 4. Among them, input pin 1 is used to connect to +27V, the positive input voltage, input pin 2 is connected to K+5 of U4, used to input the control signal output by K+5, input pin 3 is grounded, used for the negative output voltage, connected to +27VGND, output pin 4 is used for the negative output, output pin 6 is for output voltage fine-tuning, output pin 8 is the positive output, output pin 7 is the signal positive input, used to control the power output, and output pin 5 is the signal ground input. The low-frequency filtering in the power supply 27+V is filtered out by the sixth capacitor (C6), and then the high-frequency common-mode interference is suppressed by the common-mode inductor L2. The processed current is input to the parallel capacitor module, wherein the parallel capacitor module includes C19, C20, C21, C22, and C23 in parallel. The first output end of the parallel capacitor module is grounded, the first input end of the parallel capacitor module is electrically connected to the common-mode inductor L2, the second output end of the parallel capacitor module is electrically connected to the input pin 1 of the negative logic chip (MK1), and the third output end of the parallel capacitor module is electrically connected to the input pin 3 of the negative logic chip. The first end of the seventh capacitor (C7) is electrically connected to one end of C23 in the parallel capacitor module, the second end of C7 is grounded, the first end of the eighth capacitor (C8) is electrically connected to the other end of C23 in the parallel capacitor module, and the second end of the eighth capacitor is grounded. Wherein, C7 and C8 are decoupling capacitors, and are common-mode suppressed with EARTH. The positive terminal K+5 of the U4 secondary is electrically connected to input pin 2 of the output module's negative logic chip (MK1) via the K5+ interface. The negative terminal K-5 of the U4 secondary is electrically connected to input pin 3 (VI-) of the output module's negative logic chip (MK1) via the K5- interface. R22, with one end connected to K5+ and the other to K5-, is a control-terminal series capacitor used to limit the current in the U4 secondary.

[0130] In output filter submodule 520, the first end of R18 is connected to MK1 output pin 7, and the second end is connected to the first end of R23. The second end of R23 is electrically connected to MK1 output pin 5. The first end of R19 is connected to the first end of R18, and the second end is electrically connected to the first end of R24. The second end of R24 is electrically connected to the second end of R23. The first end of R20 is electrically connected to MK1 output pin 6, and the second end is connected to the second end of R18. C14, C15, C16, and C17 are parallel capacitors used to filter high-frequency noise in the output voltage. C7 and C25 are used for grounding filtering, connected to the power supply EARTH. L1 is the output inductor, forming an LC low-pass filter for filtering. Pins 1, 2, 3, and 4 are located next to L1. * is the center core. L1 is a dual-winding magnetic toroidal inductor. Pins 1 and 3 of L1 are the input terminals, and Pins 2 and 4 of L1 are the output terminals. L1 is used to filter ripple. C8, C9, C12, and C18 provide filtering in the middle section to ensure voltage stability. D5 is a voltage-stabilizing diode, preventing overvoltage. The 1, 2, and 3 in D5 represent its input and output terminals. C10 and C11 provide final filtering. R17 and R21 are terminal load resistors, improving load stability. OUT+ and OUT- are the final output terminals.

[0131] The following provides examples of different situations:

[0132] When the power-on signal receiving module 100 is not driven, with only power input and no pulse drive signal input: the DC is connected to other circuits via +27V and +27VGND, and the DC power supply switches 1 and 2 do not provide a high-level power-on pulse signal, optocouplers U1 and U2 have no drive current, the optocoupler secondary (c / e) is not conducting, the +27V does not provide a drive voltage to thyristor Q2, and thyristor Q2 is not driven to conduct through the voltage divider R7 and R8 in the voltage divider module, assuming a high impedance state. Simultaneously, the base of Q1 is not pulled low by Q2 and the first voltage divider resistor module 200, the second voltage divider resistor module 310 has no voltage, the primary of optocoupler U4 has no drive voltage, the optocoupler secondary is in a high impedance state, and the control terminal of the optocoupler U4's secondary control module MK1 is not pulled low (module MK1 uses a negative logic module, with the control terminal (ON / OFF) pulling the output low; floating or high-level output shuts down). Module MK1 has no output, and the power conversion unit has no output.

[0133] When the power-on signal receiving module 100 is driven, when the DC power supply 1 is turned on (or the DC power supply 2 is turned on): the DC is connected to the circuit through +27V and +27VGND, and the DC power supply 1 switch or the DC power supply 2 switch gives a power-on high-level pulse signal, the optocouplers U1 and U2 have a driving current, and when the primary current of the optocoupler U1 (optocoupler U2) is sufficient, the optocoupler secondary (c / e) is turned on, and the R7 and R8 voltage divider is turned on to provide drive to the thyristor Q2, and the thyristor is turned on through the anode and cathode. The voltage divider resistor module 200 and Q2 divide the voltage to provide drive for the B pole of the transistor Q1, and the C and E of the transistor Q1 are turned on and output, the primary of the optocoupler U3 is turned on, and the secondary of the optocoupler U3 is turned on at the same time to present a low-resistance state, pulling down the voltage of the control terminal of the module MK1 to a low level. The module MK1 outputs, because the thyristor drive does not require continuity, the control power-on signal receiving module 100 can be turned on once (the DC power supply 1 switch and the DC power supply 2 switch are in an OR relationship, as long as one is turned on, the subsequent circuit will be turned on).

[0134] When the shutdown signal receiving module 400 is driven, DC is connected to the circuit through +27V and +27VGND. When the DC shutdown signal is applied to the high-frequency shutdown pulse signal, the optocoupler U3 is driven by current, the optocoupler secondary (c / e) is turned on, the anode and cathode of the thyristor Q2 are shorted, and the thyristor Q2 is turned off, the cathode and anode are shorted, and the thyristor Q2 is turned off. At the same time, the control terminal of Q1 is not pulled low through R11 and Q2, the primary of the optocoupler U4 is not conducting, and the secondary of the optocoupler U4 is also not conducting, showing a high-impedance state. The control terminal of module MK1 is floating, and module MK1 has no output. Because the thyristor drive does not require continuity, the shutdown signal receiving module 400 can be turned on after a single application. The power supply is in the shutdown working state.

[0135] The circuit adopts protection double pulse switch backup circuit, pulse delay anti-interference circuit, thyristor self-locking circuit and other circuits to meet the requirements of high reliability and high stability with fewer components.

[0136] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A switch self-locking circuit, characterized in that: include: Power supply, power-on signal receiving module, first voltage divider resistor module, thyristor, transistor, driver optocoupler module and output module, including: A first terminal of the power-on signal receiving module is connected to a power supply, and a second terminal of the power-on signal receiving module is electrically connected to a control terminal of a thyristor; The anode of the thyristor is electrically connected to the output end of the first voltage-dividing resistor module, and the cathode of the power-on signal receiving module is grounded; The first input end of the first voltage-dividing resistor module is connected to a power supply, and the second input end of the first voltage-dividing resistor module is electrically connected to the base of the transistor; The emitter of the transistor is connected to a power supply, and the collector of the transistor is electrically connected to an input end of a driving optical coupling module; The first output end of the driving optocoupler module is grounded, the second output end of the driving optocoupler module is electrically connected to the first input end of the output module, and the third output end of the driving optocoupler module is electrically connected to the second input end of the output module.

2. The switch self-locking circuit according to claim 1, characterized in that: The power-on signal receiving module includes a voltage dividing module, a first switch submodule and a second switch submodule, wherein: The first end of the first switch submodule is connected to a power supply, and the second end of the first switch submodule is electrically connected to the first input end of the voltage divider module; A first end of the second switch submodule is connected to a power supply, and a second end of the second switch submodule is electrically connected to the second input end of the voltage divider module; The output end of the voltage divider module is electrically connected to the control end of the thyristor.

3. The switch self-locking circuit according to claim 2, characterized in that: The first switch submodule includes a first DC power switch, a first capacitor, a first resistor, a second resistor, a first optocoupler, and a first voltage regulator diode, wherein: The first resistor is connected in parallel with the second resistor; One end of the first resistor is connected to the first DC power switch, and the other end of the first resistor is electrically connected to the first end of the first capacitor; The second end of the first capacitor is grounded; The positive terminal of the primary side of the first optocoupler is electrically connected to the first end of the first capacitor, the negative terminal of the primary side of the first optocoupler is electrically connected to the negative electrode of the first voltage-stabilizing diode, the positive terminal of the secondary side of the first optocoupler is connected to a power supply, and the negative terminal of the secondary side of the first optocoupler is electrically connected to the first input end of the voltage divider module, wherein the positive terminal of the secondary side of the first optocoupler serves as the first end of the first switch sub-module; The anode of the first voltage stabilizing diode is grounded.

4. The switch self-locking circuit according to claim 2, characterized in that: The second switch submodule includes a second DC power switch, a second capacitor, a third resistor, a fourth resistor, a second optocoupler and a second voltage regulator diode, wherein: The third resistor is connected in parallel with the fourth resistor; One end of the third resistor is connected to the second DC power switch, and the other end of the third resistor is electrically connected to the first end of the second capacitor; The second terminal of the second capacitor is grounded; The positive terminal of the primary side of the second optocoupler is electrically connected to the first terminal of the second capacitor, the negative terminal of the primary side of the second optocoupler is electrically connected to the negative electrode of the second voltage-stabilizing diode, the positive terminal of the secondary side of the second optocoupler is connected to the power supply, and the negative terminal of the secondary side of the second optocoupler is electrically connected to the second input terminal of the voltage divider module, wherein the positive terminal of the secondary side of the second optocoupler serves as the first terminal of the second switch sub-module; An anode of the second voltage stabilizing diode is grounded.

5. The switch self-locking circuit according to claim 1, characterized in that: The switch self-locking circuit further includes a shutdown signal receiving module, wherein: One end of the shutdown signal receiving module is electrically connected to the output end of the first voltage-dividing resistor module, and the other end of the shutdown signal receiving module is grounded.

6. The switch self-locking circuit according to claim 5, characterized in that: The shutdown signal receiving module includes a third capacitor, a fifth resistor, a sixth resistor, a third optical coupler and a third voltage stabilizing diode, wherein: The fifth resistor and the sixth resistor are connected in parallel; One end of the fifth resistor is connected to the shutdown interface, and the other end of the fifth resistor is electrically connected to the first end of the third capacitor; The second end of the third capacitor is grounded; The positive terminal of the primary side of the third optocoupler is electrically connected to the first end of the third capacitor, the negative terminal of the primary side of the third optocoupler is electrically connected to the negative electrode of the third voltage-stabilizing diode, the positive terminal of the secondary side of the third optocoupler is electrically connected to the output end of the first voltage-dividing resistor module, and the negative terminal of the secondary side of the third optocoupler is grounded; The anode of the third voltage stabilizing diode is connected to the third external cathode interface.

7. The switch self-locking circuit according to claim 2, characterized in that: The voltage divider module includes a seventh resistor, a fourth capacitor and an eighth resistor, wherein: The first end of the seventh resistor is electrically connected to the second end of the first switch sub-module; The first end of the fourth capacitor is electrically connected to the second end of the seventh resistor, and the second end of the fourth capacitor is grounded; A first end of the eighth resistor is electrically connected to a second end of the seventh resistor, and a second end of the eighth resistor is grounded.

8. The switch self-locking circuit according to claim 1, characterized in that: The driving optical coupling module includes a ninth resistor, a fifth capacitor, a second voltage-dividing resistor module, a tenth resistor, a fourth voltage-stabilizing diode, and a fourth optical coupler, wherein: A first end of the ninth resistor is electrically connected to the collector of the transistor, and a second end of the ninth resistor is grounded; A first end of the fifth capacitor is electrically connected to the collector of the transistor, and a second end of the fifth capacitor is grounded; A first end of the second voltage-dividing resistor module is electrically connected to the collector of the transistor, and a second end of the second voltage-dividing resistor module is electrically connected to the first end of the tenth resistor; The primary side positive terminal of the fourth optocoupler is electrically connected to the second end of the tenth resistor, the primary side negative terminal of the fourth optocoupler is electrically connected to the cathode of the fourth voltage stabilizing diode, the secondary side positive terminal of the fourth optocoupler is electrically connected to the second input pin of the output module, and the secondary side negative terminal of the fourth optocoupler is electrically connected to the third input pin of the output module; The anode of the fourth voltage stabilizing diode is grounded.

9. The switch self-locking circuit according to claim 8, characterized in that: The output module includes an input filter submodule, a negative logic chip and an output filter submodule, wherein: The first input terminal of the input filter submodule is connected to the power supply, the first output terminal of the input filter submodule is grounded, the second output terminal of the input filter submodule is electrically connected to the first input pin of the negative logic chip, and the third output terminal of the input filter submodule is electrically connected to the third input pin of the negative logic chip; The second input pin of the negative logic chip is electrically connected to the positive terminal of the secondary side of the fourth optocoupler, the first output pin of the negative logic chip is electrically connected to the first input terminal of the output filter submodule, the second output pin is electrically connected to the second input terminal of the output filter submodule, the third output pin is electrically connected to the third input terminal of the output filter submodule, and the fourth output pin is electrically connected to the fourth input terminal of the output filter submodule.

10. The switch self-locking circuit according to claim 9, characterized in that: The input filter submodule includes a sixth capacitor, a common-mode inductor, a parallel capacitor module, a seventh capacitor, and an eighth capacitor, wherein: A first end of the sixth capacitor is connected to a power supply, and a second end of the sixth capacitor is grounded; The first end of the common-mode inductor is electrically connected to the first end of the sixth capacitor, and the second end of the common-mode inductor is electrically connected to the first input end of the parallel capacitor module; The first output end of the parallel capacitor module is grounded, the second output end of the parallel capacitor module is electrically connected to the first input pin of the negative logic chip, and the third output end of the parallel capacitor module is electrically connected to the third input pin of the negative logic chip; A first end of the seventh capacitor is electrically connected to the second output end of the parallel capacitor module, and a second end of the seventh capacitor is grounded; A first end of the eighth capacitor is electrically connected to the third output end of the parallel capacitor module, and a second end of the eighth capacitor is grounded.

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