Photoelectric packaging structure

Abstract

The invention provides a photoelectric packaging structure. The structure comprises a first substrate, an electric integrated chip and a first optical integrated chip, wherein the electric integrated chip is located on the surface of one side of the first substrate. The first optical integrated chip internally comprises a plurality of vertical cavity surface emitting lasers which are distributed in a matrix, the plurality of first optical integrated chips circumferentially surround the electric integrated chip, and each vertical cavity surface emitting laser comprises a light emitting part located at the bottom of the substrate. Wherein the vertical cavity surface emitting laser emits an optical signal towards the surface of one side of the first substrate through the light emitting part based on signal data of the electric integrated chip. Optical signals do not need to be transmitted at the tops of the electric integrated chip and the first optical integrated chip, and a reflection structure does not need to be arranged, so that heat dissipation can be performed at the tops of the electric integrated chip and the first optical integrated chip, the heat dissipation space is increased, the heat dissipation rate is improved, the working temperature of the electric integrated chip and the optical integrated chip is reduced, and the service life of the electric integrated chip is prolonged. And the reliability of the photoelectric packaging structure is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of optoelectronic integration technology, and in particular to an optoelectronic packaging structure. Background Art

[0002] Among the current optoelectronic co-packaging technologies, optoelectronic packaging structures based on VCSEL (Vertical Cavity Surface Emitting Laser) are commonly used. Compared with other packaging structures, VCSEL has the advantage of low cost. Therefore, optoelectronic packaging structures based on VCSEL have broad application prospects.

[0003] In existing optoelectronic packaging, an ASIC (Application Specific Integrated Circuit) chip and multiple VCSEL chips are packaged on the same PCB (Printed Circuit Board). The VCSEL chips are placed around the ASIC chip to achieve goals such as reducing signal attenuation, lowering system power consumption, reducing costs, and achieving high integration. In actual operation, the heat dissipated around the ASIC chip is enormous, necessitating the installation of additional heat sinks above the ASIC and VCSEL chips to reduce the surrounding temperature of the ASIC chip.

[0004] However, VCSEL can only emit laser light along the surface perpendicular to the PCB board, and an additional reflective structure must be set on the top of the VCSEL to achieve edge-emission coupling of the laser. The reflective structure will affect the heat dissipation space and heat dissipation efficiency of the heat sink, causing the ASIC chip and VCSEL chip to be in a high-temperature working environment for a long time, reducing the reliability of the optoelectronic packaging structure. Summary of the Invention

[0005] To overcome the problems existing in the related art, the present disclosure provides an optoelectronic packaging structure.

[0006] The optoelectronic packaging structure provided by the present disclosure includes:

[0007] a first substrate;

[0008] an electrical integrated chip, located on one side surface of the first substrate;

[0009] a plurality of first optical integrated chips, each of which includes a plurality of vertical cavity surface emitting lasers distributed in a matrix, the plurality of first optical integrated chips circumferentially surrounding the electrical integrated chip, the vertical cavity surface emitting laser including a light emitting portion located at the bottom of the substrate;

[0010] The vertical cavity surface emitting laser emits an optical signal toward a surface of one side of the first substrate through the light emitting portion based on the signal data of the electrical integrated chip.

[0011] In some embodiments, the first optical integrated chip includes a plurality of first through holes, wherein the first through holes expose the light emitting portion of the vertical cavity surface emitting laser, and the first through holes are arranged in a one-to-one correspondence with the light emitting portion of the vertical cavity surface emitting laser;

[0012] The optical signal emitted by the vertical cavity surface emitting laser is incident on a side surface of the first substrate through the first through hole.

[0013] In some embodiments, it further includes:

[0014] a light guide unit located on a side surface of the first substrate, the light guide unit being configured to receive an optical signal emitted by the vertical cavity surface emitting laser to a side surface of the first substrate, and transmit the optical signal to an optical signal output interface along a first direction parallel to the surface of the first substrate;

[0015] The orthographic projection of the light guide unit toward the surface of the first substrate at least covers the orthographic projection of the first through hole toward the surface of the first substrate.

[0016] In some embodiments, the light guide unit includes a plurality of light guide coupling sub-units and a light guide sub-unit, wherein the light guide coupling sub-units are spaced apart and distributed on a side surface of the first substrate, and the orthographic projection of the light guide coupling sub-unit toward the first substrate at least covers the orthographic projection of the first through hole toward the first substrate, and the light guide coupling sub-units are arranged in a one-to-one correspondence with the first through hole; the light guide sub-units are located on a side surface of the first substrate and extend along a first direction parallel to the surface of the first substrate to the optical signal output interface.

[0017] The light guide sub-unit is located on a side of the light guide coupling sub-unit away from the electrical integrated chip, and is connected to the light guide coupling sub-unit.

[0018] In some embodiments, the light guide coupling subunit comprises a waveguide coupler, and the material of the light guide subunit comprises a polymer waveguide material.

[0019] In some embodiments, the first optical integrated chip includes a plurality of second through holes distributed at intervals, and the second through holes penetrate the first optical integrated chip;

[0020] The optoelectronic packaging structure further includes: a conductive unit, the conductive unit being located on a side surface of the first substrate close to the electrical integrated chip, and including a first conductive sub-unit and a plurality of second conductive sub-units, wherein a first end of the first conductive sub-unit is electrically connected to the electrical integrated chip, and the first conductive sub-units are arranged extending from the electrical integrated chip along a surface parallel to the first substrate;

[0021] The first end of the second conductive sub-unit is electrically connected to the second end of the first conductive sub-unit. The second conductive sub-unit is located in the second through hole and is electrically connected to the vertical cavity surface emitting laser.

[0022] In some embodiments, it also includes: a second optical integrated chip, the second optical integrated chip includes a plurality of matrix-distributed photodetectors, the plurality of photodetectors circumferentially surround the electrical integrated chip, and the photodetectors are located between the electrical integrated chip and the vertical cavity surface emitting laser, and the photodetectors include a light input portion located near the surface of the first substrate.

[0023] In some embodiments, the second optical integrated chip includes a plurality of third through holes, the third through holes exposing the light-entering parts of the photodetectors, and the third through holes are arranged in a one-to-one correspondence with the light-entering parts of the photodetectors.

[0024] The optical signal on the surface of the first substrate is incident on the light input portion through the third through hole.

[0025] In some embodiments, it further includes: light guide coupling sub-units, the light guide coupling sub-units are spaced apart and distributed on one side surface of the first substrate, the third through holes expose the light guide coupling sub-units, and are arranged in a one-to-one correspondence with the light guide coupling sub-units.

[0026] In some embodiments, the second optical integrated chip includes a plurality of fourth through holes distributed at intervals, and the fourth through holes penetrate the second optical integrated chip;

[0027] The second conductive sub-unit is located in the fourth through hole, and the photodetector is electrically connected to the second end of the second conductive sub-unit.

[0028] In some embodiments, it further includes:

[0029] A second substrate is located on one side surface of the first substrate, wherein the electrical integrated chip, the first optical integrated chip and the second optical integrated chip are located on a side surface of the second substrate away from the first substrate.

[0030] In some embodiments, the system further includes: a second substrate, the second substrate being located on a side surface of the first substrate, the electrical integrated chip being located on a side surface of the second substrate away from the first substrate;

[0031] A third substrate is located on one side surface of the first substrate, and the first optical integrated chip and the second optical integrated chip are located on a side surface of the third substrate away from the first substrate.

[0032] The technical solutions provided by the embodiments of the present disclosure may have the following beneficial effects:

[0033] The disclosed embodiment arranges an electrical integrated chip on a side surface of a first substrate, and then surrounds the electrical integrated chip with a plurality of vertical cavity surface emitting lasers in a first optical integrated chip. This allows the high-speed electrical signals output by the electrical integrated chip to be converted into optical signals through the vertical cavity surface emitting lasers surrounding the electrical integrated chip, thereby achieving efficient information transmission using optical signals. Furthermore, the vertical cavity surface emitting laser emits light through the light-emitting portion of its substrate, and can emit the optical signal to the surface of the first substrate. The optical signal is then transmitted on the surface of the first substrate, eliminating the need to transmit the optical signal on top of the electrical integrated chip and the first optical integrated chip, and eliminating the need to set up a reflective structure. Therefore, heat dissipation can be performed on top of the electrical integrated chip and the first optical integrated chip, thereby increasing the heat dissipation space and the heat dissipation rate, thereby reducing the operating temperature of the electrical integrated chip and the optical integrated chip and improving the reliability of the optoelectronic packaging structure.

[0034] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0036] Figure 1 is a schematic cross-sectional view of an optoelectronic packaging structure shown in some exemplary embodiments;

[0037] Figure 2 is a schematic cross-sectional structural diagram of an optoelectronic packaging structure shown in some other exemplary embodiments;

[0038] Figure 3 is a schematic cross-sectional view of an optoelectronic packaging structure shown in some further exemplary embodiments;

[0039] Figure 4 1 is a schematic cross-sectional structural diagram of an optoelectronic packaging structure shown in some further exemplary embodiments. DETAILED DESCRIPTION

[0040] Here, the technical solutions in the embodiments (or "implementations") of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.

[0041] If there are terms related to directional indications or positional relationships in the embodiments of the present disclosure (such as up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationship, movement, etc. between the components in a specific posture (as shown in the accompanying drawings); if the specific posture changes, the directional indication or positional relationship will also change accordingly. In addition, the terms "first" and "second" in the embodiments of the present disclosure are used only for descriptive convenience and should not be understood as indicating or implying relative importance.

[0042] Among the current optoelectronic co-packaging technologies, optoelectronic packaging structures based on VCSEL (Vertical Cavity Surface Emitting Laser) are commonly used. Compared with other packaging structures, VCSEL has the advantage of low cost. Therefore, optoelectronic packaging structures based on VCSEL have broad application prospects.

[0043] In existing optoelectronic packaging, an ASIC (Application Specific Integrated Circuit) chip and multiple VCSEL chips are packaged on the same PCB (Printed Circuit Board). The VCSEL chips are placed around the ASIC chip to achieve goals such as reducing signal attenuation, lowering system power consumption, reducing costs, and achieving high integration. In actual operation, the heat dissipated around the ASIC chip is enormous, necessitating the installation of additional heat sinks above the ASIC and VCSEL chips to reduce the surrounding temperature of the ASIC chip.

[0044] However, VCSELs can only emit laser light perpendicular to the surface of the PCB board, requiring an additional reflective structure on top of the VCSEL to achieve edge-emission coupling of the laser. This reflective structure affects the heat dissipation space and efficiency of the heat dissipation device, causing the ASIC chip and VCSEL chip to operate in a high-temperature environment for a long time, reducing the reliability of the optoelectronic packaging structure. Furthermore, in existing technologies, edge coupling solutions with internal fiber routing are generally adopted. The structural design requires comprehensive consideration of the coordination between the PCB board and the optical path, as well as the additional challenges that the fiber routing itself poses to the internal space. For example, the spatial setup of the fiber optic rack, the need for electromagnetic shielding, dust prevention, and tolerance control all need to be considered, increasing the difficulty of preparing the optoelectronic packaging structure.

[0045] In order to solve the above problems, the present disclosure proposes an optoelectronic packaging structure. To further illustrate the present disclosure, the following embodiments are provided:

[0046] See Figure 1 and Figure 2 The optoelectronic packaging structure may include: a first substrate 10, an electrical integrated chip 20, and a plurality of first optical integrated chips 30. The electrical integrated chip 20 is located on a side surface of the first substrate 10. Each first optical integrated chip 30 includes a plurality of vertical cavity surface emitting lasers 301 distributed in a matrix. The plurality of first optical integrated chips 30 circumferentially surround the electrical integrated chip 20. The vertical cavity surface emitting laser 301 includes a light emitting portion 3011 located at the bottom of the substrate. The vertical cavity surface emitting laser 301 emits an optical signal toward the surface of the first substrate 10 through the light emitting portion 3011 based on the signal data of the electrical integrated chip 20.

[0047] The first substrate 10 may include, but is not limited to, a PCB (Printed Circuit Board). The PCB can provide physical support for electronic components such as the electrical integrated chip 20 and the first optical integrated chip 30. Furthermore, by providing structures such as pads and vias on the PCB, various electronic components can be fixed to the PCB, achieving high-density integration and electrical connections between the chips.

[0048] The electrical integrated circuit 20 may include, but is not limited to, an ASIC (Application Specific Integrated Circuit) chip. The ASIC chip can process high-speed electrical signals from switches or other devices. These high-speed electrical signals may include data signals and control signals. The ASIC chip can quickly process and forward these signals to meet the high-bandwidth, low-latency communication requirements of data centers and other application scenarios.

[0049] The first optical integrated chip 30 may include, but is not limited to, a silicon substrate chip. It is understood that the first optical integrated chip 30 may include a driver to drive the vertical cavity surface emitting laser 301. Specifically, the ASIC chip can convert the received high-speed electrical signal into a signal format suitable for processing by the optical engine. For example, the high-speed signal from the ASIC chip can be input into the driver of the first optical integrated chip 30, which further drives the vertical cavity surface emitting laser 301 to emit light, converting the signal data from the electrical integrated chip 20 into an optical signal for transmission.

[0050] For example, multiple vertical cavity surface emitting lasers 301 can be circumferentially surrounded by the electrical integrated chip 20 to achieve high-density optical transmission and reception functions within a limited space. This can improve the integration of the optical engine, allowing more optical signal processing functions to be integrated on a single substrate, thereby meeting the needs of application scenarios such as data centers for high-bandwidth, high-density optical communications. In a specific embodiment, the vertical cavity surface emitting laser 301 can be packaged onto a side surface of the substrate 10 using COB (Chip on Board) packaging technology, which facilitates the heat dissipation function of the packaging structure.

[0051] It should be noted that the light emitting direction of the VCSEL 301 is perpendicular to the surface of the first substrate 10 , that is, the VCSEL 301 can emit light from the top or the bottom of the substrate.

[0052] In this embodiment, the vertical cavity surface emitting laser 301 emits light through the light emitting portion 3011 at the bottom of the substrate, and can directly incident the optical signal onto the surface of the first substrate 10, thereby transmitting the optical signal on the surface of the first substrate 10.

[0053] The optoelectronic packaging structure of this embodiment, by placing the electrical integrated chip 20 on a side surface of the first substrate 10 and then surrounding the electrical integrated chip 20 with multiple vertical cavity surface emitting lasers 301 in the first optical integrated chip 30, can convert the high-speed electrical signals output by the electrical integrated chip 20 into optical signals through the surrounding vertical cavity surface emitting lasers 301, thereby achieving efficient information transmission using optical signals. Furthermore, the vertical cavity surface emitting lasers 301 emit light through the light output portion 3011 of their substrate, and can emit the optical signals to the surface of the first substrate 10. The optical signals are transmitted on the surface of the first substrate 10, eliminating the need to transmit optical signals on top of the electrical integrated chip 20 and the first optical integrated chip 30, and eliminating the need for a reflective structure. Therefore, heat can be dissipated on top of the electrical integrated chip 20 and the first optical integrated chip 30, increasing the heat dissipation space and the heat dissipation rate, thereby reducing the operating temperature of the electrical integrated chip 20 and the optical integrated chip, and improving the reliability of the optoelectronic packaging structure.

[0054] In one embodiment, see Figure 1 The first optical integrated chip 30 includes a plurality of first through holes 302. The first through holes 302 expose the light-emitting portions 3011 of the vertical-cavity surface-emitting laser 301, and the first through holes 302 are arranged in a one-to-one correspondence with the light-emitting portions 3011 of the vertical-cavity surface-emitting laser 301. The optical signal emitted by the vertical-cavity surface-emitting laser 301 is incident on a side surface of the first substrate 10 through the first through holes 302.

[0055] For example, the length of the first through hole 302 can be set according to actual conditions and is not specifically limited in this embodiment. The aperture of the first through hole 302 can be set according to the light emitting portion 3011 of the vertical cavity surface emitting laser 301. The aperture of the first through hole 302 can be greater than or equal to the diameter of the light emitting portion 3011 to expose the light emitting portion 3011 and realize effective transmission of the optical signal.

[0056] The optoelectronic packaging structure in the embodiment of the present application, by providing a plurality of first through-holes 302 within the first optical integrated chip 30, can expose the light-emitting portion of the vertical cavity surface emitting laser 301 through the first through-holes 302, and then the optical signal emitted by the vertical cavity surface emitting laser 301 can be incident on the surface of the first substrate 10 through the first through-holes 302, so that the optical signal is transmitted on the surface of the first substrate 10. In addition, by adjusting the position and size of the first through-holes 302, the first through-holes 302 completely expose the light-emitting portion 3011 of the vertical cavity surface emitting laser 301, so that the laser light emitted by the light-emitting portion 3011 is completely incident on the surface of the first substrate 10, which can reduce the loss of the optical signal. The light-emitting portion 3011 of the vertical cavity surface emitting laser 301 is arranged in a one-to-one correspondence with the first through-holes 302, which can ensure that the optical signals emitted by different light-emitting portions 3011 are transmitted through different first through-holes 302, which can reduce interference between signals, improve signal integrity, and ensure the stability and efficiency of signal transmission.

[0057] In some embodiments, please refer to Figure 1 and Figure 2 The optoelectronic packaging structure may further include a light guide unit 40. The light guide unit 40 is located on a side of the first substrate 10 away from the first optical integrated chip 30. The light guide unit 40 is configured to receive optical signals emitted by the vertical cavity surface emitting laser 301 onto the surface of the first substrate 10 and transmit the optical signals to the optical signal output interface along a first direction parallel to the surface of the first substrate 10. The orthographic projection of the light guide unit 40 onto the surface of the first substrate 10 at least covers the orthographic projection of the first through hole 302 onto the surface of the first substrate 10.

[0058] Exemplarily, the light guide unit 40 is disposed on a side of the first substrate 10 away from the first optical integrated chip 30, allowing the optical signal emitted by the vertical cavity surface emitting laser 301 to be directly coupled into the light guide unit 40 and transmitted to the optical signal output interface along a first direction parallel to the surface of the first substrate 10, thereby allowing the optical signal to be transmitted on the surface of the first substrate 10. Furthermore, the orthographic projection of the light guide unit 40 toward the surface of the first substrate 10 at least covers the orthographic projection of the first through hole 302 toward the surface of the first substrate 10, ensuring that the light guide unit 40 effectively couples the optical signal emitted from the first through hole 302.

[0059] The optoelectronic packaging structure in the embodiment of the present application can directly couple the laser light emitted by the vertical cavity surface emitting laser 301 by providing a light guide unit 40 on the surface of the first substrate 10 away from the first optical integrated chip 30. This can reduce the loss and reflection of the optical signal during transmission, improve the coupling efficiency of the optical signal, and ensure the quality of the optical signal. Furthermore, the distance between the light guide unit 40 and the first through hole 302 can be adjusted to adjust the path of optical signal transmission, thereby reducing the loss and interference of the optical signal during transmission. This can further improve the transmission efficiency of the optical signal. Since the optical signal is transmitted directly in the light guide unit 40 above the first substrate 10, there is no need to provide a complex edge coupling structure, which can simplify the transmission path of the optical signal. At the same time, it is more conducive to the heat dissipation of the optoelectronic packaging structure and improve the reliability of the optoelectronic packaging structure.

[0060] In some embodiments, please refer to Figure 1 and Figure 2 The light guide unit 40 may include a plurality of light guide coupling subunits 401 and light guide subunits 402. The light guide coupling subunits 401 are spaced apart and distributed on the surface of the first substrate 10 away from the electrical integrated chip 20. The orthographic projections of the light guide coupling subunits 401 toward the first substrate 10 at least cover the orthographic projections of the first through holes 302 toward the first substrate 10. The light guide coupling subunits 401 are arranged in a one-to-one correspondence with the first through holes 302. The light guide subunits 402 are located on a side surface of the light guide coupling subunits 401 on the first substrate 10 and extend along a first direction parallel to the surface of the first substrate 10 to the optical signal output interface. The light guide subunits 402 are located on a side of the light guide coupling subunits 401 away from the electrical integrated chip 20 and are connected to the light guide coupling subunits 401.

[0061] For example, the orthographic projection of the lightguide coupling subunit 401 onto the first substrate 10 at least covers the orthographic projection of the first through-hole 302 onto the first substrate 10, ensuring that the optical signal emitted by the vertical cavity surface emitting laser 301 can be efficiently coupled into the lightguide unit 40, thereby preventing optical signal loss. The lightguide subunit 402 is located on the surface of the first substrate 10 and extends along a first direction parallel to the surface of the first substrate 10 to the optical signal output interface. This allows the optical signal coupled to the lightguide coupling subunit 401 to be transmitted along the surface of the first substrate 10 to the optical signal output interface.

[0062] In a preferred embodiment, the optical coupling subunit 401 includes a waveguide coupler, and the material of the optical coupling subunit 402 may include a polymer waveguide material. The waveguide coupler can efficiently couple the optical signal emitted by the vertical cavity surface emitting laser 301 into the polymer waveguide material, converting the original transmission path of the optical signal so that it is transmitted along the surface of the first substrate 10. The waveguide coupler can also achieve conversion of optical signals of different modes. For example, it can convert the Gaussian mode optical signal emitted by the vertical cavity surface emitting laser 301 into a mode suitable for transmission in the polymer waveguide.

[0063] Polymer waveguide materials can be coated or grown on the surface or intermediate layer of PCBs, enabling arbitrary routing on PCBs. Compared to fiber optic routing, polymer waveguide materials offer greater flexibility and adaptability, eliminating issues like fiber winding and tolerances, and simplifying optoelectronic packaging structures. Furthermore, polymer waveguide materials offer excellent light refraction, reducing optical signal transmission losses. Polymer waveguides can also be coated on flexible substrates, enhancing the practicality and applicability of optoelectronic packaging structures.

[0064] The optoelectronic packaging structure in the embodiment of the present application can transmit the optical signal emitted by the vertical cavity surface emitting laser 301 to the surface of the first substrate 10 in a direction parallel to the surface of the first substrate 10 by setting the optical coupling subunit 401, thereby realizing the conversion of the optical signal transmission path. By setting the optical coupling subunit 402, the optical signal coupled by the optical coupling subunit 401 can be transmitted along the surface of the first substrate 10 to the optical signal output interface, thereby realizing efficient transmission of the optical signal. Therefore, the optoelectronic packaging structure provided in the embodiment of the present application does not require the additional provision of a reflective structure to realize the coupling of the optical signal, and can realize the transmission of the optical signal from the surface of the first substrate 10 to the optical signal output interface, which can increase the heat dissipation space of the optoelectronic packaging structure and further improve the reliability of the optoelectronic packaging structure.

[0065] In some embodiments, please refer to Figure 1 and Figure 2The first optical integrated chip 30 includes a plurality of second through-holes 303 spaced apart from each other, and the second through-holes 303 extend through the first optical integrated chip 30. The optoelectronic packaging structure further includes a conductive unit 50, which is located on a surface of the first substrate 10 adjacent to the electrical integrated chip 20 and includes a first conductive sub-unit 501 and a plurality of second conductive sub-units 502. The first ends of the first conductive sub-units 501 are electrically connected to the electrical integrated chip 20, and the first conductive sub-units 501 extend from the electrical integrated chip 20 and are arranged parallel to the surface of the first substrate 10. The first ends of the second conductive sub-units 502 are electrically connected to the second ends of the first conductive sub-units 501. The second conductive sub-units 502 are located within the second through-holes 303 and are electrically connected to the vertical cavity surface emitting laser 301.

[0066] For example, the diameter and length of the second through holes 303 can be set according to actual conditions and are not limited in this embodiment. The second through holes 303 can be arranged in a spaced manner along a first direction parallel to the surface of the base. Of course, in other embodiments, they can also be reasonably arranged according to needs.

[0067] The conductive element 50 can be, but is not limited to, a metal conductor, such as a copper conductor. The first conductive sub-element 501 extends from the electrical integrated chip 20 and is arranged parallel to the surface of the first substrate 10, thereby enabling transmission of electrical signals across the surface of the first substrate 10. Furthermore, by disposing the second conductive sub-element 502 within the second through-hole 303, the electrical signal transmitted by the first conductive sub-element 501 can be delivered to the electrode of the vertical cavity surface emitting laser 301 in the first optical integrated chip 30, thereby enabling electrical signal transmission from the electrical integrated chip 20 to the optical integrated chip.

[0068] It is understood that the second end of the second conductive subunit 502 may include a pad (not shown), and the pad and the electrode of the vertical cavity surface emitting laser 301 may be connected via a metal wire 5021 to achieve electrical connection. Of course, in other embodiments, the second end of the second conductive subunit 502 and the electrode of the vertical cavity surface emitting laser 301 may be electrically connected in any feasible manner.

[0069] The optoelectronic packaging structure of the embodiment of the present application can realize the transmission of the electrical signal of the electrical integrated chip 20 to the vertical cavity surface emitting laser 301 in the first optical integrated chip 30 on the surface of the first substrate 10 by setting the conductive unit 50. By setting the second conductive sub-unit 502 in the first through hole 302 of the first optical integrated chip 30, the layered transmission of optical signals and electrical signals can be realized, thereby avoiding interference between signals and improving the transmission efficiency of signals.

[0070] In some embodiments, see Figure 3 and Figure 4, and may further include: a second optical integrated chip 60. The second optical integrated chip 60 includes a plurality of photodetectors 601 distributed in a matrix. The plurality of photodetectors 601 circumferentially surround the electrical integrated chip 20. The photodetectors 601 are located between the electrical integrated chip 20 and the vertical cavity surface emitting laser 301. The photodetectors 601 include a light receiving portion 6011 located near the surface of the first substrate 10.

[0071] For example, the second optical integrated chip 60 may include, but is not limited to, a silicon substrate chip. It is understood that the second optical integrated chip 60 may include a transimpedance amplifier (TIA) 70 , which can convert the photocurrent signal output by the photodetector 601 into a voltage signal, which is then transmitted to the electrical integrated chip 20 via the conductive unit 50 .

[0072] The photodetector 601 may include, but is not limited to, a photodiode. In other embodiments, the photodetector 601 may be another electrical device that converts optical signals into electrical signals. The light inlet 6011 of the photodetector 601 is located near the surface of the first substrate 10. It is understood that optical signals on the surface of the first substrate 10 can be incident on the photodetector 601 through the light inlet 6011 of the photodetector 601. The photodetector 601 then converts the optical signals into electrical signals that are transmitted to the electronic integrated chip 20, thereby achieving signal conversion and transmission.

[0073] The optoelectronic packaging structure in the embodiment of the present application, by providing a photodetector 601, can convert optical signals into electrical signals, thereby enabling the received optical signals to be converted into electrical signals and transmitted to the electrical integrated chip 20, completing data transmission between the electrical integrated chip 20 and other devices. Furthermore, the light receiving portion 6011 of the photodetector 601 is positioned near a side surface of the first substrate 10, allowing optical signals to be received through the surface of the first substrate 10. This allows heat to be dissipated above the electrical integrated chip 20 and the second optical integrated chip 60, thereby increasing the space and efficiency of heat dissipation, thereby reducing the operating temperature of the electrical integrated chip 20 and improving the reliability of the optoelectronic packaging structure.

[0074] In some embodiments, please refer to Figure 3 and Figure 4 The second optical integrated chip 60 includes a plurality of third through holes 602, which expose the light input portion 6011 of the photodetector 601. The third through holes 602 are arranged in a one-to-one correspondence with the light input portion 6011 of the photodetector 601, wherein the optical signal on the surface of the first substrate 10 is incident on the light input portion 6011 through the third through holes 602.

[0075] Among them, the through hole length of the third through hole 602 can be set according to actual conditions and is not specifically limited in this embodiment. The aperture of the third through hole 602 can be set according to the light input part 6011 of the photodetector 601. The aperture of the third through hole 602 can be greater than or equal to the diameter of the light input part 6011 to expose the light input part 6011 and realize effective transmission of the optical signal.

[0076] The optoelectronic packaging structure of the embodiment of the present application, by providing multiple third through-holes 602 within the second optical integrated chip 60, can expose the light inlet portion 6011 of the photodetector 601 through the third through-holes 602. This allows optical signals from the surface of the first substrate 10 to be incident on the light inlet portion 6011 of the photodetector 601 through the third through-holes 602, thereby achieving optical signal reception. Furthermore, by adjusting the position and size of the third through-holes 602, the third through-holes 602 can completely expose the light inlet portion 6011 of the photodetector 601, allowing all optical signals from the surface of the first substrate 10 to be incident on the light inlet portion 6011 of the photodetector 601, thereby reducing optical signal loss. The light inlet portion 6011 of the photodetector 601 is arranged in a one-to-one correspondence with the third through-holes 602, ensuring that optical signals incident on different light inlets 6011 are transmitted through different third through-holes 602. This reduces interference between signals, improves signal integrity, and ensures stable and efficient signal transmission.

[0077] In some embodiments, please refer to Figure 3 and Figure 4 The optoelectronic packaging structure may further include a lightguide coupling subunit 401. It is understood that the lightguide coupling subunit 401 in this example may be the same lightguide coupling subunit as the lightguide coupling subunit mentioned in the above embodiment. The lightguide coupling subunits 401 are spaced apart and distributed on a side surface of the first substrate 10. The third through holes 602 expose the lightguide coupling subunits 401 and are disposed in a one-to-one correspondence with each lightguide coupling subunit 401.

[0078] Illustratively, the third through hole 602 exposes the optical coupling subunit 401, which can convert the optical signal on the surface of the first substrate 10 through optical coupling and transmit it to the light input part 6011 of the photodetector 601 through the third through hole 602, thereby realizing the conversion of the optical signal transmission path.

[0079] In the optoelectronic packaging structure of the embodiment of the present application, the light guide coupling subunit 401 is exposed through the third through hole 602. The third through hole 602 can be used as an optical signal transmission path between the light guide coupling subunit 401 and the photodetector 601. The optical signal on the surface of the first substrate 10 is transmitted to the photodetector 601. Furthermore, the one-to-one correspondence between the light guide coupling subunit 401 and the third through hole 602 can ensure one-to-one transmission of optical signals between the light guide coupling subunit 401 and the photodetector 601, thereby reducing interference between signals and improving signal transmission quality.

[0080] In some embodiments, please refer to Figure 3 and Figure 4 The second optical integrated chip 60 includes a plurality of fourth through holes 603 spaced apart from each other. The fourth through holes 603 penetrate the second optical integrated chip 60. The second conductive subunit 502 is located in the fourth through hole 603, and the photodetector 601 is electrically connected to the second end of the second conductive subunit 502.

[0081] For example, the diameter and length of the fourth through hole 603 can be set according to actual conditions and are not limited in this embodiment. The fourth through holes 603 can be arranged in a spaced manner along the first direction parallel to the base surface. Of course, in other embodiments, they can also be reasonably arranged according to needs.

[0082] The optoelectronic packaging structure in the embodiment of the present application, by setting the fourth through hole 603 and setting the second conductive sub-unit 502 in the fourth through hole 603, can realize the transmission of the electrical signal converted by the photodetector 601 to the electrical integrated chip 20 through the second conductive sub-unit 502, and setting the second conductive sub-unit 502 in the fourth through hole 603 inside the second optical integrated chip 60, which can realize the layered transmission of the electrical signal, avoid interference between signals, and improve the accuracy and reliability of signal transmission.

[0083] In some embodiments, see Figure 1 and Figure 3 The optoelectronic packaging structure may further include: a second substrate 01. The second substrate 01 is located on one side of the first substrate 10, wherein the electrical integrated chip 20, the first optical integrated chip 30, and the second optical integrated chip 60 are located on a side of the second substrate 01 away from the first substrate 10.

[0084] For example, the second substrate 01 may include, but is not limited to, a glass first substrate 10. It is understood that the glass first substrate 10 is a transparent first substrate 10, and thus the optical signal emitted by the vertical cavity surface emitting laser 301 can be transmitted through the glass first substrate 10 to the bottom of the first substrate 10, and further transmitted at the bottom of the second substrate 01. Of course, the optical signal at the bottom of the second substrate 01 can also be transmitted to the light inlet 6011 of the photodetector 601 to convert the optical signal into an electrical signal.

[0085] In a preferred embodiment, the second substrate 01 may include a lens 011. The lens 011 extends through the second substrate 01, and the bottom openings of the first through-hole 302 and the third through-hole 602 expose the lens 011. The lens 011 is provided in a one-to-one correspondence with the light guide coupling sub-unit 401. The lens 011 can focus the optical signal, focusing the divergent optical signal into a narrower beam, so that the optical signal is more completely incident on the light guide coupling sub-unit 401 through the first through-hole 302. Of course, the optical signal emitted by the light guide coupling sub-unit 401 can also be more completely incident on the photodetector 601 through the third through-hole 602.

[0086] It should be noted that, in this embodiment, the conductive unit 50 may be located on a surface of the second substrate 01 away from the first substrate.

[0087] The optoelectronic packaging structure in the embodiment of the present application is configured by providing a second substrate 01, with the electrical integrated chip 20, the first optical integrated chip 30, and the second optical integrated chip 60 being disposed on a surface of the second substrate 01 away from the first substrate 10. This can achieve CPO (Co-packaged Optics), thereby shortening the electrical interconnection length between the electrical integrated chip 20 and the optical integrated chip, reducing the power consumption of the optoelectronic packaging structure, reducing signal transmission delays, and reducing interference from the external environment on optical signal transmission. Furthermore, the optoelectronic co-packaging structure can increase the interconnection density between the electrical integrated chip 20 and the optical integrated chip, enabling more data to be transmitted within the same physical space, thereby meeting the high bandwidth requirements of data centers.

[0088] In another embodiment, see Figure 2 and Figure 4 The optoelectronic packaging structure may further include: a second substrate 01A and a third substrate 01B. The second substrate 01A is located on a side surface of the first substrate 10, and the electrical integrated chip 20 is located on a side surface of the second substrate 01A away from the first substrate 10. The third substrate 01B is located on a side surface of the first substrate 10, and the first optical integrated chip 30 and the second optical integrated chip 60 are located on a side surface of the third substrate 01B away from the first substrate 10.

[0089] For example, both the second substrate 01A and the third substrate 01B can be a glass first substrate 10. It is understood that the glass first substrate 10 is a transparent first substrate 10, and thus the optical signal emitted by the vertical cavity surface emitting laser 301 can be transmitted through the glass first substrate 10 to the bottom of the first substrate 10, and further transmitted to the bottom of the third substrate 01B. Of course, the optical signal at the bottom of the third substrate 01B can also be transmitted to the light inlet 6011 of the photodetector 601 to convert the optical signal into an electrical signal.

[0090] In a preferred embodiment, the third substrate 01B may include a lens 011. The lens 011 extends through the third substrate 01B, and the bottom openings of the first through-hole 302 and the third through-hole 602 expose the lens 011. The lens 011 is provided in a one-to-one correspondence with the light guide coupling sub-unit 401. The lens 011 can focus the optical signal, focusing the divergent optical signal into a narrower beam, thereby more completely transmitting the optical signal through the first through-hole 302 and incident on the light guide coupling sub-unit 401. Of course, the optical signal emitted by the light guide coupling sub-unit 401 can also be more completely transmitted through the third through-hole 602 and incident on the photodetector 601.

[0091] It should be noted that, in this embodiment, the conductive unit 50 may penetrate the second substrate 01A and the third substrate 01B and be located on one side surface of the first substrate 10 .

[0092] The optoelectronic packaging structure in the embodiment of the present application, by providing a second substrate 01A and a third substrate 01B, places the electrical integrated chip 20 on the surface of the second substrate 01A away from the first substrate 10, and places the first optical integrated chip 30 and the second optical integrated chip 60 on the surface of the third substrate 01B away from the first substrate 10. This achieves NPO (Near Packaged Optics), which reduces the complexity of the optical signal transmission path and lowers system power consumption. Furthermore, if the first optical integrated chip 30 or the second optical integrated chip 60 fails, only the optical integrated chips can be replaced or repaired, without affecting the normal operation of the electrical integrated chip 20, thus reducing the maintenance cost of the packaging structure.

[0093] The foregoing description describes specific embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0094] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the inventions claimed herein. This disclosure is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not claimed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0095] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

[0096] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. An optoelectronic packaging structure, characterized in that: include: a first substrate; an electrical integrated chip, located on one side surface of the first substrate; a plurality of first optical integrated chips, each of which includes a plurality of vertical cavity surface emitting lasers distributed in a matrix, the plurality of first optical integrated chips circumferentially surrounding the electrical integrated chip, the vertical cavity surface emitting laser including a light emitting portion located at the bottom of the substrate; The vertical cavity surface emitting laser emits an optical signal toward a surface of one side of the first substrate through the light emitting portion based on the signal data of the electrical integrated chip.

2. The optoelectronic packaging structure according to claim 1, wherein: The first optical integrated chip includes a plurality of first through holes, wherein the first through holes expose the light emitting portion of the vertical cavity surface emitting laser, and the first through holes are arranged in a one-to-one correspondence with the light emitting portion of the vertical cavity surface emitting laser; The optical signal emitted by the vertical cavity surface emitting laser is incident on a side surface of the first substrate through the first through hole.

3. The optoelectronic packaging structure according to claim 2, wherein: Also includes: a light guide unit located on a side surface of the first substrate, the light guide unit being configured to receive an optical signal emitted by the vertical cavity surface emitting laser to a side surface of the first substrate, and transmit the optical signal to an optical signal output interface along a first direction parallel to the surface of the first substrate; The orthographic projection of the light guide unit toward the surface of the first substrate at least covers the orthographic projection of the first through hole toward the surface of the first substrate.

4. The optoelectronic packaging structure according to claim 3, wherein: The light guide unit includes a plurality of light guide coupling subunits and light guide subunits. The light guide coupling subunits are spaced apart and distributed on a side surface of the first substrate. The orthographic projections of the light guide coupling subunits toward the first substrate at least cover the orthographic projections of the first through holes toward the first substrate. The light guide coupling subunits are arranged in a one-to-one correspondence with the first through holes. The light guide subunits are located on a side surface of the first substrate and extend along a first direction parallel to the surface of the first substrate to the optical signal output interface. The light guide sub-unit is located on a side of the light guide coupling sub-unit away from the electrical integrated chip, and is connected to the light guide coupling sub-unit.

5. The optoelectronic packaging structure according to claim 4, wherein: The optical guide coupling subunit includes a waveguide coupler, and the material of the optical guide subunit includes a polymer waveguide material.

6. The optoelectronic packaging structure according to claim 1, wherein: The first optical integrated chip comprises a plurality of second through holes distributed at intervals, wherein the second through holes penetrate the first optical integrated chip; The optoelectronic packaging structure further includes: a conductive unit, the conductive unit being located on a side surface of the first substrate close to the electrical integrated chip, and including a first conductive sub-unit and a plurality of second conductive sub-units, wherein a first end of the first conductive sub-unit is electrically connected to the electrical integrated chip, and the first conductive sub-units are arranged extending from the electrical integrated chip along a surface parallel to the first substrate; The first end of the second conductive sub-unit is electrically connected to the second end of the first conductive sub-unit. The second conductive sub-unit is located in the second through hole and is electrically connected to the vertical cavity surface emitting laser.

7. The optoelectronic packaging structure according to claim 1, wherein: Also includes: A second optical integrated chip includes a plurality of matrix-distributed photodetectors, the plurality of photodetectors circumferentially surround the electrical integrated chip, and the photodetectors are located between the electrical integrated chip and the vertical cavity surface emitting laser, and the photodetectors include a light input portion located near the surface of the first substrate.

8. The optoelectronic packaging structure according to claim 7, wherein: The second optical integrated chip includes a plurality of third through holes, wherein the third through holes expose the light-entering parts of the photodetector, and the third through holes are arranged in a one-to-one correspondence with the light-entering parts of the photodetector. The optical signal on the surface of the first substrate is incident on the light input portion through the third through hole.

9. The optoelectronic packaging structure according to claim 8, wherein: It also includes light guide coupling subunits, which are spaced apart and distributed on one side surface of the first substrate. The third through holes expose the light guide coupling subunits and are arranged in a one-to-one correspondence with the light guide coupling subunits.

10. The optoelectronic packaging structure according to any one of claims 6 to 9, characterized in that: The second optical integrated chip comprises a plurality of fourth through holes distributed at intervals, wherein the fourth through holes penetrate the second optical integrated chip; The second conductive sub-unit is located in the fourth through hole, and the photodetector is electrically connected to the second end of the second conductive sub-unit.

11. The optoelectronic packaging structure according to any one of claims 1 to 7, characterized in that: Also includes: a second substrate, the second substrate being located on a side surface of the first substrate, wherein the electrical integrated chip, the first optical integrated chip and the second optical integrated chip are located on a side surface of the second substrate away from the first substrate; or The invention further comprises: a second substrate, the second substrate being located on a side surface of the first substrate, the electrical integrated chip being located on a side surface of the second substrate away from the first substrate; A third substrate is located on one side surface of the first substrate, and the first optical integrated chip and the second optical integrated chip are located on a side surface of the third substrate away from the first substrate.

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